daopt386.pas 96 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  3. development team
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit daopt386;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. cclasses,aasmbase,aasmtai,aasmdata,aasmcpu,cgbase,cgutils,
  25. cpubase;
  26. {******************************* Constants *******************************}
  27. const
  28. { Possible register content types }
  29. con_Unknown = 0;
  30. con_ref = 1;
  31. con_const = 2;
  32. { The contents aren't usable anymore for CSE, but they may still be }
  33. { useful for detecting whether the result of a load is actually used }
  34. con_invalid = 3;
  35. { the reverse of the above (in case a (conditional) jump is encountered): }
  36. { CSE is still possible, but the original instruction can't be removed }
  37. con_noRemoveRef = 4;
  38. { same, but for constants }
  39. con_noRemoveConst = 5;
  40. const
  41. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  42. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  43. OS_16,OS_32,OS_64,
  44. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  45. OS_M32,
  46. OS_ADDR,OS_NO,OS_NO,
  47. OS_NO,
  48. OS_NO,
  49. OS_NO);
  50. {********************************* Types *********************************}
  51. type
  52. TRegEnum = RS_EAX..RS_ESP;
  53. TRegArray = Array[TRegEnum] of tsuperregister;
  54. TRegSet = Set of TRegEnum;
  55. toptreginfo = Record
  56. NewRegsEncountered, OldRegsEncountered: TRegSet;
  57. RegsLoadedForRef: TRegSet;
  58. lastReload: array[RS_EAX..RS_ESP] of tai;
  59. New2OldReg: TRegArray;
  60. end;
  61. {possible actions on an operand: read, write or modify (= read & write)}
  62. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  63. {the possible states of a flag}
  64. TFlagContents = (F_Unknown, F_notSet, F_Set);
  65. TContent = Packed Record
  66. {start and end of block instructions that defines the
  67. content of this register.}
  68. StartMod: tai;
  69. MemWrite: taicpu;
  70. {how many instructions starting with StarMod does the block consist of}
  71. NrOfMods: Word;
  72. {the type of the content of the register: unknown, memory, constant}
  73. Typ: Byte;
  74. case byte of
  75. {starts at 0, gets increased everytime the register is written to}
  76. 1: (WState: Byte;
  77. {starts at 0, gets increased everytime the register is read from}
  78. RState: Byte);
  79. { to compare both states in one operation }
  80. 2: (state: word);
  81. end;
  82. {Contents of the integer registers}
  83. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  84. {contents of the FPU registers}
  85. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  86. {$ifdef tempOpts}
  87. { linked list which allows searching/deleting based on value, no extra frills}
  88. PSearchLinkedListItem = ^TSearchLinkedListItem;
  89. TSearchLinkedListItem = object(TLinkedList_Item)
  90. constructor init;
  91. function equals(p: PSearchLinkedListItem): boolean; virtual;
  92. end;
  93. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  94. TSearchDoubleIntItem = object(TLinkedList_Item)
  95. constructor init(_int1,_int2: longint);
  96. function equals(p: PSearchLinkedListItem): boolean; virtual;
  97. private
  98. int1, int2: longint;
  99. end;
  100. PSearchLinkedList = ^TSearchLinkedList;
  101. TSearchLinkedList = object(TLinkedList)
  102. function searchByValue(p: PSearchLinkedListItem): boolean;
  103. procedure removeByValue(p: PSearchLinkedListItem);
  104. end;
  105. {$endif tempOpts}
  106. {information record with the contents of every register. Every tai object
  107. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  108. TtaiProp = Record
  109. Regs: TRegContent;
  110. { FPURegs: TRegFPUContent;} {currently not yet used}
  111. { allocated Registers }
  112. UsedRegs: TRegSet;
  113. { status of the direction flag }
  114. DirFlag: TFlagContents;
  115. {$ifdef tempOpts}
  116. { currently used temps }
  117. tempAllocs: PSearchLinkedList;
  118. {$endif tempOpts}
  119. { can this instruction be removed? }
  120. CanBeRemoved: Boolean;
  121. { are the resultflags set by this instruction used? }
  122. FlagsUsed: Boolean;
  123. end;
  124. ptaiprop = ^TtaiProp;
  125. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  126. PtaiPropBlock = ^TtaiPropBlock;
  127. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  128. TLabelTableItem = Record
  129. taiObj: tai;
  130. {$ifDef JumpAnal}
  131. InstrNr: Longint;
  132. RefsFound: Word;
  133. JmpsProcessed: Word
  134. {$endif JumpAnal}
  135. end;
  136. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  137. PLabelTable = ^TLabelTable;
  138. {*********************** procedures and functions ************************}
  139. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  140. function RefsEqual(const R1, R2: TReference): Boolean;
  141. function isgp32reg(supreg: tsuperregister): Boolean;
  142. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  143. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  144. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  145. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  146. function reginop(supreg: tsuperregister; const o:toper): boolean;
  147. function instrWritesFlags(p: tai): boolean;
  148. function instrReadsFlags(p: tai): boolean;
  149. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  150. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  151. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  152. const c: tcontent): boolean;
  153. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  154. const c: tcontent; var memwritedestroyed: boolean): boolean;
  155. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  156. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  157. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  158. procedure SkipHead(var p: tai);
  159. function labelCanBeSkipped(p: tai_label): boolean;
  160. procedure RemoveLastDeallocForFuncRes(asmL: TAsmList; p: tai);
  161. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  162. hp: tai): boolean;
  163. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  164. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; var initialusedregs: tregset);
  165. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  166. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  167. function sizescompatible(loadsize,newsize: topsize): boolean;
  168. function OpsEqual(const o1,o2:toper): Boolean;
  169. type
  170. tdfaobj = class
  171. constructor create(_list: TAsmList); virtual;
  172. function pass_1(_blockstart: tai): tai;
  173. function pass_generate_code: boolean;
  174. procedure clear;
  175. function getlabelwithsym(sym: tasmlabel): tai;
  176. private
  177. { asm list we're working on }
  178. list: TAsmList;
  179. { current part of the asm list }
  180. blockstart, blockend: tai;
  181. { the amount of taiObjects in the current part of the assembler list }
  182. nroftaiobjs: longint;
  183. { Array which holds all TtaiProps }
  184. taipropblock: ptaipropblock;
  185. { all labels in the current block: their value mapped to their location }
  186. lolab, hilab, labdif: longint;
  187. labeltable: plabeltable;
  188. { Walks through the list to find the lowest and highest label number, inits the }
  189. { labeltable and fixes/optimizes some regallocs }
  190. procedure initlabeltable;
  191. function initdfapass2: boolean;
  192. procedure dodfapass2;
  193. end;
  194. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  195. procedure incState(var S: Byte; amount: longint);
  196. {******************************* Variables *******************************}
  197. var
  198. dfa: tdfaobj;
  199. {*********************** end of Interface section ************************}
  200. Implementation
  201. Uses
  202. {$ifdef csdebug}
  203. cutils,
  204. {$else}
  205. {$ifdef statedebug}
  206. cutils,
  207. {$else}
  208. {$ifdef allocregdebug}
  209. cutils,
  210. {$endif}
  211. {$endif}
  212. {$endif}
  213. globals, systems, verbose, symconst, cgobj,procinfo;
  214. Type
  215. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  216. var
  217. {How many instructions are between the current instruction and the last one
  218. that modified the register}
  219. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  220. {$ifdef tempOpts}
  221. constructor TSearchLinkedListItem.init;
  222. begin
  223. end;
  224. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  225. begin
  226. equals := false;
  227. end;
  228. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  229. begin
  230. int1 := _int1;
  231. int2 := _int2;
  232. end;
  233. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  234. begin
  235. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  236. (TSearchDoubleIntItem(p).int2 = int2);
  237. end;
  238. function TSearchLinkedList.FindByValue(p: PSearchLinkedListItem): boolean;
  239. var temp: PSearchLinkedListItem;
  240. begin
  241. temp := first;
  242. while (temp <> last.next) and
  243. not(temp.equals(p)) do
  244. temp := temp.next;
  245. searchByValue := temp <> last.next;
  246. end;
  247. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  248. begin
  249. temp := first;
  250. while (temp <> last.next) and
  251. not(temp.equals(p)) do
  252. temp := temp.next;
  253. if temp <> last.next then
  254. begin
  255. remove(temp);
  256. dispose(temp,done);
  257. end;
  258. end;
  259. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  260. {updates UsedRegs with the RegAlloc Information coming after p}
  261. begin
  262. repeat
  263. while assigned(p) and
  264. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  265. ((p.typ = ait_label) and
  266. labelCanBeSkipped(tai_label(current)))) Do
  267. p := tai(p.next);
  268. while assigned(p) and
  269. (p.typ=ait_RegAlloc) Do
  270. begin
  271. case tai_regalloc(p).ratype of
  272. ra_alloc :
  273. Include(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  274. ra_dealloc :
  275. Exclude(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  276. end;
  277. p := tai(p.next);
  278. end;
  279. until not(assigned(p)) or
  280. (not(p.typ in SkipInstr) and
  281. not((p.typ = ait_label) and
  282. labelCanBeSkipped(tai_label(current))));
  283. end;
  284. {$endif tempOpts}
  285. {************************ Create the Label table ************************}
  286. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  287. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  288. { starting with Starttai and ending with the next "real" instruction }
  289. begin
  290. findregalloc := false;
  291. repeat
  292. while assigned(starttai) and
  293. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  294. ((starttai.typ = ait_label) and
  295. labelcanbeskipped(tai_label(starttai)))) do
  296. starttai := tai(starttai.next);
  297. if assigned(starttai) and
  298. (starttai.typ = ait_regalloc) then
  299. begin
  300. if (tai_regalloc(Starttai).ratype = ratyp) and
  301. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  302. begin
  303. findregalloc:=true;
  304. break;
  305. end;
  306. starttai := tai(starttai.next);
  307. end
  308. else
  309. break;
  310. until false;
  311. end;
  312. procedure RemoveLastDeallocForFuncRes(asml: TAsmList; p: tai);
  313. procedure DoRemoveLastDeallocForFuncRes(asml: TAsmList; supreg: tsuperregister);
  314. var
  315. hp2: tai;
  316. begin
  317. hp2 := p;
  318. repeat
  319. hp2 := tai(hp2.previous);
  320. if assigned(hp2) and
  321. (hp2.typ = ait_regalloc) and
  322. (tai_regalloc(hp2).ratype=ra_dealloc) and
  323. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  324. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  325. begin
  326. asml.remove(hp2);
  327. hp2.free;
  328. break;
  329. end;
  330. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  331. end;
  332. begin
  333. case current_procinfo.procdef.returndef.typ of
  334. arraydef,recorddef,pointerdef,
  335. stringdef,enumdef,procdef,objectdef,errordef,
  336. filedef,setdef,procvardef,
  337. classrefdef,forwarddef:
  338. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  339. orddef:
  340. if current_procinfo.procdef.returndef.size <> 0 then
  341. begin
  342. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  343. { for int64/qword }
  344. if current_procinfo.procdef.returndef.size = 8 then
  345. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  346. end;
  347. end;
  348. end;
  349. procedure getNoDeallocRegs(var regs: tregset);
  350. var
  351. regCounter: TSuperRegister;
  352. begin
  353. regs := [];
  354. case current_procinfo.procdef.returndef.typ of
  355. arraydef,recorddef,pointerdef,
  356. stringdef,enumdef,procdef,objectdef,errordef,
  357. filedef,setdef,procvardef,
  358. classrefdef,forwarddef:
  359. regs := [RS_EAX];
  360. orddef:
  361. if current_procinfo.procdef.returndef.size <> 0 then
  362. begin
  363. regs := [RS_EAX];
  364. { for int64/qword }
  365. if current_procinfo.procdef.returndef.size = 8 then
  366. regs := regs + [RS_EDX];
  367. end;
  368. end;
  369. for regCounter := RS_EAX to RS_EBX do
  370. { if not(regCounter in rg.usableregsint) then}
  371. include(regs,regcounter);
  372. end;
  373. procedure AddRegDeallocFor(asml: TAsmList; reg: tregister; p: tai);
  374. var
  375. hp1: tai;
  376. funcResRegs: tregset;
  377. { funcResReg: boolean;}
  378. begin
  379. { if not(supreg in rg.usableregsint) then
  380. exit;}
  381. { if not(supreg in [RS_EDI]) then
  382. exit;}
  383. getNoDeallocRegs(funcresregs);
  384. { funcResRegs := funcResRegs - rg.usableregsint;}
  385. { funcResRegs := funcResRegs - [RS_EDI];}
  386. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  387. { funcResReg := getsupreg(reg) in funcresregs;}
  388. hp1 := p;
  389. {
  390. while not(funcResReg and
  391. (p.typ = ait_instruction) and
  392. (taicpu(p).opcode = A_JMP) and
  393. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  394. getLastInstruction(p, p) and
  395. not(regInInstruction(supreg, p)) do
  396. hp1 := p;
  397. }
  398. { don't insert a dealloc for registers which contain the function result }
  399. { if they are followed by a jump to the exit label (for exit(...)) }
  400. { if not(funcResReg) or
  401. not((hp1.typ = ait_instruction) and
  402. (taicpu(hp1).opcode = A_JMP) and
  403. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  404. begin
  405. p := tai_regalloc.deAlloc(reg,nil);
  406. insertLLItem(AsmL, hp1.previous, hp1, p);
  407. end;
  408. end;
  409. {************************ Search the Label table ************************}
  410. function findlabel(l: tasmlabel; var hp: tai): boolean;
  411. {searches for the specified label starting from hp as long as the
  412. encountered instructions are labels, to be able to optimize constructs like
  413. jne l2 jmp l2
  414. jmp l3 and l1:
  415. l1: l2:
  416. l2:}
  417. var
  418. p: tai;
  419. begin
  420. p := hp;
  421. while assigned(p) and
  422. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  423. if (p.typ <> ait_Label) or
  424. (tai_label(p).labsym <> l) then
  425. GetNextInstruction(p, p)
  426. else
  427. begin
  428. hp := p;
  429. findlabel := true;
  430. exit
  431. end;
  432. findlabel := false;
  433. end;
  434. {************************ Some general functions ************************}
  435. function tch2reg(ch: tinschange): tsuperregister;
  436. {converts a TChange variable to a TRegister}
  437. const
  438. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  439. begin
  440. if (ch <= CH_REDI) then
  441. tch2reg := ch2reg[ch]
  442. else if (ch <= CH_WEDI) then
  443. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  444. else if (ch <= CH_RWEDI) then
  445. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  446. else if (ch <= CH_MEDI) then
  447. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  448. else
  449. InternalError($db)
  450. end;
  451. { inserts new_one between prev and foll }
  452. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  453. begin
  454. if assigned(prev) then
  455. if assigned(foll) then
  456. begin
  457. if assigned(new_one) then
  458. begin
  459. new_one.previous := prev;
  460. new_one.next := foll;
  461. prev.next := new_one;
  462. foll.previous := new_one;
  463. { shgould we update line information }
  464. if (not (tai(new_one).typ in SkipLineInfo)) and
  465. (not (tai(foll).typ in SkipLineInfo)) then
  466. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  467. end;
  468. end
  469. else
  470. asml.Concat(new_one)
  471. else
  472. if assigned(foll) then
  473. asml.Insert(new_one)
  474. end;
  475. {********************* Compare parts of tai objects *********************}
  476. function regssamesize(reg1, reg2: tregister): boolean;
  477. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  478. 8bit, 16bit or 32bit)}
  479. begin
  480. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  481. internalerror(2003111602);
  482. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  483. end;
  484. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  485. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  486. OldReg and NewReg have the same size (has to be chcked in advance with
  487. RegsSameSize) and that neither equals RS_INVALID}
  488. var
  489. newsupreg, oldsupreg: tsuperregister;
  490. begin
  491. if (newreg = NR_NO) or (oldreg = NR_NO) then
  492. internalerror(2003111601);
  493. newsupreg := getsupreg(newreg);
  494. oldsupreg := getsupreg(oldreg);
  495. with RegInfo Do
  496. begin
  497. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  498. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  499. New2OldReg[newsupreg] := oldsupreg;
  500. end;
  501. end;
  502. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  503. begin
  504. case o.typ Of
  505. top_reg:
  506. if (o.reg <> NR_NO) then
  507. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  508. top_ref:
  509. begin
  510. if o.ref^.base <> NR_NO then
  511. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  512. if o.ref^.index <> NR_NO then
  513. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  514. end;
  515. end;
  516. end;
  517. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  518. begin
  519. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  520. if RegsSameSize(oldreg, newreg) then
  521. with reginfo do
  522. {here we always check for the 32 bit component, because it is possible that
  523. the 8 bit component has not been set, event though NewReg already has been
  524. processed. This happens if it has been compared with a register that doesn't
  525. have an 8 bit component (such as EDI). in that case the 8 bit component is
  526. still set to RS_NO and the comparison in the else-part will fail}
  527. if (getsupreg(oldReg) in OldRegsEncountered) then
  528. if (getsupreg(NewReg) in NewRegsEncountered) then
  529. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  530. { if we haven't encountered the new register yet, but we have encountered the
  531. old one already, the new one can only be correct if it's being written to
  532. (and consequently the old one is also being written to), otherwise
  533. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  534. movl (%eax), %eax movl (%edx), %edx
  535. are considered equivalent}
  536. else
  537. if (opact = opact_write) then
  538. begin
  539. AddReg2RegInfo(oldreg, newreg, reginfo);
  540. RegsEquivalent := true
  541. end
  542. else
  543. Regsequivalent := false
  544. else
  545. if not(getsupreg(newreg) in NewRegsEncountered) and
  546. ((opact = opact_write) or
  547. ((newreg = oldreg) and
  548. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  549. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  550. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  551. begin
  552. AddReg2RegInfo(oldreg, newreg, reginfo);
  553. RegsEquivalent := true
  554. end
  555. else
  556. RegsEquivalent := false
  557. else
  558. RegsEquivalent := false
  559. else
  560. RegsEquivalent := oldreg = newreg
  561. end;
  562. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  563. begin
  564. RefsEquivalent :=
  565. (r1.offset = r2.offset) and
  566. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  567. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  568. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  569. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  570. (r1.relsymbol = r2.relsymbol);
  571. end;
  572. function refsequal(const r1, r2: treference): boolean;
  573. begin
  574. refsequal :=
  575. (r1.offset = r2.offset) and
  576. (r1.segment = r2.segment) and (r1.base = r2.base) and
  577. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  578. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  579. (r1.relsymbol = r2.relsymbol);
  580. end;
  581. {$push}
  582. {$q-}
  583. // checks whether a write to r2 of size "size" contains address r1
  584. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  585. var
  586. realsize1, realsize2: aint;
  587. begin
  588. realsize1 := tcgsize2size[size1];
  589. realsize2 := tcgsize2size[size2];
  590. refsoverlapping :=
  591. (r2.offset <= r1.offset+realsize1) and
  592. (r1.offset <= r2.offset+realsize2) and
  593. (r1.segment = r2.segment) and (r1.base = r2.base) and
  594. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  595. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  596. (r1.relsymbol = r2.relsymbol);
  597. end;
  598. {$pop}
  599. function isgp32reg(supreg: tsuperregister): boolean;
  600. {Checks if the register is a 32 bit general purpose register}
  601. begin
  602. isgp32reg := false;
  603. {$push}{$warnings off}
  604. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  605. isgp32reg := true
  606. {$pop}
  607. end;
  608. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  609. begin {checks whether ref contains a reference to reg}
  610. reginref :=
  611. ((ref.base <> NR_NO) and
  612. (getsupreg(ref.base) = supreg)) or
  613. ((ref.index <> NR_NO) and
  614. (getsupreg(ref.index) = supreg))
  615. end;
  616. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  617. var
  618. p: taicpu;
  619. opcount: longint;
  620. begin
  621. RegReadByInstruction := false;
  622. if hp.typ <> ait_instruction then
  623. exit;
  624. p := taicpu(hp);
  625. case p.opcode of
  626. A_CALL:
  627. regreadbyinstruction := true;
  628. A_IMUL:
  629. case p.ops of
  630. 1:
  631. regReadByInstruction :=
  632. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  633. 2,3:
  634. regReadByInstruction :=
  635. reginop(supreg,p.oper[0]^) or
  636. reginop(supreg,p.oper[1]^);
  637. end;
  638. A_IDIV,A_DIV,A_MUL:
  639. begin
  640. regReadByInstruction :=
  641. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  642. end;
  643. else
  644. begin
  645. for opcount := 0 to p.ops-1 do
  646. if (p.oper[opCount]^.typ = top_ref) and
  647. reginref(supreg,p.oper[opcount]^.ref^) then
  648. begin
  649. RegReadByInstruction := true;
  650. exit
  651. end;
  652. for opcount := 1 to maxinschanges do
  653. case insprop[p.opcode].ch[opcount] of
  654. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  655. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  656. begin
  657. RegReadByInstruction := true;
  658. exit
  659. end;
  660. CH_RWOP1,CH_ROP1,CH_MOP1:
  661. if //(p.oper[0]^.typ = top_reg) and
  662. reginop(supreg,p.oper[0]^) then
  663. begin
  664. RegReadByInstruction := true;
  665. exit
  666. end;
  667. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  668. if //(p.oper[1]^.typ = top_reg) and
  669. reginop(supreg,p.oper[1]^) then
  670. begin
  671. RegReadByInstruction := true;
  672. exit
  673. end;
  674. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  675. if //(p.oper[2]^.typ = top_reg) and
  676. reginop(supreg,p.oper[2]^) then
  677. begin
  678. RegReadByInstruction := true;
  679. exit
  680. end;
  681. end;
  682. end;
  683. end;
  684. end;
  685. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  686. { Checks if reg is used by the instruction p1 }
  687. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  688. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  689. var
  690. p: taicpu;
  691. opcount: longint;
  692. begin
  693. regInInstruction := false;
  694. if p1.typ <> ait_instruction then
  695. exit;
  696. p := taicpu(p1);
  697. case p.opcode of
  698. A_CALL:
  699. regininstruction := true;
  700. A_IMUL:
  701. case p.ops of
  702. 1:
  703. regInInstruction :=
  704. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  705. 2,3:
  706. regInInstruction :=
  707. reginop(supreg,p.oper[0]^) or
  708. reginop(supreg,p.oper[1]^) or
  709. (assigned(p.oper[2]) and
  710. reginop(supreg,p.oper[2]^));
  711. end;
  712. A_IDIV,A_DIV,A_MUL:
  713. regInInstruction :=
  714. reginop(supreg,p.oper[0]^) or
  715. (supreg in [RS_EAX,RS_EDX])
  716. else
  717. begin
  718. for opcount := 0 to p.ops-1 do
  719. if (p.oper[opCount]^.typ = top_ref) and
  720. reginref(supreg,p.oper[opcount]^.ref^) then
  721. begin
  722. regInInstruction := true;
  723. exit
  724. end;
  725. for opcount := 1 to maxinschanges do
  726. case insprop[p.opcode].Ch[opCount] of
  727. CH_REAX..CH_MEDI:
  728. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  729. begin
  730. regInInstruction := true;
  731. exit;
  732. end;
  733. CH_ROp1..CH_MOp1:
  734. if reginop(supreg,p.oper[0]^) then
  735. begin
  736. regInInstruction := true;
  737. exit
  738. end;
  739. Ch_ROp2..Ch_MOp2:
  740. if reginop(supreg,p.oper[1]^) then
  741. begin
  742. regInInstruction := true;
  743. exit
  744. end;
  745. Ch_ROp3..Ch_MOp3:
  746. if reginop(supreg,p.oper[2]^) then
  747. begin
  748. regInInstruction := true;
  749. exit
  750. end;
  751. end;
  752. end;
  753. end;
  754. end;
  755. function reginop(supreg: tsuperregister; const o:toper): boolean;
  756. begin
  757. reginop := false;
  758. case o.typ Of
  759. top_reg:
  760. reginop :=
  761. (getregtype(o.reg) = R_INTREGISTER) and
  762. (supreg = getsupreg(o.reg));
  763. top_ref:
  764. reginop :=
  765. ((o.ref^.base <> NR_NO) and
  766. (supreg = getsupreg(o.ref^.base))) or
  767. ((o.ref^.index <> NR_NO) and
  768. (supreg = getsupreg(o.ref^.index)));
  769. end;
  770. end;
  771. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  772. var
  773. InstrProp: TInsProp;
  774. TmpResult: Boolean;
  775. Cnt: Word;
  776. begin
  777. TmpResult := False;
  778. Result := False;
  779. if supreg = RS_INVALID then
  780. exit;
  781. if (p1.typ = ait_instruction) then
  782. case taicpu(p1).opcode of
  783. A_IMUL:
  784. With taicpu(p1) Do
  785. TmpResult :=
  786. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  787. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  788. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  789. A_DIV, A_IDIV, A_MUL:
  790. With taicpu(p1) Do
  791. TmpResult :=
  792. (supreg in [RS_EAX,RS_EDX]);
  793. else
  794. begin
  795. Cnt := 1;
  796. InstrProp := InsProp[taicpu(p1).OpCode];
  797. while (Cnt <= maxinschanges) and
  798. (InstrProp.Ch[Cnt] <> Ch_None) and
  799. not(TmpResult) Do
  800. begin
  801. case InstrProp.Ch[Cnt] Of
  802. Ch_WEAX..Ch_MEDI:
  803. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  804. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  805. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  806. reginop(supreg,taicpu(p1).oper[0]^);
  807. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  808. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  809. reginop(supreg,taicpu(p1).oper[1]^);
  810. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  811. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  812. reginop(supreg,taicpu(p1).oper[2]^);
  813. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  814. Ch_ALL: TmpResult := true;
  815. end;
  816. inc(Cnt)
  817. end
  818. end
  819. end;
  820. RegModifiedByInstruction := TmpResult
  821. end;
  822. function instrWritesFlags(p: tai): boolean;
  823. var
  824. l: longint;
  825. begin
  826. instrWritesFlags := true;
  827. case p.typ of
  828. ait_instruction:
  829. begin
  830. for l := 1 to maxinschanges do
  831. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  832. exit;
  833. end;
  834. ait_label:
  835. exit;
  836. end;
  837. instrWritesFlags := false;
  838. end;
  839. function instrReadsFlags(p: tai): boolean;
  840. var
  841. l: longint;
  842. begin
  843. instrReadsFlags := true;
  844. case p.typ of
  845. ait_instruction:
  846. begin
  847. for l := 1 to maxinschanges do
  848. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  849. exit;
  850. end;
  851. ait_label:
  852. exit;
  853. end;
  854. instrReadsFlags := false;
  855. end;
  856. {********************* GetNext and GetLastInstruction *********************}
  857. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  858. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  859. { next tai object in Next. Returns false if there isn't any }
  860. begin
  861. repeat
  862. if (Current.typ = ait_marker) and
  863. (tai_Marker(current).Kind = mark_AsmBlockStart) then
  864. begin
  865. GetNextInstruction := False;
  866. Next := Nil;
  867. Exit
  868. end;
  869. Current := tai(current.Next);
  870. while assigned(Current) and
  871. ((current.typ in skipInstr) or
  872. ((current.typ = ait_label) and
  873. labelCanBeSkipped(tai_label(current)))) do
  874. Current := tai(current.Next);
  875. { if assigned(Current) and
  876. (current.typ = ait_Marker) and
  877. (tai_Marker(current).Kind = mark_NoPropInfoStart) then
  878. begin
  879. while assigned(Current) and
  880. ((current.typ <> ait_Marker) or
  881. (tai_Marker(current).Kind <> mark_NoPropInfoEnd)) Do
  882. Current := tai(current.Next);
  883. end;}
  884. until not(assigned(Current)) or
  885. (current.typ <> ait_Marker) or
  886. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  887. Next := Current;
  888. if assigned(Current) and
  889. not((current.typ in SkipInstr) or
  890. ((current.typ = ait_label) and
  891. labelCanBeSkipped(tai_label(current))))
  892. then
  893. GetNextInstruction :=
  894. not((current.typ = ait_marker) and
  895. (tai_marker(current).kind = mark_AsmBlockStart))
  896. else
  897. begin
  898. GetNextInstruction := False;
  899. Next := nil;
  900. end;
  901. end;
  902. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  903. {skips the ait-types in SkipInstr puts the previous tai object in
  904. Last. Returns false if there isn't any}
  905. begin
  906. repeat
  907. Current := tai(current.previous);
  908. while assigned(Current) and
  909. (((current.typ = ait_Marker) and
  910. not(tai_Marker(current).Kind in [mark_AsmBlockEnd{,mark_NoPropInfoEnd}])) or
  911. (current.typ in SkipInstr) or
  912. ((current.typ = ait_label) and
  913. labelCanBeSkipped(tai_label(current)))) Do
  914. Current := tai(current.previous);
  915. { if assigned(Current) and
  916. (current.typ = ait_Marker) and
  917. (tai_Marker(current).Kind = mark_NoPropInfoEnd) then
  918. begin
  919. while assigned(Current) and
  920. ((current.typ <> ait_Marker) or
  921. (tai_Marker(current).Kind <> mark_NoPropInfoStart)) Do
  922. Current := tai(current.previous);
  923. end;}
  924. until not(assigned(Current)) or
  925. (current.typ <> ait_Marker) or
  926. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  927. if not(assigned(Current)) or
  928. (current.typ in SkipInstr) or
  929. ((current.typ = ait_label) and
  930. labelCanBeSkipped(tai_label(current))) or
  931. ((current.typ = ait_Marker) and
  932. (tai_Marker(current).Kind = mark_AsmBlockEnd))
  933. then
  934. begin
  935. Last := nil;
  936. GetLastInstruction := False
  937. end
  938. else
  939. begin
  940. Last := Current;
  941. GetLastInstruction := True;
  942. end;
  943. end;
  944. procedure SkipHead(var p: tai);
  945. var
  946. oldp: tai;
  947. begin
  948. repeat
  949. oldp := p;
  950. if (p.typ in SkipInstr) or
  951. ((p.typ = ait_marker) and
  952. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_NoLineInfoStart,mark_NoLineInfoEnd])) then
  953. GetNextInstruction(p,p)
  954. else if ((p.Typ = Ait_Marker) and
  955. (tai_Marker(p).Kind = mark_NoPropInfoStart)) then
  956. {a marker of the mark_NoPropInfoStart can't be the first instruction of a
  957. TAsmList list}
  958. GetNextInstruction(tai(p.previous),p);
  959. until p = oldp
  960. end;
  961. function labelCanBeSkipped(p: tai_label): boolean;
  962. begin
  963. labelCanBeSkipped := not(p.labsym.is_used) or (p.labsym.labeltype<>alt_jump);
  964. end;
  965. {******************* The Data Flow Analyzer functions ********************}
  966. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  967. hp: tai): boolean;
  968. { assumes reg is a 32bit register }
  969. var
  970. p: taicpu;
  971. begin
  972. if not assigned(hp) or
  973. (hp.typ <> ait_instruction) then
  974. begin
  975. regLoadedWithNewValue := false;
  976. exit;
  977. end;
  978. p := taicpu(hp);
  979. regLoadedWithNewValue :=
  980. (((p.opcode = A_MOV) or
  981. (p.opcode = A_MOVZX) or
  982. (p.opcode = A_MOVSX) or
  983. (p.opcode = A_LEA)) and
  984. (p.oper[1]^.typ = top_reg) and
  985. (getsupreg(p.oper[1]^.reg) = supreg) and
  986. (canDependOnPrevValue or
  987. (p.oper[0]^.typ = top_const) or
  988. ((p.oper[0]^.typ = top_reg) and
  989. (getsupreg(p.oper[0]^.reg) <> supreg)) or
  990. ((p.oper[0]^.typ = top_ref) and
  991. not regInRef(supreg,p.oper[0]^.ref^)))) or
  992. ((p.opcode = A_POP) and
  993. (getsupreg(p.oper[0]^.reg) = supreg));
  994. end;
  995. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  996. {updates UsedRegs with the RegAlloc Information coming after p}
  997. begin
  998. repeat
  999. while assigned(p) and
  1000. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  1001. ((p.typ = ait_label) and
  1002. labelCanBeSkipped(tai_label(p))) or
  1003. ((p.typ = ait_marker) and
  1004. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_NoLineInfoStart,mark_NoLineInfoEnd]))) do
  1005. p := tai(p.next);
  1006. while assigned(p) and
  1007. (p.typ=ait_RegAlloc) Do
  1008. begin
  1009. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1010. begin
  1011. case tai_regalloc(p).ratype of
  1012. ra_alloc :
  1013. Include(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  1014. ra_dealloc :
  1015. Exclude(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  1016. end;
  1017. end;
  1018. p := tai(p.next);
  1019. end;
  1020. until not(assigned(p)) or
  1021. (not(p.typ in SkipInstr) and
  1022. not((p.typ = ait_label) and
  1023. labelCanBeSkipped(tai_label(p))));
  1024. end;
  1025. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; var initialusedregs: tregset);
  1026. { allocates register reg between (and including) instructions p1 and p2 }
  1027. { the type of p1 and p2 must not be in SkipInstr }
  1028. { note that this routine is both called from the peephole optimizer }
  1029. { where optinfo is not yet initialised) and from the cse (where it is) }
  1030. var
  1031. hp, start: tai;
  1032. removedsomething,
  1033. firstRemovedWasAlloc,
  1034. lastRemovedWasDealloc: boolean;
  1035. supreg: tsuperregister;
  1036. begin
  1037. {$ifdef EXTDEBUG}
  1038. if assigned(p1.optinfo) and
  1039. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1040. internalerror(2004101010);
  1041. {$endif EXTDEBUG}
  1042. start := p1;
  1043. if (reg = NR_ESP) or
  1044. (reg = current_procinfo.framepointer) or
  1045. not(assigned(p1)) then
  1046. { this happens with registers which are loaded implicitely, outside the }
  1047. { current block (e.g. esi with self) }
  1048. exit;
  1049. supreg := getsupreg(reg);
  1050. { make sure we allocate it for this instruction }
  1051. getnextinstruction(p2,p2);
  1052. lastRemovedWasDealloc := false;
  1053. removedSomething := false;
  1054. firstRemovedWasAlloc := false;
  1055. {$ifdef allocregdebug}
  1056. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1057. ' from here...'));
  1058. insertllitem(asml,p1.previous,p1,hp);
  1059. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1060. ' till here...'));
  1061. insertllitem(asml,p2,p2.next,hp);
  1062. {$endif allocregdebug}
  1063. if not(supreg in initialusedregs) then
  1064. begin
  1065. hp := tai_regalloc.alloc(reg,nil);
  1066. insertllItem(asmL,p1.previous,p1,hp);
  1067. include(initialusedregs,supreg);
  1068. end;
  1069. while assigned(p1) and
  1070. (p1 <> p2) do
  1071. begin
  1072. if assigned(p1.optinfo) then
  1073. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1074. p1 := tai(p1.next);
  1075. repeat
  1076. while assigned(p1) and
  1077. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1078. p1 := tai(p1.next);
  1079. { remove all allocation/deallocation info about the register in between }
  1080. if assigned(p1) and
  1081. (p1.typ = ait_regalloc) then
  1082. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1083. begin
  1084. if not removedSomething then
  1085. begin
  1086. firstRemovedWasAlloc := tai_regalloc(p1).ratype=ra_alloc;
  1087. removedSomething := true;
  1088. end;
  1089. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1090. hp := tai(p1.Next);
  1091. asml.Remove(p1);
  1092. p1.free;
  1093. p1 := hp;
  1094. end
  1095. else p1 := tai(p1.next);
  1096. until not(assigned(p1)) or
  1097. not(p1.typ in SkipInstr);
  1098. end;
  1099. if assigned(p1) then
  1100. begin
  1101. if firstRemovedWasAlloc then
  1102. begin
  1103. hp := tai_regalloc.Alloc(reg,nil);
  1104. insertLLItem(asmL,start.previous,start,hp);
  1105. end;
  1106. if lastRemovedWasDealloc then
  1107. begin
  1108. hp := tai_regalloc.DeAlloc(reg,nil);
  1109. insertLLItem(asmL,p1.previous,p1,hp);
  1110. end;
  1111. end;
  1112. end;
  1113. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1114. var
  1115. hp: tai;
  1116. first: boolean;
  1117. begin
  1118. findregdealloc := false;
  1119. first := true;
  1120. while assigned(p.previous) and
  1121. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1122. ((tai(p.previous).typ = ait_label) and
  1123. labelCanBeSkipped(tai_label(p.previous)))) do
  1124. begin
  1125. p := tai(p.previous);
  1126. if (p.typ = ait_regalloc) and
  1127. (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) and
  1128. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1129. if (tai_regalloc(p).ratype=ra_dealloc) then
  1130. if first then
  1131. begin
  1132. findregdealloc := true;
  1133. break;
  1134. end
  1135. else
  1136. begin
  1137. findRegDealloc :=
  1138. getNextInstruction(p,hp) and
  1139. regLoadedWithNewValue(supreg,false,hp);
  1140. break
  1141. end
  1142. else
  1143. first := false;
  1144. end
  1145. end;
  1146. procedure incState(var S: Byte; amount: longint);
  1147. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1148. errors}
  1149. begin
  1150. if (s <= $ff - amount) then
  1151. inc(s, amount)
  1152. else s := longint(s) + amount - $ff;
  1153. end;
  1154. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1155. { Content is the sequence of instructions that describes the contents of }
  1156. { seqReg. reg is being overwritten by the current instruction. if the }
  1157. { content of seqReg depends on reg (ie. because of a }
  1158. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1159. var
  1160. p: tai;
  1161. Counter: Word;
  1162. TmpResult: Boolean;
  1163. RegsChecked: TRegSet;
  1164. begin
  1165. RegsChecked := [];
  1166. p := Content.StartMod;
  1167. TmpResult := False;
  1168. Counter := 1;
  1169. while not(TmpResult) and
  1170. (Counter <= Content.NrOfMods) Do
  1171. begin
  1172. if (p.typ = ait_instruction) and
  1173. ((taicpu(p).opcode = A_MOV) or
  1174. (taicpu(p).opcode = A_MOVZX) or
  1175. (taicpu(p).opcode = A_MOVSX) or
  1176. (taicpu(p).opcode = A_LEA)) and
  1177. (taicpu(p).oper[0]^.typ = top_ref) then
  1178. With taicpu(p).oper[0]^.ref^ Do
  1179. if ((base = current_procinfo.FramePointer) or
  1180. (assigned(symbol) and (base = NR_NO))) and
  1181. (index = NR_NO) then
  1182. begin
  1183. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1184. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1185. break;
  1186. end
  1187. else
  1188. tmpResult :=
  1189. regReadByInstruction(supreg,p) and
  1190. regModifiedByInstruction(seqReg,p)
  1191. else
  1192. tmpResult :=
  1193. regReadByInstruction(supreg,p) and
  1194. regModifiedByInstruction(seqReg,p);
  1195. inc(Counter);
  1196. GetNextInstruction(p,p)
  1197. end;
  1198. sequenceDependsonReg := TmpResult
  1199. end;
  1200. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1201. var
  1202. counter: tsuperregister;
  1203. begin
  1204. for counter := RS_EAX to RS_EDI do
  1205. if counter <> supreg then
  1206. with p1^.regs[counter] Do
  1207. begin
  1208. if (typ in [con_ref,con_noRemoveRef]) and
  1209. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1210. if typ in [con_ref, con_invalid] then
  1211. typ := con_invalid
  1212. { con_noRemoveRef = con_unknown }
  1213. else
  1214. typ := con_unknown;
  1215. if assigned(memwrite) and
  1216. regInRef(counter,memwrite.oper[1]^.ref^) then
  1217. memwrite := nil;
  1218. end;
  1219. end;
  1220. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1221. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1222. contents of registers are loaded with a memory location based on reg.
  1223. doincState is false when this register has to be destroyed not because
  1224. it's contents are directly modified/overwritten, but because of an indirect
  1225. action (e.g. this register holds the contents of a variable and the value
  1226. of the variable in memory is changed) }
  1227. begin
  1228. {$push}{$warnings off}
  1229. { the following happens for fpu registers }
  1230. if (supreg < low(NrOfInstrSinceLastMod)) or
  1231. (supreg > high(NrOfInstrSinceLastMod)) then
  1232. exit;
  1233. {$pop}
  1234. NrOfInstrSinceLastMod[supreg] := 0;
  1235. with p1^.regs[supreg] do
  1236. begin
  1237. if doincState then
  1238. begin
  1239. incState(wstate,1);
  1240. typ := con_unknown;
  1241. startmod := nil;
  1242. end
  1243. else
  1244. if typ in [con_ref,con_const,con_invalid] then
  1245. typ := con_invalid
  1246. { con_noRemoveRef = con_unknown }
  1247. else
  1248. typ := con_unknown;
  1249. memwrite := nil;
  1250. end;
  1251. invalidateDependingRegs(p1,supreg);
  1252. end;
  1253. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1254. begin
  1255. if (p.typ = ait_instruction) then
  1256. begin
  1257. case taicpu(p).oper[0]^.typ Of
  1258. top_reg:
  1259. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1260. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1261. top_ref:
  1262. With TReference(taicpu(p).oper[0]^) Do
  1263. begin
  1264. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1265. then RegSet := RegSet + [base];
  1266. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1267. then RegSet := RegSet + [index];
  1268. end;
  1269. end;
  1270. case taicpu(p).oper[1]^.typ Of
  1271. top_reg:
  1272. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1273. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1274. top_ref:
  1275. With TReference(taicpu(p).oper[1]^) Do
  1276. begin
  1277. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1278. then RegSet := RegSet + [base];
  1279. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1280. then RegSet := RegSet + [index];
  1281. end;
  1282. end;
  1283. end;
  1284. end;}
  1285. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1286. begin {checks whether the two ops are equivalent}
  1287. OpsEquivalent := False;
  1288. if o1.typ=o2.typ then
  1289. case o1.typ Of
  1290. top_reg:
  1291. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1292. top_ref:
  1293. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1294. Top_Const:
  1295. OpsEquivalent := o1.val = o2.val;
  1296. Top_None:
  1297. OpsEquivalent := True
  1298. end;
  1299. end;
  1300. function OpsEqual(const o1,o2:toper): Boolean;
  1301. begin {checks whether the two ops are equal}
  1302. OpsEqual := False;
  1303. if o1.typ=o2.typ then
  1304. case o1.typ Of
  1305. top_reg :
  1306. OpsEqual:=o1.reg=o2.reg;
  1307. top_ref :
  1308. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1309. Top_Const :
  1310. OpsEqual:=o1.val=o2.val;
  1311. Top_None :
  1312. OpsEqual := True
  1313. end;
  1314. end;
  1315. function sizescompatible(loadsize,newsize: topsize): boolean;
  1316. begin
  1317. case loadsize of
  1318. S_B,S_BW,S_BL:
  1319. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1320. S_W,S_WL:
  1321. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1322. else
  1323. sizescompatible := newsize = S_L;
  1324. end;
  1325. end;
  1326. function opscompatible(p1,p2: taicpu): boolean;
  1327. begin
  1328. case p1.opcode of
  1329. A_MOVZX,A_MOVSX:
  1330. opscompatible :=
  1331. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1332. sizescompatible(p1.opsize,p2.opsize);
  1333. else
  1334. opscompatible :=
  1335. (p1.opcode = p2.opcode) and
  1336. (p1.ops = p2.ops) and
  1337. (p1.opsize = p2.opsize);
  1338. end;
  1339. end;
  1340. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1341. {$ifdef csdebug}
  1342. var
  1343. hp: tai;
  1344. {$endif csdebug}
  1345. begin {checks whether two taicpu instructions are equal}
  1346. if assigned(p1) and assigned(p2) and
  1347. (tai(p1).typ = ait_instruction) and
  1348. (tai(p2).typ = ait_instruction) and
  1349. opscompatible(taicpu(p1),taicpu(p2)) and
  1350. (not(assigned(taicpu(p1).oper[0])) or
  1351. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1352. (not(assigned(taicpu(p1).oper[1])) or
  1353. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1354. (not(assigned(taicpu(p1).oper[2])) or
  1355. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1356. {both instructions have the same structure:
  1357. "<operator> <operand of type1>, <operand of type 2>"}
  1358. if ((taicpu(p1).opcode = A_MOV) or
  1359. (taicpu(p1).opcode = A_MOVZX) or
  1360. (taicpu(p1).opcode = A_MOVSX) or
  1361. (taicpu(p1).opcode = A_LEA)) and
  1362. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1363. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1364. {the "old" instruction is a load of a register with a new value, not with
  1365. a value based on the contents of this register (so no "mov (reg), reg")}
  1366. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1367. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1368. {the "new" instruction is also a load of a register with a new value, and
  1369. this value is fetched from the same memory location}
  1370. begin
  1371. With taicpu(p2).oper[0]^.ref^ Do
  1372. begin
  1373. if (base <> NR_NO) and
  1374. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1375. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1376. if (index <> NR_NO) and
  1377. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1378. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1379. end;
  1380. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1381. from the reference are the same in the old and in the new instruction
  1382. sequence}
  1383. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1384. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1385. InstructionsEquivalent :=
  1386. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1387. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1388. end
  1389. {the registers are loaded with values from different memory locations. if
  1390. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1391. would be considered equivalent}
  1392. else
  1393. InstructionsEquivalent := False
  1394. else
  1395. {load register with a value based on the current value of this register}
  1396. begin
  1397. With taicpu(p2).oper[0]^.ref^ Do
  1398. begin
  1399. if (base <> NR_NO) and
  1400. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1401. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1402. {it won't do any harm if the register is already in RegsLoadedForRef}
  1403. begin
  1404. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1405. {$ifdef csdebug}
  1406. Writeln(std_regname(base), ' added');
  1407. {$endif csdebug}
  1408. end;
  1409. if (index <> NR_NO) and
  1410. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1411. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1412. begin
  1413. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1414. {$ifdef csdebug}
  1415. Writeln(std_regname(index), ' added');
  1416. {$endif csdebug}
  1417. end;
  1418. end;
  1419. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1420. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1421. begin
  1422. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1423. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1424. {$ifdef csdebug}
  1425. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1426. {$endif csdebug}
  1427. end;
  1428. InstructionsEquivalent :=
  1429. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1430. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1431. end
  1432. else
  1433. {an instruction <> mov, movzx, movsx}
  1434. begin
  1435. {$ifdef csdebug}
  1436. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1437. hp.previous := p2;
  1438. hp.next := p2.next;
  1439. p2.next.previous := hp;
  1440. p2.next := hp;
  1441. {$endif csdebug}
  1442. InstructionsEquivalent :=
  1443. (not(assigned(taicpu(p1).oper[0])) or
  1444. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1445. (not(assigned(taicpu(p1).oper[1])) or
  1446. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1447. (not(assigned(taicpu(p1).oper[2])) or
  1448. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1449. end
  1450. {the instructions haven't even got the same structure, so they're certainly
  1451. not equivalent}
  1452. else
  1453. begin
  1454. {$ifdef csdebug}
  1455. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1456. hp.previous := p2;
  1457. hp.next := p2.next;
  1458. p2.next.previous := hp;
  1459. p2.next := hp;
  1460. {$endif csdebug}
  1461. InstructionsEquivalent := False;
  1462. end;
  1463. {$ifdef csdebug}
  1464. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1465. hp.previous := p2;
  1466. hp.next := p2.next;
  1467. p2.next.previous := hp;
  1468. p2.next := hp;
  1469. {$endif csdebug}
  1470. end;
  1471. (*
  1472. function InstructionsEqual(p1, p2: tai): Boolean;
  1473. begin {checks whether two taicpu instructions are equal}
  1474. InstructionsEqual :=
  1475. assigned(p1) and assigned(p2) and
  1476. ((tai(p1).typ = ait_instruction) and
  1477. (tai(p1).typ = ait_instruction) and
  1478. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1479. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1480. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1481. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1482. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1483. end;
  1484. *)
  1485. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1486. begin
  1487. if supreg in [RS_EAX..RS_EDI] then
  1488. incState(p^.regs[supreg].rstate,1)
  1489. end;
  1490. procedure readref(p: ptaiprop; const ref: preference);
  1491. begin
  1492. if ref^.base <> NR_NO then
  1493. readreg(p, getsupreg(ref^.base));
  1494. if ref^.index <> NR_NO then
  1495. readreg(p, getsupreg(ref^.index));
  1496. end;
  1497. procedure ReadOp(p: ptaiprop;const o:toper);
  1498. begin
  1499. case o.typ Of
  1500. top_reg: readreg(p, getsupreg(o.reg));
  1501. top_ref: readref(p, o.ref);
  1502. end;
  1503. end;
  1504. function RefInInstruction(const ref: TReference; p: tai;
  1505. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1506. {checks whehter ref is used in p}
  1507. var
  1508. mysize: tcgsize;
  1509. TmpResult: Boolean;
  1510. begin
  1511. TmpResult := False;
  1512. if (p.typ = ait_instruction) then
  1513. begin
  1514. mysize := topsize2tcgsize[taicpu(p).opsize];
  1515. if (taicpu(p).ops >= 1) and
  1516. (taicpu(p).oper[0]^.typ = top_ref) then
  1517. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1518. if not(TmpResult) and
  1519. (taicpu(p).ops >= 2) and
  1520. (taicpu(p).oper[1]^.typ = top_ref) then
  1521. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1522. if not(TmpResult) and
  1523. (taicpu(p).ops >= 3) and
  1524. (taicpu(p).oper[2]^.typ = top_ref) then
  1525. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1526. end;
  1527. RefInInstruction := TmpResult;
  1528. end;
  1529. function RefInSequence(const ref: TReference; Content: TContent;
  1530. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1531. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1532. tai objects) to see whether ref is used somewhere}
  1533. var p: tai;
  1534. Counter: Word;
  1535. TmpResult: Boolean;
  1536. begin
  1537. p := Content.StartMod;
  1538. TmpResult := False;
  1539. Counter := 1;
  1540. while not(TmpResult) and
  1541. (Counter <= Content.NrOfMods) Do
  1542. begin
  1543. if (p.typ = ait_instruction) and
  1544. RefInInstruction(ref, p, RefsEq, size)
  1545. then TmpResult := True;
  1546. inc(Counter);
  1547. GetNextInstruction(p,p)
  1548. end;
  1549. RefInSequence := TmpResult
  1550. end;
  1551. {$push}
  1552. {$q-}
  1553. // checks whether a write to r2 of size "size" contains address r1
  1554. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1555. var
  1556. realsize1, realsize2: aint;
  1557. begin
  1558. realsize1 := tcgsize2size[size1];
  1559. realsize2 := tcgsize2size[size2];
  1560. arrayrefsoverlapping :=
  1561. (r2.offset <= r1.offset+realsize1) and
  1562. (r1.offset <= r2.offset+realsize2) and
  1563. (r1.segment = r2.segment) and
  1564. (r1.symbol=r2.symbol) and
  1565. (r1.base = r2.base)
  1566. end;
  1567. {$pop}
  1568. function isSimpleRef(const ref: treference): boolean;
  1569. { returns true if ref is reference to a local or global variable, to a }
  1570. { parameter or to an object field (this includes arrays). Returns false }
  1571. { otherwise. }
  1572. begin
  1573. isSimpleRef :=
  1574. assigned(ref.symbol) or
  1575. (ref.base = current_procinfo.framepointer);
  1576. end;
  1577. function containsPointerRef(p: tai): boolean;
  1578. { checks if an instruction contains a reference which is a pointer location }
  1579. var
  1580. hp: taicpu;
  1581. count: longint;
  1582. begin
  1583. containsPointerRef := false;
  1584. if p.typ <> ait_instruction then
  1585. exit;
  1586. hp := taicpu(p);
  1587. for count := 0 to hp.ops-1 do
  1588. begin
  1589. case hp.oper[count]^.typ of
  1590. top_ref:
  1591. if not isSimpleRef(hp.oper[count]^.ref^) then
  1592. begin
  1593. containsPointerRef := true;
  1594. exit;
  1595. end;
  1596. top_none:
  1597. exit;
  1598. end;
  1599. end;
  1600. end;
  1601. function containsPointerLoad(c: tcontent): boolean;
  1602. { checks whether the contents of a register contain a pointer reference }
  1603. var
  1604. p: tai;
  1605. count: longint;
  1606. begin
  1607. containsPointerLoad := false;
  1608. p := c.startmod;
  1609. for count := c.nrOfMods downto 1 do
  1610. begin
  1611. if containsPointerRef(p) then
  1612. begin
  1613. containsPointerLoad := true;
  1614. exit;
  1615. end;
  1616. getnextinstruction(p,p);
  1617. end;
  1618. end;
  1619. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1620. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1621. { returns whether the contents c of reg are invalid after regWritten is }
  1622. { is written to ref }
  1623. var
  1624. refsEq: trefCompare;
  1625. begin
  1626. if isSimpleRef(ref) then
  1627. begin
  1628. if (ref.index <> NR_NO) or
  1629. (assigned(ref.symbol) and
  1630. (ref.base <> NR_NO)) then
  1631. { local/global variable or parameter which is an array }
  1632. refsEq := @arrayRefsOverlapping
  1633. else
  1634. { local/global variable or parameter which is not an array }
  1635. refsEq := @refsOverlapping;
  1636. invalsmemwrite :=
  1637. assigned(c.memwrite) and
  1638. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1639. containsPointerRef(c.memwrite)) or
  1640. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1641. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1642. begin
  1643. writeToMemDestroysContents := false;
  1644. exit;
  1645. end;
  1646. { write something to a parameter, a local or global variable, so }
  1647. { * with uncertain optimizations on: }
  1648. { - destroy the contents of registers whose contents have somewhere a }
  1649. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1650. { are being written to memory) is not destroyed if it's StartMod is }
  1651. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1652. { expression based on ref) }
  1653. { * with uncertain optimizations off: }
  1654. { - also destroy registers that contain any pointer }
  1655. with c do
  1656. writeToMemDestroysContents :=
  1657. (typ in [con_ref,con_noRemoveRef]) and
  1658. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1659. containsPointerLoad(c)
  1660. ) or
  1661. (refInSequence(ref,c,refsEq,size) and
  1662. ((supreg <> regWritten) or
  1663. not((nrOfMods = 1) and
  1664. {StarMod is always of the type ait_instruction}
  1665. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1666. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1667. )
  1668. )
  1669. )
  1670. );
  1671. end
  1672. else
  1673. { write something to a pointer location, so }
  1674. { * with uncertain optimzations on: }
  1675. { - do not destroy registers which contain a local/global variable or }
  1676. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1677. { * with uncertain optimzations off: }
  1678. { - destroy every register which contains a memory location }
  1679. begin
  1680. invalsmemwrite :=
  1681. assigned(c.memwrite) and
  1682. (not(cs_opt_size in current_settings.optimizerswitches) or
  1683. containsPointerRef(c.memwrite));
  1684. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1685. begin
  1686. writeToMemDestroysContents := false;
  1687. exit;
  1688. end;
  1689. with c do
  1690. writeToMemDestroysContents :=
  1691. (typ in [con_ref,con_noRemoveRef]) and
  1692. (not(cs_opt_size in current_settings.optimizerswitches) or
  1693. { for movsl }
  1694. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1695. { don't destroy if reg contains a parameter, local or global variable }
  1696. containsPointerLoad(c)
  1697. );
  1698. end;
  1699. end;
  1700. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1701. const c: tcontent): boolean;
  1702. { returns whether the contents c of reg are invalid after destReg is }
  1703. { modified }
  1704. begin
  1705. writeToRegDestroysContents :=
  1706. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1707. sequenceDependsOnReg(c,supreg,destReg);
  1708. end;
  1709. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1710. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1711. { returns whether the contents c of reg are invalid after regWritten is }
  1712. { is written to op }
  1713. begin
  1714. memwritedestroyed := false;
  1715. case op.typ of
  1716. top_reg:
  1717. writeDestroysContents :=
  1718. (getregtype(op.reg) = R_INTREGISTER) and
  1719. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1720. top_ref:
  1721. writeDestroysContents :=
  1722. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1723. else
  1724. writeDestroysContents := false;
  1725. end;
  1726. end;
  1727. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1728. { destroys all registers which possibly contain a reference to ref, regWritten }
  1729. { is the register whose contents are being written to memory (if this proc }
  1730. { is called because of a "mov?? %reg, (mem)" instruction) }
  1731. var
  1732. counter: tsuperregister;
  1733. destroymemwrite: boolean;
  1734. begin
  1735. for counter := RS_EAX to RS_EDI Do
  1736. begin
  1737. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1738. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1739. destroyReg(ptaiprop(p.optInfo), counter, false)
  1740. else if destroymemwrite then
  1741. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1742. end;
  1743. end;
  1744. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1745. var Counter: tsuperregister;
  1746. begin {initializes/desrtoys all registers}
  1747. For Counter := RS_EAX To RS_EDI Do
  1748. begin
  1749. if read then
  1750. readreg(p, Counter);
  1751. DestroyReg(p, Counter, written);
  1752. p^.regs[counter].MemWrite := nil;
  1753. end;
  1754. p^.DirFlag := F_Unknown;
  1755. end;
  1756. procedure DestroyOp(taiObj: tai; const o:Toper);
  1757. {$ifdef statedebug}
  1758. var
  1759. hp: tai;
  1760. {$endif statedebug}
  1761. begin
  1762. case o.typ Of
  1763. top_reg:
  1764. begin
  1765. {$ifdef statedebug}
  1766. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1767. hp.next := taiobj.next;
  1768. hp.previous := taiobj;
  1769. taiobj.next := hp;
  1770. if assigned(hp.next) then
  1771. hp.next.previous := hp;
  1772. {$endif statedebug}
  1773. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1774. end;
  1775. top_ref:
  1776. begin
  1777. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1778. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1779. end;
  1780. end;
  1781. end;
  1782. procedure AddInstr2RegContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1783. p: taicpu; supreg: tsuperregister);
  1784. {$ifdef statedebug}
  1785. var
  1786. hp: tai;
  1787. {$endif statedebug}
  1788. begin
  1789. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1790. if (typ in [con_ref,con_noRemoveRef]) then
  1791. begin
  1792. incState(wstate,1);
  1793. { also store how many instructions are part of the sequence in the first }
  1794. { instructions ptaiprop, so it can be easily accessed from within }
  1795. { CheckSequence}
  1796. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1797. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1798. NrOfInstrSinceLastMod[supreg] := 0;
  1799. invalidateDependingRegs(p.optinfo,supreg);
  1800. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1801. {$ifdef StateDebug}
  1802. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1803. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1804. InsertLLItem(AsmL, p, p.next, hp);
  1805. {$endif StateDebug}
  1806. end
  1807. else
  1808. begin
  1809. {$ifdef statedebug}
  1810. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1811. insertllitem(asml,p,p.next,hp);
  1812. {$endif statedebug}
  1813. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1814. {$ifdef StateDebug}
  1815. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1816. InsertLLItem(AsmL, p, p.next, hp);
  1817. {$endif StateDebug}
  1818. end
  1819. end;
  1820. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1821. p: taicpu; const oper: TOper);
  1822. begin
  1823. if oper.typ = top_reg then
  1824. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1825. else
  1826. begin
  1827. ReadOp(ptaiprop(p.optinfo), oper);
  1828. DestroyOp(p, oper);
  1829. end
  1830. end;
  1831. {*************************************************************************************}
  1832. {************************************** TDFAOBJ **************************************}
  1833. {*************************************************************************************}
  1834. constructor tdfaobj.create(_list: TAsmList);
  1835. begin
  1836. list := _list;
  1837. blockstart := nil;
  1838. blockend := nil;
  1839. nroftaiobjs := 0;
  1840. taipropblock := nil;
  1841. lolab := 0;
  1842. hilab := 0;
  1843. labdif := 0;
  1844. labeltable := nil;
  1845. end;
  1846. procedure tdfaobj.initlabeltable;
  1847. var
  1848. labelfound: boolean;
  1849. p, prev: tai;
  1850. hp1, hp2: tai;
  1851. {$ifdef i386}
  1852. regcounter,
  1853. supreg : tsuperregister;
  1854. {$endif i386}
  1855. usedregs, nodeallocregs: tregset;
  1856. begin
  1857. labelfound := false;
  1858. lolab := maxlongint;
  1859. hilab := 0;
  1860. p := blockstart;
  1861. prev := p;
  1862. while assigned(p) do
  1863. begin
  1864. if (tai(p).typ = ait_label) then
  1865. if not labelcanbeskipped(tai_label(p)) then
  1866. begin
  1867. labelfound := true;
  1868. if (tai_Label(p).labsym.labelnr < lolab) then
  1869. lolab := tai_label(p).labsym.labelnr;
  1870. if (tai_Label(p).labsym.labelnr > hilab) then
  1871. hilab := tai_label(p).labsym.labelnr;
  1872. end;
  1873. prev := p;
  1874. getnextinstruction(p, p);
  1875. end;
  1876. if (prev.typ = ait_marker) and
  1877. (tai_marker(prev).kind = mark_AsmBlockStart) then
  1878. blockend := prev
  1879. else blockend := nil;
  1880. if labelfound then
  1881. labdif := hilab+1-lolab
  1882. else labdif := 0;
  1883. usedregs := [];
  1884. if (labdif <> 0) then
  1885. begin
  1886. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1887. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1888. end;
  1889. p := blockstart;
  1890. prev := p;
  1891. while (p <> blockend) do
  1892. begin
  1893. case p.typ of
  1894. ait_label:
  1895. if not labelcanbeskipped(tai_label(p)) then
  1896. labeltable^[tai_label(p).labsym.labelnr-lolab].taiobj := p;
  1897. {$ifdef i386}
  1898. ait_regalloc:
  1899. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1900. begin
  1901. supreg:=getsupreg(tai_regalloc(p).reg);
  1902. case tai_regalloc(p).ratype of
  1903. ra_alloc :
  1904. begin
  1905. if not(supreg in usedregs) then
  1906. include(usedregs, supreg)
  1907. else
  1908. begin
  1909. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1910. hp1 := tai(p.previous);
  1911. list.remove(p);
  1912. p.free;
  1913. p := hp1;
  1914. end;
  1915. end;
  1916. ra_dealloc :
  1917. begin
  1918. exclude(usedregs, supreg);
  1919. hp1 := p;
  1920. hp2 := nil;
  1921. while not(findregalloc(supreg,tai(hp1.next),ra_alloc)) and
  1922. getnextinstruction(hp1, hp1) and
  1923. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1924. hp2 := hp1;
  1925. if hp2 <> nil then
  1926. begin
  1927. hp1 := tai(p.previous);
  1928. list.remove(p);
  1929. insertllitem(list, hp2, tai(hp2.next), p);
  1930. p := hp1;
  1931. end
  1932. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1933. and getnextinstruction(p,hp1) then
  1934. begin
  1935. hp1 := tai(p.previous);
  1936. list.remove(p);
  1937. p.free;
  1938. p := hp1;
  1939. // don't include here, since then the allocation will be removed when it's processed
  1940. // include(usedregs,supreg);
  1941. end;
  1942. end;
  1943. end;
  1944. end;
  1945. {$endif i386}
  1946. end;
  1947. repeat
  1948. prev := p;
  1949. p := tai(p.next);
  1950. until not(assigned(p)) or
  1951. (p = blockend) or
  1952. not(p.typ in (skipinstr - [ait_regalloc]));
  1953. end;
  1954. {$ifdef i386}
  1955. { don't add deallocation for function result variable or for regvars}
  1956. getNoDeallocRegs(noDeallocRegs);
  1957. usedRegs := usedRegs - noDeallocRegs;
  1958. for regCounter := RS_EAX to RS_EDI do
  1959. if regCounter in usedRegs then
  1960. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1961. {$endif i386}
  1962. end;
  1963. function tdfaobj.pass_1(_blockstart: tai): tai;
  1964. begin
  1965. blockstart := _blockstart;
  1966. initlabeltable;
  1967. pass_1 := blockend;
  1968. end;
  1969. function tdfaobj.initdfapass2: boolean;
  1970. {reserves memory for the PtaiProps in one big memory block when not using
  1971. TP, returns False if not enough memory is available for the optimizer in all
  1972. cases}
  1973. var
  1974. p: tai;
  1975. count: Longint;
  1976. { TmpStr: String; }
  1977. begin
  1978. p := blockstart;
  1979. skiphead(p);
  1980. nroftaiobjs := 0;
  1981. while (p <> blockend) do
  1982. begin
  1983. {$ifDef JumpAnal}
  1984. case p.typ of
  1985. ait_label:
  1986. begin
  1987. if not labelcanbeskipped(tai_label(p)) then
  1988. labeltable^[tai_label(p).labsym.labelnr-lolab].instrnr := nroftaiobjs
  1989. end;
  1990. ait_instruction:
  1991. begin
  1992. if taicpu(p).is_jmp then
  1993. begin
  1994. if (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr >= lolab) and
  1995. (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr <= hilab) then
  1996. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-lolab].refsfound);
  1997. end;
  1998. end;
  1999. { ait_instruction:
  2000. begin
  2001. if (taicpu(p).opcode = A_PUSH) and
  2002. (taicpu(p).oper[0]^.typ = top_symbol) and
  2003. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  2004. begin
  2005. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  2006. if}
  2007. end;
  2008. {$endif JumpAnal}
  2009. inc(NrOftaiObjs);
  2010. getnextinstruction(p,p);
  2011. end;
  2012. if nroftaiobjs <> 0 then
  2013. begin
  2014. initdfapass2 := True;
  2015. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2016. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  2017. p := blockstart;
  2018. skiphead(p);
  2019. for count := 1 To nroftaiobjs do
  2020. begin
  2021. ptaiprop(p.optinfo) := @taipropblock^[count];
  2022. getnextinstruction(p, p);
  2023. end;
  2024. end
  2025. else
  2026. initdfapass2 := false;
  2027. end;
  2028. procedure tdfaobj.dodfapass2;
  2029. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2030. contents for the instructions starting with p. Returns the last tai which has
  2031. been processed}
  2032. var
  2033. curprop, LastFlagsChangeProp: ptaiprop;
  2034. Cnt, InstrCnt : Longint;
  2035. InstrProp: TInsProp;
  2036. UsedRegs: TRegSet;
  2037. prev,p : tai;
  2038. tmpref: TReference;
  2039. tmpsupreg: tsuperregister;
  2040. {$ifdef statedebug}
  2041. hp : tai;
  2042. {$endif}
  2043. {$ifdef AnalyzeLoops}
  2044. hp : tai;
  2045. TmpState: Byte;
  2046. {$endif AnalyzeLoops}
  2047. begin
  2048. p := BlockStart;
  2049. LastFlagsChangeProp := nil;
  2050. prev := nil;
  2051. UsedRegs := [];
  2052. UpdateUsedregs(UsedRegs, p);
  2053. SkipHead(p);
  2054. BlockStart := p;
  2055. InstrCnt := 1;
  2056. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2057. while (p <> Blockend) Do
  2058. begin
  2059. curprop := @taiPropBlock^[InstrCnt];
  2060. if assigned(prev)
  2061. then
  2062. begin
  2063. {$ifdef JumpAnal}
  2064. if (p.Typ <> ait_label) then
  2065. {$endif JumpAnal}
  2066. begin
  2067. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2068. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2069. curprop^.FlagsUsed := false;
  2070. end
  2071. end
  2072. else
  2073. begin
  2074. fillchar(curprop^, SizeOf(curprop^), 0);
  2075. { For tmpreg := RS_EAX to RS_EDI Do
  2076. curprop^.regs[tmpreg].WState := 1;}
  2077. end;
  2078. curprop^.UsedRegs := UsedRegs;
  2079. curprop^.CanBeRemoved := False;
  2080. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2081. For tmpsupreg := RS_EAX To RS_EDI Do
  2082. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2083. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2084. else
  2085. begin
  2086. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2087. curprop^.regs[tmpsupreg].typ := con_unknown;
  2088. end;
  2089. case p.typ Of
  2090. ait_marker:;
  2091. ait_label:
  2092. {$ifndef JumpAnal}
  2093. if not labelCanBeSkipped(tai_label(p)) then
  2094. DestroyAllRegs(curprop,false,false);
  2095. {$else JumpAnal}
  2096. begin
  2097. if not labelCanBeSkipped(tai_label(p)) then
  2098. With LTable^[tai_Label(p).labsym^.labelnr-LoLab] Do
  2099. {$ifDef AnalyzeLoops}
  2100. if (RefsFound = tai_Label(p).labsym^.RefCount)
  2101. {$else AnalyzeLoops}
  2102. if (JmpsProcessed = tai_Label(p).labsym^.RefCount)
  2103. {$endif AnalyzeLoops}
  2104. then
  2105. {all jumps to this label have been found}
  2106. {$ifDef AnalyzeLoops}
  2107. if (JmpsProcessed > 0)
  2108. then
  2109. {$endif AnalyzeLoops}
  2110. {we've processed at least one jump to this label}
  2111. begin
  2112. if (GetLastInstruction(p, hp) and
  2113. not(((hp.typ = ait_instruction)) and
  2114. (taicpu_labeled(hp).is_jmp))
  2115. then
  2116. {previous instruction not a JMP -> the contents of the registers after the
  2117. previous intruction has been executed have to be taken into account as well}
  2118. For tmpsupreg := RS_EAX to RS_EDI Do
  2119. begin
  2120. if (curprop^.regs[tmpsupreg].WState <>
  2121. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2122. then DestroyReg(curprop, tmpsupreg, true)
  2123. end
  2124. end
  2125. {$ifDef AnalyzeLoops}
  2126. else
  2127. {a label from a backward jump (e.g. a loop), no jump to this label has
  2128. already been processed}
  2129. if GetLastInstruction(p, hp) and
  2130. not(hp.typ = ait_instruction) and
  2131. (taicpu_labeled(hp).opcode = A_JMP))
  2132. then
  2133. {previous instruction not a jmp, so keep all the registers' contents from the
  2134. previous instruction}
  2135. begin
  2136. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2137. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2138. end
  2139. else
  2140. {previous instruction a jmp and no jump to this label processed yet}
  2141. begin
  2142. hp := p;
  2143. Cnt := InstrCnt;
  2144. {continue until we find a jump to the label or a label which has already
  2145. been processed}
  2146. while GetNextInstruction(hp, hp) and
  2147. not((hp.typ = ait_instruction) and
  2148. (taicpu(hp).is_jmp) and
  2149. (tasmlabel(taicpu(hp).oper[0]^.sym).labsymabelnr = tai_Label(p).labsym^.labelnr)) and
  2150. not((hp.typ = ait_label) and
  2151. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].RefsFound
  2152. = tai_Label(hp).labsym^.RefCount) and
  2153. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2154. inc(Cnt);
  2155. if (hp.typ = ait_label)
  2156. then
  2157. {there's a processed label after the current one}
  2158. begin
  2159. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2160. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2161. end
  2162. else
  2163. {there's no label anymore after the current one, or they haven't been
  2164. processed yet}
  2165. begin
  2166. GetLastInstruction(p, hp);
  2167. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2168. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2169. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2170. end
  2171. end
  2172. {$endif AnalyzeLoops}
  2173. else
  2174. {not all references to this label have been found, so destroy all registers}
  2175. begin
  2176. GetLastInstruction(p, hp);
  2177. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2178. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2179. DestroyAllRegs(curprop,true,true)
  2180. end;
  2181. end;
  2182. {$endif JumpAnal}
  2183. ait_stab, ait_force_line, ait_function_name:;
  2184. ait_align: ; { may destroy flags !!! }
  2185. ait_instruction:
  2186. begin
  2187. if taicpu(p).is_jmp or
  2188. (taicpu(p).opcode = A_JMP) then
  2189. begin
  2190. {$ifNDef JumpAnal}
  2191. for tmpsupreg := RS_EAX to RS_EDI do
  2192. with curprop^.regs[tmpsupreg] do
  2193. case typ of
  2194. con_ref: typ := con_noRemoveRef;
  2195. con_const: typ := con_noRemoveConst;
  2196. con_invalid: typ := con_unknown;
  2197. end;
  2198. {$else JumpAnal}
  2199. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-LoLab] Do
  2200. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2201. begin
  2202. if (InstrCnt < InstrNr)
  2203. then
  2204. {forward jump}
  2205. if (JmpsProcessed = 0) then
  2206. {no jump to this label has been processed yet}
  2207. begin
  2208. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2209. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2210. inc(JmpsProcessed);
  2211. end
  2212. else
  2213. begin
  2214. For tmpreg := RS_EAX to RS_EDI Do
  2215. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2216. curprop^.regs[tmpreg].WState) then
  2217. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2218. inc(JmpsProcessed);
  2219. end
  2220. {$ifdef AnalyzeLoops}
  2221. else
  2222. { backward jump, a loop for example}
  2223. { if (JmpsProcessed > 0) or
  2224. not(GetLastInstruction(taiObj, hp) and
  2225. (hp.typ = ait_labeled_instruction) and
  2226. (taicpu_labeled(hp).opcode = A_JMP))
  2227. then}
  2228. {instruction prior to label is not a jmp, or at least one jump to the label
  2229. has yet been processed}
  2230. begin
  2231. inc(JmpsProcessed);
  2232. For tmpreg := RS_EAX to RS_EDI Do
  2233. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2234. curprop^.regs[tmpreg].WState)
  2235. then
  2236. begin
  2237. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2238. Cnt := InstrNr;
  2239. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2240. begin
  2241. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2242. inc(Cnt);
  2243. end;
  2244. while (Cnt <= InstrCnt) Do
  2245. begin
  2246. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2247. inc(Cnt)
  2248. end
  2249. end;
  2250. end
  2251. { else }
  2252. {instruction prior to label is a jmp and no jumps to the label have yet been
  2253. processed}
  2254. { begin
  2255. inc(JmpsProcessed);
  2256. For tmpreg := RS_EAX to RS_EDI Do
  2257. begin
  2258. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2259. Cnt := InstrNr;
  2260. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2261. begin
  2262. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2263. inc(Cnt);
  2264. end;
  2265. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2266. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2267. begin
  2268. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2269. inc(Cnt);
  2270. end;
  2271. while (Cnt <= InstrCnt) Do
  2272. begin
  2273. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2274. inc(Cnt)
  2275. end
  2276. end
  2277. end}
  2278. {$endif AnalyzeLoops}
  2279. end;
  2280. {$endif JumpAnal}
  2281. end
  2282. else
  2283. begin
  2284. InstrProp := InsProp[taicpu(p).opcode];
  2285. case taicpu(p).opcode Of
  2286. A_MOV, A_MOVZX, A_MOVSX:
  2287. begin
  2288. case taicpu(p).oper[0]^.typ Of
  2289. top_ref, top_reg:
  2290. case taicpu(p).oper[1]^.typ Of
  2291. top_reg:
  2292. begin
  2293. {$ifdef statedebug}
  2294. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2295. insertllitem(list,p,p.next,hp);
  2296. {$endif statedebug}
  2297. readOp(curprop, taicpu(p).oper[0]^);
  2298. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2299. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2300. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2301. begin
  2302. with curprop^.regs[tmpsupreg] Do
  2303. begin
  2304. incState(wstate,1);
  2305. { also store how many instructions are part of the sequence in the first }
  2306. { instruction's ptaiprop, so it can be easily accessed from within }
  2307. { CheckSequence }
  2308. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2309. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2310. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2311. { Destroy the contents of the registers }
  2312. { that depended on the previous value of }
  2313. { this register }
  2314. invalidateDependingRegs(curprop,tmpsupreg);
  2315. curprop^.regs[tmpsupreg].memwrite := nil;
  2316. end;
  2317. end
  2318. else
  2319. begin
  2320. {$ifdef statedebug}
  2321. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2322. insertllitem(list,p,p.next,hp);
  2323. {$endif statedebug}
  2324. destroyReg(curprop, tmpsupreg, true);
  2325. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2326. with curprop^.regs[tmpsupreg] Do
  2327. begin
  2328. typ := con_ref;
  2329. startmod := p;
  2330. nrOfMods := 1;
  2331. end
  2332. end;
  2333. {$ifdef StateDebug}
  2334. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2335. insertllitem(list,p,p.next,hp);
  2336. {$endif StateDebug}
  2337. end;
  2338. top_ref:
  2339. begin
  2340. readref(curprop, taicpu(p).oper[1]^.ref);
  2341. if taicpu(p).oper[0]^.typ = top_reg then
  2342. begin
  2343. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2344. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2345. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2346. taicpu(p);
  2347. end
  2348. else
  2349. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2350. end;
  2351. end;
  2352. top_Const:
  2353. begin
  2354. case taicpu(p).oper[1]^.typ Of
  2355. top_reg:
  2356. begin
  2357. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2358. {$ifdef statedebug}
  2359. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2360. insertllitem(list,p,p.next,hp);
  2361. {$endif statedebug}
  2362. With curprop^.regs[tmpsupreg] Do
  2363. begin
  2364. DestroyReg(curprop, tmpsupreg, true);
  2365. typ := Con_Const;
  2366. StartMod := p;
  2367. nrOfMods := 1;
  2368. end
  2369. end;
  2370. top_ref:
  2371. begin
  2372. readref(curprop, taicpu(p).oper[1]^.ref);
  2373. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2374. end;
  2375. end;
  2376. end;
  2377. end;
  2378. end;
  2379. A_DIV, A_IDIV, A_MUL:
  2380. begin
  2381. ReadOp(curprop, taicpu(p).oper[0]^);
  2382. readreg(curprop,RS_EAX);
  2383. if (taicpu(p).OpCode = A_IDIV) or
  2384. (taicpu(p).OpCode = A_DIV) then
  2385. begin
  2386. readreg(curprop,RS_EDX);
  2387. end;
  2388. {$ifdef statedebug}
  2389. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2390. insertllitem(list,p,p.next,hp);
  2391. {$endif statedebug}
  2392. { DestroyReg(curprop, RS_EAX, true);}
  2393. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2394. taicpu(p), RS_EAX);
  2395. DestroyReg(curprop, RS_EDX, true);
  2396. LastFlagsChangeProp := curprop;
  2397. end;
  2398. A_IMUL:
  2399. begin
  2400. ReadOp(curprop,taicpu(p).oper[0]^);
  2401. if (taicpu(p).ops >= 2) then
  2402. ReadOp(curprop,taicpu(p).oper[1]^);
  2403. if (taicpu(p).ops <= 2) then
  2404. if (taicpu(p).ops=1) then
  2405. begin
  2406. readreg(curprop,RS_EAX);
  2407. {$ifdef statedebug}
  2408. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2409. insertllitem(list,p,p.next,hp);
  2410. {$endif statedebug}
  2411. { DestroyReg(curprop, RS_EAX, true); }
  2412. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2413. taicpu(p), RS_EAX);
  2414. DestroyReg(curprop,RS_EDX, true)
  2415. end
  2416. else
  2417. AddInstr2OpContents(
  2418. {$ifdef statedebug}list,{$endif}
  2419. taicpu(p), taicpu(p).oper[1]^)
  2420. else
  2421. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2422. taicpu(p), taicpu(p).oper[2]^);
  2423. LastFlagsChangeProp := curprop;
  2424. end;
  2425. A_LEA:
  2426. begin
  2427. readop(curprop,taicpu(p).oper[0]^);
  2428. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2429. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2430. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2431. else
  2432. begin
  2433. {$ifdef statedebug}
  2434. hp := tai_comment.Create(strpnew('destroying & initing'+
  2435. std_regname(taicpu(p).oper[1]^.reg)));
  2436. insertllitem(list,p,p.next,hp);
  2437. {$endif statedebug}
  2438. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2439. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2440. begin
  2441. typ := con_ref;
  2442. startmod := p;
  2443. nrOfMods := 1;
  2444. end
  2445. end;
  2446. end;
  2447. else
  2448. begin
  2449. Cnt := 1;
  2450. while (Cnt <= maxinschanges) and
  2451. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2452. begin
  2453. case InstrProp.Ch[Cnt] Of
  2454. Ch_REAX..Ch_REDI:
  2455. begin
  2456. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2457. readreg(curprop,tmpsupreg);
  2458. end;
  2459. Ch_WEAX..Ch_RWEDI:
  2460. begin
  2461. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2462. begin
  2463. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2464. readreg(curprop,tmpsupreg);
  2465. end;
  2466. {$ifdef statedebug}
  2467. hp := tai_comment.Create(strpnew('destroying '+
  2468. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2469. insertllitem(list,p,p.next,hp);
  2470. {$endif statedebug}
  2471. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2472. DestroyReg(curprop,tmpsupreg, true);
  2473. end;
  2474. Ch_MEAX..Ch_MEDI:
  2475. begin
  2476. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2477. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2478. taicpu(p),tmpsupreg);
  2479. end;
  2480. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2481. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2482. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2483. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2484. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2485. Ch_Wop1..Ch_RWop1:
  2486. begin
  2487. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2488. ReadOp(curprop, taicpu(p).oper[0]^);
  2489. DestroyOp(p, taicpu(p).oper[0]^);
  2490. end;
  2491. Ch_Mop1:
  2492. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2493. taicpu(p), taicpu(p).oper[0]^);
  2494. Ch_Wop2..Ch_RWop2:
  2495. begin
  2496. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2497. ReadOp(curprop, taicpu(p).oper[1]^);
  2498. DestroyOp(p, taicpu(p).oper[1]^);
  2499. end;
  2500. Ch_Mop2:
  2501. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2502. taicpu(p), taicpu(p).oper[1]^);
  2503. Ch_WOp3..Ch_RWOp3:
  2504. begin
  2505. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2506. ReadOp(curprop, taicpu(p).oper[2]^);
  2507. DestroyOp(p, taicpu(p).oper[2]^);
  2508. end;
  2509. Ch_Mop3:
  2510. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2511. taicpu(p), taicpu(p).oper[2]^);
  2512. Ch_WMemEDI:
  2513. begin
  2514. readreg(curprop, RS_EDI);
  2515. fillchar(tmpref, SizeOf(tmpref), 0);
  2516. tmpref.base := NR_EDI;
  2517. tmpref.index := NR_EDI;
  2518. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2519. end;
  2520. Ch_RFlags:
  2521. if assigned(LastFlagsChangeProp) then
  2522. LastFlagsChangeProp^.FlagsUsed := true;
  2523. Ch_WFlags:
  2524. LastFlagsChangeProp := curprop;
  2525. Ch_RWFlags:
  2526. begin
  2527. if assigned(LastFlagsChangeProp) then
  2528. LastFlagsChangeProp^.FlagsUsed := true;
  2529. LastFlagsChangeProp := curprop;
  2530. end;
  2531. Ch_FPU:;
  2532. else
  2533. begin
  2534. {$ifdef statedebug}
  2535. hp := tai_comment.Create(strpnew(
  2536. 'destroying all regs for prev instruction'));
  2537. insertllitem(list,p, p.next,hp);
  2538. {$endif statedebug}
  2539. DestroyAllRegs(curprop,true,true);
  2540. LastFlagsChangeProp := curprop;
  2541. end;
  2542. end;
  2543. inc(Cnt);
  2544. end
  2545. end;
  2546. end;
  2547. end;
  2548. end
  2549. else
  2550. begin
  2551. {$ifdef statedebug}
  2552. hp := tai_comment.Create(strpnew(
  2553. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2554. insertllitem(list,p, p.next,hp);
  2555. {$endif statedebug}
  2556. DestroyAllRegs(curprop,true,true);
  2557. end;
  2558. end;
  2559. inc(InstrCnt);
  2560. prev := p;
  2561. GetNextInstruction(p, p);
  2562. end;
  2563. end;
  2564. function tdfaobj.pass_generate_code: boolean;
  2565. begin
  2566. if initdfapass2 then
  2567. begin
  2568. dodfapass2;
  2569. pass_generate_code := true
  2570. end
  2571. else
  2572. pass_generate_code := false;
  2573. end;
  2574. {$push}
  2575. {$r-}
  2576. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2577. begin
  2578. if (sym.labelnr >= lolab) and
  2579. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2580. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2581. else
  2582. getlabelwithsym := nil;
  2583. end;
  2584. {$pop}
  2585. procedure tdfaobj.clear;
  2586. begin
  2587. if labdif <> 0 then
  2588. begin
  2589. freemem(labeltable);
  2590. labeltable := nil;
  2591. end;
  2592. if assigned(taipropblock) then
  2593. begin
  2594. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2595. taipropblock := nil;
  2596. end;
  2597. end;
  2598. end.