ncgmem.pas 49 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cgutils,cpuinfo,cpubase,
  23. symtype,
  24. node,nmem;
  25. type
  26. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  27. procedure pass_generate_code;override;
  28. end;
  29. tcgloadparentfpnode = class(tloadparentfpnode)
  30. procedure pass_generate_code;override;
  31. end;
  32. tcgaddrnode = class(taddrnode)
  33. procedure pass_generate_code;override;
  34. end;
  35. tcgderefnode = class(tderefnode)
  36. procedure pass_generate_code;override;
  37. end;
  38. tcgsubscriptnode = class(tsubscriptnode)
  39. protected
  40. function handle_platform_subscript: boolean; virtual;
  41. public
  42. procedure pass_generate_code;override;
  43. end;
  44. tcgwithnode = class(twithnode)
  45. procedure pass_generate_code;override;
  46. end;
  47. tcgvecnode = class(tvecnode)
  48. function get_mul_size : aint;
  49. private
  50. procedure rangecheck_array;
  51. procedure rangecheck_string;
  52. protected
  53. {# This routine is used to calculate the address of the reference.
  54. On entry reg contains the index in the array,
  55. and l contains the size of each element in the array.
  56. This routine should update location.reference correctly,
  57. so it points to the correct address.
  58. }
  59. procedure update_reference_reg_mul(maybe_const_reg: tregister;regsize: tdef; l: aint);virtual;
  60. procedure update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l: aint);virtual;
  61. procedure update_reference_offset(var ref: treference; index, mulsize: aint); virtual;
  62. procedure second_wideansistring;virtual;
  63. procedure second_dynamicarray;virtual;
  64. function valid_index_size(size: tcgsize): boolean;virtual;
  65. public
  66. procedure pass_generate_code;override;
  67. end;
  68. implementation
  69. uses
  70. systems,
  71. cutils,cclasses,verbose,globals,constexp,
  72. symconst,symbase,symdef,symsym,symcpu,symtable,defutil,paramgr,
  73. aasmbase,aasmtai,aasmdata,
  74. procinfo,pass_2,parabase,
  75. pass_1,nld,ncon,nadd,ncnv,nutils,
  76. cgobj,hlcgobj,
  77. tgobj,ncgutil,objcgutl,
  78. defcmp
  79. ;
  80. {*****************************************************************************
  81. TCGLOADVMTADDRNODE
  82. *****************************************************************************}
  83. procedure tcgloadvmtaddrnode.pass_generate_code;
  84. var
  85. href : treference;
  86. pool : THashSet;
  87. entry : PHashSetItem;
  88. begin
  89. location_reset(location,LOC_REGISTER,def_cgsize(voidpointertype));
  90. if (left.nodetype=typen) then
  91. begin
  92. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,voidpointertype);
  93. if not is_objcclass(left.resultdef) then
  94. begin
  95. reference_reset_symbol(href,
  96. current_asmdata.RefAsmSymbol(tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname,AT_DATA),0,
  97. voidpointertype.size);
  98. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,resultdef,resultdef,href,location.register);
  99. end
  100. else
  101. begin
  102. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  103. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  104. if (target_info.system in systems_objc_nfabi) then
  105. begin
  106. { find/add necessary classref/classname pool entries }
  107. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  108. end
  109. else
  110. begin
  111. { find/add necessary classref/classname pool entries }
  112. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  113. end;
  114. reference_reset_symbol(href,tasmlabel(entry^.Data),0,voidpointertype.size);
  115. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,href,location.register);
  116. end;
  117. end
  118. else
  119. { should be handled in pass 1 }
  120. internalerror(2015052801);
  121. end;
  122. {*****************************************************************************
  123. TCGLOADPARENTFPNODE
  124. *****************************************************************************}
  125. procedure tcgloadparentfpnode.pass_generate_code;
  126. var
  127. currpi : tprocinfo;
  128. hsym : tparavarsym;
  129. href : treference;
  130. begin
  131. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  132. begin
  133. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  134. location.register:=current_procinfo.framepointer;
  135. end
  136. else
  137. begin
  138. currpi:=current_procinfo;
  139. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  140. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,parentfpvoidpointertype);
  141. { load framepointer of current proc }
  142. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  143. if not assigned(hsym) then
  144. internalerror(200309281);
  145. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,hsym.localloc,location.register);
  146. { walk parents }
  147. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  148. begin
  149. currpi:=currpi.parent;
  150. if not assigned(currpi) then
  151. internalerror(200311201);
  152. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  153. if not assigned(hsym) then
  154. internalerror(200309282);
  155. if hsym.localloc.loc<>LOC_REFERENCE then
  156. internalerror(200309283);
  157. hlcg.reference_reset_base(href,parentfpvoidpointertype,location.register,hsym.localloc.reference.offset,sizeof(pint));
  158. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,href,location.register);
  159. end;
  160. end;
  161. end;
  162. {*****************************************************************************
  163. TCGADDRNODE
  164. *****************************************************************************}
  165. procedure tcgaddrnode.pass_generate_code;
  166. begin
  167. secondpass(left);
  168. location_reset(location,LOC_REGISTER,int_cgsize(resultdef.size));
  169. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,resultdef);
  170. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  171. { on x86_64-win64, array of chars can be returned in registers, however,
  172. when passing these arrays to other functions, the compiler wants to take
  173. the address of the array so when the addrnode has been created internally,
  174. we have to force the data into memory, see also tw14388.pp
  175. }
  176. if nf_internal in flags then
  177. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  178. else
  179. internalerror(2006111510);
  180. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.resultdef,resultdef,left.location.reference,location.register);
  181. end;
  182. {*****************************************************************************
  183. TCGDEREFNODE
  184. *****************************************************************************}
  185. procedure tcgderefnode.pass_generate_code;
  186. var
  187. paraloc1 : tcgpara;
  188. pd : tprocdef;
  189. sym : tsym;
  190. st : tsymtable;
  191. hp : pnode;
  192. hp2 : tnode;
  193. extraoffset : tcgint;
  194. begin
  195. sym:=nil;
  196. { assume natural alignment, except for packed records }
  197. if not(resultdef.typ in [recorddef,objectdef]) or
  198. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  199. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment)
  200. else
  201. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
  202. { can we fold an add/sub node into the offset of the deref node? }
  203. extraoffset:=0;
  204. hp:=actualtargetnode(@left);
  205. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  206. begin
  207. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  208. replacenode(hp^,taddnode(hp^).left);
  209. end
  210. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  211. begin
  212. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  213. replacenode(hp^,taddnode(hp^).left);
  214. end
  215. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  216. begin
  217. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  218. replacenode(hp^,taddnode(hp^).right);
  219. end;
  220. secondpass(left);
  221. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  222. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  223. case left.location.loc of
  224. LOC_CREGISTER,
  225. LOC_REGISTER:
  226. begin
  227. hlcg.maybe_change_load_node_reg(current_asmdata.CurrAsmList,left,true);
  228. {$ifdef cpu_uses_separate_address_registers}
  229. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  230. begin
  231. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  232. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  233. location.reference.base);
  234. end
  235. else
  236. {$endif}
  237. location.reference.base := left.location.register;
  238. end;
  239. LOC_CREFERENCE,
  240. LOC_REFERENCE:
  241. begin
  242. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  243. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  244. end;
  245. LOC_CONSTANT:
  246. begin
  247. location.reference.offset:=left.location.value;
  248. end;
  249. else
  250. internalerror(200507031);
  251. end;
  252. location.reference.offset:=location.reference.offset+extraoffset;
  253. if (cs_use_heaptrc in current_settings.globalswitches) and
  254. (cs_checkpointer in current_settings.localswitches) and
  255. not(cs_compilesystem in current_settings.moduleswitches) and
  256. {$ifdef x86}
  257. (tcpupointerdef(left.resultdef).x86pointertyp = tcpupointerdefclass(cpointerdef).default_x86_data_pointer_type) and
  258. {$endif x86}
  259. not(nf_no_checkpointer in flags) and
  260. { can be NR_NO in case of LOC_CONSTANT }
  261. (location.reference.base<>NR_NO) then
  262. begin
  263. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  264. (sym.typ<>procsym) then
  265. internalerror(2012010601);
  266. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  267. paraloc1.init;
  268. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  269. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  270. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  271. paraloc1.done;
  272. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  273. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  274. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  275. end;
  276. end;
  277. {*****************************************************************************
  278. TCGSUBSCRIPTNODE
  279. *****************************************************************************}
  280. function tcgsubscriptnode.handle_platform_subscript: boolean;
  281. begin
  282. result:=false;
  283. end;
  284. procedure tcgsubscriptnode.pass_generate_code;
  285. var
  286. asmsym: tasmsymbol;
  287. paraloc1 : tcgpara;
  288. tmpref: treference;
  289. sref: tsubsetreference;
  290. offsetcorrection : aint;
  291. pd : tprocdef;
  292. sym : tsym;
  293. st : tsymtable;
  294. begin
  295. sym:=nil;
  296. secondpass(left);
  297. if codegenerror then
  298. exit;
  299. paraloc1.init;
  300. { several object types must be dereferenced implicitly }
  301. if is_implicit_pointer_object_type(left.resultdef) then
  302. begin
  303. if (not is_managed_type(left.resultdef)) or
  304. (target_info.system in systems_garbage_collected_managed_types) then
  305. begin
  306. { the contents of a class are aligned to a sizeof(pointer) }
  307. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),voidpointertype.size);
  308. case left.location.loc of
  309. LOC_CREGISTER,
  310. LOC_REGISTER:
  311. begin
  312. {$ifdef cpu_uses_separate_address_registers}
  313. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  314. begin
  315. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  316. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  317. left.location.register,location.reference.base);
  318. end
  319. else
  320. {$endif}
  321. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  322. end;
  323. LOC_CREFERENCE,
  324. LOC_REFERENCE,
  325. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  326. LOC_SUBSETREG,
  327. LOC_CSUBSETREG,
  328. LOC_SUBSETREF,
  329. LOC_CSUBSETREF:
  330. begin
  331. hlcg.reference_reset_base(location.reference,left.resultdef,
  332. hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  333. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  334. end;
  335. LOC_CONSTANT:
  336. begin
  337. { can happen with @classtype(pointerconst).field }
  338. location.reference.offset:=left.location.value;
  339. end;
  340. else
  341. internalerror(2009092401);
  342. end;
  343. { implicit deferencing }
  344. if (cs_use_heaptrc in current_settings.globalswitches) and
  345. (cs_checkpointer in current_settings.localswitches) and
  346. not(cs_compilesystem in current_settings.moduleswitches) then
  347. begin
  348. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  349. (sym.typ<>procsym) then
  350. internalerror(2012010602);
  351. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  352. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  353. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  354. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  355. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  356. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  357. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  358. end;
  359. end
  360. else
  361. { reference-counted implicit pointer object types don't have
  362. fields -> cannot be subscripted (calls are handled via call
  363. nodes) }
  364. internalerror(2011011901);
  365. end
  366. else
  367. begin
  368. location_copy(location,left.location);
  369. { some abi's require that functions return (some) records in }
  370. { registers }
  371. case location.loc of
  372. LOC_REFERENCE,
  373. LOC_CREFERENCE:
  374. ;
  375. LOC_CONSTANT,
  376. LOC_REGISTER,
  377. LOC_CREGISTER,
  378. { if a floating point value is casted into a record, it
  379. can happen that we get here an fpu or mm register }
  380. LOC_MMREGISTER,
  381. LOC_FPUREGISTER,
  382. LOC_CMMREGISTER,
  383. LOC_CFPUREGISTER:
  384. begin
  385. { in case the result is not something that can be put
  386. into an integer register (e.g.
  387. function_returning_record().non_regable_field, or
  388. a function returning a value > sizeof(intreg))
  389. -> force to memory
  390. }
  391. if not tstoreddef(left.resultdef).is_intregable or
  392. not tstoreddef(resultdef).is_intregable or
  393. { if the field spans multiple registers, we must force the record into
  394. memory as well }
  395. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  396. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  397. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER,LOC_CMMREGISTER,LOC_CFPUREGISTER,
  398. { actually, we should be able to "subscript" a constant, but this would require some code
  399. which enables dumping and reading constants from a temporary memory buffer. This
  400. must be done a CPU dependent way, so it is not easy and probably not worth the effort (FK)
  401. }
  402. LOC_CONSTANT]) then
  403. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  404. else
  405. begin
  406. if (left.location.loc = LOC_REGISTER) then
  407. location.loc := LOC_SUBSETREG
  408. else
  409. location.loc := LOC_CSUBSETREG;
  410. location.size:=def_cgsize(resultdef);
  411. offsetcorrection:=0;
  412. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  413. begin
  414. if (vs.fieldoffset>=sizeof(aword)) xor (target_info.endian=endian_big) then
  415. location.sreg.subsetreg := left.location.registerhi
  416. else
  417. location.sreg.subsetreg := left.location.register;
  418. if (vs.fieldoffset>=sizeof(aword)) then
  419. offsetcorrection:=sizeof(aword)*8;
  420. location.sreg.subsetregsize := OS_INT;
  421. end
  422. else
  423. begin
  424. location.sreg.subsetreg := left.location.register;
  425. location.sreg.subsetregsize := left.location.size;
  426. end;
  427. if not is_packed_record_or_object(left.resultdef) then
  428. begin
  429. if (target_info.endian = ENDIAN_BIG) then
  430. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  431. else
  432. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  433. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  434. end
  435. else
  436. begin
  437. location.sreg.bitlen := resultdef.packedbitsize;
  438. if (target_info.endian = ENDIAN_BIG) then
  439. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  440. else
  441. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  442. end;
  443. end;
  444. end;
  445. LOC_SUBSETREG,
  446. LOC_CSUBSETREG:
  447. begin
  448. location.size:=def_cgsize(resultdef);
  449. if not is_packed_record_or_object(left.resultdef) then
  450. begin
  451. if (target_info.endian = ENDIAN_BIG) then
  452. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  453. else
  454. inc(location.sreg.startbit, vs.fieldoffset * 8);
  455. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  456. end
  457. else
  458. begin
  459. location.sreg.bitlen := resultdef.packedbitsize;
  460. if (target_info.endian = ENDIAN_BIG) then
  461. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  462. else
  463. inc(location.sreg.startbit, vs.fieldoffset);
  464. end;
  465. end;
  466. else
  467. internalerror(2006031901);
  468. end;
  469. end;
  470. if is_objc_class_or_protocol(left.resultdef) and
  471. (target_info.system in systems_objc_nfabi) then
  472. begin
  473. if (location.loc<>LOC_REFERENCE) or
  474. (location.reference.index<>NR_NO) then
  475. internalerror(2009092402);
  476. { the actual field offset is stored in memory (to solve the
  477. "fragile base class" problem: this way the layout of base
  478. classes can be changed without breaking programs compiled against
  479. earlier versions)
  480. }
  481. asmsym:=current_asmdata.RefAsmSymbol(vs.mangledname);
  482. reference_reset_symbol(tmpref,asmsym,0,sizeof(pint));
  483. location.reference.index:=hlcg.getintregister(current_asmdata.CurrAsmList,ptruinttype);
  484. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,ptruinttype,ptruinttype,tmpref,location.reference.index);
  485. { always packrecords C -> natural alignment }
  486. location.reference.alignment:=vs.vardef.alignment;
  487. end
  488. else if handle_platform_subscript then
  489. begin
  490. { done }
  491. end
  492. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  493. begin
  494. if not is_packed_record_or_object(left.resultdef) then
  495. begin
  496. inc(location.reference.offset,vs.fieldoffset);
  497. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  498. end
  499. else if (vs.fieldoffset mod 8 = 0) and
  500. (resultdef.packedbitsize mod 8 = 0) and
  501. { is different in case of e.g. packenum 2 and an enum }
  502. { which fits in 8 bits }
  503. (resultdef.size*8 = resultdef.packedbitsize) then
  504. begin
  505. inc(location.reference.offset,vs.fieldoffset div 8);
  506. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  507. end
  508. else
  509. begin
  510. sref.ref:=location.reference;
  511. sref.ref.alignment:=1;
  512. sref.bitindexreg:=NR_NO;
  513. inc(sref.ref.offset,vs.fieldoffset div 8);
  514. sref.startbit:=vs.fieldoffset mod 8;
  515. sref.bitlen:=resultdef.packedbitsize;
  516. if (left.location.loc=LOC_REFERENCE) then
  517. location.loc:=LOC_SUBSETREF
  518. else
  519. location.loc:=LOC_CSUBSETREF;
  520. location.sref:=sref;
  521. end;
  522. { also update the size of the location }
  523. location.size:=def_cgsize(resultdef);
  524. end;
  525. paraloc1.done;
  526. end;
  527. {*****************************************************************************
  528. TCGWITHNODE
  529. *****************************************************************************}
  530. procedure tcgwithnode.pass_generate_code;
  531. begin
  532. location_reset(location,LOC_VOID,OS_NO);
  533. if assigned(left) then
  534. secondpass(left);
  535. end;
  536. {*****************************************************************************
  537. TCGVECNODE
  538. *****************************************************************************}
  539. function tcgvecnode.get_mul_size : aint;
  540. begin
  541. if nf_memindex in flags then
  542. get_mul_size:=1
  543. else
  544. begin
  545. if (left.resultdef.typ=arraydef) then
  546. if not is_packed_array(left.resultdef) then
  547. get_mul_size:=tarraydef(left.resultdef).elesize
  548. else
  549. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  550. else
  551. get_mul_size:=resultdef.size;
  552. end
  553. end;
  554. { this routine must, like any other routine, not change the contents }
  555. { of base/index registers of references, as these may be regvars. }
  556. { The register allocator can coalesce one LOC_REGISTER being moved }
  557. { into another (as their live ranges won't overlap), but not a }
  558. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  559. { the live range of the LOC_CREGISTER will most likely overlap the }
  560. { the live range of the target LOC_(C)REGISTER) }
  561. { The passed register may be a LOC_CREGISTER as well. }
  562. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg: tregister; regsize: tdef; l: aint);
  563. var
  564. hreg: tregister;
  565. begin
  566. if l<>1 then
  567. begin
  568. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  569. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  570. maybe_const_reg:=hreg;
  571. end;
  572. if location.reference.base=NR_NO then
  573. location.reference.base:=maybe_const_reg
  574. else if location.reference.index=NR_NO then
  575. location.reference.index:=maybe_const_reg
  576. else
  577. begin
  578. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  579. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  580. reference_reset_base(location.reference,hreg,0,location.reference.alignment);
  581. { insert new index register }
  582. location.reference.index:=maybe_const_reg;
  583. end;
  584. { update alignment }
  585. if (location.reference.alignment=0) then
  586. internalerror(2009020704);
  587. location.reference.alignment:=newalignment(location.reference.alignment,l);
  588. end;
  589. { see remarks for tcgvecnode.update_reference_reg_mul above }
  590. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l:aint);
  591. var
  592. sref: tsubsetreference;
  593. offsetreg, hreg: tregister;
  594. alignpower: aint;
  595. temp : longint;
  596. begin
  597. { only orddefs are bitpacked. Even then we only need special code in }
  598. { case the bitpacked *byte size* is not a power of two, otherwise }
  599. { everything can be handled using the the regular array code. }
  600. if ((l mod 8) = 0) and
  601. (ispowerof2(l div 8,temp) or
  602. not is_ordinal(resultdef)
  603. {$ifndef cpu64bitalu}
  604. or is_64bitint(resultdef)
  605. {$endif not cpu64bitalu}
  606. ) then
  607. begin
  608. update_reference_reg_mul(maybe_const_reg,regsize,l div 8);
  609. exit;
  610. end;
  611. if (l > 8*sizeof(aint)) then
  612. internalerror(200608051);
  613. sref.ref := location.reference;
  614. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  615. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_ADDR,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  616. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,hreg);
  617. { keep alignment for index }
  618. sref.ref.alignment := left.resultdef.alignment;
  619. if not ispowerof2(packedbitsloadsize(l),temp) then
  620. internalerror(2006081201);
  621. alignpower:=temp;
  622. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  623. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  624. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  625. if (sref.ref.base = NR_NO) then
  626. sref.ref.base := offsetreg
  627. else if (sref.ref.index = NR_NO) then
  628. sref.ref.index := offsetreg
  629. else
  630. begin
  631. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  632. sref.ref.base := offsetreg;
  633. end;
  634. { the if expression below is a constant evaluated at compile time, so disable the unreachable code
  635. warning }
  636. {$push}
  637. {$warn 6018 off}
  638. { we can reuse hreg only if OS_INT and OS_ADDR have the same size/type }
  639. if OS_INT<>OS_ADDR then
  640. begin
  641. sref.bitindexreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  642. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_INT,hreg,sref.bitindexreg);
  643. end
  644. else
  645. sref.bitindexreg:=hreg;
  646. {$pop}
  647. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,sref.bitindexreg);
  648. sref.startbit := 0;
  649. sref.bitlen := resultdef.packedbitsize;
  650. if (left.location.loc = LOC_REFERENCE) then
  651. location.loc := LOC_SUBSETREF
  652. else
  653. location.loc := LOC_CSUBSETREF;
  654. location.sref := sref;
  655. end;
  656. procedure tcgvecnode.update_reference_offset(var ref: treference; index, mulsize: aint);
  657. begin
  658. inc(ref.offset,index*mulsize);
  659. end;
  660. procedure tcgvecnode.second_wideansistring;
  661. begin
  662. end;
  663. procedure tcgvecnode.second_dynamicarray;
  664. begin
  665. end;
  666. function tcgvecnode.valid_index_size(size: tcgsize): boolean;
  667. begin
  668. result:=
  669. tcgsize2signed[size]=tcgsize2signed[OS_ADDR];
  670. end;
  671. procedure tcgvecnode.rangecheck_array;
  672. var
  673. hightree : tnode;
  674. poslabel,
  675. neglabel : tasmlabel;
  676. hreg : tregister;
  677. paraloc1,paraloc2 : tcgpara;
  678. pd : tprocdef;
  679. begin
  680. { omit range checking when this is an array access to a pointer which has been
  681. typecasted from an array }
  682. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  683. exit;
  684. paraloc1.init;
  685. paraloc2.init;
  686. if is_open_array(left.resultdef) or
  687. is_array_of_const(left.resultdef) then
  688. begin
  689. { cdecl functions don't have high() so we can not check the range }
  690. { (can't use current_procdef, since it may be a nested procedure) }
  691. if not(tprocdef(tparasymtable(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry).owner).defowner).proccalloption in cdecl_pocalls) then
  692. begin
  693. { Get high value }
  694. hightree:=load_high_value_node(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry));
  695. { it must be available }
  696. if not assigned(hightree) then
  697. internalerror(200212201);
  698. firstpass(hightree);
  699. secondpass(hightree);
  700. { generate compares }
  701. if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  702. hreg:=cg.makeregsize(current_asmdata.CurrAsmList,right.location.register,OS_INT)
  703. else
  704. begin
  705. hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  706. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,hreg);
  707. end;
  708. current_asmdata.getjumplabel(neglabel);
  709. current_asmdata.getjumplabel(poslabel);
  710. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_LT,0,hreg,poslabel);
  711. cg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_BE,hightree.location,hreg,neglabel);
  712. cg.a_label(current_asmdata.CurrAsmList,poslabel);
  713. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_RANGEERROR',false);
  714. cg.a_label(current_asmdata.CurrAsmList,neglabel);
  715. { release hightree }
  716. hightree.free;
  717. end;
  718. end
  719. else
  720. if is_dynamic_array(left.resultdef) then
  721. begin
  722. pd:=search_system_proc('fpc_dynarray_rangecheck');
  723. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  724. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  725. if pd.is_pushleftright then
  726. begin
  727. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  728. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  729. end
  730. else
  731. begin
  732. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  733. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  734. end;
  735. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  736. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  737. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  738. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_DYNARRAY_RANGECHECK',false);
  739. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  740. end;
  741. { for regular arrays, we don't have to do anything because the index has been
  742. type converted to the index type, which already inserted a range check if
  743. necessary }
  744. paraloc1.done;
  745. paraloc2.done;
  746. end;
  747. procedure tcgvecnode.rangecheck_string;
  748. var
  749. paraloc1,
  750. paraloc2: tcgpara;
  751. helpername: TIDString;
  752. pd: tprocdef;
  753. begin
  754. paraloc1.init;
  755. paraloc2.init;
  756. case tstringdef(left.resultdef).stringtype of
  757. { it's the same for ansi- and wide strings }
  758. st_unicodestring,
  759. st_widestring,
  760. st_ansistring:
  761. begin
  762. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  763. pd:=search_system_proc(helpername);
  764. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  765. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  766. if pd.is_pushleftright then
  767. begin
  768. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  769. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  770. end
  771. else
  772. begin
  773. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  774. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  775. end;
  776. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  777. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  778. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  779. cg.a_call_name(current_asmdata.CurrAsmList,helpername,false);
  780. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  781. end;
  782. st_shortstring:
  783. begin
  784. {!!!!!!!!!!!!!!!!!}
  785. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  786. end;
  787. st_longstring:
  788. begin
  789. {!!!!!!!!!!!!!!!!!}
  790. end;
  791. end;
  792. paraloc1.done;
  793. paraloc2.done;
  794. end;
  795. procedure tcgvecnode.pass_generate_code;
  796. var
  797. offsetdec,
  798. extraoffset : aint;
  799. rightp : pnode;
  800. newsize : tcgsize;
  801. mulsize,
  802. bytemulsize,
  803. alignpow : aint;
  804. paraloc1,
  805. paraloc2 : tcgpara;
  806. subsetref : tsubsetreference;
  807. temp : longint;
  808. indexdef : tdef;
  809. begin
  810. paraloc1.init;
  811. paraloc2.init;
  812. mulsize:=get_mul_size;
  813. if not is_packed_array(left.resultdef) then
  814. bytemulsize:=mulsize
  815. else
  816. bytemulsize:=mulsize div 8;
  817. newsize:=def_cgsize(resultdef);
  818. secondpass(left);
  819. if left.location.loc=LOC_CREFERENCE then
  820. location_reset_ref(location,LOC_CREFERENCE,newsize,left.location.reference.alignment)
  821. else
  822. location_reset_ref(location,LOC_REFERENCE,newsize,left.location.reference.alignment);
  823. { an ansistring needs to be dereferenced }
  824. if is_ansistring(left.resultdef) or
  825. is_wide_or_unicode_string(left.resultdef) then
  826. begin
  827. if nf_callunique in flags then
  828. internalerror(200304236);
  829. {DM!!!!!}
  830. case left.location.loc of
  831. LOC_REGISTER,
  832. LOC_CREGISTER :
  833. begin
  834. {$ifdef m68k}
  835. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  836. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.reference.base);
  837. {$else m68k}
  838. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  839. {$endif m68k}
  840. end;
  841. LOC_CREFERENCE,
  842. LOC_REFERENCE :
  843. begin
  844. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  845. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location.reference,location.reference.base);
  846. end;
  847. LOC_CONSTANT:
  848. begin
  849. hlcg.reference_reset_base(location.reference,left.resultdef,NR_NO,left.location.value,location.reference.alignment);
  850. end;
  851. else
  852. internalerror(2002032218);
  853. end;
  854. if is_ansistring(left.resultdef) then
  855. offsetdec:=1
  856. else
  857. offsetdec:=2;
  858. location.reference.alignment:=offsetdec;
  859. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  860. if not(cs_zerobasedstrings in current_settings.localswitches) then
  861. update_reference_offset(location.reference,-1,offsetdec);
  862. end
  863. else if is_dynamic_array(left.resultdef) then
  864. begin
  865. case left.location.loc of
  866. LOC_REGISTER,
  867. LOC_CREGISTER :
  868. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  869. LOC_REFERENCE,
  870. LOC_CREFERENCE :
  871. begin
  872. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  873. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  874. left.location.reference,location.reference.base);
  875. end;
  876. else
  877. internalerror(2002032219);
  878. end;
  879. { a dynarray points to the start of a memory block, which
  880. we assume to be always aligned to a multiple of the
  881. pointer size
  882. }
  883. location.reference.alignment:=voidpointertype.size;
  884. end
  885. else
  886. begin
  887. { may happen in case of function results }
  888. case left.location.loc of
  889. LOC_CREGISTER,
  890. LOC_CMMREGISTER,
  891. LOC_REGISTER,
  892. LOC_MMREGISTER:
  893. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  894. end;
  895. location_copy(location,left.location);
  896. end;
  897. { location must be memory }
  898. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  899. internalerror(200411013);
  900. { offset can only differ from 0 if arraydef }
  901. if (left.resultdef.typ=arraydef) and
  902. not(is_dynamic_array(left.resultdef)) and
  903. (not(is_packed_array(left.resultdef)) or
  904. ((mulsize mod 8 = 0) and
  905. ispowerof2(mulsize div 8,temp)) or
  906. { only orddefs are bitpacked }
  907. not is_ordinal(resultdef)
  908. {$ifndef cpu64bitalu}
  909. or is_64bitint(resultdef)
  910. {$endif not cpu64bitalu}
  911. ) then
  912. update_reference_offset(location.reference,-tarraydef(left.resultdef).lowrange,bytemulsize);
  913. if right.nodetype=ordconstn then
  914. begin
  915. { offset can only differ from 0 if arraydef }
  916. if cs_check_range in current_settings.localswitches then
  917. begin
  918. secondpass(right);
  919. case left.resultdef.typ of
  920. arraydef :
  921. rangecheck_array;
  922. stringdef :
  923. rangecheck_string;
  924. end;
  925. end;
  926. if not(is_packed_array(left.resultdef)) or
  927. ((mulsize mod 8 = 0) and
  928. (ispowerof2(mulsize div 8,temp) or
  929. { only orddefs are bitpacked }
  930. not is_ordinal(resultdef))) then
  931. begin
  932. extraoffset:=tordconstnode(right).value.svalue;
  933. update_reference_offset(location.reference,extraoffset,bytemulsize);
  934. { adjust alignment after this change }
  935. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset*bytemulsize);
  936. { don't do this for floats etc.; needed to properly set the }
  937. { size for bitpacked arrays (e.g. a bitpacked array of }
  938. { enums who are size 2 but fit in one byte -> in the array }
  939. { they will be one byte and have to be stored like that) }
  940. if is_packed_array(left.resultdef) and
  941. (tcgsize2size[newsize] <> bytemulsize) then
  942. newsize:=int_cgsize(bytemulsize);
  943. end
  944. else
  945. begin
  946. subsetref.ref := location.reference;
  947. subsetref.ref.alignment := left.resultdef.alignment;
  948. if not ispowerof2(packedbitsloadsize(resultdef.packedbitsize),temp) then
  949. internalerror(2006081212);
  950. alignpow:=temp;
  951. update_reference_offset(subsetref.ref,(mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow),1 shl alignpow);
  952. subsetref.bitindexreg := NR_NO;
  953. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  954. subsetref.bitlen := resultdef.packedbitsize;
  955. if (left.location.loc = LOC_REFERENCE) then
  956. location.loc := LOC_SUBSETREF
  957. else
  958. location.loc := LOC_CSUBSETREF;
  959. location.sref := subsetref;
  960. end;
  961. end
  962. else
  963. { not nodetype=ordconstn }
  964. begin
  965. if (cs_opt_level1 in current_settings.optimizerswitches) and
  966. { if we do range checking, we don't }
  967. { need that fancy code (it would be }
  968. { buggy) }
  969. not(cs_check_range in current_settings.localswitches) and
  970. (left.resultdef.typ=arraydef) and
  971. not is_packed_array(left.resultdef) then
  972. begin
  973. extraoffset:=0;
  974. rightp:=actualtargetnode(@right);
  975. if rightp^.nodetype=addn then
  976. begin
  977. if taddnode(rightp^).right.nodetype=ordconstn then
  978. begin
  979. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  980. replacenode(rightp^,taddnode(rightp^).left);
  981. end
  982. else if taddnode(rightp^).left.nodetype=ordconstn then
  983. begin
  984. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  985. replacenode(rightp^,taddnode(rightp^).right);
  986. end;
  987. end
  988. else if rightp^.nodetype=subn then
  989. begin
  990. if taddnode(rightp^).right.nodetype=ordconstn then
  991. begin
  992. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  993. replacenode(rightp^,taddnode(rightp^).left);
  994. end;
  995. end;
  996. update_reference_offset(location.reference,extraoffset,mulsize);
  997. end;
  998. { calculate from left to right }
  999. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  1000. internalerror(200304237);
  1001. secondpass(right);
  1002. if (right.expectloc=LOC_JUMP)<>
  1003. (right.location.loc=LOC_JUMP) then
  1004. internalerror(2006010801);
  1005. { if mulsize = 1, we won't have to modify the index }
  1006. if not(right.location.loc in [LOC_CREGISTER,LOC_REGISTER]) or
  1007. not valid_index_size(right.location.size) then
  1008. begin
  1009. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,ptruinttype,true);
  1010. indexdef:=ptruinttype
  1011. end
  1012. else
  1013. indexdef:=right.resultdef;
  1014. { produce possible range check code: }
  1015. if cs_check_range in current_settings.localswitches then
  1016. begin
  1017. if left.resultdef.typ=arraydef then
  1018. rangecheck_array
  1019. else if (left.resultdef.typ=stringdef) then
  1020. rangecheck_string;
  1021. end;
  1022. { insert the register and the multiplication factor in the
  1023. reference }
  1024. if not is_packed_array(left.resultdef) then
  1025. update_reference_reg_mul(right.location.register,indexdef,mulsize)
  1026. else
  1027. update_reference_reg_packed(right.location.register,indexdef,mulsize);
  1028. end;
  1029. location.size:=newsize;
  1030. paraloc1.done;
  1031. paraloc2.done;
  1032. end;
  1033. begin
  1034. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1035. cloadparentfpnode:=tcgloadparentfpnode;
  1036. caddrnode:=tcgaddrnode;
  1037. cderefnode:=tcgderefnode;
  1038. csubscriptnode:=tcgsubscriptnode;
  1039. cwithnode:=tcgwithnode;
  1040. cvecnode:=tcgvecnode;
  1041. end.