ncgset.pas 56 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Carl Eric Codere
  3. Generate generic assembler for in set/case labels
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgset;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. globtype,globals,constexp,symtype,
  22. node,nset,cpubase,cgbase,cgutils,cgobj,aasmbase,aasmtai,aasmdata;
  23. type
  24. tcgsetelementnode = class(tsetelementnode)
  25. procedure pass_generate_code;override;
  26. end;
  27. Tsetpart=record
  28. range : boolean; {Part is a range.}
  29. start,stop : byte; {Start/stop when range; Stop=element when an element.}
  30. end;
  31. Tsetparts=array[1..8] of Tsetpart;
  32. { tcginnode }
  33. tcginnode = class(tinnode)
  34. procedure in_smallset(opdef: tdef; setbase: aint); virtual;
  35. function pass_1: tnode;override;
  36. procedure pass_generate_code;override;
  37. protected
  38. function checkgenjumps(out setparts: Tsetparts; out numparts: byte; out use_small: boolean): boolean; virtual;
  39. function analizeset(const Aset:Tconstset;out setparts: Tsetparts; out numparts: byte;is_small:boolean):boolean;virtual;
  40. end;
  41. tcgcasenode = class(tcasenode)
  42. {
  43. Emits the case node statement. Contrary to the intel
  44. 80x86 version, this version does not emit jump tables,
  45. because of portability problems.
  46. }
  47. procedure pass_generate_code;override;
  48. protected
  49. with_sign : boolean;
  50. opsize : tdef;
  51. jmp_gt,jmp_lt,jmp_le : topcmp;
  52. { register with case expression }
  53. hregister,hregister2 : tregister;
  54. endlabel,elselabel : tasmlabel;
  55. { true, if we can omit the range check of the jump table }
  56. jumptable_no_range : boolean;
  57. { has the implementation jumptable support }
  58. min_label : tconstexprint;
  59. function blocklabel(id:longint):tasmlabel;
  60. procedure optimizevalues(var max_linear_list:aint;var max_dist:aword);virtual;
  61. function has_jumptable : boolean;virtual;
  62. procedure genjumptable(hp : pcaselabel;min_,max_ : aint); virtual;
  63. procedure genlinearlist(hp : pcaselabel); virtual;
  64. procedure genlinearcmplist(hp : pcaselabel); virtual;
  65. end;
  66. implementation
  67. uses
  68. systems,
  69. verbose,
  70. symconst,symdef,defutil,
  71. paramgr,
  72. procinfo,pass_2,tgobj,
  73. nbas,ncon,nflw,
  74. ncgutil,hlcgobj;
  75. {*****************************************************************************
  76. TCGSETELEMENTNODE
  77. *****************************************************************************}
  78. procedure tcgsetelementnode.pass_generate_code;
  79. begin
  80. { load first value in 32bit register }
  81. secondpass(left);
  82. if left.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  83. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,u32inttype,false);
  84. { also a second value ? }
  85. if assigned(right) then
  86. begin
  87. secondpass(right);
  88. if codegenerror then
  89. exit;
  90. if right.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  91. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,u32inttype,false);
  92. end;
  93. { we doesn't modify the left side, we check only the type }
  94. location_copy(location,left.location);
  95. end;
  96. {*****************************************************************************
  97. *****************************************************************************}
  98. function tcginnode.analizeset(const Aset:Tconstset; out setparts:tsetparts; out numparts: byte; is_small:boolean):boolean;
  99. var
  100. compares,maxcompares:word;
  101. i:byte;
  102. begin
  103. analizeset:=false;
  104. fillchar(setparts,sizeof(setparts),0);
  105. numparts:=0;
  106. compares:=0;
  107. { Lots of comparisions take a lot of time, so do not allow
  108. too much comparisions. 8 comparisions are, however, still
  109. smalller than emitting the set }
  110. if cs_opt_size in current_settings.optimizerswitches then
  111. maxcompares:=8
  112. else
  113. maxcompares:=5;
  114. { when smallset is possible allow only 3 compares the smallset
  115. code is for littlesize also smaller when more compares are used }
  116. if is_small then
  117. maxcompares:=3;
  118. for i:=0 to 255 do
  119. if i in Aset then
  120. begin
  121. if (numparts=0) or (i<>setparts[numparts].stop+1) then
  122. begin
  123. {Set element is a separate element.}
  124. inc(compares);
  125. if compares>maxcompares then
  126. exit;
  127. inc(numparts);
  128. setparts[numparts].range:=false;
  129. setparts[numparts].stop:=i;
  130. end
  131. else
  132. {Set element is part of a range.}
  133. if not setparts[numparts].range then
  134. begin
  135. {Transform an element into a range.}
  136. setparts[numparts].range:=true;
  137. setparts[numparts].start:=setparts[numparts].stop;
  138. setparts[numparts].stop:=i;
  139. { there's only one compare per range anymore. Only a }
  140. { sub is added, but that's much faster than a }
  141. { cmp/jcc combo so neglect its effect }
  142. { inc(compares);
  143. if compares>maxcompares then
  144. exit; }
  145. end
  146. else
  147. begin
  148. {Extend a range.}
  149. setparts[numparts].stop:=i;
  150. end;
  151. end;
  152. analizeset:=true;
  153. end;
  154. procedure tcginnode.in_smallset(opdef: tdef; setbase: aint);
  155. begin
  156. { location is always LOC_REGISTER }
  157. location_reset(location, LOC_REGISTER, def_cgsize(resultdef));
  158. { allocate a register for the result }
  159. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, resultdef);
  160. {**************************** SMALL SET **********************}
  161. if left.location.loc=LOC_CONSTANT then
  162. begin
  163. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,
  164. right.resultdef, resultdef,
  165. left.location.value-setbase, right.location,
  166. location.register);
  167. end
  168. else
  169. begin
  170. hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location,
  171. left.resultdef, opdef, true);
  172. register_maybe_adjust_setbase(current_asmdata.CurrAsmList, left.location,
  173. setbase);
  174. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList, left.resultdef,
  175. right.resultdef, resultdef, left.location.register, right.location,
  176. location.register);
  177. end;
  178. end;
  179. function tcginnode.checkgenjumps(out setparts: Tsetparts; out numparts: byte;out use_small: boolean): boolean;
  180. begin
  181. { check if we can use smallset operation using btl which is limited
  182. to 32 bits, the left side may also not contain higher values !! }
  183. use_small:=is_smallset(right.resultdef) and
  184. not is_signed(left.resultdef) and
  185. ((left.resultdef.typ=orddef) and (torddef(left.resultdef).high<32) or
  186. (left.resultdef.typ=enumdef) and (tenumdef(left.resultdef).max<32));
  187. { Can we generate jumps? Possible for all types of sets }
  188. checkgenjumps:=(right.nodetype=setconstn) and
  189. analizeset(Tsetconstnode(right).value_set^,setparts,numparts,use_small);
  190. end;
  191. function tcginnode.pass_1: tnode;
  192. var
  193. setparts: Tsetparts;
  194. numparts: byte;
  195. use_small: boolean;
  196. begin
  197. result := inherited pass_1;
  198. if not(assigned(result)) and
  199. checkgenjumps(setparts,numparts,use_small) then
  200. expectloc := LOC_JUMP;
  201. end;
  202. procedure tcginnode.pass_generate_code;
  203. var
  204. adjustment,
  205. setbase : aint;
  206. l, l2 : tasmlabel;
  207. hr,
  208. pleftreg : tregister;
  209. setparts : Tsetparts;
  210. opsize : tcgsize;
  211. opdef : tdef;
  212. uopsize : tcgsize;
  213. uopdef : tdef;
  214. orgopsize : tcgsize;
  215. orgopdef : tdef;
  216. genjumps,
  217. use_small : boolean;
  218. i,numparts : byte;
  219. needslabel : Boolean;
  220. begin
  221. l2:=nil;
  222. { We check first if we can generate jumps, this can be done
  223. because the resultdef is already set in firstpass }
  224. genjumps := checkgenjumps(setparts,numparts,use_small);
  225. orgopsize := def_cgsize(left.resultdef);
  226. orgopdef := left.resultdef;
  227. uopsize := OS_32;
  228. uopdef := u32inttype;
  229. if is_signed(left.resultdef) then
  230. begin
  231. opsize := OS_S32;
  232. opdef := s32inttype;
  233. end
  234. else
  235. begin
  236. opsize := uopsize;
  237. opdef := uopdef;
  238. end;
  239. needslabel := false;
  240. if not genjumps then
  241. { calculate both operators }
  242. { the complex one first }
  243. { not in case of genjumps, because then we don't secondpass }
  244. { right at all (so we have to make sure that "right" really is }
  245. { "right" and not "swapped left" in that case) }
  246. firstcomplex(self);
  247. secondpass(left);
  248. if (left.expectloc=LOC_JUMP)<>
  249. (left.location.loc=LOC_JUMP) then
  250. internalerror(2007070101);
  251. { Only process the right if we are not generating jumps }
  252. if not genjumps then
  253. secondpass(right);
  254. if codegenerror then
  255. exit;
  256. { ofcourse not commutative }
  257. if nf_swapped in flags then
  258. swapleftright;
  259. setbase:=tsetdef(right.resultdef).setbase;
  260. if genjumps then
  261. begin
  262. { location is always LOC_JUMP }
  263. current_asmdata.getjumplabel(l);
  264. current_asmdata.getjumplabel(l2);
  265. location_reset_jump(location,l,l2);
  266. { If register is used, use only lower 8 bits }
  267. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
  268. pleftreg := left.location.register;
  269. { how much have we already substracted from the x in the }
  270. { "x in [y..z]" expression }
  271. adjustment := 0;
  272. hr:=NR_NO;
  273. for i:=1 to numparts do
  274. if setparts[i].range then
  275. { use fact that a <= x <= b <=> aword(x-a) <= aword(b-a) }
  276. begin
  277. { is the range different from all legal values? }
  278. if (setparts[i].stop-setparts[i].start <> 255) or not (orgopsize = OS_8) then
  279. begin
  280. { yes, is the lower bound <> 0? }
  281. if (setparts[i].start <> 0) then
  282. { we're going to substract from the left register, }
  283. { so in case of a LOC_CREGISTER first move the value }
  284. { to edi (not done before because now we can do the }
  285. { move and substract in one instruction with LEA) }
  286. if (left.location.loc = LOC_CREGISTER) and
  287. (hr<>pleftreg) then
  288. begin
  289. { don't change this back to a_op_const_reg/a_load_reg_reg, since pleftreg must not be modified }
  290. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,opdef);
  291. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,setparts[i].start,pleftreg,hr);
  292. pleftreg:=hr;
  293. end
  294. else
  295. begin
  296. { otherwise, the value is already in a register }
  297. { that can be modified }
  298. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,
  299. setparts[i].start-adjustment,pleftreg)
  300. end;
  301. { new total value substracted from x: }
  302. { adjustment + (setparts[i].start - adjustment) }
  303. adjustment := setparts[i].start;
  304. { check if result < b-a+1 (not "result <= b-a", since }
  305. { we need a carry in case the element is in the range }
  306. { (this will never overflow since we check at the }
  307. { beginning whether stop-start <> 255) }
  308. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, uopdef, OC_B,
  309. setparts[i].stop-setparts[i].start+1,pleftreg,location.truelabel);
  310. end
  311. else
  312. { if setparts[i].start = 0 and setparts[i].stop = 255, }
  313. { it's always true since "in" is only allowed for bytes }
  314. begin
  315. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.truelabel);
  316. end;
  317. end
  318. else
  319. begin
  320. { Emit code to check if left is an element }
  321. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_EQ,
  322. setparts[i].stop-adjustment,pleftreg,location.truelabel);
  323. end;
  324. { To compensate for not doing a second pass }
  325. right.location.reference.symbol:=nil;
  326. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
  327. end
  328. else
  329. {*****************************************************************}
  330. { NO JUMP TABLE GENERATION }
  331. {*****************************************************************}
  332. begin
  333. { We will now generated code to check the set itself, no jmps,
  334. handle smallsets separate, because it allows faster checks }
  335. if use_small then
  336. begin
  337. in_smallset(opdef, setbase);
  338. end
  339. else
  340. {************************** NOT SMALL SET ********************}
  341. begin
  342. { location is always LOC_REGISTER }
  343. location_reset(location, LOC_REGISTER, uopsize{def_cgsize(resultdef)});
  344. { allocate a register for the result }
  345. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, uopdef);
  346. if right.location.loc=LOC_CONSTANT then
  347. begin
  348. { can it actually occur currently? CEC }
  349. { yes: "if bytevar in [1,3,5,7,9,11,13,15]" (JM) }
  350. { note: this code assumes that left in [0..255], which is a valid }
  351. { assumption (other cases will be caught by range checking) (JM) }
  352. { load left in register }
  353. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,uopdef,true);
  354. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
  355. { emit bit test operation -- warning: do not use
  356. location_force_reg() to force a set into a register, except
  357. to a register of the same size as the set. The reason is
  358. that on big endian systems, this would require moving the
  359. set to the most significant part of the new register,
  360. and location_force_register can't do that (it does not
  361. know the type).
  362. a_bit_test_reg_loc_reg() properly takes into account the
  363. size of the set to adjust the register index to test }
  364. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,
  365. left.resultdef,right.resultdef,uopdef,
  366. left.location.register,right.location,location.register);
  367. { now zero the result if left > nr_of_bits_in_right_register }
  368. hr := hlcg.getintregister(current_asmdata.CurrAsmList,uopdef);
  369. { if left > tcgsize2size[opsize]*8 then hr := 0 else hr := $ffffffff }
  370. { (left.location.size = location.size at this point) }
  371. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList, OP_SUB, uopdef, tcgsize2size[opsize]*8, left.location.register, hr);
  372. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SAR, uopdef, (tcgsize2size[opsize]*8)-1, hr);
  373. { if left > tcgsize2size[opsize]*8-1, then result := 0 else result := result of bit test }
  374. hlcg.a_op_reg_reg(current_asmdata.CurrAsmList, OP_AND, uopdef, hr, location.register);
  375. end { of right.location.loc=LOC_CONSTANT }
  376. { do search in a normal set which could have >32 elements
  377. but also used if the left side contains higher values > 32 }
  378. else if (left.location.loc=LOC_CONSTANT) then
  379. begin
  380. if (left.location.value < setbase) or (((left.location.value-setbase) shr 3) >= right.resultdef.size) then
  381. {should be caught earlier }
  382. internalerror(2007020402);
  383. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,right.resultdef,uopdef,left.location.value-setbase,
  384. right.location,location.register);
  385. end
  386. else
  387. begin
  388. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
  389. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
  390. pleftreg := left.location.register;
  391. if (opsize >= OS_S8) or { = if signed }
  392. ((left.resultdef.typ=orddef) and
  393. ((torddef(left.resultdef).low < int64(tsetdef(right.resultdef).setbase)) or
  394. (torddef(left.resultdef).high > int64(tsetdef(right.resultdef).setmax)))) or
  395. ((left.resultdef.typ=enumdef) and
  396. ((tenumdef(left.resultdef).min < aint(tsetdef(right.resultdef).setbase)) or
  397. (tenumdef(left.resultdef).max > aint(tsetdef(right.resultdef).setmax)))) then
  398. begin
  399. current_asmdata.getjumplabel(l);
  400. current_asmdata.getjumplabel(l2);
  401. needslabel := True;
  402. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, left.resultdef, OC_BE, tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase, pleftreg, l);
  403. hlcg.a_load_const_reg(current_asmdata.CurrAsmList, uopdef, 0, location.register);
  404. hlcg.a_jmp_always(current_asmdata.CurrAsmList, l2);
  405. hlcg.a_label(current_asmdata.CurrAsmList, l);
  406. end;
  407. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,opdef,right.resultdef,uopdef,
  408. pleftreg,right.location,location.register);
  409. if needslabel then
  410. hlcg.a_label(current_asmdata.CurrAsmList, l2);
  411. end;
  412. {$ifndef cpuhighleveltarget}
  413. location.size := def_cgsize(resultdef);
  414. location.register := cg.makeregsize(current_asmdata.CurrAsmList, location.register, location.size);
  415. {$else not cpuhighleveltarget}
  416. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  417. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,uopdef,resultdef,location.register,hr);
  418. location.register:=hr;
  419. location.size := def_cgsize(resultdef);
  420. {$endif not cpuhighleveltarget}
  421. end;
  422. end;
  423. location_freetemp(current_asmdata.CurrAsmList, right.location);
  424. end;
  425. {*****************************************************************************
  426. TCGCASENODE
  427. *****************************************************************************}
  428. function tcgcasenode.blocklabel(id:longint):tasmlabel;
  429. begin
  430. if not assigned(blocks[id]) then
  431. internalerror(200411301);
  432. result:=pcaseblock(blocks[id])^.blocklabel;
  433. end;
  434. procedure tcgcasenode.optimizevalues(var max_linear_list:aint;var max_dist:aword);
  435. begin
  436. { no changes by default }
  437. end;
  438. function tcgcasenode.has_jumptable : boolean;
  439. begin
  440. { No jumptable support in the default implementation }
  441. has_jumptable:=false;
  442. end;
  443. procedure tcgcasenode.genjumptable(hp : pcaselabel;min_,max_ : aint);
  444. begin
  445. internalerror(200209161);
  446. end;
  447. procedure tcgcasenode.genlinearlist(hp : pcaselabel);
  448. var
  449. first : boolean;
  450. last : TConstExprInt;
  451. scratch_reg: tregister;
  452. newsize: tcgsize;
  453. newdef: tdef;
  454. procedure genitem(t : pcaselabel);
  455. procedure gensub(value:tcgint);
  456. begin
  457. { here, since the sub and cmp are separate we need
  458. to move the result before subtract to help
  459. the register allocator
  460. }
  461. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList, opsize, opsize, hregister, scratch_reg);
  462. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SUB, opsize, value, hregister);
  463. end;
  464. begin
  465. if assigned(t^.less) then
  466. genitem(t^.less);
  467. { do we need to test the first value? }
  468. if first and (t^._low>get_min_value(left.resultdef)) then
  469. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,tcgint(t^._low.svalue),hregister,elselabel);
  470. if t^._low=t^._high then
  471. begin
  472. if t^._low-last=0 then
  473. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,OC_EQ,0,hregister,blocklabel(t^.blockid))
  474. else
  475. begin
  476. gensub(tcgint(t^._low.svalue-last.svalue));
  477. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,
  478. OC_EQ,tcgint(t^._low.svalue-last.svalue),scratch_reg,blocklabel(t^.blockid));
  479. end;
  480. last:=t^._low;
  481. end
  482. else
  483. begin
  484. { it begins with the smallest label, if the value }
  485. { is even smaller then jump immediately to the }
  486. { ELSE-label }
  487. if first then
  488. begin
  489. { have we to ajust the first value ? }
  490. if (t^._low>get_min_value(left.resultdef)) or (get_min_value(left.resultdef)<>0) then
  491. gensub(tcgint(t^._low.svalue));
  492. end
  493. else
  494. begin
  495. { if there is no unused label between the last and the }
  496. { present label then the lower limit can be checked }
  497. { immediately. else check the range in between: }
  498. gensub(tcgint(t^._low.svalue-last.svalue));
  499. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize,jmp_lt,tcgint(t^._low.svalue-last.svalue),scratch_reg,elselabel);
  500. end;
  501. gensub(tcgint(t^._high.svalue-t^._low.svalue));
  502. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_le,tcgint(t^._high.svalue-t^._low.svalue),scratch_reg,blocklabel(t^.blockid));
  503. last:=t^._high;
  504. end;
  505. first:=false;
  506. if assigned(t^.greater) then
  507. genitem(t^.greater);
  508. end;
  509. begin
  510. { do we need to generate cmps? }
  511. if (with_sign and (min_label<0)) then
  512. genlinearcmplist(hp)
  513. else
  514. begin
  515. { sign/zero extend the value to a full register before starting to
  516. subtract values, so that on platforms that don't have
  517. subregisters of the same size as the value we don't generate
  518. sign/zero-extensions after every subtraction
  519. make newsize always signed, since we only do this if the size in
  520. bytes of the register is larger than the original opsize, so
  521. the value can always be represented by a larger signed type }
  522. newsize:=tcgsize2signed[reg_cgsize(hregister)];
  523. if tcgsize2size[newsize]>opsize.size then
  524. begin
  525. newdef:=cgsize_orddef(newsize);
  526. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,newdef);
  527. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,newdef,hregister,scratch_reg);
  528. hregister:=scratch_reg;
  529. opsize:=newdef;
  530. end;
  531. last:=0;
  532. first:=true;
  533. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
  534. genitem(hp);
  535. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  536. end;
  537. end;
  538. procedure tcgcasenode.genlinearcmplist(hp : pcaselabel);
  539. var
  540. last : TConstExprInt;
  541. lastwasrange: boolean;
  542. procedure genitem(t : pcaselabel);
  543. {$ifndef cpu64bitalu}
  544. var
  545. l1 : tasmlabel;
  546. {$endif not cpu64bitalu}
  547. begin
  548. if assigned(t^.less) then
  549. genitem(t^.less);
  550. if t^._low=t^._high then
  551. begin
  552. {$if defined(cpu32bitalu)}
  553. if def_cgsize(opsize) in [OS_S64,OS_64] then
  554. begin
  555. current_asmdata.getjumplabel(l1);
  556. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_NE, aint(hi(int64(t^._low.svalue))),hregister2,l1);
  557. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_EQ, aint(lo(int64(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  558. cg.a_label(current_asmdata.CurrAsmList,l1);
  559. end
  560. else
  561. {$elseif defined(cpu16bitalu)}
  562. if def_cgsize(opsize) in [OS_S64,OS_64] then
  563. begin
  564. current_asmdata.getjumplabel(l1);
  565. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(hi(int64(t^._low.svalue)))),GetNextReg(hregister2),l1);
  566. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(lo(hi(int64(t^._low.svalue)))),hregister2,l1);
  567. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(lo(int64(t^._low.svalue)))),GetNextReg(hregister),l1);
  568. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(lo(int64(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  569. cg.a_label(current_asmdata.CurrAsmList,l1);
  570. end
  571. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  572. begin
  573. current_asmdata.getjumplabel(l1);
  574. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(int32(t^._low.svalue))),GetNextReg(hregister),l1);
  575. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(int32(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  576. cg.a_label(current_asmdata.CurrAsmList,l1);
  577. end
  578. else
  579. {$elseif defined(cpu8bitalu)}
  580. if def_cgsize(opsize) in [OS_S64,OS_64] then
  581. begin
  582. current_asmdata.getjumplabel(l1);
  583. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),l1);
  584. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister2)),l1);
  585. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(hi(int64(t^._low.svalue))))),GetNextReg(hregister2),l1);
  586. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  587. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  588. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister)),l1);
  589. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(lo(int64(t^._low.svalue))))),GetNextReg(hregister),l1);
  590. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,blocklabel(t^.blockid));
  591. cg.a_label(current_asmdata.CurrAsmList,l1);
  592. end
  593. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  594. begin
  595. current_asmdata.getjumplabel(l1);
  596. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  597. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(hregister)),l1);
  598. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(int32(t^._low.svalue)))),GetNextReg(hregister),l1);
  599. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(int32(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  600. cg.a_label(current_asmdata.CurrAsmList,l1);
  601. end
  602. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  603. begin
  604. current_asmdata.getjumplabel(l1);
  605. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(int16(t^._low.svalue))),GetNextReg(hregister),l1);
  606. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(int16(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  607. cg.a_label(current_asmdata.CurrAsmList,l1);
  608. end
  609. else
  610. {$endif}
  611. begin
  612. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, aint(t^._low.svalue),hregister, blocklabel(t^.blockid));
  613. end;
  614. { Reset last here, because we've only checked for one value and need to compare
  615. for the next range both the lower and upper bound }
  616. lastwasrange := false;
  617. end
  618. else
  619. begin
  620. { it begins with the smallest label, if the value }
  621. { is even smaller then jump immediately to the }
  622. { ELSE-label }
  623. if not lastwasrange or (t^._low-last>1) then
  624. begin
  625. {$if defined(cpu32bitalu)}
  626. if def_cgsize(opsize) in [OS_64,OS_S64] then
  627. begin
  628. current_asmdata.getjumplabel(l1);
  629. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._low.svalue))),
  630. hregister2, elselabel);
  631. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._low.svalue))),
  632. hregister2, l1);
  633. { the comparisation of the low dword must be always unsigned! }
  634. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_B, aint(lo(int64(t^._low.svalue))), hregister, elselabel);
  635. cg.a_label(current_asmdata.CurrAsmList,l1);
  636. end
  637. else
  638. {$elseif defined(cpu16bitalu)}
  639. if def_cgsize(opsize) in [OS_64,OS_S64] then
  640. begin
  641. current_asmdata.getjumplabel(l1);
  642. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._low.svalue)))),
  643. GetNextReg(hregister2), elselabel);
  644. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._low.svalue)))),
  645. GetNextReg(hregister2), l1);
  646. { the comparison of the low words must be always unsigned! }
  647. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._low.svalue)))),
  648. hregister2, elselabel);
  649. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._low.svalue)))),
  650. hregister2, l1);
  651. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._low.svalue)))),
  652. GetNextReg(hregister), elselabel);
  653. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._low.svalue)))),
  654. GetNextReg(hregister), l1);
  655. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(lo(int64(t^._low.svalue)))), hregister, elselabel);
  656. cg.a_label(current_asmdata.CurrAsmList,l1);
  657. end
  658. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  659. begin
  660. current_asmdata.getjumplabel(l1);
  661. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._low.svalue))),
  662. GetNextReg(hregister), elselabel);
  663. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._low.svalue))),
  664. GetNextReg(hregister), l1);
  665. { the comparisation of the low dword must be always unsigned! }
  666. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(int32(t^._low.svalue))), hregister, elselabel);
  667. cg.a_label(current_asmdata.CurrAsmList,l1);
  668. end
  669. else
  670. {$elseif defined(cpu8bitalu)}
  671. if def_cgsize(opsize) in [OS_64,OS_S64] then
  672. begin
  673. current_asmdata.getjumplabel(l1);
  674. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),elselabel);
  675. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),l1);
  676. { the comparison of the low words must be always unsigned! }
  677. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister2)),elselabel);
  678. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister2)),l1);
  679. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._low.svalue))))),GetNextReg(hregister2),elselabel);
  680. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._low.svalue))))),GetNextReg(hregister2),l1);
  681. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,elselabel);
  682. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  683. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),elselabel);
  684. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  685. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister)),elselabel);
  686. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister)),l1);
  687. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._low.svalue))))),GetNextReg(hregister),elselabel);
  688. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._low.svalue))))),GetNextReg(hregister),l1);
  689. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,elselabel);
  690. cg.a_label(current_asmdata.CurrAsmList,l1);
  691. end
  692. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  693. begin
  694. current_asmdata.getjumplabel(l1);
  695. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),elselabel);
  696. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8,jmp_gt,aint(hi(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  697. { the comparison of the low words must be always unsigned! }
  698. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(hregister)),elselabel);
  699. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(hregister)),l1);
  700. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._low.svalue)))),GetNextReg(hregister),elselabel);
  701. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._low.svalue)))),GetNextReg(hregister),l1);
  702. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(int32(t^._low.svalue)))),hregister,elselabel);
  703. cg.a_label(current_asmdata.CurrAsmList,l1);
  704. end
  705. else if def_cgsize(opsize) in [OS_16,OS_S16] then
  706. begin
  707. current_asmdata.getjumplabel(l1);
  708. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._low.svalue))),GetNextReg(hregister),elselabel);
  709. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._low.svalue))),GetNextReg(hregister),l1);
  710. { the comparisation of the low dword must be always unsigned! }
  711. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(int16(t^._low.svalue))),hregister,elselabel);
  712. cg.a_label(current_asmdata.CurrAsmList,l1);
  713. end
  714. else
  715. {$endif}
  716. begin
  717. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_lt, aint(t^._low.svalue), hregister,
  718. elselabel);
  719. end;
  720. end;
  721. {$if defined(cpu32bitalu)}
  722. if def_cgsize(opsize) in [OS_S64,OS_64] then
  723. begin
  724. current_asmdata.getjumplabel(l1);
  725. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._high.svalue))), hregister2,
  726. blocklabel(t^.blockid));
  727. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._high.svalue))), hregister2,
  728. l1);
  729. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_BE, aint(lo(int64(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  730. cg.a_label(current_asmdata.CurrAsmList,l1);
  731. end
  732. else
  733. {$elseif defined(cpu16bitalu)}
  734. if def_cgsize(opsize) in [OS_S64,OS_64] then
  735. begin
  736. current_asmdata.getjumplabel(l1);
  737. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._high.svalue)))), GetNextReg(hregister2),
  738. blocklabel(t^.blockid));
  739. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._high.svalue)))), GetNextReg(hregister2),
  740. l1);
  741. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  742. blocklabel(t^.blockid));
  743. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  744. l1);
  745. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._high.svalue)))), GetNextReg(hregister),
  746. blocklabel(t^.blockid));
  747. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._high.svalue)))), GetNextReg(hregister),
  748. l1);
  749. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(lo(int64(t^._high.svalue)))), hregister, blocklabel(t^.blockid));
  750. cg.a_label(current_asmdata.CurrAsmList,l1);
  751. end
  752. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  753. begin
  754. current_asmdata.getjumplabel(l1);
  755. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._high.svalue))), GetNextReg(hregister),
  756. blocklabel(t^.blockid));
  757. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._high.svalue))), GetNextReg(hregister),
  758. l1);
  759. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(int32(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  760. cg.a_label(current_asmdata.CurrAsmList,l1);
  761. end
  762. else
  763. {$elseif defined(cpu8bitalu)}
  764. if def_cgsize(opsize) in [OS_S64,OS_64] then
  765. begin
  766. current_asmdata.getjumplabel(l1);
  767. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),blocklabel(t^.blockid));
  768. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),l1);
  769. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister2)),blocklabel(t^.blockid));
  770. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister2)),l1);
  771. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._high.svalue))))),GetNextReg(hregister2),blocklabel(t^.blockid));
  772. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._high.svalue))))),GetNextReg(hregister2),l1);
  773. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,blocklabel(t^.blockid));
  774. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,l1);
  775. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),blocklabel(t^.blockid));
  776. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  777. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister)),blocklabel(t^.blockid));
  778. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister)),l1);
  779. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._high.svalue))))),GetNextReg(hregister),blocklabel(t^.blockid));
  780. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._high.svalue))))),GetNextReg(hregister),l1);
  781. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(lo(int64(t^._high.svalue))))),hregister,blocklabel(t^.blockid));
  782. cg.a_label(current_asmdata.CurrAsmList,l1);
  783. end
  784. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  785. begin
  786. current_asmdata.getjumplabel(l1);
  787. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),blocklabel(t^.blockid));
  788. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  789. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(hregister)),blocklabel(t^.blockid));
  790. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(hregister)),l1);
  791. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._high.svalue)))),GetNextReg(hregister),blocklabel(t^.blockid));
  792. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._high.svalue)))),GetNextReg(hregister),l1);
  793. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(int32(t^._high.svalue)))),hregister,blocklabel(t^.blockid));
  794. cg.a_label(current_asmdata.CurrAsmList,l1);
  795. end
  796. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  797. begin
  798. current_asmdata.getjumplabel(l1);
  799. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._high.svalue))),GetNextReg(hregister),blocklabel(t^.blockid));
  800. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._high.svalue))),GetNextReg(hregister),l1);
  801. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(int16(t^._high.svalue))),hregister,blocklabel(t^.blockid));
  802. cg.a_label(current_asmdata.CurrAsmList,l1);
  803. end
  804. else
  805. {$endif}
  806. begin
  807. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_le, aint(t^._high.svalue), hregister, blocklabel(t^.blockid));
  808. end;
  809. last:=t^._high;
  810. lastwasrange := true;
  811. end;
  812. if assigned(t^.greater) then
  813. genitem(t^.greater);
  814. end;
  815. begin
  816. last:=0;
  817. lastwasrange:=false;
  818. genitem(hp);
  819. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  820. end;
  821. procedure tcgcasenode.pass_generate_code;
  822. var
  823. oldflowcontrol: tflowcontrol;
  824. i : longint;
  825. distv,
  826. lv,hv,
  827. max_label: tconstexprint;
  828. labelcnt : tcgint;
  829. max_linear_list : aint;
  830. max_dist,
  831. dist : aword;
  832. oldexecutionweight : longint;
  833. begin
  834. location_reset(location,LOC_VOID,OS_NO);
  835. oldflowcontrol := flowcontrol;
  836. include(flowcontrol,fc_inflowcontrol);
  837. { Allocate labels }
  838. current_asmdata.getjumplabel(endlabel);
  839. current_asmdata.getjumplabel(elselabel);
  840. for i:=0 to blocks.count-1 do
  841. current_asmdata.getjumplabel(pcaseblock(blocks[i])^.blocklabel);
  842. with_sign:=is_signed(left.resultdef);
  843. if with_sign then
  844. begin
  845. jmp_gt:=OC_GT;
  846. jmp_lt:=OC_LT;
  847. jmp_le:=OC_LTE;
  848. end
  849. else
  850. begin
  851. jmp_gt:=OC_A;
  852. jmp_lt:=OC_B;
  853. jmp_le:=OC_BE;
  854. end;
  855. secondpass(left);
  856. if (left.expectloc=LOC_JUMP)<>
  857. (left.location.loc=LOC_JUMP) then
  858. internalerror(2006050501);
  859. { determines the size of the operand }
  860. opsize:=left.resultdef;
  861. { copy the case expression to a register }
  862. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opsize,false);
  863. {$ifndef cpu64bitalu}
  864. if def_cgsize(opsize) in [OS_S64,OS_64] then
  865. begin
  866. hregister:=left.location.register64.reglo;
  867. hregister2:=left.location.register64.reghi;
  868. end
  869. else
  870. {$endif not cpu64bitalu}
  871. hregister:=left.location.register;
  872. { we need the min_label always to choose between }
  873. { cmps and subs/decs }
  874. min_label:=case_get_min(labels);
  875. { Generate the jumps }
  876. {$ifdef OLDREGVARS}
  877. load_all_regvars(current_asmdata.CurrAsmList);
  878. {$endif OLDREGVARS}
  879. {$ifndef cpu64bitalu}
  880. if def_cgsize(opsize) in [OS_64,OS_S64] then
  881. genlinearcmplist(labels)
  882. else
  883. {$endif not cpu64bitalu}
  884. begin
  885. if cs_opt_level1 in current_settings.optimizerswitches then
  886. begin
  887. { procedures are empirically passed on }
  888. { consumption can also be calculated }
  889. { but does it pay on the different }
  890. { processors? }
  891. { moreover can the size only be appro- }
  892. { ximated as it is not known if rel8, }
  893. { rel16 or rel32 jumps are used }
  894. max_label:=case_get_max(labels);
  895. labelcnt:=case_count_labels(labels);
  896. { can we omit the range check of the jump table ? }
  897. getrange(left.resultdef,lv,hv);
  898. jumptable_no_range:=(lv=min_label) and (hv=max_label);
  899. { hack a little bit, because the range can be greater }
  900. { than the positive range of a aint }
  901. if (min_label<0) and (max_label>0) then
  902. distv:=max_label+min_label
  903. else
  904. distv:=max_label-min_label;
  905. if (distv>=0) then
  906. dist:=distv.uvalue
  907. else
  908. dist:=-distv.svalue;
  909. { optimize for size ? }
  910. if cs_opt_size in current_settings.optimizerswitches then
  911. begin
  912. if has_jumptable and
  913. (min_label>=int64(low(aint))) and
  914. (max_label<=high(aint)) and
  915. not((labelcnt<=2) or
  916. ((max_label-min_label)<0) or
  917. ((max_label-min_label)>3*labelcnt)) then
  918. begin
  919. { if the labels less or more a continuum then }
  920. genjumptable(labels,min_label.svalue,max_label.svalue);
  921. end
  922. else
  923. begin
  924. { a linear list is always smaller than a jump tree }
  925. genlinearlist(labels);
  926. end;
  927. end
  928. else
  929. begin
  930. max_dist:=4*labelcnt;
  931. if jumptable_no_range then
  932. max_linear_list:=4
  933. else
  934. max_linear_list:=2;
  935. { allow processor specific values }
  936. optimizevalues(max_linear_list,max_dist);
  937. if (labelcnt<=max_linear_list) then
  938. genlinearlist(labels)
  939. else
  940. begin
  941. if (has_jumptable) and
  942. (dist<max_dist) and
  943. (min_label>=int64(low(aint))) and
  944. (max_label<=high(aint)) then
  945. genjumptable(labels,min_label.svalue,max_label.svalue)
  946. else
  947. genlinearlist(labels);
  948. end;
  949. end;
  950. end
  951. else
  952. { it's always not bad }
  953. genlinearlist(labels);
  954. end;
  955. { estimates the repeat of each instruction }
  956. oldexecutionweight:=cg.executionweight;
  957. cg.executionweight:=cg.executionweight div case_count_labels(labels);
  958. if cg.executionweight<1 then
  959. cg.executionweight:=1;
  960. { generate the instruction blocks }
  961. for i:=0 to blocks.count-1 do
  962. begin
  963. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  964. cg.a_label(current_asmdata.CurrAsmList,pcaseblock(blocks[i])^.blocklabel);
  965. secondpass(pcaseblock(blocks[i])^.statement);
  966. { don't come back to case line }
  967. current_filepos:=current_asmdata.CurrAsmList.getlasttaifilepos^;
  968. {$ifdef OLDREGVARS}
  969. load_all_regvars(current_asmdata.CurrAsmList);
  970. {$endif OLDREGVARS}
  971. hlcg.a_jmp_always(current_asmdata.CurrAsmList,endlabel);
  972. end;
  973. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  974. { ...and the else block }
  975. hlcg.a_label(current_asmdata.CurrAsmList,elselabel);
  976. if assigned(elseblock) then
  977. begin
  978. secondpass(elseblock);
  979. {$ifdef OLDREGVARS}
  980. load_all_regvars(current_asmdata.CurrAsmList);
  981. {$endif OLDREGVARS}
  982. end;
  983. cg.executionweight:=oldexecutionweight;
  984. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  985. hlcg.a_label(current_asmdata.CurrAsmList,endlabel);
  986. { Reset labels }
  987. for i:=0 to blocks.count-1 do
  988. pcaseblock(blocks[i])^.blocklabel:=nil;
  989. flowcontrol := oldflowcontrol + (flowcontrol - [fc_inflowcontrol]);
  990. end;
  991. begin
  992. csetelementnode:=tcgsetelementnode;
  993. cinnode:=tcginnode;
  994. ccasenode:=tcgcasenode;
  995. end.