nx86cnv.pas 19 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate for x86-64 and i386 assembler for type converting nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit nx86cnv;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ncgcnv,defutil,defcmp;
  22. type
  23. tx86typeconvnode = class(tcgtypeconvnode)
  24. protected
  25. function first_real_to_real : tnode;override;
  26. { procedure second_int_to_int;override; }
  27. { procedure second_string_to_string;override; }
  28. { procedure second_cstring_to_pchar;override; }
  29. { procedure second_string_to_chararray;override; }
  30. { procedure second_array_to_pointer;override; }
  31. { procedure second_pointer_to_array;override; }
  32. { procedure second_chararray_to_string;override; }
  33. { procedure second_char_to_string;override; }
  34. function first_int_to_real: tnode; override;
  35. procedure second_int_to_real;override;
  36. { procedure second_real_to_real;override; }
  37. { procedure second_cord_to_pointer;override; }
  38. { procedure second_proc_to_procvar;override; }
  39. { procedure second_bool_to_int;override; }
  40. procedure second_int_to_bool;override;
  41. { procedure second_set_to_set;override; }
  42. { procedure second_ansistring_to_pchar;override; }
  43. { procedure second_pchar_to_string;override; }
  44. { procedure second_class_to_intf;override; }
  45. { procedure second_char_to_char;override; }
  46. end;
  47. implementation
  48. uses
  49. verbose,systems,globals,globtype,
  50. aasmbase,aasmtai,aasmdata,aasmcpu,
  51. symconst,symdef,
  52. cgbase,cga,procinfo,pass_1,pass_2,
  53. ncon,ncal,ncnv,
  54. cpubase,cpuinfo,
  55. cgutils,cgobj,hlcgobj,cgx86,ncgutil,
  56. tgobj;
  57. function tx86typeconvnode.first_real_to_real : tnode;
  58. begin
  59. first_real_to_real:=nil;
  60. { comp isn't a floating type }
  61. if (tfloatdef(resultdef).floattype=s64comp) and
  62. (tfloatdef(left.resultdef).floattype<>s64comp) and
  63. not (nf_explicit in flags) then
  64. CGMessage(type_w_convert_real_2_comp);
  65. if use_vectorfpu(resultdef) then
  66. expectloc:=LOC_MMREGISTER
  67. else
  68. expectloc:=LOC_FPUREGISTER;
  69. end;
  70. procedure tx86typeconvnode.second_int_to_bool;
  71. var
  72. {$ifndef cpu64bitalu}
  73. hreg2,
  74. hregister : tregister;
  75. href : treference;
  76. i : integer;
  77. {$endif not cpu64bitalu}
  78. resflags : tresflags;
  79. hlabel : tasmlabel;
  80. newsize : tcgsize;
  81. begin
  82. secondpass(left);
  83. if codegenerror then
  84. exit;
  85. { Explicit typecasts from any ordinal type to a boolean type }
  86. { must not change the ordinal value }
  87. if (nf_explicit in flags) and
  88. not(left.location.loc in [LOC_FLAGS,LOC_JUMP]) then
  89. begin
  90. location_copy(location,left.location);
  91. newsize:=def_cgsize(resultdef);
  92. { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
  93. if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
  94. ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
  95. hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
  96. else
  97. location.size:=newsize;
  98. exit;
  99. end;
  100. { Load left node into flag F_NE/F_E }
  101. resflags:=F_NE;
  102. if (left.location.loc in [LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF]) then
  103. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  104. case left.location.loc of
  105. LOC_CREFERENCE,
  106. LOC_REFERENCE :
  107. begin
  108. {$ifndef cpu64bitalu}
  109. if left.location.size in [OS_64,OS_S64{$ifdef cpu16bitalu},OS_32,OS_S32{$endif}] then
  110. begin
  111. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  112. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,left.location.reference,hregister);
  113. href:=left.location.reference;
  114. for i:=2 to tcgsize2size[left.location.size] div tcgsize2size[OS_INT] do
  115. begin
  116. inc(href.offset,tcgsize2size[OS_INT]);
  117. cg.a_op_ref_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,href,hregister);
  118. end;
  119. end
  120. else
  121. {$endif not cpu64bitalu}
  122. begin
  123. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  124. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
  125. end;
  126. end;
  127. LOC_FLAGS :
  128. begin
  129. resflags:=left.location.resflags;
  130. end;
  131. LOC_REGISTER,LOC_CREGISTER :
  132. begin
  133. {$if defined(cpu32bitalu)}
  134. if left.location.size in [OS_64,OS_S64] then
  135. begin
  136. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  137. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,left.location.register64.reglo,hregister);
  138. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reghi,hregister);
  139. end
  140. else
  141. {$elseif defined(cpu16bitalu)}
  142. if left.location.size in [OS_64,OS_S64] then
  143. begin
  144. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_16);
  145. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,left.location.register64.reglo,hregister);
  146. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,GetNextReg(left.location.register64.reglo),hregister);
  147. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,left.location.register64.reghi,hregister);
  148. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,GetNextReg(left.location.register64.reghi),hregister);
  149. end
  150. else
  151. if left.location.size in [OS_32,OS_S32] then
  152. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,left.location.register,GetNextReg(left.location.register))
  153. else
  154. {$endif}
  155. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
  156. end;
  157. LOC_JUMP :
  158. begin
  159. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  160. location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  161. current_asmdata.getjumplabel(hlabel);
  162. cg.a_label(current_asmdata.CurrAsmList,left.location.truelabel);
  163. if not(is_cbool(resultdef)) then
  164. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,1,location.register)
  165. else
  166. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,-1,location.register);
  167. cg.a_jmp_always(current_asmdata.CurrAsmList,hlabel);
  168. cg.a_label(current_asmdata.CurrAsmList,left.location.falselabel);
  169. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,0,location.register);
  170. cg.a_label(current_asmdata.CurrAsmList,hlabel);
  171. end;
  172. else
  173. internalerror(10062);
  174. end;
  175. if (left.location.loc<>LOC_JUMP) then
  176. begin
  177. { load flags to register }
  178. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  179. {$ifndef cpu64bitalu}
  180. if (location.size in [OS_64,OS_S64]) then
  181. begin
  182. hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  183. cg.g_flags2reg(current_asmdata.CurrAsmList,OS_32,resflags,hreg2);
  184. if (is_cbool(resultdef)) then
  185. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_32,hreg2,hreg2);
  186. location.register64.reglo:=hreg2;
  187. location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  188. if (is_cbool(resultdef)) then
  189. { reglo is either 0 or -1 -> reghi has to become the same }
  190. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,location.register64.reglo,location.register64.reghi)
  191. else
  192. { unsigned }
  193. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
  194. end
  195. else
  196. {$endif not cpu64bitalu}
  197. begin
  198. location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  199. cg.g_flags2reg(current_asmdata.CurrAsmList,location.size,resflags,location.register);
  200. if (is_cbool(resultdef)) then
  201. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,location.size,location.register,location.register);
  202. end
  203. end;
  204. end;
  205. function tx86typeconvnode.first_int_to_real : tnode;
  206. begin
  207. first_int_to_real:=nil;
  208. if (left.resultdef.size<4) then
  209. begin
  210. inserttypeconv(left,s32inttype);
  211. firstpass(left)
  212. end;
  213. if use_vectorfpu(resultdef) and
  214. (torddef(left.resultdef).ordtype = s32bit) then
  215. expectloc:=LOC_MMREGISTER
  216. else
  217. expectloc:=LOC_FPUREGISTER;
  218. end;
  219. procedure tx86typeconvnode.second_int_to_real;
  220. var
  221. leftref,
  222. href : treference;
  223. l1,l2 : tasmlabel;
  224. op: tasmop;
  225. opsize: topsize;
  226. signtested : boolean;
  227. use_bt: boolean; { true = use BT (386+), false = use TEST (286-) }
  228. begin
  229. {$ifdef i8086}
  230. use_bt:=current_settings.cputype>=cpu_386;
  231. {$else i8086}
  232. use_bt:=true;
  233. {$endif i8086}
  234. if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
  235. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  236. if use_vectorfpu(resultdef) and
  237. {$ifdef cpu64bitalu}
  238. (torddef(left.resultdef).ordtype in [s32bit,s64bit]) then
  239. {$else cpu64bitalu}
  240. (torddef(left.resultdef).ordtype=s32bit) then
  241. {$endif cpu64bitalu}
  242. begin
  243. location_reset(location,LOC_MMREGISTER,def_cgsize(resultdef));
  244. location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
  245. if UseAVX then
  246. case location.size of
  247. OS_F32:
  248. op:=A_VCVTSI2SS;
  249. OS_F64:
  250. op:=A_VCVTSI2SD;
  251. else
  252. internalerror(2007120902);
  253. end
  254. else
  255. case location.size of
  256. OS_F32:
  257. op:=A_CVTSI2SS;
  258. OS_F64:
  259. op:=A_CVTSI2SD;
  260. else
  261. internalerror(2007120902);
  262. end;
  263. { don't use left.location.size, because that one may be OS_32/OS_64
  264. if the lower bound of the orddef >= 0
  265. }
  266. case torddef(left.resultdef).ordtype of
  267. s32bit:
  268. opsize:=S_L;
  269. s64bit:
  270. opsize:=S_Q;
  271. else
  272. internalerror(2007120903);
  273. end;
  274. case left.location.loc of
  275. LOC_REFERENCE,
  276. LOC_CREFERENCE:
  277. begin
  278. href:=left.location.reference;
  279. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
  280. if UseAVX then
  281. { VCVTSI2.. requires a second source operand to copy bits 64..127 }
  282. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg_reg(op,opsize,href,location.register,location.register))
  283. else
  284. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(op,opsize,href,location.register));
  285. end;
  286. LOC_REGISTER,
  287. LOC_CREGISTER:
  288. if UseAVX then
  289. { VCVTSI2.. requires a second source operand to copy bits 64..127 }
  290. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,opsize,left.location.register,location.register,location.register))
  291. else
  292. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(op,opsize,left.location.register,location.register));
  293. end;
  294. end
  295. else
  296. begin
  297. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  298. if (left.location.loc=LOC_REGISTER) and (torddef(left.resultdef).ordtype=u64bit) then
  299. begin
  300. if use_bt then
  301. begin
  302. {$if defined(cpu64bitalu)}
  303. emit_const_reg(A_BT,S_Q,63,left.location.register);
  304. {$elseif defined(cpu32bitalu)}
  305. emit_const_reg(A_BT,S_L,31,left.location.register64.reghi);
  306. {$elseif defined(cpu16bitalu)}
  307. emit_const_reg(A_BT,S_W,15,GetNextReg(left.location.register64.reghi));
  308. {$endif}
  309. end
  310. else
  311. begin
  312. {$ifdef i8086}
  313. emit_const_reg(A_TEST,S_W,aint($8000),GetNextReg(left.location.register64.reghi));
  314. {$else i8086}
  315. internalerror(2013052510);
  316. {$endif i8086}
  317. end;
  318. signtested:=true;
  319. end
  320. else
  321. signtested:=false;
  322. { We need to load from a reference }
  323. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  324. { don't change left.location.reference, because if it's a temp we
  325. need the original location at the end so we can free it }
  326. leftref:=left.location.reference;
  327. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,leftref);
  328. { For u32bit we need to load it as comp and need to
  329. make it 64bits }
  330. if (torddef(left.resultdef).ordtype=u32bit) then
  331. begin
  332. tg.GetTemp(current_asmdata.CurrAsmList,8,8,tt_normal,href);
  333. location_freetemp(current_asmdata.CurrAsmList,left.location);
  334. cg.a_load_ref_ref(current_asmdata.CurrAsmList,left.location.size,OS_32,leftref,href);
  335. inc(href.offset,4);
  336. cg.a_load_const_ref(current_asmdata.CurrAsmList,OS_32,0,href);
  337. dec(href.offset,4);
  338. { could be a temp with an offset > 32 bit on x86_64 }
  339. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
  340. leftref:=href;
  341. end;
  342. { Load from reference to fpu reg }
  343. case torddef(left.resultdef).ordtype of
  344. u32bit,
  345. scurrency,
  346. s64bit:
  347. begin
  348. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,leftref));
  349. end;
  350. u64bit:
  351. begin
  352. { unsigned 64 bit ints are harder to handle:
  353. we load bits 0..62 and then check bit 63:
  354. if it is 1 then we add 2**64 as float.
  355. Since 2**64 can be represented exactly, use a single-precision
  356. constant to save space. }
  357. current_asmdata.getglobaldatalabel(l1);
  358. current_asmdata.getjumplabel(l2);
  359. if not(signtested) then
  360. begin
  361. if use_bt then
  362. begin
  363. {$if defined(cpu64bitalu) or defined(cpu32bitalu)}
  364. inc(leftref.offset,4);
  365. emit_const_ref(A_BT,S_L,31,leftref);
  366. dec(leftref.offset,4);
  367. {$elseif defined(cpu16bitalu)}
  368. inc(leftref.offset,6);
  369. emit_const_ref(A_BT,S_W,15,leftref);
  370. dec(leftref.offset,6);
  371. {$endif}
  372. end
  373. else
  374. begin
  375. {$ifdef i8086}
  376. { reading a byte, instead of word is faster on a true }
  377. { 8088, because of the 8-bit data bus }
  378. inc(leftref.offset,7);
  379. emit_const_ref(A_TEST,S_B,aint($80),leftref);
  380. dec(leftref.offset,7);
  381. {$else i8086}
  382. internalerror(2013052511);
  383. {$endif i8086}
  384. end;
  385. end;
  386. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,leftref));
  387. if use_bt then
  388. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NC,l2)
  389. else
  390. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_E,l2);
  391. new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata_norel,l1.name,const_align(sizeof(pint)));
  392. current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l1));
  393. { I got this constant from a test program (FK) }
  394. current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($5f800000));
  395. reference_reset_symbol(href,l1,0,4);
  396. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
  397. current_asmdata.CurrAsmList.concat(Taicpu.Op_ref(A_FADD,S_FS,href));
  398. cg.a_label(current_asmdata.CurrAsmList,l2);
  399. end
  400. else
  401. begin
  402. if left.resultdef.size<4 then
  403. internalerror(2007120901);
  404. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IL,leftref));
  405. end;
  406. end;
  407. tcgx86(cg).inc_fpu_stack;
  408. location.register:=NR_ST;
  409. end;
  410. location_freetemp(current_asmdata.CurrAsmList,left.location);
  411. end;
  412. begin
  413. ctypeconvnode:=tx86typeconvnode
  414. end.