nx86inl.pas 35 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate x86 inline nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit nx86inl;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ninl,ncginl;
  22. type
  23. tx86inlinenode = class(tcginlinenode)
  24. protected
  25. procedure maybe_remove_round_trunc_typeconv; virtual;
  26. public
  27. { first pass override
  28. so that the code generator will actually generate
  29. these nodes.
  30. }
  31. function first_pi: tnode ; override;
  32. function first_arctan_real: tnode; override;
  33. function first_abs_real: tnode; override;
  34. function first_sqr_real: tnode; override;
  35. function first_sqrt_real: tnode; override;
  36. function first_ln_real: tnode; override;
  37. function first_cos_real: tnode; override;
  38. function first_sin_real: tnode; override;
  39. function first_round_real: tnode; override;
  40. function first_trunc_real: tnode; override;
  41. function first_popcnt: tnode; override;
  42. function first_fma: tnode; override;
  43. { second pass override to generate these nodes }
  44. procedure second_IncludeExclude;override;
  45. procedure second_pi; override;
  46. procedure second_arctan_real; override;
  47. procedure second_abs_real; override;
  48. procedure second_round_real; override;
  49. procedure second_sqr_real; override;
  50. procedure second_sqrt_real; override;
  51. procedure second_ln_real; override;
  52. procedure second_cos_real; override;
  53. procedure second_sin_real; override;
  54. procedure second_trunc_real; override;
  55. procedure second_prefetch;override;
  56. {$ifndef i8086}
  57. procedure second_abs_long;override;
  58. {$endif not i8086}
  59. procedure second_popcnt;override;
  60. procedure second_fma;override;
  61. private
  62. procedure load_fpu_location(lnode: tnode);
  63. end;
  64. implementation
  65. uses
  66. systems,
  67. globtype,globals,
  68. cutils,verbose,
  69. symconst,
  70. defutil,
  71. aasmbase,aasmtai,aasmdata,aasmcpu,
  72. symtype,symdef,symcpu,
  73. cgbase,pass_2,
  74. cpuinfo,cpubase,paramgr,
  75. nbas,ncon,ncal,ncnv,nld,ncgutil,
  76. tgobj,
  77. cga,cgutils,cgx86,cgobj,hlcgobj;
  78. {*****************************************************************************
  79. TX86INLINENODE
  80. *****************************************************************************}
  81. procedure tx86inlinenode.maybe_remove_round_trunc_typeconv;
  82. begin
  83. { only makes a difference for x86_64 }
  84. end;
  85. function tx86inlinenode.first_pi : tnode;
  86. begin
  87. if (tfloatdef(pbestrealtype^).floattype=s80real) then
  88. begin
  89. expectloc:=LOC_FPUREGISTER;
  90. first_pi := nil;
  91. end
  92. else
  93. result:=inherited;
  94. end;
  95. function tx86inlinenode.first_arctan_real : tnode;
  96. begin
  97. {$ifdef i8086}
  98. { FPATAN's range is limited to (0 <= value < 1) on the 8087 and 80287,
  99. so we need to use the RTL helper on these FPUs }
  100. if current_settings.cputype < cpu_386 then
  101. begin
  102. result := inherited;
  103. exit;
  104. end;
  105. {$endif i8086}
  106. if (tfloatdef(pbestrealtype^).floattype=s80real) then
  107. begin
  108. expectloc:=LOC_FPUREGISTER;
  109. first_arctan_real := nil;
  110. end
  111. else
  112. result:=inherited;
  113. end;
  114. function tx86inlinenode.first_abs_real : tnode;
  115. begin
  116. if use_vectorfpu(resultdef) then
  117. expectloc:=LOC_MMREGISTER
  118. else
  119. expectloc:=LOC_FPUREGISTER;
  120. first_abs_real := nil;
  121. end;
  122. function tx86inlinenode.first_sqr_real : tnode;
  123. begin
  124. if use_vectorfpu(resultdef) then
  125. expectloc:=LOC_MMREGISTER
  126. else
  127. expectloc:=LOC_FPUREGISTER;
  128. first_sqr_real := nil;
  129. end;
  130. function tx86inlinenode.first_sqrt_real : tnode;
  131. begin
  132. if use_vectorfpu(resultdef) then
  133. expectloc:=LOC_MMREGISTER
  134. else
  135. expectloc:=LOC_FPUREGISTER;
  136. first_sqrt_real := nil;
  137. end;
  138. function tx86inlinenode.first_ln_real : tnode;
  139. begin
  140. if (tfloatdef(pbestrealtype^).floattype=s80real) then
  141. begin
  142. expectloc:=LOC_FPUREGISTER;
  143. first_ln_real := nil;
  144. end
  145. else
  146. result:=inherited;
  147. end;
  148. function tx86inlinenode.first_cos_real : tnode;
  149. begin
  150. {$ifdef i8086}
  151. { FCOS is 387+ }
  152. if current_settings.cputype < cpu_386 then
  153. begin
  154. result := inherited;
  155. exit;
  156. end;
  157. {$endif i8086}
  158. if (tfloatdef(pbestrealtype^).floattype=s80real) then
  159. begin
  160. expectloc:=LOC_FPUREGISTER;
  161. result:=nil;
  162. end
  163. else
  164. result:=inherited;
  165. end;
  166. function tx86inlinenode.first_sin_real : tnode;
  167. begin
  168. {$ifdef i8086}
  169. { FSIN is 387+ }
  170. if current_settings.cputype < cpu_386 then
  171. begin
  172. result := inherited;
  173. exit;
  174. end;
  175. {$endif i8086}
  176. if (tfloatdef(pbestrealtype^).floattype=s80real) then
  177. begin
  178. expectloc:=LOC_FPUREGISTER;
  179. result:=nil;
  180. end
  181. else
  182. result:=inherited;
  183. end;
  184. function tx86inlinenode.first_round_real : tnode;
  185. begin
  186. maybe_remove_round_trunc_typeconv;
  187. {$ifdef x86_64}
  188. if use_vectorfpu(left.resultdef) then
  189. expectloc:=LOC_REGISTER
  190. else
  191. {$endif x86_64}
  192. expectloc:=LOC_REFERENCE;
  193. result:=nil;
  194. end;
  195. function tx86inlinenode.first_trunc_real: tnode;
  196. begin
  197. maybe_remove_round_trunc_typeconv;
  198. if (cs_opt_size in current_settings.optimizerswitches)
  199. {$ifdef x86_64}
  200. and not(use_vectorfpu(left.resultdef))
  201. {$endif x86_64}
  202. then
  203. result:=inherited
  204. else
  205. begin
  206. {$ifdef x86_64}
  207. if use_vectorfpu(left.resultdef) then
  208. expectloc:=LOC_REGISTER
  209. else
  210. {$endif x86_64}
  211. expectloc:=LOC_REFERENCE;
  212. result:=nil;
  213. end;
  214. end;
  215. function tx86inlinenode.first_popcnt: tnode;
  216. begin
  217. Result:=nil;
  218. {$ifndef i8086}
  219. if (CPUX86_HAS_POPCNT in cpu_capabilities[current_settings.cputype])
  220. {$ifdef i386}
  221. and not is_64bit(left.resultdef)
  222. {$endif i386}
  223. then
  224. expectloc:=LOC_REGISTER
  225. else
  226. {$endif not i8086}
  227. Result:=inherited first_popcnt
  228. end;
  229. function tx86inlinenode.first_fma : tnode;
  230. begin
  231. {$ifndef i8086}
  232. if ((cpu_capabilities[current_settings.cputype]*[CPUX86_HAS_FMA,CPUX86_HAS_FMA4])<>[]) and
  233. ((is_double(resultdef)) or (is_single(resultdef))) then
  234. begin
  235. expectloc:=LOC_MMREGISTER;
  236. Result:=nil;
  237. end
  238. else
  239. {$endif i8086}
  240. Result:=inherited first_fma;
  241. end;
  242. procedure tx86inlinenode.second_pi;
  243. begin
  244. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  245. emit_none(A_FLDPI,S_NO);
  246. tcgx86(cg).inc_fpu_stack;
  247. location.register:=NR_FPU_RESULT_REG;
  248. end;
  249. { load the FPU into the an fpu register }
  250. procedure tx86inlinenode.load_fpu_location(lnode: tnode);
  251. begin
  252. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  253. location.register:=NR_FPU_RESULT_REG;
  254. secondpass(lnode);
  255. case lnode.location.loc of
  256. LOC_FPUREGISTER:
  257. ;
  258. LOC_CFPUREGISTER:
  259. begin
  260. cg.a_loadfpu_reg_reg(current_asmdata.CurrAsmList,lnode.location.size,
  261. lnode.location.size,lnode.location.register,location.register);
  262. end;
  263. LOC_REFERENCE,LOC_CREFERENCE:
  264. begin
  265. cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,
  266. lnode.location.size,lnode.location.size,
  267. lnode.location.reference,location.register);
  268. end;
  269. LOC_MMREGISTER,LOC_CMMREGISTER:
  270. begin
  271. location:=lnode.location;
  272. hlcg.location_force_fpureg(current_asmdata.CurrAsmList,location,resultdef,false);
  273. end;
  274. else
  275. internalerror(309991);
  276. end;
  277. end;
  278. procedure tx86inlinenode.second_arctan_real;
  279. begin
  280. load_fpu_location(left);
  281. emit_none(A_FLD1,S_NO);
  282. emit_none(A_FPATAN,S_NO);
  283. end;
  284. procedure tx86inlinenode.second_abs_real;
  285. var
  286. href : treference;
  287. begin
  288. if use_vectorfpu(resultdef) then
  289. begin
  290. secondpass(left);
  291. if left.location.loc<>LOC_MMREGISTER then
  292. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,left.resultdef,false);
  293. if UseAVX then
  294. begin
  295. location_reset(location,LOC_MMREGISTER,def_cgsize(resultdef));
  296. location.register:=cg.getmmregister(current_asmdata.CurrAsmList,def_cgsize(resultdef));
  297. end
  298. else
  299. location:=left.location;
  300. case tfloatdef(resultdef).floattype of
  301. s32real:
  302. begin
  303. reference_reset_symbol(href,current_asmdata.RefAsmSymbol(target_info.cprefix+'FPC_ABSMASK_SINGLE'),0,4);
  304. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList, href);
  305. if UseAVX then
  306. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg_reg(
  307. A_VANDPS,S_XMM,href,left.location.register,location.register))
  308. else
  309. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(A_ANDPS,S_XMM,href,location.register));
  310. end;
  311. s64real:
  312. begin
  313. reference_reset_symbol(href,current_asmdata.RefAsmSymbol(target_info.cprefix+'FPC_ABSMASK_DOUBLE'),0,4);
  314. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList, href);
  315. if UseAVX then
  316. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg_reg(
  317. A_VANDPD,S_XMM,href,left.location.register,location.register))
  318. else
  319. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(A_ANDPD,S_XMM,href,location.register))
  320. end;
  321. else
  322. internalerror(200506081);
  323. end;
  324. end
  325. else
  326. begin
  327. load_fpu_location(left);
  328. emit_none(A_FABS,S_NO);
  329. end;
  330. end;
  331. procedure tx86inlinenode.second_round_real;
  332. begin
  333. {$ifdef x86_64}
  334. if use_vectorfpu(left.resultdef) then
  335. begin
  336. secondpass(left);
  337. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,left.resultdef,false);
  338. location_reset(location,LOC_REGISTER,OS_S64);
  339. location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_S64);
  340. if UseAVX then
  341. case left.location.size of
  342. OS_F32:
  343. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_VCVTSS2SI,S_Q,left.location.register,location.register));
  344. OS_F64:
  345. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_VCVTSD2SI,S_Q,left.location.register,location.register));
  346. else
  347. internalerror(2007031402);
  348. end
  349. else
  350. case left.location.size of
  351. OS_F32:
  352. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVTSS2SI,S_Q,left.location.register,location.register));
  353. OS_F64:
  354. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVTSD2SI,S_Q,left.location.register,location.register));
  355. else
  356. internalerror(2007031402);
  357. end;
  358. end
  359. else
  360. {$endif x86_64}
  361. begin
  362. load_fpu_location(left);
  363. location_reset_ref(location,LOC_REFERENCE,OS_S64,0);
  364. tg.GetTemp(current_asmdata.CurrAsmList,resultdef.size,resultdef.alignment,tt_normal,location.reference);
  365. emit_ref(A_FISTP,S_IQ,location.reference);
  366. tcgx86(cg).dec_fpu_stack;
  367. emit_none(A_FWAIT,S_NO);
  368. end;
  369. end;
  370. procedure tx86inlinenode.second_trunc_real;
  371. var
  372. oldcw,newcw : treference;
  373. begin
  374. {$ifdef x86_64}
  375. if use_vectorfpu(left.resultdef) and
  376. not((left.location.loc=LOC_FPUREGISTER) and (current_settings.fputype>=fpu_sse3)) then
  377. begin
  378. secondpass(left);
  379. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,left.resultdef,false);
  380. location_reset(location,LOC_REGISTER,OS_S64);
  381. location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_S64);
  382. if UseAVX then
  383. case left.location.size of
  384. OS_F32:
  385. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_VCVTTSS2SI,S_Q,left.location.register,location.register));
  386. OS_F64:
  387. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_VCVTTSD2SI,S_Q,left.location.register,location.register));
  388. else
  389. internalerror(2007031401);
  390. end
  391. else
  392. case left.location.size of
  393. OS_F32:
  394. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVTTSS2SI,S_Q,left.location.register,location.register));
  395. OS_F64:
  396. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVTTSD2SI,S_Q,left.location.register,location.register));
  397. else
  398. internalerror(2007031401);
  399. end;
  400. end
  401. else
  402. {$endif x86_64}
  403. begin
  404. if (current_settings.fputype>=fpu_sse3) then
  405. begin
  406. load_fpu_location(left);
  407. location_reset_ref(location,LOC_REFERENCE,OS_S64,0);
  408. tg.GetTemp(current_asmdata.CurrAsmList,resultdef.size,resultdef.alignment,tt_normal,location.reference);
  409. emit_ref(A_FISTTP,S_IQ,location.reference);
  410. tcgx86(cg).dec_fpu_stack;
  411. end
  412. else
  413. begin
  414. tg.GetTemp(current_asmdata.CurrAsmList,2,2,tt_normal,oldcw);
  415. tg.GetTemp(current_asmdata.CurrAsmList,2,2,tt_normal,newcw);
  416. {$ifdef i8086}
  417. if current_settings.cputype<=cpu_286 then
  418. begin
  419. emit_ref(A_FSTCW,S_NO,newcw);
  420. emit_ref(A_FSTCW,S_NO,oldcw);
  421. emit_none(A_FWAIT,S_NO);
  422. end
  423. else
  424. {$endif i8086}
  425. begin
  426. emit_ref(A_FNSTCW,S_NO,newcw);
  427. emit_ref(A_FNSTCW,S_NO,oldcw);
  428. end;
  429. emit_const_ref(A_OR,S_W,$0f00,newcw);
  430. load_fpu_location(left);
  431. emit_ref(A_FLDCW,S_NO,newcw);
  432. location_reset_ref(location,LOC_REFERENCE,OS_S64,0);
  433. tg.GetTemp(current_asmdata.CurrAsmList,resultdef.size,resultdef.alignment,tt_normal,location.reference);
  434. emit_ref(A_FISTP,S_IQ,location.reference);
  435. tcgx86(cg).dec_fpu_stack;
  436. emit_ref(A_FLDCW,S_NO,oldcw);
  437. emit_none(A_FWAIT,S_NO);
  438. tg.UnGetTemp(current_asmdata.CurrAsmList,oldcw);
  439. tg.UnGetTemp(current_asmdata.CurrAsmList,newcw);
  440. end;
  441. end;
  442. end;
  443. procedure tx86inlinenode.second_sqr_real;
  444. begin
  445. if use_vectorfpu(resultdef) then
  446. begin
  447. secondpass(left);
  448. location_reset(location,LOC_MMREGISTER,left.location.size);
  449. location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
  450. if UseAVX then
  451. begin
  452. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,left.resultdef,true);
  453. cg.a_opmm_reg_reg_reg(current_asmdata.CurrAsmList,OP_MUL,left.location.size,left.location.register,left.location.register,location.register,mms_movescalar);
  454. end
  455. else
  456. begin
  457. if left.location.loc in [LOC_CFPUREGISTER,LOC_FPUREGISTER] then
  458. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,left.resultdef,true);
  459. cg.a_loadmm_loc_reg(current_asmdata.CurrAsmList,location.size,left.location,location.register,mms_movescalar);
  460. cg.a_opmm_reg_reg(current_asmdata.CurrAsmList,OP_MUL,left.location.size,location.register,location.register,mms_movescalar);
  461. end;
  462. end
  463. else
  464. begin
  465. load_fpu_location(left);
  466. emit_reg_reg(A_FMUL,S_NO,NR_ST0,NR_ST0);
  467. end;
  468. end;
  469. procedure tx86inlinenode.second_sqrt_real;
  470. begin
  471. if use_vectorfpu(resultdef) then
  472. begin
  473. secondpass(left);
  474. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,left.resultdef,true);
  475. location_reset(location,LOC_MMREGISTER,left.location.size);
  476. location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
  477. if UseAVX then
  478. case tfloatdef(resultdef).floattype of
  479. s32real:
  480. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_VSQRTSS,S_XMM,left.location.register,location.register,location.register));
  481. s64real:
  482. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_VSQRTSD,S_XMM,left.location.register,location.register,location.register));
  483. else
  484. internalerror(200510031);
  485. end
  486. else
  487. case tfloatdef(resultdef).floattype of
  488. s32real:
  489. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_SQRTSS,S_XMM,left.location.register,location.register));
  490. s64real:
  491. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_SQRTSD,S_XMM,left.location.register,location.register));
  492. else
  493. internalerror(200510031);
  494. end;
  495. end
  496. else
  497. begin
  498. load_fpu_location(left);
  499. emit_none(A_FSQRT,S_NO);
  500. end;
  501. end;
  502. procedure tx86inlinenode.second_ln_real;
  503. begin
  504. load_fpu_location(left);
  505. emit_none(A_FLDLN2,S_NO);
  506. emit_none(A_FXCH,S_NO);
  507. emit_none(A_FYL2X,S_NO);
  508. end;
  509. procedure tx86inlinenode.second_cos_real;
  510. begin
  511. {$ifdef i8086}
  512. { FCOS is 387+ }
  513. if current_settings.cputype < cpu_386 then
  514. begin
  515. inherited;
  516. exit;
  517. end;
  518. {$endif i8086}
  519. load_fpu_location(left);
  520. emit_none(A_FCOS,S_NO);
  521. end;
  522. procedure tx86inlinenode.second_sin_real;
  523. begin
  524. {$ifdef i8086}
  525. { FSIN is 387+ }
  526. if current_settings.cputype < cpu_386 then
  527. begin
  528. inherited;
  529. exit;
  530. end;
  531. {$endif i8086}
  532. load_fpu_location(left);
  533. emit_none(A_FSIN,S_NO)
  534. end;
  535. procedure tx86inlinenode.second_prefetch;
  536. var
  537. ref : treference;
  538. r : tregister;
  539. begin
  540. {$if defined(i386) or defined(i8086)}
  541. if current_settings.cputype>=cpu_Pentium3 then
  542. {$endif i386 or i8086}
  543. begin
  544. secondpass(left);
  545. case left.location.loc of
  546. LOC_CREFERENCE,
  547. LOC_REFERENCE:
  548. begin
  549. r:=cg.getintregister(current_asmdata.CurrAsmList,OS_ADDR);
  550. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,r);
  551. reference_reset_base(ref,r,0,left.location.reference.alignment);
  552. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_PREFETCHNTA,S_NO,ref));
  553. end;
  554. else
  555. { nothing to prefetch };
  556. end;
  557. end;
  558. end;
  559. {$ifndef i8086}
  560. procedure tx86inlinenode.second_abs_long;
  561. var
  562. hregister : tregister;
  563. opsize : tcgsize;
  564. hp : taicpu;
  565. begin
  566. {$ifdef i386}
  567. if not(CPUX86_HAS_CMOV in cpu_capabilities[current_settings.cputype]) then
  568. begin
  569. opsize:=def_cgsize(left.resultdef);
  570. secondpass(left);
  571. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  572. location:=left.location;
  573. location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
  574. emit_reg_reg(A_MOV,S_L,left.location.register,location.register);
  575. emit_const_reg(A_SAR,tcgsize2opsize[opsize],31,left.location.register);
  576. emit_reg_reg(A_XOR,S_L,left.location.register,location.register);
  577. emit_reg_reg(A_SUB,S_L,left.location.register,location.register);
  578. end
  579. else
  580. {$endif i386}
  581. begin
  582. opsize:=def_cgsize(left.resultdef);
  583. secondpass(left);
  584. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  585. hregister:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
  586. location:=left.location;
  587. location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
  588. cg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.register,hregister);
  589. cg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.register,location.register);
  590. emit_reg(A_NEG,tcgsize2opsize[opsize],hregister);
  591. hp:=taicpu.op_reg_reg(A_CMOVcc,tcgsize2opsize[opsize],hregister,location.register);
  592. hp.condition:=C_NS;
  593. current_asmdata.CurrAsmList.concat(hp);
  594. end;
  595. end;
  596. {$endif not i8086}
  597. {*****************************************************************************
  598. INCLUDE/EXCLUDE GENERIC HANDLING
  599. *****************************************************************************}
  600. procedure tx86inlinenode.second_IncludeExclude;
  601. var
  602. hregister,
  603. hregister2: tregister;
  604. setbase : aint;
  605. bitsperop,l : longint;
  606. cgop : topcg;
  607. asmop : tasmop;
  608. opdef : tdef;
  609. opsize,
  610. orgsize: tcgsize;
  611. begin
  612. {$ifdef i8086}
  613. { BTS and BTR are 386+ }
  614. if current_settings.cputype < cpu_386 then
  615. begin
  616. inherited;
  617. exit;
  618. end;
  619. {$endif i8086}
  620. if is_smallset(tcallparanode(left).resultdef) then
  621. begin
  622. opdef:=tcallparanode(left).resultdef;
  623. opsize:=int_cgsize(opdef.size)
  624. end
  625. else
  626. begin
  627. opdef:=u32inttype;
  628. opsize:=OS_32;
  629. end;
  630. bitsperop:=(8*tcgsize2size[opsize]);
  631. secondpass(tcallparanode(left).left);
  632. secondpass(tcallparanode(tcallparanode(left).right).left);
  633. setbase:=tsetdef(tcallparanode(left).left.resultdef).setbase;
  634. if tcallparanode(tcallparanode(left).right).left.location.loc=LOC_CONSTANT then
  635. begin
  636. { calculate bit position }
  637. l:=1 shl ((tcallparanode(tcallparanode(left).right).left.location.value-setbase) mod bitsperop);
  638. { determine operator }
  639. if inlinenumber=in_include_x_y then
  640. cgop:=OP_OR
  641. else
  642. begin
  643. cgop:=OP_AND;
  644. l:=not(l);
  645. end;
  646. case tcallparanode(left).left.location.loc of
  647. LOC_REFERENCE :
  648. begin
  649. inc(tcallparanode(left).left.location.reference.offset,
  650. ((tcallparanode(tcallparanode(left).right).left.location.value-setbase) div bitsperop)*tcgsize2size[opsize]);
  651. cg.a_op_const_ref(current_asmdata.CurrAsmList,cgop,opsize,l,tcallparanode(left).left.location.reference);
  652. end;
  653. LOC_CREGISTER :
  654. cg.a_op_const_reg(current_asmdata.CurrAsmList,cgop,tcallparanode(left).left.location.size,l,tcallparanode(left).left.location.register);
  655. else
  656. internalerror(200405022);
  657. end;
  658. end
  659. else
  660. begin
  661. orgsize:=opsize;
  662. if opsize in [OS_8,OS_S8] then
  663. begin
  664. opdef:=u32inttype;
  665. opsize:=OS_32;
  666. end;
  667. { determine asm operator }
  668. if inlinenumber=in_include_x_y then
  669. asmop:=A_BTS
  670. else
  671. asmop:=A_BTR;
  672. hlcg.location_force_reg(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,tcallparanode(tcallparanode(left).right).left.resultdef,opdef,true);
  673. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,setbase);
  674. hregister:=tcallparanode(tcallparanode(left).right).left.location.register;
  675. if (tcallparanode(left).left.location.loc=LOC_REFERENCE) then
  676. emit_reg_ref(asmop,tcgsize2opsize[opsize],hregister,tcallparanode(left).left.location.reference)
  677. else
  678. begin
  679. { second argument can't be an 8 bit register either }
  680. hregister2:=tcallparanode(left).left.location.register;
  681. if (orgsize in [OS_8,OS_S8]) then
  682. hregister2:=cg.makeregsize(current_asmdata.CurrAsmList,hregister2,opsize);
  683. emit_reg_reg(asmop,tcgsize2opsize[opsize],hregister,hregister2);
  684. end;
  685. end;
  686. end;
  687. procedure tx86inlinenode.second_popcnt;
  688. var
  689. opsize: tcgsize;
  690. begin
  691. secondpass(left);
  692. opsize:=tcgsize2unsigned[left.location.size];
  693. { no 8 Bit popcont }
  694. if opsize=OS_8 then
  695. opsize:=OS_16;
  696. if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) or
  697. (left.location.size<>opsize) then
  698. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,cgsize_orddef(opsize),true);
  699. location_reset(location,LOC_REGISTER,opsize);
  700. location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
  701. if left.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  702. emit_reg_reg(A_POPCNT,TCGSize2OpSize[opsize],left.location.register,location.register)
  703. else
  704. emit_ref_reg(A_POPCNT,TCGSize2OpSize[opsize],left.location.reference,location.register);
  705. end;
  706. procedure tx86inlinenode.second_fma;
  707. const
  708. op : array[false..true,false..true,s32real..s64real,0..3] of TAsmOp =
  709. (
  710. { positive product }
  711. (
  712. { positive third operand }
  713. ((A_VFMADD231SS,A_VFMADD231SS,A_VFMADD231SS,A_VFMADD213SS),
  714. (A_VFMADD231SD,A_VFMADD231SD,A_VFMADD231SD,A_VFMADD213SD)
  715. ),
  716. { negative third operand }
  717. ((A_VFMSUB231SS,A_VFMSUB231SS,A_VFMSUB231SS,A_VFMSUB213SS),
  718. (A_VFMSUB231SD,A_VFMSUB231SD,A_VFMSUB231SD,A_VFMSUB213SD)
  719. )
  720. ),
  721. { negative product }
  722. (
  723. { positive third operand }
  724. ((A_VFNMADD231SS,A_VFNMADD231SS,A_VFNMADD231SS,A_VFNMADD213SS),
  725. (A_VFNMADD231SD,A_VFNMADD231SD,A_VFNMADD231SD,A_VFNMADD213SD)
  726. ),
  727. { negative third operand }
  728. ((A_VFNMSUB231SS,A_VFNMSUB231SS,A_VFNMSUB231SS,A_VFNMSUB213SS),
  729. (A_VFNMSUB231SD,A_VFNMSUB231SD,A_VFNMSUB231SD,A_VFNMSUB213SD)
  730. )
  731. )
  732. );
  733. var
  734. paraarray : array[1..3] of tnode;
  735. memop,
  736. i : integer;
  737. negop3,
  738. negproduct,
  739. gotmem : boolean;
  740. hp : tnode;
  741. begin
  742. {$ifndef i8086}
  743. if (cpu_capabilities[current_settings.cputype]*[CPUX86_HAS_FMA,CPUX86_HAS_FMA4])<>[] then
  744. begin
  745. negop3:=false;
  746. negproduct:=false;
  747. paraarray[1]:=tcallparanode(tcallparanode(tcallparanode(parameters).nextpara).nextpara).paravalue;
  748. paraarray[2]:=tcallparanode(tcallparanode(parameters).nextpara).paravalue;
  749. paraarray[3]:=tcallparanode(parameters).paravalue;
  750. { check if a neg. node can be removed
  751. this is possible because changing the sign of
  752. a floating point number does not affect its absolute
  753. value in any way
  754. }
  755. if paraarray[1].nodetype=unaryminusn then
  756. begin
  757. paraarray[1]:=tunarynode(paraarray[1]).left;
  758. { do not release the unused unary minus node, it is kept and release together with the other nodes,
  759. only no code is generated for it }
  760. negproduct:=not(negproduct);
  761. end;
  762. if paraarray[2].nodetype=unaryminusn then
  763. begin
  764. paraarray[2]:=tunarynode(paraarray[2]).left;
  765. { do not release the unused unary minus node, it is kept and release together with the other nodes,
  766. only no code is generated for it }
  767. negproduct:=not(negproduct);
  768. end;
  769. if paraarray[3].nodetype=unaryminusn then
  770. begin
  771. paraarray[3]:=tunarynode(paraarray[3]).left;
  772. { do not release the unused unary minus node, it is kept and release together with the other nodes,
  773. only no code is generated for it }
  774. negop3:=true;
  775. end;
  776. for i:=1 to 3 do
  777. secondpass(paraarray[i]);
  778. { only one memory operand is allowed }
  779. gotmem:=false;
  780. memop:=0;
  781. for i:=1 to 3 do
  782. begin
  783. if not(paraarray[i].location.loc in [LOC_MMREGISTER,LOC_CMMREGISTER]) then
  784. begin
  785. if (paraarray[i].location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) and not(gotmem) then
  786. begin
  787. memop:=i;
  788. gotmem:=true;
  789. end
  790. else
  791. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,paraarray[i].location,paraarray[i].resultdef,true);
  792. end;
  793. end;
  794. location_reset(location,LOC_MMREGISTER,paraarray[1].location.size);
  795. location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
  796. if gotmem then
  797. begin
  798. case memop of
  799. 1:
  800. begin
  801. hlcg.a_loadmm_reg_reg(current_asmdata.CurrAsmList,paraarray[3].resultdef,resultdef,
  802. paraarray[3].location.register,location.register,mms_movescalar);
  803. emit_ref_reg_reg(op[negproduct,negop3,tfloatdef(resultdef).floattype,memop],S_NO,
  804. paraarray[1].location.reference,paraarray[2].location.register,location.register);
  805. end;
  806. 2:
  807. begin
  808. hlcg.a_loadmm_reg_reg(current_asmdata.CurrAsmList,paraarray[3].resultdef,resultdef,
  809. paraarray[3].location.register,location.register,mms_movescalar);
  810. emit_ref_reg_reg(op[negproduct,negop3,tfloatdef(resultdef).floattype,memop],S_NO,
  811. paraarray[2].location.reference,paraarray[1].location.register,location.register);
  812. end;
  813. 3:
  814. begin
  815. hlcg.a_loadmm_reg_reg(current_asmdata.CurrAsmList,paraarray[1].resultdef,resultdef,
  816. paraarray[1].location.register,location.register,mms_movescalar);
  817. emit_ref_reg_reg(op[negproduct,negop3,tfloatdef(resultdef).floattype,memop],S_NO,
  818. paraarray[3].location.reference,paraarray[2].location.register,location.register);
  819. end
  820. else
  821. internalerror(2014041301);
  822. end;
  823. end
  824. else
  825. begin
  826. { try to use the location which is already in a temp. mm register as destination,
  827. so the compiler might be able to re-use the register }
  828. if paraarray[1].location.loc=LOC_MMREGISTER then
  829. begin
  830. hlcg.a_loadmm_reg_reg(current_asmdata.CurrAsmList,paraarray[1].resultdef,resultdef,
  831. paraarray[1].location.register,location.register,mms_movescalar);
  832. emit_reg_reg_reg(op[negproduct,negop3,tfloatdef(resultdef).floattype,3],S_NO,
  833. paraarray[3].location.register,paraarray[2].location.register,location.register);
  834. end
  835. else if paraarray[2].location.loc=LOC_MMREGISTER then
  836. begin
  837. hlcg.a_loadmm_reg_reg(current_asmdata.CurrAsmList,paraarray[2].resultdef,resultdef,
  838. paraarray[2].location.register,location.register,mms_movescalar);
  839. emit_reg_reg_reg(op[negproduct,negop3,tfloatdef(resultdef).floattype,3],S_NO,
  840. paraarray[3].location.register,paraarray[1].location.register,location.register);
  841. end
  842. else
  843. begin
  844. hlcg.a_loadmm_reg_reg(current_asmdata.CurrAsmList,paraarray[3].resultdef,resultdef,
  845. paraarray[3].location.register,location.register,mms_movescalar);
  846. emit_reg_reg_reg(op[negproduct,negop3,tfloatdef(resultdef).floattype,0],S_NO,
  847. paraarray[1].location.register,paraarray[2].location.register,location.register);
  848. end;
  849. end;
  850. end
  851. else
  852. {$endif i8086}
  853. internalerror(2014032301);
  854. end;
  855. end.