aoptcpu.pas 42 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
  3. Development Team
  4. This unit implements the ARM optimizer object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. Unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. { $define DEBUG_AOPTCPU}
  21. Interface
  22. uses cpubase,cgbase,aasmtai,aopt,AoptObj,aoptcpub;
  23. Type
  24. TCpuAsmOptimizer = class(TAsmOptimizer)
  25. { outputs a debug message into the assembler file }
  26. procedure DebugMsg(const s: string; p: tai);
  27. Function GetNextInstructionUsingReg(Current: tai; Var Next: tai;reg : TRegister): Boolean;
  28. function RegInInstruction(Reg: TRegister; p1: tai): Boolean; override;
  29. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  30. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  31. { uses the same constructor as TAopObj }
  32. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  33. procedure PeepHoleOptPass2;override;
  34. End;
  35. Implementation
  36. uses
  37. cutils,
  38. verbose,
  39. cpuinfo,
  40. aasmbase,aasmcpu,aasmdata,
  41. aoptutils,
  42. globals,globtype,
  43. cgutils;
  44. type
  45. TAsmOpSet = set of TAsmOp;
  46. function CanBeCond(p : tai) : boolean;
  47. begin
  48. result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
  49. end;
  50. function RefsEqual(const r1, r2: treference): boolean;
  51. begin
  52. refsequal :=
  53. (r1.offset = r2.offset) and
  54. (r1.base = r2.base) and
  55. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  56. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  57. (r1.relsymbol = r2.relsymbol) and
  58. (r1.addressmode = r2.addressmode);
  59. end;
  60. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
  61. begin
  62. result:=oper1.typ=oper2.typ;
  63. if result then
  64. case oper1.typ of
  65. top_const:
  66. Result:=oper1.val = oper2.val;
  67. top_reg:
  68. Result:=oper1.reg = oper2.reg;
  69. top_ref:
  70. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  71. else Result:=false;
  72. end
  73. end;
  74. function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
  75. begin
  76. result := (oper.typ = top_reg) and (oper.reg = reg);
  77. end;
  78. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  79. begin
  80. result :=
  81. (instr.typ = ait_instruction) and
  82. (taicpu(instr).opcode = op);
  83. end;
  84. function MatchInstruction(const instr: tai; const ops: TAsmOpSet): boolean;
  85. begin
  86. result :=
  87. (instr.typ = ait_instruction) and
  88. (taicpu(instr).opcode in ops);
  89. end;
  90. function MatchInstruction(const instr: tai; const ops: TAsmOpSet;opcount : byte): boolean;
  91. begin
  92. result :=
  93. (instr.typ = ait_instruction) and
  94. (taicpu(instr).opcode in ops) and
  95. (taicpu(instr).ops=opcount);
  96. end;
  97. {$ifdef DEBUG_AOPTCPU}
  98. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
  99. begin
  100. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  101. end;
  102. {$else DEBUG_AOPTCPU}
  103. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
  104. begin
  105. end;
  106. {$endif DEBUG_AOPTCPU}
  107. function TCpuAsmOptimizer.RegInInstruction(Reg: TRegister; p1: tai): Boolean;
  108. begin
  109. If (p1.typ = ait_instruction) and (taicpu(p1).opcode in [A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU]) and
  110. ((getsupreg(reg)=RS_R0) or (getsupreg(reg)=RS_R1)) then
  111. Result:=true
  112. else
  113. Result:=inherited RegInInstruction(Reg, p1);
  114. end;
  115. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  116. var Next: tai; reg: TRegister): Boolean;
  117. begin
  118. Next:=Current;
  119. repeat
  120. Result:=GetNextInstruction(Next,Next);
  121. until not(cs_opt_level3 in current_settings.optimizerswitches) or not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  122. (is_calljmp(taicpu(Next).opcode));
  123. end;
  124. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  125. var
  126. p: taicpu;
  127. begin
  128. if not assigned(hp) or
  129. (hp.typ <> ait_instruction) then
  130. begin
  131. Result := false;
  132. exit;
  133. end;
  134. p := taicpu(hp);
  135. Result := ((p.opcode in [A_LDI,A_MOV,A_LDS]) and (reg=p.oper[0]^.reg) and ((p.oper[1]^.typ<>top_reg) or (reg<>p.oper[0]^.reg))) or
  136. ((p.opcode in [A_LD,A_LDD,A_LPM]) and (reg=p.oper[0]^.reg) and not(RegInRef(reg,p.oper[1]^.ref^))) or
  137. ((p.opcode in [A_MOVW]) and ((reg=p.oper[0]^.reg) or (TRegister(ord(reg)+1)=p.oper[0]^.reg)) and not(reg=p.oper[1]^.reg) and not(TRegister(ord(reg)+1)=p.oper[1]^.reg)) or
  138. ((p.opcode in [A_POP]) and (reg=p.oper[0]^.reg));
  139. end;
  140. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  141. var
  142. p: taicpu;
  143. i: longint;
  144. begin
  145. Result := false;
  146. if not (assigned(hp) and (hp.typ = ait_instruction)) then
  147. exit;
  148. p:=taicpu(hp);
  149. i:=0;
  150. { we do not care about the stack pointer }
  151. if p.opcode in [A_POP] then
  152. exit;
  153. { first operand only written?
  154. then skip it }
  155. if p.opcode in [A_MOV,A_LD,A_LDD,A_LDS,A_LPM,A_LDI,A_MOVW] then
  156. i:=1;
  157. while i<p.ops do
  158. begin
  159. case p.oper[i]^.typ of
  160. top_reg:
  161. Result := (p.oper[i]^.reg = reg) or
  162. { MOVW }
  163. ((i=1) and (p.opcode=A_MOVW) and (getsupreg(p.oper[0]^.reg)+1=getsupreg(reg)));
  164. top_ref:
  165. Result :=
  166. (p.oper[i]^.ref^.base = reg) or
  167. (p.oper[i]^.ref^.index = reg);
  168. end;
  169. { Bailout if we found something }
  170. if Result then
  171. exit;
  172. Inc(i);
  173. end;
  174. end;
  175. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  176. var
  177. hp1,hp2,hp3,hp4,hp5: tai;
  178. alloc, dealloc: tai_regalloc;
  179. i: integer;
  180. l: TAsmLabel;
  181. TmpUsedRegs : TAllUsedRegs;
  182. begin
  183. result := false;
  184. case p.typ of
  185. ait_instruction:
  186. begin
  187. {
  188. change
  189. <op> reg,x,y
  190. cp reg,r1
  191. into
  192. <op>s reg,x,y
  193. }
  194. { this optimization can applied only to the currently enabled operations because
  195. the other operations do not update all flags and FPC does not track flag usage }
  196. if MatchInstruction(p, [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_DEC,A_EOR,
  197. A_INC,A_LSL,A_LSR,
  198. A_OR,A_ORI,A_ROL,A_ROR,A_SBC,A_SBCI,A_SUB,A_SUBI]) and
  199. GetNextInstruction(p, hp1) and
  200. ((MatchInstruction(hp1, A_CP) and
  201. (((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
  202. (taicpu(hp1).oper[1]^.reg = NR_R1)) or
  203. ((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  204. (taicpu(hp1).oper[0]^.reg = NR_R1) and
  205. (taicpu(p).opcode in [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_EOR,
  206. A_LSL,A_LSR,
  207. A_OR,A_ORI,A_ROL,A_ROR])))) or
  208. (MatchInstruction(hp1, A_CPI) and
  209. (taicpu(p).opcode = A_ANDI) and
  210. (taicpu(p).oper[1]^.typ=top_const) and
  211. (taicpu(hp1).oper[1]^.typ=top_const) and
  212. (taicpu(p).oper[1]^.val=taicpu(hp1).oper[1]^.val))) and
  213. GetNextInstruction(hp1, hp2) and
  214. { be careful here, following instructions could use other flags
  215. however after a jump fpc never depends on the value of flags }
  216. { All above instructions set Z and N according to the following
  217. Z := result = 0;
  218. N := result[31];
  219. EQ = Z=1; NE = Z=0;
  220. MI = N=1; PL = N=0; }
  221. MatchInstruction(hp2, A_BRxx) and
  222. (taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) { and
  223. no flag allocation tracking implemented yet on avr
  224. assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next)))} then
  225. begin
  226. { move flag allocation if possible }
  227. { no flag allocation tracking implemented yet on avr
  228. GetLastInstruction(hp1, hp2);
  229. hp2:=FindRegAlloc(NR_DEFAULTFLAGS,tai(hp2.Next));
  230. if assigned(hp2) then
  231. begin
  232. asml.Remove(hp2);
  233. asml.insertbefore(hp2, p);
  234. end;
  235. }
  236. // If we compare to the same value we are masking then invert the comparison
  237. if (taicpu(hp1).opcode=A_CPI) then
  238. taicpu(hp2).condition:=inverse_cond(taicpu(hp2).condition);
  239. asml.InsertBefore(tai_regalloc.alloc(NR_DEFAULTFLAGS,p), p);
  240. asml.InsertAfter(tai_regalloc.dealloc(NR_DEFAULTFLAGS,hp2), hp2);
  241. IncludeRegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs);
  242. DebugMsg('Peephole OpCp2Op performed', p);
  243. asml.remove(hp1);
  244. hp1.free;
  245. Result:=true;
  246. end
  247. else
  248. case taicpu(p).opcode of
  249. A_LDI:
  250. begin
  251. { turn
  252. ldi reg0, imm
  253. cp/mov reg1, reg0
  254. dealloc reg0
  255. into
  256. cpi/ldi reg1, imm
  257. }
  258. if MatchOpType(taicpu(p),top_reg,top_const) and
  259. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  260. MatchInstruction(hp1,[A_CP,A_MOV],2) and
  261. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  262. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  263. (getsupreg(taicpu(hp1).oper[0]^.reg) in [16..31]) and
  264. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) then
  265. begin
  266. CopyUsedRegs(TmpUsedRegs);
  267. if not(RegUsedAfterInstruction(taicpu(hp1).oper[1]^.reg, hp1, TmpUsedRegs)) then
  268. begin
  269. case taicpu(hp1).opcode of
  270. A_CP:
  271. taicpu(hp1).opcode:=A_CPI;
  272. A_MOV:
  273. taicpu(hp1).opcode:=A_LDI;
  274. else
  275. internalerror(2016111901);
  276. end;
  277. taicpu(hp1).loadconst(1, taicpu(p).oper[1]^.val);
  278. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  279. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  280. if assigned(alloc) and assigned(dealloc) then
  281. begin
  282. asml.Remove(alloc);
  283. alloc.Free;
  284. asml.Remove(dealloc);
  285. dealloc.Free;
  286. end;
  287. DebugMsg('Peephole LdiMov/Cp2Ldi/Cpi performed', p);
  288. GetNextInstruction(p,hp1);
  289. asml.Remove(p);
  290. p.Free;
  291. p:=hp1;
  292. end;
  293. ReleaseUsedRegs(TmpUsedRegs);
  294. end;
  295. end;
  296. A_STS:
  297. if (taicpu(p).oper[0]^.ref^.symbol=nil) and
  298. (taicpu(p).oper[0]^.ref^.relsymbol=nil) and
  299. (getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and
  300. (getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and
  301. (taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and
  302. (taicpu(p).oper[0]^.ref^.offset>=32) and
  303. (taicpu(p).oper[0]^.ref^.offset<=95) then
  304. begin
  305. DebugMsg('Peephole Sts2Out performed', p);
  306. taicpu(p).opcode:=A_OUT;
  307. taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32);
  308. end;
  309. A_LDS:
  310. if (taicpu(p).oper[1]^.ref^.symbol=nil) and
  311. (taicpu(p).oper[1]^.ref^.relsymbol=nil) and
  312. (getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and
  313. (getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and
  314. (taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and
  315. (taicpu(p).oper[1]^.ref^.offset>=32) and
  316. (taicpu(p).oper[1]^.ref^.offset<=95) then
  317. begin
  318. DebugMsg('Peephole Lds2In performed', p);
  319. taicpu(p).opcode:=A_IN;
  320. taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32);
  321. end;
  322. A_IN:
  323. if GetNextInstruction(p,hp1) then
  324. begin
  325. {
  326. in rX,Y
  327. ori rX,n
  328. out Y,rX
  329. into
  330. sbi rX,lg(n)
  331. }
  332. if (taicpu(p).oper[1]^.val<=31) and
  333. MatchInstruction(hp1,A_ORI) and
  334. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  335. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  336. GetNextInstruction(hp1,hp2) and
  337. MatchInstruction(hp2,A_OUT) and
  338. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  339. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  340. begin
  341. DebugMsg('Peephole InOriOut2Sbi performed', p);
  342. taicpu(p).opcode:=A_SBI;
  343. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  344. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  345. asml.Remove(hp1);
  346. hp1.Free;
  347. asml.Remove(hp2);
  348. hp2.Free;
  349. result:=true;
  350. end
  351. {
  352. in rX,Y
  353. andi rX,not(n)
  354. out Y,rX
  355. into
  356. cbi rX,lg(n)
  357. }
  358. else if (taicpu(p).oper[1]^.val<=31) and
  359. MatchInstruction(hp1,A_ANDI) and
  360. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  361. (PopCnt(byte(not(taicpu(hp1).oper[1]^.val)))=1) and
  362. GetNextInstruction(hp1,hp2) and
  363. MatchInstruction(hp2,A_OUT) and
  364. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  365. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  366. begin
  367. DebugMsg('Peephole InAndiOut2Cbi performed', p);
  368. taicpu(p).opcode:=A_CBI;
  369. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  370. taicpu(p).loadconst(1,BsrByte(not(taicpu(hp1).oper[1]^.val)));
  371. asml.Remove(hp1);
  372. hp1.Free;
  373. asml.Remove(hp2);
  374. hp2.Free;
  375. result:=true;
  376. end
  377. {
  378. in rX,Y
  379. andi rX,n
  380. breq/brne L1
  381. into
  382. sbis/sbic Y,lg(n)
  383. jmp L1
  384. .Ltemp:
  385. }
  386. else if (taicpu(p).oper[1]^.val<=31) and
  387. MatchInstruction(hp1,A_ANDI) and
  388. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  389. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  390. GetNextInstruction(hp1,hp2) and
  391. MatchInstruction(hp2,A_BRxx) and
  392. (taicpu(hp2).condition in [C_EQ,C_NE]) then
  393. begin
  394. if taicpu(hp2).condition=C_EQ then
  395. taicpu(p).opcode:=A_SBIS
  396. else
  397. taicpu(p).opcode:=A_SBIC;
  398. DebugMsg('Peephole InAndiBrx2SbixJmp performed', p);
  399. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  400. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  401. asml.Remove(hp1);
  402. hp1.Free;
  403. taicpu(hp2).condition:=C_None;
  404. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  405. taicpu(hp2).opcode:=A_JMP
  406. else
  407. taicpu(hp2).opcode:=A_RJMP;
  408. current_asmdata.getjumplabel(l);
  409. l.increfs;
  410. asml.InsertAfter(tai_label.create(l), hp2);
  411. result:=true;
  412. end;
  413. end;
  414. A_ANDI:
  415. begin
  416. {
  417. Turn
  418. andi rx, #pow2
  419. brne l
  420. <op>
  421. l:
  422. Into
  423. sbrs rx, #(1 shl imm)
  424. <op>
  425. l:
  426. }
  427. if (taicpu(p).ops=2) and
  428. (taicpu(p).oper[1]^.typ=top_const) and
  429. ispowerof2(taicpu(p).oper[1]^.val,i) and
  430. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  431. GetNextInstruction(p,hp1) and
  432. (hp1.typ=ait_instruction) and
  433. (taicpu(hp1).opcode=A_BRxx) and
  434. (taicpu(hp1).condition in [C_EQ,C_NE]) and
  435. (taicpu(hp1).ops>0) and
  436. (taicpu(hp1).oper[0]^.typ = top_ref) and
  437. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  438. GetNextInstruction(hp1,hp2) and
  439. (hp2.typ=ait_instruction) and
  440. GetNextInstruction(hp2,hp3) and
  441. (hp3.typ=ait_label) and
  442. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  443. begin
  444. DebugMsg('Peephole AndiBr2Sbr performed', p);
  445. taicpu(p).oper[1]^.val:=i;
  446. if taicpu(hp1).condition=C_NE then
  447. taicpu(p).opcode:=A_SBRS
  448. else
  449. taicpu(p).opcode:=A_SBRC;
  450. asml.Remove(hp1);
  451. hp1.free;
  452. result:=true;
  453. end
  454. {
  455. Remove
  456. andi rx, #y
  457. dealloc rx
  458. }
  459. else if (taicpu(p).ops=2) and
  460. (taicpu(p).oper[0]^.typ=top_reg) and
  461. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  462. (assigned(FindRegDeAlloc(NR_DEFAULTFLAGS,tai(p.Next))) or
  463. (not RegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs))) then
  464. begin
  465. DebugMsg('Redundant Andi removed', p);
  466. GetNextInstruction(p,hp1);
  467. AsmL.Remove(p);
  468. p.free;
  469. p:=hp1;
  470. result:=true;
  471. end;
  472. end;
  473. A_CLR:
  474. begin
  475. { turn the common
  476. clr rX
  477. mov/ld rX, rY
  478. into
  479. mov/ld rX, rY
  480. }
  481. if (taicpu(p).ops=1) and
  482. (taicpu(p).oper[0]^.typ=top_reg) and
  483. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  484. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  485. (hp1.typ=ait_instruction) and
  486. (taicpu(hp1).opcode in [A_MOV,A_LD]) and
  487. (taicpu(hp1).ops>0) and
  488. (taicpu(hp1).oper[0]^.typ=top_reg) and
  489. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) then
  490. begin
  491. DebugMsg('Peephole ClrMov2Mov performed', p);
  492. asml.Remove(p);
  493. p.Free;
  494. p:=hp1;
  495. result:=true;
  496. end
  497. { turn
  498. clr rX
  499. ...
  500. adc rY, rX
  501. into
  502. ...
  503. adc rY, r1
  504. }
  505. else if (taicpu(p).ops=1) and
  506. (taicpu(p).oper[0]^.typ=top_reg) and
  507. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  508. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  509. (hp1.typ=ait_instruction) and
  510. (taicpu(hp1).opcode in [A_ADC,A_SBC]) and
  511. (taicpu(hp1).ops=2) and
  512. (taicpu(hp1).oper[1]^.typ=top_reg) and
  513. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  514. (taicpu(hp1).oper[0]^.reg<>taicpu(p).oper[0]^.reg) and
  515. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  516. begin
  517. DebugMsg('Peephole ClrAdc2Adc performed', p);
  518. taicpu(hp1).oper[1]^.reg:=NR_R1;
  519. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  520. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  521. if assigned(alloc) and assigned(dealloc) then
  522. begin
  523. asml.Remove(alloc);
  524. alloc.Free;
  525. asml.Remove(dealloc);
  526. dealloc.Free;
  527. end;
  528. GetNextInstruction(p,hp1);
  529. asml.Remove(p);
  530. p.free;
  531. p:=hp1;
  532. result:=true;
  533. end;
  534. end;
  535. A_PUSH:
  536. begin
  537. { turn
  538. push reg0
  539. push reg1
  540. pop reg3
  541. pop reg2
  542. into
  543. movw reg2,reg0
  544. or
  545. mov reg3,reg1
  546. mov reg2,reg0
  547. }
  548. if GetNextInstruction(p,hp1) and
  549. MatchInstruction(hp1,A_PUSH) and
  550. GetNextInstruction(hp1,hp2) and
  551. MatchInstruction(hp2,A_POP) and
  552. GetNextInstruction(hp2,hp3) and
  553. MatchInstruction(hp3,A_POP) then
  554. begin
  555. if (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  556. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  557. (getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and
  558. ((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then
  559. begin
  560. DebugMsg('Peephole PushPushPopPop2Movw performed', p);
  561. taicpu(p).ops:=2;
  562. taicpu(p).opcode:=A_MOVW;
  563. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  564. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  565. asml.Remove(hp1);
  566. hp1.Free;
  567. asml.Remove(hp2);
  568. hp2.Free;
  569. asml.Remove(hp3);
  570. hp3.Free;
  571. result:=true;
  572. end
  573. else
  574. begin
  575. DebugMsg('Peephole PushPushPopPop2MovMov performed', p);
  576. taicpu(p).ops:=2;
  577. taicpu(p).opcode:=A_MOV;
  578. taicpu(hp1).ops:=2;
  579. taicpu(hp1).opcode:=A_MOV;
  580. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  581. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  582. taicpu(hp1).loadreg(1, taicpu(hp1).oper[0]^.reg);
  583. taicpu(hp1).loadreg(0, taicpu(hp2).oper[0]^.reg);
  584. asml.Remove(hp2);
  585. hp2.Free;
  586. asml.Remove(hp3);
  587. hp3.Free;
  588. result:=true;
  589. end
  590. end;
  591. end;
  592. A_CALL:
  593. if (cs_opt_level4 in current_settings.optimizerswitches) and
  594. GetNextInstruction(p,hp1) and
  595. MatchInstruction(hp1,A_RET) then
  596. begin
  597. DebugMsg('Peephole CallReg2Jmp performed', p);
  598. taicpu(p).opcode:=A_JMP;
  599. asml.Remove(hp1);
  600. hp1.Free;
  601. result:=true;
  602. end;
  603. A_MOV:
  604. begin
  605. { turn
  606. mov reg0, reg1
  607. push reg0
  608. dealloc reg0
  609. into
  610. push reg1
  611. }
  612. if (taicpu(p).ops=2) and
  613. (taicpu(p).oper[0]^.typ = top_reg) and
  614. (taicpu(p).oper[1]^.typ = top_reg) and
  615. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  616. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) and
  617. (hp1.typ = ait_instruction) and
  618. (taicpu(hp1).opcode in [A_PUSH,A_MOV,A_CP,A_CPC,A_ADD,A_SUB,A_ADC,A_SBC,A_EOR,A_AND,A_OR,
  619. A_STD,A_ST,
  620. A_OUT,A_IN]) and
  621. RegInInstruction(taicpu(p).oper[0]^.reg, hp1) and
  622. (not RegModifiedByInstruction(taicpu(p).oper[0]^.reg, hp1)) and
  623. {(taicpu(hp1).ops=1) and
  624. (taicpu(hp1).oper[0]^.typ = top_reg) and
  625. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and }
  626. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  627. begin
  628. DebugMsg('Peephole MovOp2Op performed', p);
  629. for i := 0 to taicpu(hp1).ops-1 do
  630. if taicpu(hp1).oper[i]^.typ=top_reg then
  631. if taicpu(hp1).oper[i]^.reg=taicpu(p).oper[0]^.reg then
  632. taicpu(hp1).oper[i]^.reg:=taicpu(p).oper[1]^.reg;
  633. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  634. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  635. if assigned(alloc) and assigned(dealloc) then
  636. begin
  637. asml.Remove(alloc);
  638. alloc.Free;
  639. asml.Remove(dealloc);
  640. dealloc.Free;
  641. end;
  642. GetNextInstruction(p,hp1);
  643. asml.Remove(p);
  644. p.free;
  645. p:=hp1;
  646. result:=true;
  647. end
  648. { remove
  649. mov reg0,reg0
  650. }
  651. else if (taicpu(p).ops=2) and
  652. (taicpu(p).oper[0]^.typ = top_reg) and
  653. (taicpu(p).oper[1]^.typ = top_reg) and
  654. (taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
  655. begin
  656. DebugMsg('Peephole RedundantMov performed', p);
  657. GetNextInstruction(p,hp1);
  658. asml.remove(p);
  659. p.free;
  660. p:=hp1;
  661. result:=true;
  662. end
  663. {
  664. Turn
  665. mov rx,ry
  666. op rx,rz
  667. mov ry, rx
  668. Into
  669. op ry,rz
  670. }
  671. else if (taicpu(p).ops=2) and
  672. (taicpu(p).oper[0]^.typ = top_reg) and
  673. (taicpu(p).oper[1]^.typ = top_reg) and
  674. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  675. (hp1.typ=ait_instruction) and
  676. (taicpu(hp1).ops >= 1) and
  677. (taicpu(hp1).oper[0]^.typ = top_reg) and
  678. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  679. (hp2.typ=ait_instruction) and
  680. (taicpu(hp2).opcode=A_MOV) and
  681. (taicpu(hp2).oper[0]^.typ = top_reg) and
  682. (taicpu(hp2).oper[1]^.typ = top_reg) and
  683. (taicpu(hp2).oper[0]^.reg = taicpu(p).oper[1]^.reg) and
  684. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  685. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  686. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp2)) and
  687. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_SUB,A_SBC,A_AND,A_OR,A_EOR,
  688. A_LSL,A_LSR,A_ASR,A_ROR,A_ROL]) and
  689. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  690. begin
  691. DebugMsg('Peephole MovOpMov2Op performed', p);
  692. if (taicpu(hp1).ops=2) and
  693. (taicpu(hp1).oper[1]^.typ=top_reg) and
  694. (taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
  695. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  696. taicpu(hp1).oper[0]^.reg:=taicpu(p).oper[1]^.reg;
  697. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  698. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  699. if assigned(alloc) and assigned(dealloc) then
  700. begin
  701. asml.Remove(alloc);
  702. alloc.Free;
  703. asml.Remove(dealloc);
  704. dealloc.Free;
  705. end;
  706. GetNextInstruction(p,hp1);
  707. asml.remove(p);
  708. p.free;
  709. asml.remove(hp2);
  710. hp2.free;
  711. p:=hp1;
  712. result:=true;
  713. end
  714. {
  715. Turn
  716. mov rx,ry
  717. op rx,rw
  718. mov rw,rx
  719. Into
  720. op rw,ry
  721. }
  722. else if (taicpu(p).ops=2) and
  723. (taicpu(p).oper[0]^.typ = top_reg) and
  724. (taicpu(p).oper[1]^.typ = top_reg) and
  725. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  726. (hp1.typ=ait_instruction) and
  727. (taicpu(hp1).ops = 2) and
  728. (taicpu(hp1).oper[0]^.typ = top_reg) and
  729. (taicpu(hp1).oper[1]^.typ = top_reg) and
  730. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  731. (hp2.typ=ait_instruction) and
  732. (taicpu(hp2).opcode=A_MOV) and
  733. (taicpu(hp2).oper[0]^.typ = top_reg) and
  734. (taicpu(hp2).oper[1]^.typ = top_reg) and
  735. (taicpu(hp2).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  736. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  737. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  738. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) and
  739. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_AND,A_OR,A_EOR]) and
  740. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  741. begin
  742. DebugMsg('Peephole MovOpMov2Op2 performed', p);
  743. taicpu(hp1).oper[0]^.reg:=taicpu(hp2).oper[0]^.reg;
  744. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  745. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  746. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  747. if assigned(alloc) and assigned(dealloc) then
  748. begin
  749. asml.Remove(alloc);
  750. alloc.Free;
  751. asml.Remove(dealloc);
  752. dealloc.Free;
  753. end;
  754. GetNextInstruction(p,hp1);
  755. asml.remove(p);
  756. p.free;
  757. asml.remove(hp2);
  758. hp2.free;
  759. p:=hp1;
  760. result:=true;
  761. end
  762. { fold
  763. mov reg2,reg0
  764. mov reg3,reg1
  765. to
  766. movw reg2,reg0
  767. }
  768. else if (CPUAVR_HAS_MOVW in cpu_capabilities[current_settings.cputype]) and
  769. (taicpu(p).ops=2) and
  770. (taicpu(p).oper[0]^.typ = top_reg) and
  771. (taicpu(p).oper[1]^.typ = top_reg) and
  772. getnextinstruction(p,hp1) and
  773. (hp1.typ = ait_instruction) and
  774. (taicpu(hp1).opcode = A_MOV) and
  775. (taicpu(hp1).ops=2) and
  776. (taicpu(hp1).oper[0]^.typ = top_reg) and
  777. (taicpu(hp1).oper[1]^.typ = top_reg) and
  778. (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  779. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  780. ((getsupreg(taicpu(p).oper[1]^.reg) mod 2)=0) and
  781. (getsupreg(taicpu(hp1).oper[1]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)+1) then
  782. begin
  783. DebugMsg('Peephole MovMov2Movw performed', p);
  784. alloc:=FindRegAllocBackward(taicpu(hp1).oper[0]^.reg,tai(hp1.Previous));
  785. if assigned(alloc) then
  786. begin
  787. asml.Remove(alloc);
  788. asml.InsertBefore(alloc,p);
  789. end;
  790. taicpu(p).opcode:=A_MOVW;
  791. asml.remove(hp1);
  792. hp1.free;
  793. result:=true;
  794. end
  795. {
  796. This removes the first mov from
  797. mov rX,...
  798. mov rX,...
  799. }
  800. else if (hp1.typ=ait_instruction) and (taicpu(hp1).opcode=A_MOV) then
  801. while (hp1.typ=ait_instruction) and (taicpu(hp1).opcode=A_MOV) and
  802. MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^) and
  803. { don't remove the first mov if the second is a mov rX,rX }
  804. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) do
  805. begin
  806. DebugMsg('Peephole MovMov2Mov performed', p);
  807. asml.remove(p);
  808. p.free;
  809. p:=hp1;
  810. GetNextInstruction(hp1,hp1);
  811. result:=true;
  812. if not assigned(hp1) then
  813. break;
  814. end;
  815. end;
  816. A_SBIC,
  817. A_SBIS:
  818. begin
  819. {
  820. Turn
  821. sbic/sbis X, y
  822. jmp .L1
  823. op
  824. .L1:
  825. into
  826. sbis/sbic X,y
  827. op
  828. .L1:
  829. }
  830. if GetNextInstruction(p, hp1) and
  831. (hp1.typ=ait_instruction) and
  832. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  833. (taicpu(hp1).ops>0) and
  834. (taicpu(hp1).oper[0]^.typ = top_ref) and
  835. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  836. GetNextInstruction(hp1, hp2) and
  837. (hp2.typ=ait_instruction) and
  838. (not taicpu(hp2).is_jmp) and
  839. GetNextInstruction(hp2, hp3) and
  840. (hp3.typ=ait_label) and
  841. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  842. begin
  843. DebugMsg('Peephole SbiJmp2Sbi performed',p);
  844. if taicpu(p).opcode=A_SBIC then
  845. taicpu(p).opcode:=A_SBIS
  846. else
  847. taicpu(p).opcode:=A_SBIC;
  848. tai_label(hp3).labsym.decrefs;
  849. AsmL.remove(hp1);
  850. taicpu(hp1).Free;
  851. result:=true;
  852. end
  853. {
  854. Turn
  855. sbiX X, y
  856. jmp .L1
  857. jmp .L2
  858. .L1:
  859. op
  860. .L2:
  861. into
  862. sbiX X,y
  863. .L1:
  864. op
  865. .L2:
  866. }
  867. else if GetNextInstruction(p, hp1) and
  868. (hp1.typ=ait_instruction) and
  869. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  870. (taicpu(hp1).ops>0) and
  871. (taicpu(hp1).oper[0]^.typ = top_ref) and
  872. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  873. GetNextInstruction(hp1, hp2) and
  874. (hp2.typ=ait_instruction) and
  875. (taicpu(hp2).opcode in [A_JMP,A_RJMP]) and
  876. (taicpu(hp2).ops>0) and
  877. (taicpu(hp2).oper[0]^.typ = top_ref) and
  878. (taicpu(hp2).oper[0]^.ref^.symbol is TAsmLabel) and
  879. GetNextInstruction(hp2, hp3) and
  880. (hp3.typ=ait_label) and
  881. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) and
  882. GetNextInstruction(hp3, hp4) and
  883. (hp4.typ=ait_instruction) and
  884. GetNextInstruction(hp4, hp5) and
  885. (hp3.typ=ait_label) and
  886. (taicpu(hp2).oper[0]^.ref^.symbol=tai_label(hp5).labsym) then
  887. begin
  888. DebugMsg('Peephole SbiJmpJmp2Sbi performed',p);
  889. tai_label(hp3).labsym.decrefs;
  890. tai_label(hp5).labsym.decrefs;
  891. AsmL.remove(hp1);
  892. taicpu(hp1).Free;
  893. AsmL.remove(hp2);
  894. taicpu(hp2).Free;
  895. result:=true;
  896. end;
  897. end;
  898. end;
  899. end;
  900. end;
  901. end;
  902. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  903. begin
  904. end;
  905. begin
  906. casmoptimizer:=TCpuAsmOptimizer;
  907. End.