cgcpu.pas 45 KB

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  1. {
  2. Copyright (c) 2008 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the code generator for the AVR
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,symtype,symdef,
  23. cgbase,cgutils,cgobj,
  24. aasmbase,aasmcpu,aasmtai,aasmdata,
  25. parabase,
  26. cpubase,cpuinfo,node,cg64f32,rgcpu;
  27. type
  28. { tcgavr }
  29. tcgavr = class(tcg)
  30. { true, if the next arithmetic operation should modify the flags }
  31. cgsetflags : boolean;
  32. procedure init_register_allocators;override;
  33. procedure done_register_allocators;override;
  34. function getintregister(list:TAsmList;size:Tcgsize):Tregister;override;
  35. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : aint;const paraloc : TCGPara);override;
  36. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);override;
  37. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);override;
  38. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);override;
  39. procedure a_call_reg(list : TAsmList;reg: tregister);override;
  40. procedure a_call_ref(list : TAsmList;ref: treference);override;
  41. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; reg: TRegister); override;
  42. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; src, dst: TRegister); override;
  43. { move instructions }
  44. procedure a_load_const_reg(list : TAsmList; size: tcgsize; a : aint;reg : tregister);override;
  45. procedure a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);override;
  46. procedure a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);override;
  47. procedure a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
  48. { comparison operations }
  49. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  50. l : tasmlabel);override;
  51. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
  52. procedure a_jmp_name(list : TAsmList;const s : string); override;
  53. procedure a_jmp_always(list : TAsmList;l: tasmlabel); override;
  54. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); override;
  55. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister); override;
  56. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);override;
  57. procedure g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean); override;
  58. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  59. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);override;
  60. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);override;
  61. procedure g_concatcopy_move(list : TAsmList;const source,dest : treference;len : aint);
  62. procedure g_concatcopy_internal(list : TAsmList;const source,dest : treference;len : aint;aligned : boolean);
  63. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef); override;
  64. procedure g_save_registers(list : TAsmList);override;
  65. procedure g_restore_registers(list : TAsmList);override;
  66. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  67. procedure fixref(list : TAsmList;var ref : treference);
  68. function normalize_ref(list:TAsmList;ref: treference):treference;
  69. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
  70. procedure emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  71. procedure a_adjust_sp(list: TAsmList; value: longint);
  72. end;
  73. tcg64favr = class(tcg64f32)
  74. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
  75. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
  76. end;
  77. procedure create_codegen;
  78. const
  79. TOpCG2AsmOp: Array[topcg] of TAsmOp = (A_NONE,A_MOV,A_ADD,A_AND,A_NONE,
  80. A_NONE,A_MUL,A_MULS,A_NEG,A_COM,A_OR,
  81. A_ASR,A_LSL,A_LSR,A_SUB,A_EOR,A_ROL,A_ROR);
  82. implementation
  83. uses
  84. globals,verbose,systems,cutils,
  85. fmodule,
  86. symconst,symsym,
  87. tgobj,
  88. procinfo,cpupi,
  89. paramgr;
  90. procedure tcgavr.init_register_allocators;
  91. begin
  92. inherited init_register_allocators;
  93. rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
  94. [RS_R0,RS_R2,RS_R3,RS_R4,RS_R5,RS_R6,RS_R7,RS_R8,RS_R9,
  95. RS_R10,RS_R11,RS_R12,RS_R13,RS_R14,RS_R15,RS_R16,RS_R17,RS_R18,RS_R19,
  96. RS_R20,RS_R21,RS_R22,RS_R23,RS_R24,RS_R25],first_int_imreg,[]);
  97. { rg[R_ADDRESSREGISTER]:=trgintcpu.create(R_ADDRESSREGISTER,R_SUBWHOLE,
  98. [RS_R26,RS_R30],first_int_imreg,[]); }
  99. end;
  100. procedure tcgavr.done_register_allocators;
  101. begin
  102. rg[R_INTREGISTER].free;
  103. // rg[R_ADDRESSREGISTER].free;
  104. inherited done_register_allocators;
  105. end;
  106. function tcgavr.getintregister(list: TAsmList; size: Tcgsize): Tregister;
  107. var
  108. tmp1,tmp2,tmp3 : TRegister;
  109. begin
  110. case size of
  111. OS_8,OS_S8:
  112. Result:=inherited getintregister(list, size);
  113. OS_16,OS_S16:
  114. begin
  115. Result:=inherited getintregister(list, OS_8);
  116. { ensure that the high register can be retrieved by
  117. GetNextReg
  118. }
  119. if inherited getintregister(list, OS_8)<>GetNextReg(Result) then
  120. internalerror(2011021331);
  121. end;
  122. OS_32,OS_S32:
  123. begin
  124. Result:=inherited getintregister(list, OS_8);
  125. tmp1:=inherited getintregister(list, OS_8);
  126. { ensure that the high register can be retrieved by
  127. GetNextReg
  128. }
  129. if tmp1<>GetNextReg(Result) then
  130. internalerror(2011021332);
  131. tmp2:=inherited getintregister(list, OS_8);
  132. { ensure that the upper register can be retrieved by
  133. GetNextReg
  134. }
  135. if tmp2<>GetNextReg(tmp1) then
  136. internalerror(2011021333);
  137. tmp3:=inherited getintregister(list, OS_8);
  138. { ensure that the upper register can be retrieved by
  139. GetNextReg
  140. }
  141. if tmp3<>GetNextReg(tmp2) then
  142. internalerror(2011021334);
  143. end;
  144. else
  145. internalerror(2011021330);
  146. end;
  147. end;
  148. procedure tcgavr.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : aint;const paraloc : TCGPara);
  149. var
  150. ref: treference;
  151. begin
  152. paraloc.check_simple_location;
  153. paramanager.allocparaloc(list,paraloc.location);
  154. case paraloc.location^.loc of
  155. LOC_REGISTER,LOC_CREGISTER:
  156. a_load_const_reg(list,size,a,paraloc.location^.register);
  157. LOC_REFERENCE:
  158. begin
  159. reference_reset(ref,paraloc.alignment);
  160. ref.base:=paraloc.location^.reference.index;
  161. ref.offset:=paraloc.location^.reference.offset;
  162. a_load_const_ref(list,size,a,ref);
  163. end;
  164. else
  165. internalerror(2002081101);
  166. end;
  167. end;
  168. procedure tcgavr.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);
  169. var
  170. tmpref, ref: treference;
  171. location: pcgparalocation;
  172. sizeleft: aint;
  173. begin
  174. location := paraloc.location;
  175. tmpref := r;
  176. sizeleft := paraloc.intsize;
  177. while assigned(location) do
  178. begin
  179. paramanager.allocparaloc(list,location);
  180. case location^.loc of
  181. LOC_REGISTER,LOC_CREGISTER:
  182. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  183. LOC_REFERENCE:
  184. begin
  185. reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment);
  186. { doubles in softemu mode have a strange order of registers and references }
  187. if location^.size=OS_32 then
  188. g_concatcopy(list,tmpref,ref,4)
  189. else
  190. begin
  191. g_concatcopy(list,tmpref,ref,sizeleft);
  192. if assigned(location^.next) then
  193. internalerror(2005010710);
  194. end;
  195. end;
  196. LOC_VOID:
  197. begin
  198. // nothing to do
  199. end;
  200. else
  201. internalerror(2002081103);
  202. end;
  203. inc(tmpref.offset,tcgsize2size[location^.size]);
  204. dec(sizeleft,tcgsize2size[location^.size]);
  205. location := location^.next;
  206. end;
  207. end;
  208. procedure tcgavr.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);
  209. var
  210. ref: treference;
  211. tmpreg: tregister;
  212. begin
  213. paraloc.check_simple_location;
  214. paramanager.allocparaloc(list,paraloc.location);
  215. case paraloc.location^.loc of
  216. LOC_REGISTER,LOC_CREGISTER:
  217. a_loadaddr_ref_reg(list,r,paraloc.location^.register);
  218. LOC_REFERENCE:
  219. begin
  220. reference_reset(ref,paraloc.alignment);
  221. ref.base := paraloc.location^.reference.index;
  222. ref.offset := paraloc.location^.reference.offset;
  223. tmpreg := getintregister(list,OS_ADDR);
  224. a_loadaddr_ref_reg(list,r,tmpreg);
  225. a_load_reg_ref(list,OS_ADDR,OS_ADDR,tmpreg,ref);
  226. end;
  227. else
  228. internalerror(2002080701);
  229. end;
  230. end;
  231. procedure tcgavr.a_call_name(list : TAsmList;const s : string; weak: boolean);
  232. begin
  233. list.concat(taicpu.op_sym(A_RCALL,current_asmdata.RefAsmSymbol(s)));
  234. {
  235. the compiler does not properly set this flag anymore in pass 1, and
  236. for now we only need it after pass 2 (I hope) (JM)
  237. if not(pi_do_call in current_procinfo.flags) then
  238. internalerror(2003060703);
  239. }
  240. include(current_procinfo.flags,pi_do_call);
  241. end;
  242. procedure tcgavr.a_call_reg(list : TAsmList;reg: tregister);
  243. begin
  244. a_reg_alloc(list,NR_ZLO);
  245. a_reg_alloc(list,NR_ZHI);
  246. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZLO,reg));
  247. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZHI,GetHigh(reg)));
  248. list.concat(taicpu.op_none(A_ICALL));
  249. a_reg_dealloc(list,NR_ZLO);
  250. a_reg_dealloc(list,NR_ZHI);
  251. include(current_procinfo.flags,pi_do_call);
  252. end;
  253. procedure tcgavr.a_call_ref(list : TAsmList;ref: treference);
  254. begin
  255. a_reg_alloc(list,NR_ZLO);
  256. a_reg_alloc(list,NR_ZHI);
  257. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,NR_ZLO);
  258. list.concat(taicpu.op_none(A_ICALL));
  259. a_reg_dealloc(list,NR_ZLO);
  260. a_reg_dealloc(list,NR_ZHI);
  261. include(current_procinfo.flags,pi_do_call);
  262. end;
  263. procedure tcgavr.a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; reg: TRegister);
  264. var
  265. mask : qword;
  266. shift : byte;
  267. i : byte;
  268. tmpreg : tregister;
  269. begin
  270. mask:=$ff;
  271. shift:=0;
  272. case op of
  273. OP_OR:
  274. begin
  275. for i:=1 to tcgsize2size[size] do
  276. begin
  277. list.concat(taicpu.op_reg_const(A_ORI,reg,(a and mask) shr shift));
  278. reg:=GetNextReg(reg);
  279. mask:=mask shl 8;
  280. inc(shift,8);
  281. end;
  282. end;
  283. OP_AND:
  284. begin
  285. for i:=1 to tcgsize2size[size] do
  286. begin
  287. list.concat(taicpu.op_reg_const(A_ANDI,reg,(a and mask) shr shift));
  288. reg:=GetNextReg(reg);
  289. mask:=mask shl 8;
  290. inc(shift,8);
  291. end;
  292. end;
  293. OP_SUB:
  294. begin
  295. list.concat(taicpu.op_reg_const(A_SUBI,reg,a));
  296. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  297. begin
  298. for i:=2 to tcgsize2size[size] do
  299. begin
  300. reg:=GetNextReg(reg);
  301. mask:=mask shl 8;
  302. inc(shift,8);
  303. list.concat(taicpu.op_reg_const(A_SBCI,reg,(a and mask) shr shift));
  304. end;
  305. end;
  306. end;
  307. else
  308. begin
  309. tmpreg:=getintregister(list,size);
  310. a_load_const_reg(list,size,a,tmpreg);
  311. a_op_reg_reg(list,op,size,tmpreg,reg);
  312. end;
  313. end;
  314. end;
  315. procedure tcgavr.a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; src, dst: TRegister);
  316. var
  317. tmpreg: tregister;
  318. i : integer;
  319. instr : taicpu;
  320. paraloc1,paraloc2,paraloc3 : TCGPara;
  321. begin
  322. case op of
  323. OP_ADD:
  324. begin
  325. list.concat(taicpu.op_reg_reg(A_ADD,dst,src));
  326. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  327. begin
  328. for i:=2 to tcgsize2size[size] do
  329. begin
  330. dst:=GetNextReg(dst);
  331. src:=GetNextReg(src);
  332. list.concat(taicpu.op_reg_reg(A_ADC,dst,src));
  333. end;
  334. end
  335. else
  336. end;
  337. OP_SUB:
  338. begin
  339. list.concat(taicpu.op_reg_reg(A_SUB,dst,src));
  340. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  341. begin
  342. for i:=2 to tcgsize2size[size] do
  343. begin
  344. dst:=GetNextReg(dst);
  345. src:=GetNextReg(src);
  346. list.concat(taicpu.op_reg_reg(A_SBC,dst,src));
  347. end;
  348. end;
  349. end;
  350. OP_NEG:
  351. begin
  352. if src<>dst then
  353. a_load_reg_reg(list,size,size,src,dst);
  354. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  355. begin
  356. tmpreg:=GetNextReg(dst);
  357. for i:=2 to tcgsize2size[size] do
  358. begin
  359. list.concat(taicpu.op_reg(A_COM,tmpreg));
  360. tmpreg:=GetNextReg(tmpreg);
  361. end;
  362. list.concat(taicpu.op_reg(A_NEG,dst));
  363. tmpreg:=GetNextReg(dst);
  364. for i:=2 to tcgsize2size[size] do
  365. begin
  366. list.concat(taicpu.op_const_reg(A_SBCI,-1,dst));
  367. tmpreg:=GetNextReg(tmpreg);
  368. end;
  369. end
  370. else
  371. list.concat(taicpu.op_reg(A_NEG,dst));
  372. end;
  373. OP_NOT:
  374. begin
  375. for i:=1 to tcgsize2size[size] do
  376. begin
  377. if src<>dst then
  378. a_load_reg_reg(list,OS_8,OS_8,src,dst);
  379. list.concat(taicpu.op_reg(A_COM,dst));
  380. src:=GetNextReg(src);
  381. dst:=GetNextReg(dst);
  382. end;
  383. end;
  384. OP_MUL,OP_IMUL:
  385. begin
  386. if size in [OS_8,OS_S8] then
  387. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src))
  388. else if size=OS_16 then
  389. begin
  390. paraloc1.init;
  391. paraloc2.init;
  392. paraloc3.init;
  393. paramanager.getintparaloc(pocall_default,1,paraloc1);
  394. paramanager.getintparaloc(pocall_default,2,paraloc2);
  395. paramanager.getintparaloc(pocall_default,3,paraloc3);
  396. a_load_const_cgpara(list,OS_8,0,paraloc3);
  397. a_load_reg_cgpara(list,OS_16,src,paraloc2);
  398. a_load_reg_cgpara(list,OS_16,dst,paraloc1);
  399. paramanager.freecgpara(list,paraloc3);
  400. paramanager.freecgpara(list,paraloc2);
  401. paramanager.freecgpara(list,paraloc1);
  402. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  403. a_call_name(list,'FPC_MUL_WORD',false);
  404. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  405. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  406. cg.a_load_reg_reg(list,OS_16,OS_16,NR_FUNCTION_RESULT_REG,dst);
  407. paraloc3.done;
  408. paraloc2.done;
  409. paraloc1.done;
  410. end
  411. else
  412. internalerror(2011022002);
  413. end;
  414. OP_DIV,OP_IDIV:
  415. { special stuff, needs separate handling inside code }
  416. { generator }
  417. internalerror(2011022001);
  418. OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR:
  419. begin
  420. { TODO : Shift operators }
  421. end;
  422. OP_AND,OP_OR,OP_XOR:
  423. begin
  424. for i:=1 to tcgsize2size[size] do
  425. begin
  426. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  427. dst:=GetNextReg(dst);
  428. src:=GetNextReg(src);
  429. end;
  430. end;
  431. else
  432. internalerror(2011022004);
  433. end;
  434. end;
  435. procedure tcgavr.a_load_const_reg(list : TAsmList; size: tcgsize; a : aint;reg : tregister);
  436. var
  437. mask : qword;
  438. shift : byte;
  439. i : byte;
  440. begin
  441. mask:=$ff;
  442. shift:=0;
  443. for i:=1 to tcgsize2size[size] do
  444. begin
  445. list.concat(taicpu.op_reg_const(A_LDI,reg,(qword(a) and mask) shr shift));
  446. mask:=mask shl 8;
  447. inc(shift,8);
  448. reg:=GetNextReg(reg);
  449. end;
  450. end;
  451. function tcgavr.normalize_ref(list:TAsmList;ref: treference):treference;
  452. var
  453. tmpreg : tregister;
  454. tmpref : treference;
  455. l : tasmlabel;
  456. begin
  457. tmpreg:=NR_NO;
  458. Result:=ref;
  459. if ref.addressmode<>AM_UNCHANGED then
  460. internalerror(2011021701);
  461. { Be sure to have a base register }
  462. if (ref.base=NR_NO) then
  463. begin
  464. { only symbol+offset? }
  465. if ref.index=NR_NO then
  466. exit;
  467. ref.base:=ref.index;
  468. ref.index:=NR_NO;
  469. end;
  470. if assigned(ref.symbol) or (ref.offset<>0) then
  471. begin
  472. tmpreg:=getaddressregister(list);
  473. reference_reset(tmpref,0);
  474. tmpref.symbol:=ref.symbol;
  475. tmpref.offset:=lo(word(ref.offset));
  476. tmpref.refaddr:=addr_lo8;
  477. list.concat(taicpu.op_reg_ref(A_LDI,tmpreg,tmpref));
  478. tmpref.offset:=hi(word(ref.offset));
  479. tmpref.refaddr:=addr_hi8;
  480. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(tmpreg),tmpref));
  481. if (ref.base<>NR_NO) then
  482. begin
  483. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  484. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  485. end;
  486. if (ref.index<>NR_NO) then
  487. begin
  488. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  489. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  490. end;
  491. ref.base:=tmpreg;
  492. ref.index:=NR_NO;
  493. end
  494. else if (ref.base<>NR_NO) and (ref.index<>NR_NO) then
  495. begin
  496. tmpreg:=getaddressregister(list);
  497. list.concat(taicpu.op_reg_reg(A_MOVW,tmpreg,ref.index));
  498. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  499. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  500. ref.base:=tmpreg;
  501. ref.index:=NR_NO;
  502. end;
  503. Result:=ref;
  504. end;
  505. procedure tcgavr.a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);
  506. var
  507. href : treference;
  508. conv_done: boolean;
  509. tmpreg : tregister;
  510. i : integer;
  511. begin
  512. href:=normalize_ref(list,Ref);
  513. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  514. internalerror(2011021307);
  515. conv_done:=false;
  516. if tosize<>fromsize then
  517. begin
  518. conv_done:=true;
  519. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  520. fromsize:=tosize;
  521. case fromsize of
  522. OS_8:
  523. begin
  524. if (href.base<>NR_NO) and (tcgsize2size[tosize]>1) then
  525. href.addressmode:=AM_POSTINCREMENT;
  526. list.concat(taicpu.op_ref_reg(A_ST,href,reg));
  527. for i:=2 to tcgsize2size[tosize] do
  528. begin
  529. if (href.offset<>0) or assigned(href.symbol) then
  530. inc(href.offset);
  531. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  532. href.addressmode:=AM_POSTINCREMENT
  533. else
  534. href.addressmode:=AM_UNCHANGED;
  535. list.concat(taicpu.op_ref_reg(A_ST,href,NR_R1));
  536. end;
  537. end;
  538. OS_S8:
  539. begin
  540. if (href.base<>NR_NO) and (tcgsize2size[tosize]>1) then
  541. href.addressmode:=AM_POSTINCREMENT;
  542. list.concat(taicpu.op_ref_reg(A_ST,href,reg));
  543. if tcgsize2size[tosize]>1 then
  544. begin
  545. tmpreg:=getintregister(list,OS_8);
  546. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  547. list.concat(taicpu.op_reg_const(A_SBIC,reg,7));
  548. list.concat(taicpu.op_reg(A_COM,tmpreg));
  549. for i:=2 to tcgsize2size[tosize] do
  550. begin
  551. if (href.offset<>0) or assigned(href.symbol) then
  552. inc(href.offset);
  553. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  554. href.addressmode:=AM_POSTINCREMENT
  555. else
  556. href.addressmode:=AM_UNCHANGED;
  557. list.concat(taicpu.op_ref_reg(A_ST,href,tmpreg));
  558. end;
  559. end;
  560. end;
  561. OS_16:
  562. begin
  563. if (href.base<>NR_NO) and (tcgsize2size[tosize]>1) then
  564. href.addressmode:=AM_POSTINCREMENT;
  565. list.concat(taicpu.op_ref_reg(A_ST,href,reg));
  566. if (href.offset<>0) or assigned(href.symbol) then
  567. inc(href.offset)
  568. else if (href.base<>NR_NO) and (tcgsize2size[fromsize]>2) then
  569. href.addressmode:=AM_POSTINCREMENT
  570. else
  571. href.addressmode:=AM_UNCHANGED;
  572. reg:=GetNextReg(reg);
  573. list.concat(taicpu.op_ref_reg(A_ST,href,reg));
  574. for i:=3 to tcgsize2size[tosize] do
  575. begin
  576. if (href.offset<>0) or assigned(href.symbol) then
  577. inc(href.offset);
  578. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  579. href.addressmode:=AM_POSTINCREMENT
  580. else
  581. href.addressmode:=AM_UNCHANGED;
  582. list.concat(taicpu.op_ref_reg(A_ST,href,NR_R1));
  583. end;
  584. end;
  585. OS_S16:
  586. begin
  587. if (href.base<>NR_NO) and (tcgsize2size[tosize]>1) then
  588. href.addressmode:=AM_POSTINCREMENT;
  589. list.concat(taicpu.op_ref_reg(A_ST,href,reg));
  590. if (href.offset<>0) or assigned(href.symbol) then
  591. inc(href.offset)
  592. else if (href.base<>NR_NO) and (tcgsize2size[fromsize]>2) then
  593. href.addressmode:=AM_POSTINCREMENT
  594. else
  595. href.addressmode:=AM_UNCHANGED;
  596. reg:=GetNextReg(reg);
  597. list.concat(taicpu.op_ref_reg(A_ST,href,reg));
  598. if tcgsize2size[tosize]>2 then
  599. begin
  600. tmpreg:=getintregister(list,OS_8);
  601. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  602. list.concat(taicpu.op_reg_const(A_SBIC,reg,7));
  603. list.concat(taicpu.op_reg(A_COM,tmpreg));
  604. for i:=3 to tcgsize2size[tosize] do
  605. begin
  606. if (href.offset<>0) or assigned(href.symbol) then
  607. inc(href.offset);
  608. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  609. href.addressmode:=AM_POSTINCREMENT
  610. else
  611. href.addressmode:=AM_UNCHANGED;
  612. list.concat(taicpu.op_ref_reg(A_ST,href,tmpreg));
  613. end;
  614. end;
  615. end;
  616. else
  617. conv_done:=false;
  618. end;
  619. end;
  620. if not conv_done then
  621. begin
  622. for i:=1 to tcgsize2size[fromsize] do
  623. begin
  624. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  625. href.addressmode:=AM_POSTINCREMENT
  626. else
  627. href.addressmode:=AM_UNCHANGED;
  628. list.concat(taicpu.op_ref_reg(A_ST,href,reg));
  629. if (href.offset<>0) or assigned(href.symbol) then
  630. inc(href.offset);
  631. reg:=GetNextReg(reg);
  632. end;
  633. end;
  634. end;
  635. procedure tcgavr.a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;
  636. const Ref : treference;reg : tregister);
  637. var
  638. href : treference;
  639. conv_done: boolean;
  640. tmpreg : tregister;
  641. i : integer;
  642. begin
  643. href:=normalize_ref(list,Ref);
  644. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  645. internalerror(2011021307);
  646. conv_done:=false;
  647. if tosize<>fromsize then
  648. begin
  649. conv_done:=true;
  650. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  651. fromsize:=tosize;
  652. case fromsize of
  653. OS_8:
  654. begin
  655. list.concat(taicpu.op_reg_ref(A_LD,reg,href));
  656. for i:=2 to tcgsize2size[tosize] do
  657. begin
  658. reg:=GetNextReg(reg);
  659. list.concat(taicpu.op_reg(A_CLR,reg));
  660. end;
  661. end;
  662. OS_S8:
  663. begin
  664. list.concat(taicpu.op_reg_ref(A_LD,reg,href));
  665. tmpreg:=reg;
  666. if tcgsize2size[tosize]>1 then
  667. begin
  668. reg:=GetNextReg(reg);
  669. list.concat(taicpu.op_reg(A_CLR,reg));
  670. list.concat(taicpu.op_reg_const(A_SBIC,tmpreg,7));
  671. list.concat(taicpu.op_reg(A_COM,reg));
  672. tmpreg:=reg;
  673. for i:=3 to tcgsize2size[tosize] do
  674. begin
  675. reg:=GetNextReg(reg);
  676. emit_mov(list,reg,tmpreg);
  677. end;
  678. end;
  679. end;
  680. OS_16:
  681. begin
  682. if href.base<>NR_NO then
  683. href.addressmode:=AM_POSTINCREMENT;
  684. list.concat(taicpu.op_reg_ref(A_LD,reg,href));
  685. if (href.offset<>0) or assigned(href.symbol) then
  686. inc(href.offset);
  687. href.addressmode:=AM_UNCHANGED;
  688. reg:=GetNextReg(reg);
  689. list.concat(taicpu.op_reg_ref(A_LD,reg,href));
  690. for i:=3 to tcgsize2size[tosize] do
  691. begin
  692. reg:=GetNextReg(reg);
  693. list.concat(taicpu.op_reg(A_CLR,reg));
  694. end;
  695. end;
  696. OS_S16:
  697. begin
  698. if href.base<>NR_NO then
  699. href.addressmode:=AM_POSTINCREMENT;
  700. list.concat(taicpu.op_reg_ref(A_LD,reg,href));
  701. if (href.offset<>0) or assigned(href.symbol) then
  702. inc(href.offset);
  703. href.addressmode:=AM_UNCHANGED;
  704. reg:=GetNextReg(reg);
  705. list.concat(taicpu.op_reg_ref(A_LD,reg,href));
  706. tmpreg:=reg;
  707. reg:=GetNextReg(reg);
  708. list.concat(taicpu.op_reg(A_CLR,reg));
  709. list.concat(taicpu.op_reg_const(A_SBIC,tmpreg,7));
  710. list.concat(taicpu.op_reg(A_COM,reg));
  711. tmpreg:=reg;
  712. for i:=4 to tcgsize2size[tosize] do
  713. begin
  714. reg:=GetNextReg(reg);
  715. emit_mov(list,reg,tmpreg);
  716. end;
  717. end;
  718. else
  719. conv_done:=false;
  720. end;
  721. end;
  722. if not conv_done then
  723. begin
  724. for i:=1 to tcgsize2size[fromsize] do
  725. begin
  726. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  727. href.addressmode:=AM_POSTINCREMENT
  728. else
  729. href.addressmode:=AM_UNCHANGED;
  730. list.concat(taicpu.op_reg_ref(A_LD,reg,href));
  731. if (href.offset<>0) or assigned(href.symbol) then
  732. inc(href.offset);
  733. reg:=GetNextReg(reg);
  734. end;
  735. end;
  736. end;
  737. procedure tcgavr.a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);
  738. var
  739. conv_done: boolean;
  740. tmpreg : tregister;
  741. i : integer;
  742. begin
  743. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  744. internalerror(2011021310);
  745. conv_done:=false;
  746. if tosize<>fromsize then
  747. begin
  748. conv_done:=true;
  749. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  750. fromsize:=tosize;
  751. case fromsize of
  752. OS_8:
  753. begin
  754. emit_mov(list,reg2,reg1);
  755. for i:=2 to tcgsize2size[tosize] do
  756. begin
  757. reg2:=GetNextReg(reg2);
  758. list.concat(taicpu.op_reg(A_CLR,reg2));
  759. end;
  760. end;
  761. OS_S8:
  762. begin
  763. { dest is always at least 16 bit at this point }
  764. emit_mov(list,reg2,reg1);
  765. reg2:=GetNextReg(reg2);
  766. list.concat(taicpu.op_reg(A_CLR,reg2));
  767. list.concat(taicpu.op_reg_const(A_SBIC,reg1,7));
  768. list.concat(taicpu.op_reg(A_COM,reg2));
  769. tmpreg:=reg2;
  770. for i:=3 to tcgsize2size[tosize] do
  771. begin
  772. reg2:=GetNextReg(reg2);
  773. emit_mov(list,reg2,tmpreg);
  774. end;
  775. end;
  776. OS_16:
  777. begin
  778. emit_mov(list,reg2,reg1);
  779. reg1:=GetNextReg(reg1);
  780. reg2:=GetNextReg(reg2);
  781. emit_mov(list,reg2,reg1);
  782. for i:=3 to tcgsize2size[tosize] do
  783. begin
  784. reg2:=GetNextReg(reg2);
  785. list.concat(taicpu.op_reg(A_CLR,reg2));
  786. end;
  787. end;
  788. OS_S16:
  789. begin
  790. { dest is always at least 32 bit at this point }
  791. emit_mov(list,reg2,reg1);
  792. reg1:=GetNextReg(reg1);
  793. reg2:=GetNextReg(reg2);
  794. emit_mov(list,reg2,reg1);
  795. reg2:=GetNextReg(reg2);
  796. list.concat(taicpu.op_reg(A_CLR,reg2));
  797. list.concat(taicpu.op_reg_const(A_SBIC,reg1,7));
  798. list.concat(taicpu.op_reg(A_COM,reg2));
  799. tmpreg:=reg2;
  800. for i:=4 to tcgsize2size[tosize] do
  801. begin
  802. reg2:=GetNextReg(reg2);
  803. emit_mov(list,reg2,tmpreg);
  804. end;
  805. end;
  806. else
  807. conv_done:=false;
  808. end;
  809. end;
  810. if not conv_done and (reg1<>reg2) then
  811. begin
  812. for i:=1 to tcgsize2size[fromsize] do
  813. begin
  814. emit_mov(list,reg2,reg1);
  815. reg1:=GetNextReg(reg1);
  816. reg2:=GetNextReg(reg2);
  817. end;
  818. end;
  819. end;
  820. { comparison operations }
  821. procedure tcgavr.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  822. l : tasmlabel);
  823. begin
  824. { TODO : a_cmp_const_reg_label }
  825. end;
  826. procedure tcgavr.a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
  827. begin
  828. { TODO : a_cmp_reg_reg_label }
  829. end;
  830. procedure tcgavr.a_jmp_name(list : TAsmList;const s : string);
  831. begin
  832. internalerror(2011021313);
  833. end;
  834. procedure tcgavr.a_jmp_always(list : TAsmList;l: tasmlabel);
  835. var
  836. ai : taicpu;
  837. begin
  838. ai:=taicpu.op_sym(A_JMP,l);
  839. ai.is_jmp:=true;
  840. list.concat(ai);
  841. end;
  842. procedure tcgavr.a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel);
  843. var
  844. ai : taicpu;
  845. begin
  846. ai:=setcondition(taicpu.op_sym(A_BRxx,l),flags_to_cond(f));
  847. ai.is_jmp:=true;
  848. list.concat(ai);
  849. end;
  850. procedure tcgavr.g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister);
  851. begin
  852. { TODO : implement g_flags2reg }
  853. end;
  854. procedure tcgavr.a_adjust_sp(list : TAsmList; value : longint);
  855. var
  856. i : integer;
  857. begin
  858. case value of
  859. 0:
  860. ;
  861. -14..-1:
  862. begin
  863. if ((-value) mod 2)<>0 then
  864. list.concat(taicpu.op_reg(A_PUSH,NR_R0));
  865. for i:=1 to (-value) div 2 do
  866. list.concat(taicpu.op_const(A_RCALL,0));
  867. end;
  868. 1..7:
  869. begin
  870. for i:=1 to value do
  871. list.concat(taicpu.op_reg(A_POP,NR_R0));
  872. end;
  873. else
  874. begin
  875. list.concat(taicpu.op_reg_const(A_SUBI,NR_R28,lo(word(-value))));
  876. list.concat(taicpu.op_reg_const(A_SBCI,NR_R29,hi(word(-value))));
  877. // get SREG
  878. list.concat(taicpu.op_reg_const(A_IN,NR_R0,NIO_SREG));
  879. // block interrupts
  880. list.concat(taicpu.op_none(A_CLI));
  881. // write high SP
  882. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_HI,NR_R29));
  883. // release interrupts
  884. list.concat(taicpu.op_const_reg(A_OUT,NIO_SREG,NR_R0));
  885. // write low SP
  886. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_LO,NR_R28));
  887. end;
  888. end;
  889. end;
  890. procedure tcgavr.g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);
  891. var
  892. regs : tcpuregisterset;
  893. reg : tsuperregister;
  894. begin
  895. if not(nostackframe) then
  896. begin
  897. { save int registers }
  898. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  899. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  900. regs:=regs+[RS_R28,RS_R29];
  901. for reg:=RS_R31 downto RS_R0 do
  902. if reg in regs then
  903. list.concat(taicpu.op_reg(A_PUSH,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  904. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  905. begin
  906. list.concat(taicpu.op_reg_const(A_IN,NR_R28,NIO_SP_LO));
  907. list.concat(taicpu.op_reg_const(A_IN,NR_R29,NIO_SP_HI));
  908. end
  909. else
  910. { the framepointer cannot be omitted on avr because sp
  911. is not a register but part of the i/o map
  912. }
  913. internalerror(2011021901);
  914. a_adjust_sp(list,-localsize);
  915. end;
  916. end;
  917. procedure tcgavr.g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean);
  918. var
  919. regs : tcpuregisterset;
  920. reg : TSuperRegister;
  921. LocalSize : longint;
  922. begin
  923. if not(nostackframe) then
  924. begin
  925. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  926. begin
  927. LocalSize:=current_procinfo.calc_stackframe_size;
  928. a_adjust_sp(list,LocalSize);
  929. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  930. for reg:=RS_R0 to RS_R31 do
  931. if reg in regs then
  932. list.concat(taicpu.op_reg(A_POP,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  933. end
  934. else
  935. { the framepointer cannot be omitted on avr because sp
  936. is not a register but part of the i/o map
  937. }
  938. internalerror(2011021902);
  939. end;
  940. list.concat(taicpu.op_none(A_RET));
  941. end;
  942. procedure tcgavr.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  943. begin
  944. { TODO : a_loadaddr_ref_reg }
  945. end;
  946. procedure tcgavr.fixref(list : TAsmList;var ref : treference);
  947. begin
  948. internalerror(2011021320);
  949. end;
  950. procedure tcgavr.g_concatcopy_move(list : TAsmList;const source,dest : treference;len : aint);
  951. var
  952. paraloc1,paraloc2,paraloc3 : TCGPara;
  953. begin
  954. paraloc1.init;
  955. paraloc2.init;
  956. paraloc3.init;
  957. paramanager.getintparaloc(pocall_default,1,paraloc1);
  958. paramanager.getintparaloc(pocall_default,2,paraloc2);
  959. paramanager.getintparaloc(pocall_default,3,paraloc3);
  960. a_load_const_cgpara(list,OS_INT,len,paraloc3);
  961. a_loadaddr_ref_cgpara(list,dest,paraloc2);
  962. a_loadaddr_ref_cgpara(list,source,paraloc1);
  963. paramanager.freecgpara(list,paraloc3);
  964. paramanager.freecgpara(list,paraloc2);
  965. paramanager.freecgpara(list,paraloc1);
  966. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  967. a_call_name_static(list,'FPC_MOVE');
  968. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  969. paraloc3.done;
  970. paraloc2.done;
  971. paraloc1.done;
  972. end;
  973. procedure tcgavr.g_concatcopy_internal(list : TAsmList;const source,dest : treference;len : aint;aligned : boolean);
  974. begin
  975. internalerror(2011021321);
  976. end;
  977. procedure tcgavr.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  978. begin
  979. g_concatcopy_internal(list,source,dest,len,false);
  980. end;
  981. procedure tcgavr.g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);
  982. var
  983. countreg,tmpreg : tregister;
  984. srcref,dstref : treference;
  985. copysize,countregsize : tcgsize;
  986. l : TAsmLabel;
  987. i : longint;
  988. begin
  989. current_asmdata.getjumplabel(l);
  990. if len>16 then
  991. begin
  992. reference_reset(srcref,0);
  993. reference_reset(dstref,0);
  994. { TODO : load refs! }
  995. copysize:=OS_8;
  996. if len<256 then
  997. countregsize:=OS_8
  998. else if len<65536 then
  999. countregsize:=OS_16
  1000. else
  1001. internalerror(2011022007);
  1002. countreg:=getintregister(list,countregsize);
  1003. a_load_const_reg(list,countregsize,len,countreg);
  1004. cg.a_label(list,l);
  1005. tmpreg:=getintregister(list,copysize);
  1006. list.concat(taicpu.op_reg_ref(A_LD,tmpreg,srcref));
  1007. list.concat(taicpu.op_ref_reg(A_ST,dstref,tmpreg));
  1008. a_op_const_reg(list,OP_SUB,countregsize,1,countreg);
  1009. a_jmp_flags(list,F_NE,l);
  1010. end
  1011. else
  1012. begin
  1013. for i:=1 to len do
  1014. begin
  1015. srcref:=normalize_ref(list,source);
  1016. dstref:=normalize_ref(list,source);
  1017. copysize:=OS_8;
  1018. tmpreg:=getintregister(list,copysize);
  1019. if (srcref.base<>NR_NO) and (i<len) then
  1020. srcref.addressmode:=AM_POSTINCREMENT
  1021. else
  1022. srcref.addressmode:=AM_UNCHANGED;
  1023. if (dstref.base<>NR_NO) and (i<len) then
  1024. dstref.addressmode:=AM_POSTINCREMENT
  1025. else
  1026. dstref.addressmode:=AM_UNCHANGED;
  1027. list.concat(taicpu.op_reg_ref(A_LD,tmpreg,srcref));
  1028. list.concat(taicpu.op_ref_reg(A_ST,dstref,tmpreg));
  1029. if (dstref.offset<>0) or assigned(dstref.symbol) then
  1030. inc(dstref.offset);
  1031. if (srcref.offset<>0) or assigned(srcref.symbol) then
  1032. inc(srcref.offset);
  1033. end;
  1034. end;
  1035. end;
  1036. procedure tcgavr.g_overflowCheck(list : TAsmList;const l : tlocation;def : tdef);
  1037. var
  1038. hl : tasmlabel;
  1039. ai : taicpu;
  1040. cond : TAsmCond;
  1041. begin
  1042. if not(cs_check_overflow in current_settings.localswitches) then
  1043. exit;
  1044. current_asmdata.getjumplabel(hl);
  1045. if not ((def.typ=pointerdef) or
  1046. ((def.typ=orddef) and
  1047. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,pasbool]))) then
  1048. cond:=C_VC
  1049. else
  1050. cond:=C_CC;
  1051. ai:=Taicpu.Op_Sym(A_BRxx,hl);
  1052. ai.SetCondition(cond);
  1053. ai.is_jmp:=true;
  1054. list.concat(ai);
  1055. a_call_name(list,'FPC_OVERFLOW',false);
  1056. a_label(list,hl);
  1057. end;
  1058. procedure tcgavr.g_save_registers(list: TAsmList);
  1059. begin
  1060. { this is done by the entry code }
  1061. end;
  1062. procedure tcgavr.g_restore_registers(list: TAsmList);
  1063. begin
  1064. { this is done by the exit code }
  1065. end;
  1066. procedure tcgavr.a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  1067. var
  1068. ai : taicpu;
  1069. begin
  1070. { TODO : fix a_jmp_cond }
  1071. {
  1072. ai:=Taicpu.Op_sym(A_BRxx,l);
  1073. case cond of
  1074. OC_EQ:
  1075. ai.SetCondition(C_EQ);
  1076. OC_GT
  1077. OC_LT
  1078. OC_GTE
  1079. OC_LTE
  1080. OC_NE
  1081. OC_BE
  1082. OC_B
  1083. OC_AE
  1084. OC_A:
  1085. ai.is_jmp:=true;
  1086. list.concat(ai);
  1087. }
  1088. end;
  1089. procedure tcgavr.g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);
  1090. begin
  1091. internalerror(2011021324);
  1092. end;
  1093. procedure tcgavr.emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  1094. var
  1095. instr: taicpu;
  1096. begin
  1097. instr:=taicpu.op_reg_reg(A_MOV,reg2,reg1);
  1098. list.Concat(instr);
  1099. { Notify the register allocator that we have written a move instruction so
  1100. it can try to eliminate it. }
  1101. add_move_instruction(instr);
  1102. end;
  1103. procedure tcg64favr.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
  1104. begin
  1105. { TODO : a_op64_reg_reg }
  1106. end;
  1107. procedure tcg64favr.a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);
  1108. begin
  1109. { TODO : a_op64_const_reg }
  1110. end;
  1111. procedure create_codegen;
  1112. begin
  1113. cg:=tcgavr.create;
  1114. cg64:=tcg64favr.create;
  1115. end;
  1116. end.