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a64att.inc
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3dff78621c
* Aarch64: UTX/STX instructions include now the postfix, so it is the same as for ARM
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5 years ago |
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a64atts.inc
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3dff78621c
* Aarch64: UTX/STX instructions include now the postfix, so it is the same as for ARM
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5 years ago |
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a64ins.dat
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3dff78621c
* Aarch64: UTX/STX instructions include now the postfix, so it is the same as for ARM
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5 years ago |
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a64nop.inc
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0197b84b7f
+ instruction table generator for arm64
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13 years ago |
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a64op.inc
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3dff78621c
* Aarch64: UTX/STX instructions include now the postfix, so it is the same as for ARM
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5 years ago |
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a64reg.dat
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69786ffe73
somehow committing went wrong, second part of last commit:
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6 years ago |
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a64tab.inc
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585e4a9a14
* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
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10 years ago |
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aasmcpu.pas
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1fb2d9540c
* allow ADD instructions with a page offset load with either a symbol or a base register
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5 years ago |
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agcpugas.pas
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042aae2455
* the clang assembler does not provide support for the SEH directives we need (only the LLVM backend would be able to use them), thus we need to manually convert them to data sections
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5 years ago |
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aoptcpu.pas
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099faf2d2b
* factored out and improved TARMAsmOptimizer.RedundantMovProcess
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5 years ago |
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aoptcpub.pas
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281b3ad276
* fix case completeness and unreachable code warnings in compiler that would
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6 years ago |
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aoptcpud.pas
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e1af3ecc5d
+ assembler optimizer unit skeleton
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13 years ago |
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cgcpu.pas
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2b59000d56
+ implement compiler support for SEH on Win64
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5 years ago |
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cpubase.pas
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9bcff94e9e
* factored out TARMAsmOptimizer.OptPass1UXTB
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5 years ago |
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cpuinfo.pas
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592df7fa59
* disable cs_opt_regvar on all platforms when compiled for LLVM (LLVM does
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5 years ago |
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cpunode.pas
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2b59000d56
+ implement compiler support for SEH on Win64
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5 years ago |
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cpupara.pas
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3abdec9c95
* LLVM/AArch64: don't perform the parameter location extension workarounds
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5 years ago |
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cpupi.pas
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2b59000d56
+ implement compiler support for SEH on Win64
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5 years ago |
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cputarg.pas
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3af74d2fd2
+ implement initial compiler support for Win64 on Aarch64
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5 years ago |
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hlcgcpu.pas
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3fee990218
* on Mach-O, PECOFF and ELF platforms, write local symbols as hidden/
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6 years ago |
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itcpugas.pas
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046184dfe9
+ ARM64 GAS instruction table unit
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13 years ago |
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ncpuadd.pas
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078595be4c
+ support for software floating point exception handling on AArch64 (-CE)
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6 years ago |
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ncpucnv.pas
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4357caaad8
* Removed unused local vars.
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6 years ago |
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ncpucon.pas
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a019536cd5
* avoid that -0.0 is handled by the eor optimization
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6 years ago |
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ncpuflw.pas
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2b59000d56
+ implement compiler support for SEH on Win64
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5 years ago |
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ncpuinl.pas
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078595be4c
+ support for software floating point exception handling on AArch64 (-CE)
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6 years ago |
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ncpumat.pas
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e50c4f6373
+ AAarch64: optimize divisions by constant
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5 years ago |
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ncpumem.pas
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4686f61002
* keep track of the temp position separately from the offset in references,
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7 years ago |
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ncpuset.pas
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fa2e751f9f
+ AArch64: implementation of taarch64casenode.genlinearlist
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6 years ago |
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ra64con.inc
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69786ffe73
somehow committing went wrong, second part of last commit:
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6 years ago |
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ra64dwa.inc
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69786ffe73
somehow committing went wrong, second part of last commit:
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6 years ago |
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ra64nor.inc
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69786ffe73
somehow committing went wrong, second part of last commit:
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6 years ago |
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ra64num.inc
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69786ffe73
somehow committing went wrong, second part of last commit:
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6 years ago |
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ra64rni.inc
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69786ffe73
somehow committing went wrong, second part of last commit:
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6 years ago |
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ra64sri.inc
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69786ffe73
somehow committing went wrong, second part of last commit:
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6 years ago |
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ra64sta.inc
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69786ffe73
somehow committing went wrong, second part of last commit:
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6 years ago |
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ra64std.inc
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69786ffe73
somehow committing went wrong, second part of last commit:
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6 years ago |
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ra64sup.inc
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69786ffe73
somehow committing went wrong, second part of last commit:
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6 years ago |
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racpu.pas
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281b3ad276
* fix case completeness and unreachable code warnings in compiler that would
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6 years ago |
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racpugas.pas
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2b59000d56
+ implement compiler support for SEH on Win64
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5 years ago |
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rgcpu.pas
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281b3ad276
* fix case completeness and unreachable code warnings in compiler that would
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6 years ago |
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symcpu.pas
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7dd1d6aa77
o fixes handling of iso i/o parameters/program parameters:
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10 years ago |
svenbarth
042aae2455
* the clang assembler does not provide support for the SEH directives we need (only the LLVM backend would be able to use them), thus we need to manually convert them to data sections