daopt386.pas 96 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  3. development team
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit daopt386;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. cclasses,aasmbase,aasmtai,aasmdata,aasmcpu,cgbase,cgutils,
  25. cpubase,optbase;
  26. {******************************* Constants *******************************}
  27. const
  28. { Possible register content types }
  29. con_Unknown = 0;
  30. con_ref = 1;
  31. con_const = 2;
  32. { The contents aren't usable anymore for CSE, but they may still be }
  33. { usefull for detecting whether the result of a load is actually used }
  34. con_invalid = 3;
  35. { the reverse of the above (in case a (conditional) jump is encountered): }
  36. { CSE is still possible, but the original instruction can't be removed }
  37. con_noRemoveRef = 4;
  38. { same, but for constants }
  39. con_noRemoveConst = 5;
  40. const
  41. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  42. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  43. OS_16,OS_32,OS_64,
  44. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  45. OS_M32,
  46. OS_ADDR,OS_NO,OS_NO,
  47. OS_NO,
  48. OS_NO);
  49. {********************************* Types *********************************}
  50. type
  51. TRegArray = Array[RS_EAX..RS_ESP] of tsuperregister;
  52. TRegSet = Set of RS_EAX..RS_ESP;
  53. toptreginfo = Record
  54. NewRegsEncountered, OldRegsEncountered: TRegSet;
  55. RegsLoadedForRef: TRegSet;
  56. lastReload: array[RS_EAX..RS_ESP] of tai;
  57. New2OldReg: TRegArray;
  58. end;
  59. {possible actions on an operand: read, write or modify (= read & write)}
  60. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  61. {the possible states of a flag}
  62. TFlagContents = (F_Unknown, F_notSet, F_Set);
  63. TContent = Packed Record
  64. {start and end of block instructions that defines the
  65. content of this register.}
  66. StartMod: tai;
  67. MemWrite: taicpu;
  68. {how many instructions starting with StarMod does the block consist of}
  69. NrOfMods: Word;
  70. {the type of the content of the register: unknown, memory, constant}
  71. Typ: Byte;
  72. case byte of
  73. {starts at 0, gets increased everytime the register is written to}
  74. 1: (WState: Byte;
  75. {starts at 0, gets increased everytime the register is read from}
  76. RState: Byte);
  77. { to compare both states in one operation }
  78. 2: (state: word);
  79. end;
  80. {Contents of the integer registers}
  81. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  82. {contents of the FPU registers}
  83. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  84. {$ifdef tempOpts}
  85. { linked list which allows searching/deleting based on value, no extra frills}
  86. PSearchLinkedListItem = ^TSearchLinkedListItem;
  87. TSearchLinkedListItem = object(TLinkedList_Item)
  88. constructor init;
  89. function equals(p: PSearchLinkedListItem): boolean; virtual;
  90. end;
  91. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  92. TSearchDoubleIntItem = object(TLinkedList_Item)
  93. constructor init(_int1,_int2: longint);
  94. function equals(p: PSearchLinkedListItem): boolean; virtual;
  95. private
  96. int1, int2: longint;
  97. end;
  98. PSearchLinkedList = ^TSearchLinkedList;
  99. TSearchLinkedList = object(TLinkedList)
  100. function searchByValue(p: PSearchLinkedListItem): boolean;
  101. procedure removeByValue(p: PSearchLinkedListItem);
  102. end;
  103. {$endif tempOpts}
  104. {information record with the contents of every register. Every tai object
  105. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  106. TtaiProp = Record
  107. Regs: TRegContent;
  108. { FPURegs: TRegFPUContent;} {currently not yet used}
  109. { allocated Registers }
  110. UsedRegs: TRegSet;
  111. { status of the direction flag }
  112. DirFlag: TFlagContents;
  113. {$ifdef tempOpts}
  114. { currently used temps }
  115. tempAllocs: PSearchLinkedList;
  116. {$endif tempOpts}
  117. { can this instruction be removed? }
  118. CanBeRemoved: Boolean;
  119. { are the resultflags set by this instruction used? }
  120. FlagsUsed: Boolean;
  121. end;
  122. ptaiprop = ^TtaiProp;
  123. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  124. PtaiPropBlock = ^TtaiPropBlock;
  125. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  126. TLabelTableItem = Record
  127. taiObj: tai;
  128. {$ifDef JumpAnal}
  129. InstrNr: Longint;
  130. RefsFound: Word;
  131. JmpsProcessed: Word
  132. {$endif JumpAnal}
  133. end;
  134. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  135. PLabelTable = ^TLabelTable;
  136. {*********************** procedures and functions ************************}
  137. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  138. function RefsEqual(const R1, R2: TReference): Boolean;
  139. function isgp32reg(supreg: tsuperregister): Boolean;
  140. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  141. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  142. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  143. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  144. function reginop(supreg: tsuperregister; const o:toper): boolean;
  145. function instrWritesFlags(p: tai): boolean;
  146. function instrReadsFlags(p: tai): boolean;
  147. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  148. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  149. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  150. const c: tcontent): boolean;
  151. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  152. const c: tcontent; var memwritedestroyed: boolean): boolean;
  153. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  154. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  155. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  156. procedure SkipHead(var p: tai);
  157. function labelCanBeSkipped(p: tai_label): boolean;
  158. procedure RemoveLastDeallocForFuncRes(asmL: TAsmList; p: tai);
  159. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  160. hp: tai): boolean;
  161. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  162. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  163. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  164. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  165. function sizescompatible(loadsize,newsize: topsize): boolean;
  166. function OpsEqual(const o1,o2:toper): Boolean;
  167. type
  168. tdfaobj = class
  169. constructor create(_list: TAsmList); virtual;
  170. function pass_1(_blockstart: tai): tai;
  171. function pass_generate_code: boolean;
  172. procedure clear;
  173. function getlabelwithsym(sym: tasmlabel): tai;
  174. private
  175. { Walks through the list to find the lowest and highest label number, inits the }
  176. { labeltable and fixes/optimizes some regallocs }
  177. procedure initlabeltable;
  178. function initdfapass2: boolean;
  179. procedure dodfapass2;
  180. { asm list we're working on }
  181. list: TAsmList;
  182. { current part of the asm list }
  183. blockstart, blockend: tai;
  184. { the amount of taiObjects in the current part of the assembler list }
  185. nroftaiobjs: longint;
  186. { Array which holds all TtaiProps }
  187. taipropblock: ptaipropblock;
  188. { all labels in the current block: their value mapped to their location }
  189. lolab, hilab, labdif: longint;
  190. labeltable: plabeltable;
  191. end;
  192. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  193. procedure incState(var S: Byte; amount: longint);
  194. {******************************* Variables *******************************}
  195. var
  196. dfa: tdfaobj;
  197. {*********************** end of Interface section ************************}
  198. Implementation
  199. Uses
  200. {$ifdef csdebug}
  201. cutils,
  202. {$else}
  203. {$ifdef statedebug}
  204. cutils,
  205. {$else}
  206. {$ifdef allocregdebug}
  207. cutils,
  208. {$endif}
  209. {$endif}
  210. {$endif}
  211. globals, systems, verbose, symconst, cgobj,procinfo;
  212. Type
  213. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  214. var
  215. {How many instructions are between the current instruction and the last one
  216. that modified the register}
  217. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  218. {$ifdef tempOpts}
  219. constructor TSearchLinkedListItem.init;
  220. begin
  221. end;
  222. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  223. begin
  224. equals := false;
  225. end;
  226. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  227. begin
  228. int1 := _int1;
  229. int2 := _int2;
  230. end;
  231. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  232. begin
  233. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  234. (TSearchDoubleIntItem(p).int2 = int2);
  235. end;
  236. function TSearchLinkedList.FindByValue(p: PSearchLinkedListItem): boolean;
  237. var temp: PSearchLinkedListItem;
  238. begin
  239. temp := first;
  240. while (temp <> last.next) and
  241. not(temp.equals(p)) do
  242. temp := temp.next;
  243. searchByValue := temp <> last.next;
  244. end;
  245. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  246. begin
  247. temp := first;
  248. while (temp <> last.next) and
  249. not(temp.equals(p)) do
  250. temp := temp.next;
  251. if temp <> last.next then
  252. begin
  253. remove(temp);
  254. dispose(temp,done);
  255. end;
  256. end;
  257. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  258. {updates UsedRegs with the RegAlloc Information coming after p}
  259. begin
  260. repeat
  261. while assigned(p) and
  262. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  263. ((p.typ = ait_label) and
  264. labelCanBeSkipped(tai_label(current)))) Do
  265. p := tai(p.next);
  266. while assigned(p) and
  267. (p.typ=ait_RegAlloc) Do
  268. begin
  269. case tai_regalloc(p).ratype of
  270. ra_alloc :
  271. UsedRegs := UsedRegs + [tai_regalloc(p).reg];
  272. ra_dealloc :
  273. UsedRegs := UsedRegs - [tai_regalloc(p).reg];
  274. end;
  275. p := tai(p.next);
  276. end;
  277. until not(assigned(p)) or
  278. (not(p.typ in SkipInstr) and
  279. not((p.typ = ait_label) and
  280. labelCanBeSkipped(tai_label(current))));
  281. end;
  282. {$endif tempOpts}
  283. {************************ Create the Label table ************************}
  284. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  285. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  286. { starting with Starttai and ending with the next "real" instruction }
  287. begin
  288. findregalloc := false;
  289. repeat
  290. while assigned(starttai) and
  291. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  292. ((starttai.typ = ait_label) and
  293. labelcanbeskipped(tai_label(starttai)))) do
  294. starttai := tai(starttai.next);
  295. if assigned(starttai) and
  296. (starttai.typ = ait_regalloc) then
  297. begin
  298. if (tai_regalloc(Starttai).ratype = ratyp) and
  299. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  300. begin
  301. findregalloc:=true;
  302. break;
  303. end;
  304. starttai := tai(starttai.next);
  305. end
  306. else
  307. break;
  308. until false;
  309. end;
  310. procedure RemoveLastDeallocForFuncRes(asml: TAsmList; p: tai);
  311. procedure DoRemoveLastDeallocForFuncRes(asml: TAsmList; supreg: tsuperregister);
  312. var
  313. hp2: tai;
  314. begin
  315. hp2 := p;
  316. repeat
  317. hp2 := tai(hp2.previous);
  318. if assigned(hp2) and
  319. (hp2.typ = ait_regalloc) and
  320. (tai_regalloc(hp2).ratype=ra_dealloc) and
  321. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  322. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  323. begin
  324. asml.remove(hp2);
  325. hp2.free;
  326. break;
  327. end;
  328. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  329. end;
  330. begin
  331. case current_procinfo.procdef.returndef.typ of
  332. arraydef,recorddef,pointerdef,
  333. stringdef,enumdef,procdef,objectdef,errordef,
  334. filedef,setdef,procvardef,
  335. classrefdef,forwarddef:
  336. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  337. orddef:
  338. if current_procinfo.procdef.returndef.size <> 0 then
  339. begin
  340. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  341. { for int64/qword }
  342. if current_procinfo.procdef.returndef.size = 8 then
  343. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  344. end;
  345. end;
  346. end;
  347. procedure getNoDeallocRegs(var regs: tregset);
  348. var
  349. regCounter: TSuperRegister;
  350. begin
  351. regs := [];
  352. case current_procinfo.procdef.returndef.typ of
  353. arraydef,recorddef,pointerdef,
  354. stringdef,enumdef,procdef,objectdef,errordef,
  355. filedef,setdef,procvardef,
  356. classrefdef,forwarddef:
  357. regs := [RS_EAX];
  358. orddef:
  359. if current_procinfo.procdef.returndef.size <> 0 then
  360. begin
  361. regs := [RS_EAX];
  362. { for int64/qword }
  363. if current_procinfo.procdef.returndef.size = 8 then
  364. regs := regs + [RS_EDX];
  365. end;
  366. end;
  367. for regCounter := RS_EAX to RS_EBX do
  368. { if not(regCounter in rg.usableregsint) then}
  369. include(regs,regcounter);
  370. end;
  371. procedure AddRegDeallocFor(asml: TAsmList; reg: tregister; p: tai);
  372. var
  373. hp1: tai;
  374. funcResRegs: tregset;
  375. funcResReg: boolean;
  376. begin
  377. { if not(supreg in rg.usableregsint) then
  378. exit;}
  379. { if not(supreg in [RS_EDI]) then
  380. exit;}
  381. getNoDeallocRegs(funcresregs);
  382. { funcResRegs := funcResRegs - rg.usableregsint;}
  383. { funcResRegs := funcResRegs - [RS_EDI];}
  384. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  385. funcResReg := getsupreg(reg) in funcresregs;
  386. hp1 := p;
  387. {
  388. while not(funcResReg and
  389. (p.typ = ait_instruction) and
  390. (taicpu(p).opcode = A_JMP) and
  391. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  392. getLastInstruction(p, p) and
  393. not(regInInstruction(supreg, p)) do
  394. hp1 := p;
  395. }
  396. { don't insert a dealloc for registers which contain the function result }
  397. { if they are followed by a jump to the exit label (for exit(...)) }
  398. { if not(funcResReg) or
  399. not((hp1.typ = ait_instruction) and
  400. (taicpu(hp1).opcode = A_JMP) and
  401. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  402. begin
  403. p := tai_regalloc.deAlloc(reg,nil);
  404. insertLLItem(AsmL, hp1.previous, hp1, p);
  405. end;
  406. end;
  407. {************************ Search the Label table ************************}
  408. function findlabel(l: tasmlabel; var hp: tai): boolean;
  409. {searches for the specified label starting from hp as long as the
  410. encountered instructions are labels, to be able to optimize constructs like
  411. jne l2 jmp l2
  412. jmp l3 and l1:
  413. l1: l2:
  414. l2:}
  415. var
  416. p: tai;
  417. begin
  418. p := hp;
  419. while assigned(p) and
  420. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  421. if (p.typ <> ait_Label) or
  422. (tai_label(p).labsym <> l) then
  423. GetNextInstruction(p, p)
  424. else
  425. begin
  426. hp := p;
  427. findlabel := true;
  428. exit
  429. end;
  430. findlabel := false;
  431. end;
  432. {************************ Some general functions ************************}
  433. function tch2reg(ch: tinschange): tsuperregister;
  434. {converts a TChange variable to a TRegister}
  435. const
  436. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  437. begin
  438. if (ch <= CH_REDI) then
  439. tch2reg := ch2reg[ch]
  440. else if (ch <= CH_WEDI) then
  441. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  442. else if (ch <= CH_RWEDI) then
  443. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  444. else if (ch <= CH_MEDI) then
  445. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  446. else
  447. InternalError($db)
  448. end;
  449. { inserts new_one between prev and foll }
  450. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  451. begin
  452. if assigned(prev) then
  453. if assigned(foll) then
  454. begin
  455. if assigned(new_one) then
  456. begin
  457. new_one.previous := prev;
  458. new_one.next := foll;
  459. prev.next := new_one;
  460. foll.previous := new_one;
  461. { shgould we update line information }
  462. if (not (tai(new_one).typ in SkipLineInfo)) and
  463. (not (tai(foll).typ in SkipLineInfo)) then
  464. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  465. end;
  466. end
  467. else
  468. asml.Concat(new_one)
  469. else
  470. if assigned(foll) then
  471. asml.Insert(new_one)
  472. end;
  473. {********************* Compare parts of tai objects *********************}
  474. function regssamesize(reg1, reg2: tregister): boolean;
  475. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  476. 8bit, 16bit or 32bit)}
  477. begin
  478. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  479. internalerror(2003111602);
  480. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  481. end;
  482. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  483. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  484. OldReg and NewReg have the same size (has to be chcked in advance with
  485. RegsSameSize) and that neither equals RS_INVALID}
  486. var
  487. newsupreg, oldsupreg: tsuperregister;
  488. begin
  489. if (newreg = NR_NO) or (oldreg = NR_NO) then
  490. internalerror(2003111601);
  491. newsupreg := getsupreg(newreg);
  492. oldsupreg := getsupreg(oldreg);
  493. with RegInfo Do
  494. begin
  495. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  496. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  497. New2OldReg[newsupreg] := oldsupreg;
  498. end;
  499. end;
  500. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  501. begin
  502. case o.typ Of
  503. top_reg:
  504. if (o.reg <> NR_NO) then
  505. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  506. top_ref:
  507. begin
  508. if o.ref^.base <> NR_NO then
  509. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  510. if o.ref^.index <> NR_NO then
  511. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  512. end;
  513. end;
  514. end;
  515. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  516. begin
  517. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  518. if RegsSameSize(oldreg, newreg) then
  519. with reginfo do
  520. {here we always check for the 32 bit component, because it is possible that
  521. the 8 bit component has not been set, event though NewReg already has been
  522. processed. This happens if it has been compared with a register that doesn't
  523. have an 8 bit component (such as EDI). in that case the 8 bit component is
  524. still set to RS_NO and the comparison in the else-part will fail}
  525. if (getsupreg(oldReg) in OldRegsEncountered) then
  526. if (getsupreg(NewReg) in NewRegsEncountered) then
  527. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  528. { if we haven't encountered the new register yet, but we have encountered the
  529. old one already, the new one can only be correct if it's being written to
  530. (and consequently the old one is also being written to), otherwise
  531. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  532. movl (%eax), %eax movl (%edx), %edx
  533. are considered equivalent}
  534. else
  535. if (opact = opact_write) then
  536. begin
  537. AddReg2RegInfo(oldreg, newreg, reginfo);
  538. RegsEquivalent := true
  539. end
  540. else
  541. Regsequivalent := false
  542. else
  543. if not(getsupreg(newreg) in NewRegsEncountered) and
  544. ((opact = opact_write) or
  545. ((newreg = oldreg) and
  546. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  547. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  548. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  549. begin
  550. AddReg2RegInfo(oldreg, newreg, reginfo);
  551. RegsEquivalent := true
  552. end
  553. else
  554. RegsEquivalent := false
  555. else
  556. RegsEquivalent := false
  557. else
  558. RegsEquivalent := oldreg = newreg
  559. end;
  560. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  561. begin
  562. RefsEquivalent :=
  563. (r1.offset = r2.offset) and
  564. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  565. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  566. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  567. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  568. (r1.relsymbol = r2.relsymbol);
  569. end;
  570. function refsequal(const r1, r2: treference): boolean;
  571. begin
  572. refsequal :=
  573. (r1.offset = r2.offset) and
  574. (r1.segment = r2.segment) and (r1.base = r2.base) and
  575. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  576. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  577. (r1.relsymbol = r2.relsymbol);
  578. end;
  579. {$ifdef q+}
  580. {$q-}
  581. {$define overflowon}
  582. {$endif q+}
  583. // checks whether a write to r2 of size "size" contains address r1
  584. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  585. var
  586. realsize1, realsize2: aint;
  587. begin
  588. realsize1 := tcgsize2size[size1];
  589. realsize2 := tcgsize2size[size2];
  590. refsoverlapping :=
  591. (r2.offset <= r1.offset+realsize1) and
  592. (r1.offset <= r2.offset+realsize2) and
  593. (r1.segment = r2.segment) and (r1.base = r2.base) and
  594. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  595. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  596. (r1.relsymbol = r2.relsymbol);
  597. end;
  598. {$ifdef overflowon}
  599. {$q+}
  600. {$undef overflowon}
  601. {$endif overflowon}
  602. function isgp32reg(supreg: tsuperregister): boolean;
  603. {Checks if the register is a 32 bit general purpose register}
  604. begin
  605. isgp32reg := false;
  606. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  607. isgp32reg := true
  608. end;
  609. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  610. begin {checks whether ref contains a reference to reg}
  611. reginref :=
  612. ((ref.base <> NR_NO) and
  613. (getsupreg(ref.base) = supreg)) or
  614. ((ref.index <> NR_NO) and
  615. (getsupreg(ref.index) = supreg))
  616. end;
  617. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  618. var
  619. p: taicpu;
  620. opcount: longint;
  621. begin
  622. RegReadByInstruction := false;
  623. if hp.typ <> ait_instruction then
  624. exit;
  625. p := taicpu(hp);
  626. case p.opcode of
  627. A_CALL:
  628. regreadbyinstruction := true;
  629. A_IMUL:
  630. case p.ops of
  631. 1:
  632. regReadByInstruction :=
  633. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  634. 2,3:
  635. regReadByInstruction :=
  636. reginop(supreg,p.oper[0]^) or
  637. reginop(supreg,p.oper[1]^);
  638. end;
  639. A_IDIV,A_DIV,A_MUL:
  640. begin
  641. regReadByInstruction :=
  642. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  643. end;
  644. else
  645. begin
  646. for opcount := 0 to p.ops-1 do
  647. if (p.oper[opCount]^.typ = top_ref) and
  648. reginref(supreg,p.oper[opcount]^.ref^) then
  649. begin
  650. RegReadByInstruction := true;
  651. exit
  652. end;
  653. for opcount := 1 to maxinschanges do
  654. case insprop[p.opcode].ch[opcount] of
  655. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  656. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  657. begin
  658. RegReadByInstruction := true;
  659. exit
  660. end;
  661. CH_RWOP1,CH_ROP1,CH_MOP1:
  662. if //(p.oper[0]^.typ = top_reg) and
  663. reginop(supreg,p.oper[0]^) then
  664. begin
  665. RegReadByInstruction := true;
  666. exit
  667. end;
  668. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  669. if //(p.oper[1]^.typ = top_reg) and
  670. reginop(supreg,p.oper[1]^) then
  671. begin
  672. RegReadByInstruction := true;
  673. exit
  674. end;
  675. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  676. if //(p.oper[2]^.typ = top_reg) and
  677. reginop(supreg,p.oper[2]^) then
  678. begin
  679. RegReadByInstruction := true;
  680. exit
  681. end;
  682. end;
  683. end;
  684. end;
  685. end;
  686. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  687. { Checks if reg is used by the instruction p1 }
  688. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  689. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  690. var
  691. p: taicpu;
  692. opcount: longint;
  693. begin
  694. regInInstruction := false;
  695. if p1.typ <> ait_instruction then
  696. exit;
  697. p := taicpu(p1);
  698. case p.opcode of
  699. A_CALL:
  700. regininstruction := true;
  701. A_IMUL:
  702. case p.ops of
  703. 1:
  704. regInInstruction :=
  705. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  706. 2,3:
  707. regInInstruction :=
  708. reginop(supreg,p.oper[0]^) or
  709. reginop(supreg,p.oper[1]^) or
  710. (assigned(p.oper[2]) and
  711. reginop(supreg,p.oper[2]^));
  712. end;
  713. A_IDIV,A_DIV,A_MUL:
  714. regInInstruction :=
  715. reginop(supreg,p.oper[0]^) or
  716. (supreg in [RS_EAX,RS_EDX])
  717. else
  718. begin
  719. for opcount := 0 to p.ops-1 do
  720. if (p.oper[opCount]^.typ = top_ref) and
  721. reginref(supreg,p.oper[opcount]^.ref^) then
  722. begin
  723. regInInstruction := true;
  724. exit
  725. end;
  726. for opcount := 1 to maxinschanges do
  727. case insprop[p.opcode].Ch[opCount] of
  728. CH_REAX..CH_MEDI:
  729. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  730. begin
  731. regInInstruction := true;
  732. exit;
  733. end;
  734. CH_ROp1..CH_MOp1:
  735. if reginop(supreg,p.oper[0]^) then
  736. begin
  737. regInInstruction := true;
  738. exit
  739. end;
  740. Ch_ROp2..Ch_MOp2:
  741. if reginop(supreg,p.oper[1]^) then
  742. begin
  743. regInInstruction := true;
  744. exit
  745. end;
  746. Ch_ROp3..Ch_MOp3:
  747. if reginop(supreg,p.oper[2]^) then
  748. begin
  749. regInInstruction := true;
  750. exit
  751. end;
  752. end;
  753. end;
  754. end;
  755. end;
  756. function reginop(supreg: tsuperregister; const o:toper): boolean;
  757. begin
  758. reginop := false;
  759. case o.typ Of
  760. top_reg:
  761. reginop :=
  762. (getregtype(o.reg) = R_INTREGISTER) and
  763. (supreg = getsupreg(o.reg));
  764. top_ref:
  765. reginop :=
  766. ((o.ref^.base <> NR_NO) and
  767. (supreg = getsupreg(o.ref^.base))) or
  768. ((o.ref^.index <> NR_NO) and
  769. (supreg = getsupreg(o.ref^.index)));
  770. end;
  771. end;
  772. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  773. var
  774. InstrProp: TInsProp;
  775. TmpResult: Boolean;
  776. Cnt: Word;
  777. begin
  778. TmpResult := False;
  779. if supreg = RS_INVALID then
  780. exit;
  781. if (p1.typ = ait_instruction) then
  782. case taicpu(p1).opcode of
  783. A_IMUL:
  784. With taicpu(p1) Do
  785. TmpResult :=
  786. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  787. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  788. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  789. A_DIV, A_IDIV, A_MUL:
  790. With taicpu(p1) Do
  791. TmpResult :=
  792. (supreg in [RS_EAX,RS_EDX]);
  793. else
  794. begin
  795. Cnt := 1;
  796. InstrProp := InsProp[taicpu(p1).OpCode];
  797. while (Cnt <= maxinschanges) and
  798. (InstrProp.Ch[Cnt] <> Ch_None) and
  799. not(TmpResult) Do
  800. begin
  801. case InstrProp.Ch[Cnt] Of
  802. Ch_WEAX..Ch_MEDI:
  803. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  804. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  805. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  806. reginop(supreg,taicpu(p1).oper[0]^);
  807. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  808. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  809. reginop(supreg,taicpu(p1).oper[1]^);
  810. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  811. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  812. reginop(supreg,taicpu(p1).oper[2]^);
  813. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  814. Ch_ALL: TmpResult := true;
  815. end;
  816. inc(Cnt)
  817. end
  818. end
  819. end;
  820. RegModifiedByInstruction := TmpResult
  821. end;
  822. function instrWritesFlags(p: tai): boolean;
  823. var
  824. l: longint;
  825. begin
  826. instrWritesFlags := true;
  827. case p.typ of
  828. ait_instruction:
  829. begin
  830. for l := 1 to maxinschanges do
  831. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  832. exit;
  833. end;
  834. ait_label:
  835. exit;
  836. end;
  837. instrWritesFlags := false;
  838. end;
  839. function instrReadsFlags(p: tai): boolean;
  840. var
  841. l: longint;
  842. begin
  843. instrReadsFlags := true;
  844. case p.typ of
  845. ait_instruction:
  846. begin
  847. for l := 1 to maxinschanges do
  848. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  849. exit;
  850. end;
  851. ait_label:
  852. exit;
  853. end;
  854. instrReadsFlags := false;
  855. end;
  856. {********************* GetNext and GetLastInstruction *********************}
  857. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  858. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  859. { next tai object in Next. Returns false if there isn't any }
  860. begin
  861. repeat
  862. if (Current.typ = ait_marker) and
  863. (tai_Marker(current).Kind = mark_AsmBlockStart) then
  864. begin
  865. GetNextInstruction := False;
  866. Next := Nil;
  867. Exit
  868. end;
  869. Current := tai(current.Next);
  870. while assigned(Current) and
  871. ((current.typ in skipInstr) or
  872. ((current.typ = ait_label) and
  873. labelCanBeSkipped(tai_label(current)))) do
  874. Current := tai(current.Next);
  875. { if assigned(Current) and
  876. (current.typ = ait_Marker) and
  877. (tai_Marker(current).Kind = mark_NoPropInfoStart) then
  878. begin
  879. while assigned(Current) and
  880. ((current.typ <> ait_Marker) or
  881. (tai_Marker(current).Kind <> mark_NoPropInfoEnd)) Do
  882. Current := tai(current.Next);
  883. end;}
  884. until not(assigned(Current)) or
  885. (current.typ <> ait_Marker) or
  886. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  887. Next := Current;
  888. if assigned(Current) and
  889. not((current.typ in SkipInstr) or
  890. ((current.typ = ait_label) and
  891. labelCanBeSkipped(tai_label(current))))
  892. then
  893. GetNextInstruction :=
  894. not((current.typ = ait_marker) and
  895. (tai_marker(current).kind = mark_AsmBlockStart))
  896. else
  897. begin
  898. GetNextInstruction := False;
  899. Next := nil;
  900. end;
  901. end;
  902. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  903. {skips the ait-types in SkipInstr puts the previous tai object in
  904. Last. Returns false if there isn't any}
  905. begin
  906. repeat
  907. Current := tai(current.previous);
  908. while assigned(Current) and
  909. (((current.typ = ait_Marker) and
  910. not(tai_Marker(current).Kind in [mark_AsmBlockEnd{,mark_NoPropInfoEnd}])) or
  911. (current.typ in SkipInstr) or
  912. ((current.typ = ait_label) and
  913. labelCanBeSkipped(tai_label(current)))) Do
  914. Current := tai(current.previous);
  915. { if assigned(Current) and
  916. (current.typ = ait_Marker) and
  917. (tai_Marker(current).Kind = mark_NoPropInfoEnd) then
  918. begin
  919. while assigned(Current) and
  920. ((current.typ <> ait_Marker) or
  921. (tai_Marker(current).Kind <> mark_NoPropInfoStart)) Do
  922. Current := tai(current.previous);
  923. end;}
  924. until not(assigned(Current)) or
  925. (current.typ <> ait_Marker) or
  926. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  927. if not(assigned(Current)) or
  928. (current.typ in SkipInstr) or
  929. ((current.typ = ait_label) and
  930. labelCanBeSkipped(tai_label(current))) or
  931. ((current.typ = ait_Marker) and
  932. (tai_Marker(current).Kind = mark_AsmBlockEnd))
  933. then
  934. begin
  935. Last := nil;
  936. GetLastInstruction := False
  937. end
  938. else
  939. begin
  940. Last := Current;
  941. GetLastInstruction := True;
  942. end;
  943. end;
  944. procedure SkipHead(var p: tai);
  945. var
  946. oldp: tai;
  947. begin
  948. repeat
  949. oldp := p;
  950. if (p.typ in SkipInstr) or
  951. ((p.typ = ait_marker) and
  952. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_InlineStart,mark_InlineEnd])) then
  953. GetNextInstruction(p,p)
  954. else if ((p.Typ = Ait_Marker) and
  955. (tai_Marker(p).Kind = mark_NoPropInfoStart)) then
  956. {a marker of the mark_NoPropInfoStart can't be the first instruction of a
  957. TAsmList list}
  958. GetNextInstruction(tai(p.previous),p);
  959. until p = oldp
  960. end;
  961. function labelCanBeSkipped(p: tai_label): boolean;
  962. begin
  963. labelCanBeSkipped := not(p.labsym.is_used) or (p.labsym.labeltype<>alt_jump);
  964. end;
  965. {******************* The Data Flow Analyzer functions ********************}
  966. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  967. hp: tai): boolean;
  968. { assumes reg is a 32bit register }
  969. var
  970. p: taicpu;
  971. begin
  972. if not assigned(hp) or
  973. (hp.typ <> ait_instruction) then
  974. begin
  975. regLoadedWithNewValue := false;
  976. exit;
  977. end;
  978. p := taicpu(hp);
  979. regLoadedWithNewValue :=
  980. (((p.opcode = A_MOV) or
  981. (p.opcode = A_MOVZX) or
  982. (p.opcode = A_MOVSX) or
  983. (p.opcode = A_LEA)) and
  984. (p.oper[1]^.typ = top_reg) and
  985. (getsupreg(p.oper[1]^.reg) = supreg) and
  986. (canDependOnPrevValue or
  987. (p.oper[0]^.typ = top_const) or
  988. ((p.oper[0]^.typ = top_reg) and
  989. (getsupreg(p.oper[0]^.reg) <> supreg)) or
  990. ((p.oper[0]^.typ = top_ref) and
  991. not regInRef(supreg,p.oper[0]^.ref^)))) or
  992. ((p.opcode = A_POP) and
  993. (getsupreg(p.oper[0]^.reg) = supreg));
  994. end;
  995. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  996. {updates UsedRegs with the RegAlloc Information coming after p}
  997. begin
  998. repeat
  999. while assigned(p) and
  1000. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  1001. ((p.typ = ait_label) and
  1002. labelCanBeSkipped(tai_label(p))) or
  1003. ((p.typ = ait_marker) and
  1004. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_InlineStart,mark_InlineEnd]))) do
  1005. p := tai(p.next);
  1006. while assigned(p) and
  1007. (p.typ=ait_RegAlloc) Do
  1008. begin
  1009. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1010. begin
  1011. case tai_regalloc(p).ratype of
  1012. ra_alloc :
  1013. UsedRegs := UsedRegs + [getsupreg(tai_regalloc(p).reg)];
  1014. ra_dealloc :
  1015. UsedRegs := UsedRegs - [getsupreg(tai_regalloc(p).reg)];
  1016. end;
  1017. end;
  1018. p := tai(p.next);
  1019. end;
  1020. until not(assigned(p)) or
  1021. (not(p.typ in SkipInstr) and
  1022. not((p.typ = ait_label) and
  1023. labelCanBeSkipped(tai_label(p))));
  1024. end;
  1025. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  1026. { allocates register reg between (and including) instructions p1 and p2 }
  1027. { the type of p1 and p2 must not be in SkipInstr }
  1028. { note that this routine is both called from the peephole optimizer }
  1029. { where optinfo is not yet initialised) and from the cse (where it is) }
  1030. var
  1031. hp, start: tai;
  1032. removedsomething,
  1033. firstRemovedWasAlloc,
  1034. lastRemovedWasDealloc: boolean;
  1035. supreg: tsuperregister;
  1036. begin
  1037. {$ifdef EXTDEBUG}
  1038. if assigned(p1.optinfo) and
  1039. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1040. internalerror(2004101010);
  1041. {$endif EXTDEBUG}
  1042. start := p1;
  1043. if (reg = NR_ESP) or
  1044. (reg = current_procinfo.framepointer) or
  1045. not(assigned(p1)) then
  1046. { this happens with registers which are loaded implicitely, outside the }
  1047. { current block (e.g. esi with self) }
  1048. exit;
  1049. supreg := getsupreg(reg);
  1050. { make sure we allocate it for this instruction }
  1051. getnextinstruction(p2,p2);
  1052. lastRemovedWasDealloc := false;
  1053. removedSomething := false;
  1054. firstRemovedWasAlloc := false;
  1055. {$ifdef allocregdebug}
  1056. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1057. ' from here...'));
  1058. insertllitem(asml,p1.previous,p1,hp);
  1059. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1060. ' till here...'));
  1061. insertllitem(asml,p2,p2.next,hp);
  1062. {$endif allocregdebug}
  1063. if not(supreg in initialusedregs) then
  1064. begin
  1065. hp := tai_regalloc.alloc(reg,nil);
  1066. insertllItem(asmL,p1.previous,p1,hp);
  1067. end;
  1068. while assigned(p1) and
  1069. (p1 <> p2) do
  1070. begin
  1071. if assigned(p1.optinfo) then
  1072. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1073. p1 := tai(p1.next);
  1074. repeat
  1075. while assigned(p1) and
  1076. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1077. p1 := tai(p1.next);
  1078. { remove all allocation/deallocation info about the register in between }
  1079. if assigned(p1) and
  1080. (p1.typ = ait_regalloc) then
  1081. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1082. begin
  1083. if not removedSomething then
  1084. begin
  1085. firstRemovedWasAlloc := tai_regalloc(p1).ratype=ra_alloc;
  1086. removedSomething := true;
  1087. end;
  1088. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1089. hp := tai(p1.Next);
  1090. asml.Remove(p1);
  1091. p1.free;
  1092. p1 := hp;
  1093. end
  1094. else p1 := tai(p1.next);
  1095. until not(assigned(p1)) or
  1096. not(p1.typ in SkipInstr);
  1097. end;
  1098. if assigned(p1) then
  1099. begin
  1100. if firstRemovedWasAlloc then
  1101. begin
  1102. hp := tai_regalloc.Alloc(reg,nil);
  1103. insertLLItem(asmL,start.previous,start,hp);
  1104. end;
  1105. if lastRemovedWasDealloc then
  1106. begin
  1107. hp := tai_regalloc.DeAlloc(reg,nil);
  1108. insertLLItem(asmL,p1.previous,p1,hp);
  1109. end;
  1110. end;
  1111. end;
  1112. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1113. var
  1114. hp: tai;
  1115. first: boolean;
  1116. begin
  1117. findregdealloc := false;
  1118. first := true;
  1119. while assigned(p.previous) and
  1120. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1121. ((tai(p.previous).typ = ait_label) and
  1122. labelCanBeSkipped(tai_label(p.previous)))) do
  1123. begin
  1124. p := tai(p.previous);
  1125. if (p.typ = ait_regalloc) and
  1126. (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) and
  1127. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1128. if (tai_regalloc(p).ratype=ra_dealloc) then
  1129. if first then
  1130. begin
  1131. findregdealloc := true;
  1132. break;
  1133. end
  1134. else
  1135. begin
  1136. findRegDealloc :=
  1137. getNextInstruction(p,hp) and
  1138. regLoadedWithNewValue(supreg,false,hp);
  1139. break
  1140. end
  1141. else
  1142. first := false;
  1143. end
  1144. end;
  1145. procedure incState(var S: Byte; amount: longint);
  1146. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1147. errors}
  1148. begin
  1149. if (s <= $ff - amount) then
  1150. inc(s, amount)
  1151. else s := longint(s) + amount - $ff;
  1152. end;
  1153. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1154. { Content is the sequence of instructions that describes the contents of }
  1155. { seqReg. reg is being overwritten by the current instruction. if the }
  1156. { content of seqReg depends on reg (ie. because of a }
  1157. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1158. var
  1159. p: tai;
  1160. Counter: Word;
  1161. TmpResult: Boolean;
  1162. RegsChecked: TRegSet;
  1163. begin
  1164. RegsChecked := [];
  1165. p := Content.StartMod;
  1166. TmpResult := False;
  1167. Counter := 1;
  1168. while not(TmpResult) and
  1169. (Counter <= Content.NrOfMods) Do
  1170. begin
  1171. if (p.typ = ait_instruction) and
  1172. ((taicpu(p).opcode = A_MOV) or
  1173. (taicpu(p).opcode = A_MOVZX) or
  1174. (taicpu(p).opcode = A_MOVSX) or
  1175. (taicpu(p).opcode = A_LEA)) and
  1176. (taicpu(p).oper[0]^.typ = top_ref) then
  1177. With taicpu(p).oper[0]^.ref^ Do
  1178. if ((base = current_procinfo.FramePointer) or
  1179. (assigned(symbol) and (base = NR_NO))) and
  1180. (index = NR_NO) then
  1181. begin
  1182. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1183. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1184. break;
  1185. end
  1186. else
  1187. tmpResult :=
  1188. regReadByInstruction(supreg,p) and
  1189. regModifiedByInstruction(seqReg,p)
  1190. else
  1191. tmpResult :=
  1192. regReadByInstruction(supreg,p) and
  1193. regModifiedByInstruction(seqReg,p);
  1194. inc(Counter);
  1195. GetNextInstruction(p,p)
  1196. end;
  1197. sequenceDependsonReg := TmpResult
  1198. end;
  1199. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1200. var
  1201. counter: tsuperregister;
  1202. begin
  1203. for counter := RS_EAX to RS_EDI do
  1204. if counter <> supreg then
  1205. with p1^.regs[counter] Do
  1206. begin
  1207. if (typ in [con_ref,con_noRemoveRef]) and
  1208. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1209. if typ in [con_ref, con_invalid] then
  1210. typ := con_invalid
  1211. { con_noRemoveRef = con_unknown }
  1212. else
  1213. typ := con_unknown;
  1214. if assigned(memwrite) and
  1215. regInRef(counter,memwrite.oper[1]^.ref^) then
  1216. memwrite := nil;
  1217. end;
  1218. end;
  1219. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1220. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1221. contents of registers are loaded with a memory location based on reg.
  1222. doincState is false when this register has to be destroyed not because
  1223. it's contents are directly modified/overwritten, but because of an indirect
  1224. action (e.g. this register holds the contents of a variable and the value
  1225. of the variable in memory is changed) }
  1226. begin
  1227. { the following happens for fpu registers }
  1228. if (supreg < low(NrOfInstrSinceLastMod)) or
  1229. (supreg > high(NrOfInstrSinceLastMod)) then
  1230. exit;
  1231. NrOfInstrSinceLastMod[supreg] := 0;
  1232. with p1^.regs[supreg] do
  1233. begin
  1234. if doincState then
  1235. begin
  1236. incState(wstate,1);
  1237. typ := con_unknown;
  1238. startmod := nil;
  1239. end
  1240. else
  1241. if typ in [con_ref,con_const,con_invalid] then
  1242. typ := con_invalid
  1243. { con_noRemoveRef = con_unknown }
  1244. else
  1245. typ := con_unknown;
  1246. memwrite := nil;
  1247. end;
  1248. invalidateDependingRegs(p1,supreg);
  1249. end;
  1250. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1251. begin
  1252. if (p.typ = ait_instruction) then
  1253. begin
  1254. case taicpu(p).oper[0]^.typ Of
  1255. top_reg:
  1256. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1257. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1258. top_ref:
  1259. With TReference(taicpu(p).oper[0]^) Do
  1260. begin
  1261. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1262. then RegSet := RegSet + [base];
  1263. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1264. then RegSet := RegSet + [index];
  1265. end;
  1266. end;
  1267. case taicpu(p).oper[1]^.typ Of
  1268. top_reg:
  1269. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1270. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1271. top_ref:
  1272. With TReference(taicpu(p).oper[1]^) Do
  1273. begin
  1274. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1275. then RegSet := RegSet + [base];
  1276. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1277. then RegSet := RegSet + [index];
  1278. end;
  1279. end;
  1280. end;
  1281. end;}
  1282. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1283. begin {checks whether the two ops are equivalent}
  1284. OpsEquivalent := False;
  1285. if o1.typ=o2.typ then
  1286. case o1.typ Of
  1287. top_reg:
  1288. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1289. top_ref:
  1290. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1291. Top_Const:
  1292. OpsEquivalent := o1.val = o2.val;
  1293. Top_None:
  1294. OpsEquivalent := True
  1295. end;
  1296. end;
  1297. function OpsEqual(const o1,o2:toper): Boolean;
  1298. begin {checks whether the two ops are equal}
  1299. OpsEqual := False;
  1300. if o1.typ=o2.typ then
  1301. case o1.typ Of
  1302. top_reg :
  1303. OpsEqual:=o1.reg=o2.reg;
  1304. top_ref :
  1305. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1306. Top_Const :
  1307. OpsEqual:=o1.val=o2.val;
  1308. Top_None :
  1309. OpsEqual := True
  1310. end;
  1311. end;
  1312. function sizescompatible(loadsize,newsize: topsize): boolean;
  1313. begin
  1314. case loadsize of
  1315. S_B,S_BW,S_BL:
  1316. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1317. S_W,S_WL:
  1318. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1319. else
  1320. sizescompatible := newsize = S_L;
  1321. end;
  1322. end;
  1323. function opscompatible(p1,p2: taicpu): boolean;
  1324. begin
  1325. case p1.opcode of
  1326. A_MOVZX,A_MOVSX:
  1327. opscompatible :=
  1328. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1329. sizescompatible(p1.opsize,p2.opsize);
  1330. else
  1331. opscompatible :=
  1332. (p1.opcode = p2.opcode) and
  1333. (p1.ops = p2.ops) and
  1334. (p1.opsize = p2.opsize);
  1335. end;
  1336. end;
  1337. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1338. {$ifdef csdebug}
  1339. var
  1340. hp: tai;
  1341. {$endif csdebug}
  1342. begin {checks whether two taicpu instructions are equal}
  1343. if assigned(p1) and assigned(p2) and
  1344. (tai(p1).typ = ait_instruction) and
  1345. (tai(p2).typ = ait_instruction) and
  1346. opscompatible(taicpu(p1),taicpu(p2)) and
  1347. (not(assigned(taicpu(p1).oper[0])) or
  1348. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1349. (not(assigned(taicpu(p1).oper[1])) or
  1350. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1351. (not(assigned(taicpu(p1).oper[2])) or
  1352. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1353. {both instructions have the same structure:
  1354. "<operator> <operand of type1>, <operand of type 2>"}
  1355. if ((taicpu(p1).opcode = A_MOV) or
  1356. (taicpu(p1).opcode = A_MOVZX) or
  1357. (taicpu(p1).opcode = A_MOVSX) or
  1358. (taicpu(p1).opcode = A_LEA)) and
  1359. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1360. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1361. {the "old" instruction is a load of a register with a new value, not with
  1362. a value based on the contents of this register (so no "mov (reg), reg")}
  1363. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1364. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1365. {the "new" instruction is also a load of a register with a new value, and
  1366. this value is fetched from the same memory location}
  1367. begin
  1368. With taicpu(p2).oper[0]^.ref^ Do
  1369. begin
  1370. if (base <> NR_NO) and
  1371. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1372. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1373. if (index <> NR_NO) and
  1374. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1375. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1376. end;
  1377. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1378. from the reference are the same in the old and in the new instruction
  1379. sequence}
  1380. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1381. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1382. InstructionsEquivalent :=
  1383. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1384. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1385. end
  1386. {the registers are loaded with values from different memory locations. if
  1387. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1388. would be considered equivalent}
  1389. else
  1390. InstructionsEquivalent := False
  1391. else
  1392. {load register with a value based on the current value of this register}
  1393. begin
  1394. With taicpu(p2).oper[0]^.ref^ Do
  1395. begin
  1396. if (base <> NR_NO) and
  1397. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1398. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1399. {it won't do any harm if the register is already in RegsLoadedForRef}
  1400. begin
  1401. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1402. {$ifdef csdebug}
  1403. Writeln(std_regname(base), ' added');
  1404. {$endif csdebug}
  1405. end;
  1406. if (index <> NR_NO) and
  1407. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1408. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1409. begin
  1410. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1411. {$ifdef csdebug}
  1412. Writeln(std_regname(index), ' added');
  1413. {$endif csdebug}
  1414. end;
  1415. end;
  1416. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1417. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1418. begin
  1419. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1420. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1421. {$ifdef csdebug}
  1422. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1423. {$endif csdebug}
  1424. end;
  1425. InstructionsEquivalent :=
  1426. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1427. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1428. end
  1429. else
  1430. {an instruction <> mov, movzx, movsx}
  1431. begin
  1432. {$ifdef csdebug}
  1433. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1434. hp.previous := p2;
  1435. hp.next := p2.next;
  1436. p2.next.previous := hp;
  1437. p2.next := hp;
  1438. {$endif csdebug}
  1439. InstructionsEquivalent :=
  1440. (not(assigned(taicpu(p1).oper[0])) or
  1441. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1442. (not(assigned(taicpu(p1).oper[1])) or
  1443. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1444. (not(assigned(taicpu(p1).oper[2])) or
  1445. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1446. end
  1447. {the instructions haven't even got the same structure, so they're certainly
  1448. not equivalent}
  1449. else
  1450. begin
  1451. {$ifdef csdebug}
  1452. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1453. hp.previous := p2;
  1454. hp.next := p2.next;
  1455. p2.next.previous := hp;
  1456. p2.next := hp;
  1457. {$endif csdebug}
  1458. InstructionsEquivalent := False;
  1459. end;
  1460. {$ifdef csdebug}
  1461. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1462. hp.previous := p2;
  1463. hp.next := p2.next;
  1464. p2.next.previous := hp;
  1465. p2.next := hp;
  1466. {$endif csdebug}
  1467. end;
  1468. (*
  1469. function InstructionsEqual(p1, p2: tai): Boolean;
  1470. begin {checks whether two taicpu instructions are equal}
  1471. InstructionsEqual :=
  1472. assigned(p1) and assigned(p2) and
  1473. ((tai(p1).typ = ait_instruction) and
  1474. (tai(p1).typ = ait_instruction) and
  1475. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1476. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1477. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1478. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1479. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1480. end;
  1481. *)
  1482. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1483. begin
  1484. if supreg in [RS_EAX..RS_EDI] then
  1485. incState(p^.regs[supreg].rstate,1)
  1486. end;
  1487. procedure readref(p: ptaiprop; const ref: preference);
  1488. begin
  1489. if ref^.base <> NR_NO then
  1490. readreg(p, getsupreg(ref^.base));
  1491. if ref^.index <> NR_NO then
  1492. readreg(p, getsupreg(ref^.index));
  1493. end;
  1494. procedure ReadOp(p: ptaiprop;const o:toper);
  1495. begin
  1496. case o.typ Of
  1497. top_reg: readreg(p, getsupreg(o.reg));
  1498. top_ref: readref(p, o.ref);
  1499. end;
  1500. end;
  1501. function RefInInstruction(const ref: TReference; p: tai;
  1502. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1503. {checks whehter ref is used in p}
  1504. var
  1505. mysize: tcgsize;
  1506. TmpResult: Boolean;
  1507. begin
  1508. TmpResult := False;
  1509. if (p.typ = ait_instruction) then
  1510. begin
  1511. mysize := topsize2tcgsize[taicpu(p).opsize];
  1512. if (taicpu(p).ops >= 1) and
  1513. (taicpu(p).oper[0]^.typ = top_ref) then
  1514. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1515. if not(TmpResult) and
  1516. (taicpu(p).ops >= 2) and
  1517. (taicpu(p).oper[1]^.typ = top_ref) then
  1518. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1519. if not(TmpResult) and
  1520. (taicpu(p).ops >= 3) and
  1521. (taicpu(p).oper[2]^.typ = top_ref) then
  1522. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1523. end;
  1524. RefInInstruction := TmpResult;
  1525. end;
  1526. function RefInSequence(const ref: TReference; Content: TContent;
  1527. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1528. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1529. tai objects) to see whether ref is used somewhere}
  1530. var p: tai;
  1531. Counter: Word;
  1532. TmpResult: Boolean;
  1533. begin
  1534. p := Content.StartMod;
  1535. TmpResult := False;
  1536. Counter := 1;
  1537. while not(TmpResult) and
  1538. (Counter <= Content.NrOfMods) Do
  1539. begin
  1540. if (p.typ = ait_instruction) and
  1541. RefInInstruction(ref, p, RefsEq, size)
  1542. then TmpResult := True;
  1543. inc(Counter);
  1544. GetNextInstruction(p,p)
  1545. end;
  1546. RefInSequence := TmpResult
  1547. end;
  1548. {$ifdef q+}
  1549. {$q-}
  1550. {$define overflowon}
  1551. {$endif q+}
  1552. // checks whether a write to r2 of size "size" contains address r1
  1553. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1554. var
  1555. realsize1, realsize2: aint;
  1556. begin
  1557. realsize1 := tcgsize2size[size1];
  1558. realsize2 := tcgsize2size[size2];
  1559. arrayrefsoverlapping :=
  1560. (r2.offset <= r1.offset+realsize1) and
  1561. (r1.offset <= r2.offset+realsize2) and
  1562. (r1.segment = r2.segment) and
  1563. (r1.symbol=r2.symbol) and
  1564. (r1.base = r2.base)
  1565. end;
  1566. {$ifdef overflowon}
  1567. {$q+}
  1568. {$undef overflowon}
  1569. {$endif overflowon}
  1570. function isSimpleRef(const ref: treference): boolean;
  1571. { returns true if ref is reference to a local or global variable, to a }
  1572. { parameter or to an object field (this includes arrays). Returns false }
  1573. { otherwise. }
  1574. begin
  1575. isSimpleRef :=
  1576. assigned(ref.symbol) or
  1577. (ref.base = current_procinfo.framepointer);
  1578. end;
  1579. function containsPointerRef(p: tai): boolean;
  1580. { checks if an instruction contains a reference which is a pointer location }
  1581. var
  1582. hp: taicpu;
  1583. count: longint;
  1584. begin
  1585. containsPointerRef := false;
  1586. if p.typ <> ait_instruction then
  1587. exit;
  1588. hp := taicpu(p);
  1589. for count := 0 to hp.ops-1 do
  1590. begin
  1591. case hp.oper[count]^.typ of
  1592. top_ref:
  1593. if not isSimpleRef(hp.oper[count]^.ref^) then
  1594. begin
  1595. containsPointerRef := true;
  1596. exit;
  1597. end;
  1598. top_none:
  1599. exit;
  1600. end;
  1601. end;
  1602. end;
  1603. function containsPointerLoad(c: tcontent): boolean;
  1604. { checks whether the contents of a register contain a pointer reference }
  1605. var
  1606. p: tai;
  1607. count: longint;
  1608. begin
  1609. containsPointerLoad := false;
  1610. p := c.startmod;
  1611. for count := c.nrOfMods downto 1 do
  1612. begin
  1613. if containsPointerRef(p) then
  1614. begin
  1615. containsPointerLoad := true;
  1616. exit;
  1617. end;
  1618. getnextinstruction(p,p);
  1619. end;
  1620. end;
  1621. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1622. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1623. { returns whether the contents c of reg are invalid after regWritten is }
  1624. { is written to ref }
  1625. var
  1626. refsEq: trefCompare;
  1627. begin
  1628. if isSimpleRef(ref) then
  1629. begin
  1630. if (ref.index <> NR_NO) or
  1631. (assigned(ref.symbol) and
  1632. (ref.base <> NR_NO)) then
  1633. { local/global variable or parameter which is an array }
  1634. refsEq := @arrayRefsOverlapping
  1635. else
  1636. { local/global variable or parameter which is not an array }
  1637. refsEq := @refsOverlapping;
  1638. invalsmemwrite :=
  1639. assigned(c.memwrite) and
  1640. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1641. containsPointerRef(c.memwrite)) or
  1642. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1643. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1644. begin
  1645. writeToMemDestroysContents := false;
  1646. exit;
  1647. end;
  1648. { write something to a parameter, a local or global variable, so }
  1649. { * with uncertain optimizations on: }
  1650. { - destroy the contents of registers whose contents have somewhere a }
  1651. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1652. { are being written to memory) is not destroyed if it's StartMod is }
  1653. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1654. { expression based on ref) }
  1655. { * with uncertain optimizations off: }
  1656. { - also destroy registers that contain any pointer }
  1657. with c do
  1658. writeToMemDestroysContents :=
  1659. (typ in [con_ref,con_noRemoveRef]) and
  1660. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1661. containsPointerLoad(c)
  1662. ) or
  1663. (refInSequence(ref,c,refsEq,size) and
  1664. ((supreg <> regWritten) or
  1665. not((nrOfMods = 1) and
  1666. {StarMod is always of the type ait_instruction}
  1667. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1668. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1669. )
  1670. )
  1671. )
  1672. );
  1673. end
  1674. else
  1675. { write something to a pointer location, so }
  1676. { * with uncertain optimzations on: }
  1677. { - do not destroy registers which contain a local/global variable or }
  1678. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1679. { * with uncertain optimzations off: }
  1680. { - destroy every register which contains a memory location }
  1681. begin
  1682. invalsmemwrite :=
  1683. assigned(c.memwrite) and
  1684. (not(cs_opt_size in current_settings.optimizerswitches) or
  1685. containsPointerRef(c.memwrite));
  1686. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1687. begin
  1688. writeToMemDestroysContents := false;
  1689. exit;
  1690. end;
  1691. with c do
  1692. writeToMemDestroysContents :=
  1693. (typ in [con_ref,con_noRemoveRef]) and
  1694. (not(cs_opt_size in current_settings.optimizerswitches) or
  1695. { for movsl }
  1696. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1697. { don't destroy if reg contains a parameter, local or global variable }
  1698. containsPointerLoad(c)
  1699. );
  1700. end;
  1701. end;
  1702. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1703. const c: tcontent): boolean;
  1704. { returns whether the contents c of reg are invalid after destReg is }
  1705. { modified }
  1706. begin
  1707. writeToRegDestroysContents :=
  1708. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1709. sequenceDependsOnReg(c,supreg,destReg);
  1710. end;
  1711. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1712. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1713. { returns whether the contents c of reg are invalid after regWritten is }
  1714. { is written to op }
  1715. begin
  1716. memwritedestroyed := false;
  1717. case op.typ of
  1718. top_reg:
  1719. writeDestroysContents :=
  1720. (getregtype(op.reg) = R_INTREGISTER) and
  1721. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1722. top_ref:
  1723. writeDestroysContents :=
  1724. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1725. else
  1726. writeDestroysContents := false;
  1727. end;
  1728. end;
  1729. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1730. { destroys all registers which possibly contain a reference to ref, regWritten }
  1731. { is the register whose contents are being written to memory (if this proc }
  1732. { is called because of a "mov?? %reg, (mem)" instruction) }
  1733. var
  1734. counter: tsuperregister;
  1735. destroymemwrite: boolean;
  1736. begin
  1737. for counter := RS_EAX to RS_EDI Do
  1738. begin
  1739. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1740. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1741. destroyReg(ptaiprop(p.optInfo), counter, false)
  1742. else if destroymemwrite then
  1743. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1744. end;
  1745. end;
  1746. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1747. var Counter: tsuperregister;
  1748. begin {initializes/desrtoys all registers}
  1749. For Counter := RS_EAX To RS_EDI Do
  1750. begin
  1751. if read then
  1752. readreg(p, Counter);
  1753. DestroyReg(p, Counter, written);
  1754. p^.regs[counter].MemWrite := nil;
  1755. end;
  1756. p^.DirFlag := F_Unknown;
  1757. end;
  1758. procedure DestroyOp(taiObj: tai; const o:Toper);
  1759. {$ifdef statedebug}
  1760. var
  1761. hp: tai;
  1762. {$endif statedebug}
  1763. begin
  1764. case o.typ Of
  1765. top_reg:
  1766. begin
  1767. {$ifdef statedebug}
  1768. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1769. hp.next := taiobj.next;
  1770. hp.previous := taiobj;
  1771. taiobj.next := hp;
  1772. if assigned(hp.next) then
  1773. hp.next.previous := hp;
  1774. {$endif statedebug}
  1775. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1776. end;
  1777. top_ref:
  1778. begin
  1779. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1780. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1781. end;
  1782. end;
  1783. end;
  1784. procedure AddInstr2RegContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1785. p: taicpu; supreg: tsuperregister);
  1786. {$ifdef statedebug}
  1787. var
  1788. hp: tai;
  1789. {$endif statedebug}
  1790. begin
  1791. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1792. if (typ in [con_ref,con_noRemoveRef]) then
  1793. begin
  1794. incState(wstate,1);
  1795. { also store how many instructions are part of the sequence in the first }
  1796. { instructions ptaiprop, so it can be easily accessed from within }
  1797. { CheckSequence}
  1798. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1799. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1800. NrOfInstrSinceLastMod[supreg] := 0;
  1801. invalidateDependingRegs(p.optinfo,supreg);
  1802. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1803. {$ifdef StateDebug}
  1804. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1805. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1806. InsertLLItem(AsmL, p, p.next, hp);
  1807. {$endif StateDebug}
  1808. end
  1809. else
  1810. begin
  1811. {$ifdef statedebug}
  1812. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1813. insertllitem(asml,p,p.next,hp);
  1814. {$endif statedebug}
  1815. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1816. {$ifdef StateDebug}
  1817. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1818. InsertLLItem(AsmL, p, p.next, hp);
  1819. {$endif StateDebug}
  1820. end
  1821. end;
  1822. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1823. p: taicpu; const oper: TOper);
  1824. begin
  1825. if oper.typ = top_reg then
  1826. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1827. else
  1828. begin
  1829. ReadOp(ptaiprop(p.optinfo), oper);
  1830. DestroyOp(p, oper);
  1831. end
  1832. end;
  1833. {*************************************************************************************}
  1834. {************************************** TDFAOBJ **************************************}
  1835. {*************************************************************************************}
  1836. constructor tdfaobj.create(_list: TAsmList);
  1837. begin
  1838. list := _list;
  1839. blockstart := nil;
  1840. blockend := nil;
  1841. nroftaiobjs := 0;
  1842. taipropblock := nil;
  1843. lolab := 0;
  1844. hilab := 0;
  1845. labdif := 0;
  1846. labeltable := nil;
  1847. end;
  1848. procedure tdfaobj.initlabeltable;
  1849. var
  1850. labelfound: boolean;
  1851. p, prev: tai;
  1852. hp1, hp2: tai;
  1853. {$ifdef i386}
  1854. regcounter,
  1855. supreg : tsuperregister;
  1856. {$endif i386}
  1857. usedregs, nodeallocregs: tregset;
  1858. begin
  1859. labelfound := false;
  1860. lolab := maxlongint;
  1861. hilab := 0;
  1862. p := blockstart;
  1863. prev := p;
  1864. while assigned(p) do
  1865. begin
  1866. if (tai(p).typ = ait_label) then
  1867. if not labelcanbeskipped(tai_label(p)) then
  1868. begin
  1869. labelfound := true;
  1870. if (tai_Label(p).labsym.labelnr < lolab) then
  1871. lolab := tai_label(p).labsym.labelnr;
  1872. if (tai_Label(p).labsym.labelnr > hilab) then
  1873. hilab := tai_label(p).labsym.labelnr;
  1874. end;
  1875. prev := p;
  1876. getnextinstruction(p, p);
  1877. end;
  1878. if (prev.typ = ait_marker) and
  1879. (tai_marker(prev).kind = mark_AsmBlockStart) then
  1880. blockend := prev
  1881. else blockend := nil;
  1882. if labelfound then
  1883. labdif := hilab+1-lolab
  1884. else labdif := 0;
  1885. usedregs := [];
  1886. if (labdif <> 0) then
  1887. begin
  1888. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1889. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1890. end;
  1891. p := blockstart;
  1892. prev := p;
  1893. while (p <> blockend) do
  1894. begin
  1895. case p.typ of
  1896. ait_label:
  1897. if not labelcanbeskipped(tai_label(p)) then
  1898. labeltable^[tai_label(p).labsym.labelnr-lolab].taiobj := p;
  1899. {$ifdef i386}
  1900. ait_regalloc:
  1901. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1902. begin
  1903. supreg:=getsupreg(tai_regalloc(p).reg);
  1904. case tai_regalloc(p).ratype of
  1905. ra_alloc :
  1906. begin
  1907. if not(supreg in usedregs) then
  1908. include(usedregs, supreg)
  1909. else
  1910. begin
  1911. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1912. hp1 := tai(p.previous);
  1913. list.remove(p);
  1914. p.free;
  1915. p := hp1;
  1916. end;
  1917. end;
  1918. ra_dealloc :
  1919. begin
  1920. exclude(usedregs, supreg);
  1921. hp1 := p;
  1922. hp2 := nil;
  1923. while not(findregalloc(supreg,tai(hp1.next),ra_alloc)) and
  1924. getnextinstruction(hp1, hp1) and
  1925. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1926. hp2 := hp1;
  1927. if hp2 <> nil then
  1928. begin
  1929. hp1 := tai(p.previous);
  1930. list.remove(p);
  1931. insertllitem(list, hp2, tai(hp2.next), p);
  1932. p := hp1;
  1933. end
  1934. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1935. and getnextinstruction(p,hp1) then
  1936. begin
  1937. hp1 := tai(p.previous);
  1938. list.remove(p);
  1939. p.free;
  1940. p := hp1;
  1941. // don't include here, since then the allocation will be removed when it's processed
  1942. // include(usedregs,supreg);
  1943. end;
  1944. end;
  1945. end;
  1946. end;
  1947. {$endif i386}
  1948. end;
  1949. repeat
  1950. prev := p;
  1951. p := tai(p.next);
  1952. until not(assigned(p)) or
  1953. (p = blockend) or
  1954. not(p.typ in (skipinstr - [ait_regalloc]));
  1955. end;
  1956. {$ifdef i386}
  1957. { don't add deallocation for function result variable or for regvars}
  1958. getNoDeallocRegs(noDeallocRegs);
  1959. usedRegs := usedRegs - noDeallocRegs;
  1960. for regCounter := RS_EAX to RS_EDI do
  1961. if regCounter in usedRegs then
  1962. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1963. {$endif i386}
  1964. end;
  1965. function tdfaobj.pass_1(_blockstart: tai): tai;
  1966. begin
  1967. blockstart := _blockstart;
  1968. initlabeltable;
  1969. pass_1 := blockend;
  1970. end;
  1971. function tdfaobj.initdfapass2: boolean;
  1972. {reserves memory for the PtaiProps in one big memory block when not using
  1973. TP, returns False if not enough memory is available for the optimizer in all
  1974. cases}
  1975. var
  1976. p: tai;
  1977. count: Longint;
  1978. { TmpStr: String; }
  1979. begin
  1980. p := blockstart;
  1981. skiphead(p);
  1982. nroftaiobjs := 0;
  1983. while (p <> blockend) do
  1984. begin
  1985. {$ifDef JumpAnal}
  1986. case p.typ of
  1987. ait_label:
  1988. begin
  1989. if not labelcanbeskipped(tai_label(p)) then
  1990. labeltable^[tai_label(p).labsym.labelnr-lolab].instrnr := nroftaiobjs
  1991. end;
  1992. ait_instruction:
  1993. begin
  1994. if taicpu(p).is_jmp then
  1995. begin
  1996. if (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr >= lolab) and
  1997. (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr <= hilab) then
  1998. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-lolab].refsfound);
  1999. end;
  2000. end;
  2001. { ait_instruction:
  2002. begin
  2003. if (taicpu(p).opcode = A_PUSH) and
  2004. (taicpu(p).oper[0]^.typ = top_symbol) and
  2005. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  2006. begin
  2007. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  2008. if}
  2009. end;
  2010. {$endif JumpAnal}
  2011. inc(NrOftaiObjs);
  2012. getnextinstruction(p,p);
  2013. end;
  2014. if nroftaiobjs <> 0 then
  2015. begin
  2016. initdfapass2 := True;
  2017. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2018. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  2019. p := blockstart;
  2020. skiphead(p);
  2021. for count := 1 To nroftaiobjs do
  2022. begin
  2023. ptaiprop(p.optinfo) := @taipropblock^[count];
  2024. getnextinstruction(p, p);
  2025. end;
  2026. end
  2027. else
  2028. initdfapass2 := false;
  2029. end;
  2030. procedure tdfaobj.dodfapass2;
  2031. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2032. contents for the instructions starting with p. Returns the last tai which has
  2033. been processed}
  2034. var
  2035. curprop, LastFlagsChangeProp: ptaiprop;
  2036. Cnt, InstrCnt : Longint;
  2037. InstrProp: TInsProp;
  2038. UsedRegs: TRegSet;
  2039. prev,p : tai;
  2040. tmpref: TReference;
  2041. tmpsupreg: tsuperregister;
  2042. {$ifdef statedebug}
  2043. hp : tai;
  2044. {$endif}
  2045. {$ifdef AnalyzeLoops}
  2046. hp : tai;
  2047. TmpState: Byte;
  2048. {$endif AnalyzeLoops}
  2049. begin
  2050. p := BlockStart;
  2051. LastFlagsChangeProp := nil;
  2052. prev := nil;
  2053. UsedRegs := [];
  2054. UpdateUsedregs(UsedRegs, p);
  2055. SkipHead(p);
  2056. BlockStart := p;
  2057. InstrCnt := 1;
  2058. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2059. while (p <> Blockend) Do
  2060. begin
  2061. curprop := @taiPropBlock^[InstrCnt];
  2062. if assigned(prev)
  2063. then
  2064. begin
  2065. {$ifdef JumpAnal}
  2066. if (p.Typ <> ait_label) then
  2067. {$endif JumpAnal}
  2068. begin
  2069. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2070. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2071. curprop^.FlagsUsed := false;
  2072. end
  2073. end
  2074. else
  2075. begin
  2076. fillchar(curprop^, SizeOf(curprop^), 0);
  2077. { For tmpreg := RS_EAX to RS_EDI Do
  2078. curprop^.regs[tmpreg].WState := 1;}
  2079. end;
  2080. curprop^.UsedRegs := UsedRegs;
  2081. curprop^.CanBeRemoved := False;
  2082. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2083. For tmpsupreg := RS_EAX To RS_EDI Do
  2084. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2085. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2086. else
  2087. begin
  2088. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2089. curprop^.regs[tmpsupreg].typ := con_unknown;
  2090. end;
  2091. case p.typ Of
  2092. ait_marker:;
  2093. ait_label:
  2094. {$ifndef JumpAnal}
  2095. if not labelCanBeSkipped(tai_label(p)) then
  2096. DestroyAllRegs(curprop,false,false);
  2097. {$else JumpAnal}
  2098. begin
  2099. if not labelCanBeSkipped(tai_label(p)) then
  2100. With LTable^[tai_Label(p).labsym^.labelnr-LoLab] Do
  2101. {$ifDef AnalyzeLoops}
  2102. if (RefsFound = tai_Label(p).labsym^.RefCount)
  2103. {$else AnalyzeLoops}
  2104. if (JmpsProcessed = tai_Label(p).labsym^.RefCount)
  2105. {$endif AnalyzeLoops}
  2106. then
  2107. {all jumps to this label have been found}
  2108. {$ifDef AnalyzeLoops}
  2109. if (JmpsProcessed > 0)
  2110. then
  2111. {$endif AnalyzeLoops}
  2112. {we've processed at least one jump to this label}
  2113. begin
  2114. if (GetLastInstruction(p, hp) and
  2115. not(((hp.typ = ait_instruction)) and
  2116. (taicpu_labeled(hp).is_jmp))
  2117. then
  2118. {previous instruction not a JMP -> the contents of the registers after the
  2119. previous intruction has been executed have to be taken into account as well}
  2120. For tmpsupreg := RS_EAX to RS_EDI Do
  2121. begin
  2122. if (curprop^.regs[tmpsupreg].WState <>
  2123. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2124. then DestroyReg(curprop, tmpsupreg, true)
  2125. end
  2126. end
  2127. {$ifDef AnalyzeLoops}
  2128. else
  2129. {a label from a backward jump (e.g. a loop), no jump to this label has
  2130. already been processed}
  2131. if GetLastInstruction(p, hp) and
  2132. not(hp.typ = ait_instruction) and
  2133. (taicpu_labeled(hp).opcode = A_JMP))
  2134. then
  2135. {previous instruction not a jmp, so keep all the registers' contents from the
  2136. previous instruction}
  2137. begin
  2138. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2139. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2140. end
  2141. else
  2142. {previous instruction a jmp and no jump to this label processed yet}
  2143. begin
  2144. hp := p;
  2145. Cnt := InstrCnt;
  2146. {continue until we find a jump to the label or a label which has already
  2147. been processed}
  2148. while GetNextInstruction(hp, hp) and
  2149. not((hp.typ = ait_instruction) and
  2150. (taicpu(hp).is_jmp) and
  2151. (tasmlabel(taicpu(hp).oper[0]^.sym).labsymabelnr = tai_Label(p).labsym^.labelnr)) and
  2152. not((hp.typ = ait_label) and
  2153. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].RefsFound
  2154. = tai_Label(hp).labsym^.RefCount) and
  2155. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2156. inc(Cnt);
  2157. if (hp.typ = ait_label)
  2158. then
  2159. {there's a processed label after the current one}
  2160. begin
  2161. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2162. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2163. end
  2164. else
  2165. {there's no label anymore after the current one, or they haven't been
  2166. processed yet}
  2167. begin
  2168. GetLastInstruction(p, hp);
  2169. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2170. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2171. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2172. end
  2173. end
  2174. {$endif AnalyzeLoops}
  2175. else
  2176. {not all references to this label have been found, so destroy all registers}
  2177. begin
  2178. GetLastInstruction(p, hp);
  2179. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2180. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2181. DestroyAllRegs(curprop,true,true)
  2182. end;
  2183. end;
  2184. {$endif JumpAnal}
  2185. ait_stab, ait_force_line, ait_function_name:;
  2186. ait_align: ; { may destroy flags !!! }
  2187. ait_instruction:
  2188. begin
  2189. if taicpu(p).is_jmp or
  2190. (taicpu(p).opcode = A_JMP) then
  2191. begin
  2192. {$ifNDef JumpAnal}
  2193. for tmpsupreg := RS_EAX to RS_EDI do
  2194. with curprop^.regs[tmpsupreg] do
  2195. case typ of
  2196. con_ref: typ := con_noRemoveRef;
  2197. con_const: typ := con_noRemoveConst;
  2198. con_invalid: typ := con_unknown;
  2199. end;
  2200. {$else JumpAnal}
  2201. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-LoLab] Do
  2202. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2203. begin
  2204. if (InstrCnt < InstrNr)
  2205. then
  2206. {forward jump}
  2207. if (JmpsProcessed = 0) then
  2208. {no jump to this label has been processed yet}
  2209. begin
  2210. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2211. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2212. inc(JmpsProcessed);
  2213. end
  2214. else
  2215. begin
  2216. For tmpreg := RS_EAX to RS_EDI Do
  2217. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2218. curprop^.regs[tmpreg].WState) then
  2219. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2220. inc(JmpsProcessed);
  2221. end
  2222. {$ifdef AnalyzeLoops}
  2223. else
  2224. { backward jump, a loop for example}
  2225. { if (JmpsProcessed > 0) or
  2226. not(GetLastInstruction(taiObj, hp) and
  2227. (hp.typ = ait_labeled_instruction) and
  2228. (taicpu_labeled(hp).opcode = A_JMP))
  2229. then}
  2230. {instruction prior to label is not a jmp, or at least one jump to the label
  2231. has yet been processed}
  2232. begin
  2233. inc(JmpsProcessed);
  2234. For tmpreg := RS_EAX to RS_EDI Do
  2235. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2236. curprop^.regs[tmpreg].WState)
  2237. then
  2238. begin
  2239. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2240. Cnt := InstrNr;
  2241. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2242. begin
  2243. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2244. inc(Cnt);
  2245. end;
  2246. while (Cnt <= InstrCnt) Do
  2247. begin
  2248. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2249. inc(Cnt)
  2250. end
  2251. end;
  2252. end
  2253. { else }
  2254. {instruction prior to label is a jmp and no jumps to the label have yet been
  2255. processed}
  2256. { begin
  2257. inc(JmpsProcessed);
  2258. For tmpreg := RS_EAX to RS_EDI Do
  2259. begin
  2260. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2261. Cnt := InstrNr;
  2262. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2263. begin
  2264. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2265. inc(Cnt);
  2266. end;
  2267. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2268. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2269. begin
  2270. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2271. inc(Cnt);
  2272. end;
  2273. while (Cnt <= InstrCnt) Do
  2274. begin
  2275. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2276. inc(Cnt)
  2277. end
  2278. end
  2279. end}
  2280. {$endif AnalyzeLoops}
  2281. end;
  2282. {$endif JumpAnal}
  2283. end
  2284. else
  2285. begin
  2286. InstrProp := InsProp[taicpu(p).opcode];
  2287. case taicpu(p).opcode Of
  2288. A_MOV, A_MOVZX, A_MOVSX:
  2289. begin
  2290. case taicpu(p).oper[0]^.typ Of
  2291. top_ref, top_reg:
  2292. case taicpu(p).oper[1]^.typ Of
  2293. top_reg:
  2294. begin
  2295. {$ifdef statedebug}
  2296. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2297. insertllitem(list,p,p.next,hp);
  2298. {$endif statedebug}
  2299. readOp(curprop, taicpu(p).oper[0]^);
  2300. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2301. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2302. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2303. begin
  2304. with curprop^.regs[tmpsupreg] Do
  2305. begin
  2306. incState(wstate,1);
  2307. { also store how many instructions are part of the sequence in the first }
  2308. { instruction's ptaiprop, so it can be easily accessed from within }
  2309. { CheckSequence }
  2310. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2311. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2312. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2313. { Destroy the contents of the registers }
  2314. { that depended on the previous value of }
  2315. { this register }
  2316. invalidateDependingRegs(curprop,tmpsupreg);
  2317. curprop^.regs[tmpsupreg].memwrite := nil;
  2318. end;
  2319. end
  2320. else
  2321. begin
  2322. {$ifdef statedebug}
  2323. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2324. insertllitem(list,p,p.next,hp);
  2325. {$endif statedebug}
  2326. destroyReg(curprop, tmpsupreg, true);
  2327. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2328. with curprop^.regs[tmpsupreg] Do
  2329. begin
  2330. typ := con_ref;
  2331. startmod := p;
  2332. nrOfMods := 1;
  2333. end
  2334. end;
  2335. {$ifdef StateDebug}
  2336. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2337. insertllitem(list,p,p.next,hp);
  2338. {$endif StateDebug}
  2339. end;
  2340. top_ref:
  2341. begin
  2342. readref(curprop, taicpu(p).oper[1]^.ref);
  2343. if taicpu(p).oper[0]^.typ = top_reg then
  2344. begin
  2345. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2346. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2347. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2348. taicpu(p);
  2349. end
  2350. else
  2351. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2352. end;
  2353. end;
  2354. top_Const:
  2355. begin
  2356. case taicpu(p).oper[1]^.typ Of
  2357. top_reg:
  2358. begin
  2359. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2360. {$ifdef statedebug}
  2361. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2362. insertllitem(list,p,p.next,hp);
  2363. {$endif statedebug}
  2364. With curprop^.regs[tmpsupreg] Do
  2365. begin
  2366. DestroyReg(curprop, tmpsupreg, true);
  2367. typ := Con_Const;
  2368. StartMod := p;
  2369. nrOfMods := 1;
  2370. end
  2371. end;
  2372. top_ref:
  2373. begin
  2374. readref(curprop, taicpu(p).oper[1]^.ref);
  2375. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2376. end;
  2377. end;
  2378. end;
  2379. end;
  2380. end;
  2381. A_DIV, A_IDIV, A_MUL:
  2382. begin
  2383. ReadOp(curprop, taicpu(p).oper[0]^);
  2384. readreg(curprop,RS_EAX);
  2385. if (taicpu(p).OpCode = A_IDIV) or
  2386. (taicpu(p).OpCode = A_DIV) then
  2387. begin
  2388. readreg(curprop,RS_EDX);
  2389. end;
  2390. {$ifdef statedebug}
  2391. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2392. insertllitem(list,p,p.next,hp);
  2393. {$endif statedebug}
  2394. { DestroyReg(curprop, RS_EAX, true);}
  2395. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2396. taicpu(p), RS_EAX);
  2397. DestroyReg(curprop, RS_EDX, true);
  2398. LastFlagsChangeProp := curprop;
  2399. end;
  2400. A_IMUL:
  2401. begin
  2402. ReadOp(curprop,taicpu(p).oper[0]^);
  2403. if (taicpu(p).ops >= 2) then
  2404. ReadOp(curprop,taicpu(p).oper[1]^);
  2405. if (taicpu(p).ops <= 2) then
  2406. if (taicpu(p).ops=1) then
  2407. begin
  2408. readreg(curprop,RS_EAX);
  2409. {$ifdef statedebug}
  2410. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2411. insertllitem(list,p,p.next,hp);
  2412. {$endif statedebug}
  2413. { DestroyReg(curprop, RS_EAX, true); }
  2414. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2415. taicpu(p), RS_EAX);
  2416. DestroyReg(curprop,RS_EDX, true)
  2417. end
  2418. else
  2419. AddInstr2OpContents(
  2420. {$ifdef statedebug}list,{$endif}
  2421. taicpu(p), taicpu(p).oper[1]^)
  2422. else
  2423. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2424. taicpu(p), taicpu(p).oper[2]^);
  2425. LastFlagsChangeProp := curprop;
  2426. end;
  2427. A_LEA:
  2428. begin
  2429. readop(curprop,taicpu(p).oper[0]^);
  2430. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2431. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2432. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2433. else
  2434. begin
  2435. {$ifdef statedebug}
  2436. hp := tai_comment.Create(strpnew('destroying & initing'+
  2437. std_regname(taicpu(p).oper[1]^.reg)));
  2438. insertllitem(list,p,p.next,hp);
  2439. {$endif statedebug}
  2440. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2441. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2442. begin
  2443. typ := con_ref;
  2444. startmod := p;
  2445. nrOfMods := 1;
  2446. end
  2447. end;
  2448. end;
  2449. else
  2450. begin
  2451. Cnt := 1;
  2452. while (Cnt <= maxinschanges) and
  2453. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2454. begin
  2455. case InstrProp.Ch[Cnt] Of
  2456. Ch_REAX..Ch_REDI:
  2457. begin
  2458. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2459. readreg(curprop,tmpsupreg);
  2460. end;
  2461. Ch_WEAX..Ch_RWEDI:
  2462. begin
  2463. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2464. begin
  2465. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2466. readreg(curprop,tmpsupreg);
  2467. end;
  2468. {$ifdef statedebug}
  2469. hp := tai_comment.Create(strpnew('destroying '+
  2470. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2471. insertllitem(list,p,p.next,hp);
  2472. {$endif statedebug}
  2473. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2474. DestroyReg(curprop,tmpsupreg, true);
  2475. end;
  2476. Ch_MEAX..Ch_MEDI:
  2477. begin
  2478. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2479. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2480. taicpu(p),tmpsupreg);
  2481. end;
  2482. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2483. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2484. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2485. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2486. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2487. Ch_Wop1..Ch_RWop1:
  2488. begin
  2489. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2490. ReadOp(curprop, taicpu(p).oper[0]^);
  2491. DestroyOp(p, taicpu(p).oper[0]^);
  2492. end;
  2493. Ch_Mop1:
  2494. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2495. taicpu(p), taicpu(p).oper[0]^);
  2496. Ch_Wop2..Ch_RWop2:
  2497. begin
  2498. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2499. ReadOp(curprop, taicpu(p).oper[1]^);
  2500. DestroyOp(p, taicpu(p).oper[1]^);
  2501. end;
  2502. Ch_Mop2:
  2503. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2504. taicpu(p), taicpu(p).oper[1]^);
  2505. Ch_WOp3..Ch_RWOp3:
  2506. begin
  2507. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2508. ReadOp(curprop, taicpu(p).oper[2]^);
  2509. DestroyOp(p, taicpu(p).oper[2]^);
  2510. end;
  2511. Ch_Mop3:
  2512. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2513. taicpu(p), taicpu(p).oper[2]^);
  2514. Ch_WMemEDI:
  2515. begin
  2516. readreg(curprop, RS_EDI);
  2517. fillchar(tmpref, SizeOf(tmpref), 0);
  2518. tmpref.base := NR_EDI;
  2519. tmpref.index := NR_EDI;
  2520. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2521. end;
  2522. Ch_RFlags:
  2523. if assigned(LastFlagsChangeProp) then
  2524. LastFlagsChangeProp^.FlagsUsed := true;
  2525. Ch_WFlags:
  2526. LastFlagsChangeProp := curprop;
  2527. Ch_RWFlags:
  2528. begin
  2529. if assigned(LastFlagsChangeProp) then
  2530. LastFlagsChangeProp^.FlagsUsed := true;
  2531. LastFlagsChangeProp := curprop;
  2532. end;
  2533. Ch_FPU:;
  2534. else
  2535. begin
  2536. {$ifdef statedebug}
  2537. hp := tai_comment.Create(strpnew(
  2538. 'destroying all regs for prev instruction'));
  2539. insertllitem(list,p, p.next,hp);
  2540. {$endif statedebug}
  2541. DestroyAllRegs(curprop,true,true);
  2542. LastFlagsChangeProp := curprop;
  2543. end;
  2544. end;
  2545. inc(Cnt);
  2546. end
  2547. end;
  2548. end;
  2549. end;
  2550. end
  2551. else
  2552. begin
  2553. {$ifdef statedebug}
  2554. hp := tai_comment.Create(strpnew(
  2555. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2556. insertllitem(list,p, p.next,hp);
  2557. {$endif statedebug}
  2558. DestroyAllRegs(curprop,true,true);
  2559. end;
  2560. end;
  2561. inc(InstrCnt);
  2562. prev := p;
  2563. GetNextInstruction(p, p);
  2564. end;
  2565. end;
  2566. function tdfaobj.pass_generate_code: boolean;
  2567. begin
  2568. if initdfapass2 then
  2569. begin
  2570. dodfapass2;
  2571. pass_generate_code := true
  2572. end
  2573. else
  2574. pass_generate_code := false;
  2575. end;
  2576. {$ifopt r+}
  2577. {$define rangewason}
  2578. {$r-}
  2579. {$endif}
  2580. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2581. begin
  2582. if (sym.labelnr >= lolab) and
  2583. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2584. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2585. else
  2586. getlabelwithsym := nil;
  2587. end;
  2588. {$ifdef rangewason}
  2589. {$r+}
  2590. {$undef rangewason}
  2591. {$endif}
  2592. procedure tdfaobj.clear;
  2593. begin
  2594. if labdif <> 0 then
  2595. begin
  2596. freemem(labeltable);
  2597. labeltable := nil;
  2598. end;
  2599. if assigned(taipropblock) then
  2600. begin
  2601. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2602. taipropblock := nil;
  2603. end;
  2604. end;
  2605. end.