sergei a3c439c60f - No longer insert BlockStart markers into asmlists. The presence of these markers disrupts peephole optimizations and require additional checks all over the place, causing various workarounds/hacks (like TAsmList.Create_without_marker) to start building up. 11 年之前
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aasmcpu.pas d37e72dbf9 * ARM: instructions do modify the base register of pre/postindexed references. Report this fact in spilling_get_operation_type_ref and RegModifiedByInstruction functions. 11 年之前
agarmgas.pas 3309254474 * do not write a space before the condition for instructions without operands, not sure why this was there 11 年之前
aoptcpu.pas a3c439c60f - No longer insert BlockStart markers into asmlists. The presence of these markers disrupts peephole optimizations and require additional checks all over the place, causing various workarounds/hacks (like TAsmList.Create_without_marker) to start building up. 11 年之前
aoptcpub.pas d37e72dbf9 * ARM: instructions do modify the base register of pre/postindexed references. Report this fact in spilling_get_operation_type_ref and RegModifiedByInstruction functions. 11 年之前
aoptcpuc.pas 790a4fe2d3 * log and id tags removed 20 年之前
aoptcpud.pas 790a4fe2d3 * log and id tags removed 20 年之前
armatt.inc b67e4fb8b3 added the ADR ARM pseudo instruction to instruction list 11 年之前
armatts.inc b67e4fb8b3 added the ADR ARM pseudo instruction to instruction list 11 年之前
armins.dat b67e4fb8b3 added the ADR ARM pseudo instruction to instruction list 11 年之前
armnop.inc 666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) 13 年之前
armop.inc b67e4fb8b3 added the ADR ARM pseudo instruction to instruction list 11 年之前
armreg.dat 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 年之前
armtab.inc 666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) 13 年之前
cgcpu.pas 1b0a1f4508 ARM: mimic what GNU C does while calling the profiling mcount on ARM 11 年之前
cpubase.pas fb52392e20 Reformat and comment is_thumb32_imm 11 年之前
cpuelf.pas 4a90d7e3de + ARM internal linker: very initial support for Thumb mode, helloworld-class programs compiled with "-Cparmv6m -CIthumb" can now run. 11 年之前
cpuinfo.pas 0dc39b5d63 Applied patch from Michael Ring that adds some startup code for some new stm32f0 and stm32f1 controllers, and fixes naming on some LPC ARMv6m controllers. 11 年之前
cpunode.pas b57c95043f + support overriding tdef/tsym methods with target-specific functionality: 11 年之前
cpupara.pas 5053a39501 * moved ARM-specific tprocdef.total_stackframe_size field to cpu-specific 11 年之前
cpupi.pas eeb15fc445 * Added virtual method tprocinfo.postprocess_code and moved target-specific processing from base class into target-specific descendant classes (ARM and AVR, other targets still to do). 11 年之前
cputarg.pas d26f0552a0 * Sync with trunk r23404. 12 年之前
hlcgcpu.pas 72e9cfee24 * create/destroy also the high level code generator for all architectures, 14 年之前
itcpugas.pas 47d43750e4 * remove unused units from uses statements 12 年之前
narmadd.pas 2fa7171a45 * generate AND for small set comparisons also when only set vars are involved using the cg class, so it works for arm thumb as well 11 年之前
narmcal.pas 8b8a786823 * moved ARM/x86 ifdef'ed code from ncgcal to virtual methods 12 年之前
narmcnv.pas 5051453806 + support for LOC_(C)MMREGISTER in hlcg 12 年之前
narmcon.pas 196436b7e7 * ARM: Test if range check of floating point constants is necessary in the same way as on other targets. This should have been part of r10940 6 years ago... 11 年之前
narminl.pas 96b73b0076 Fixed generation of abs calls for thumb and thumb-2 targets. 11 年之前
narmmat.pas 0cb1a129b3 {ARM} Implement usage of generic division-by-const optimization 11 年之前
narmmem.pas d4968e054b + arm: tsettings.instructionset 12 年之前
narmset.pas db01c50a4f * fixes jump table generate for arm thumb 11 年之前
pp.lpi.template 1f032375c3 * improved template with help from Mattias Gaertner 19 年之前
raarm.pas 780e75bfac o patch by Jeppe Johansen to fix mantis #17472: 14 年之前
raarmgas.pas 09608a1c28 * fix warnings when compiling the compiler with DFA optimizer enabled on ARM 11 年之前
rarmcon.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 年之前
rarmdwa.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 年之前
rarmnor.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 年之前
rarmnum.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 年之前
rarmrni.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 年之前
rarmsri.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 年之前
rarmsta.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 年之前
rarmstd.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 年之前
rarmsup.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 年之前
rgcpu.pas 09728a9ae2 * improved r28534: LDR/STR on thumb do not support registers >r7 as destination/source 11 年之前
symcpu.pas 02495c17bd Fix a typo. The CPU specific version of "ttypesym" should be called "tcputypesym" and not "tcpuypesym". 11 年之前