cgcpu.pas 42 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by the FPC team
  4. This unit implements the code generator for the 680x0
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. cginfo,cgbase,cgobj,
  23. aasmbase,aasmtai,aasmcpu,
  24. cpubase,cpuinfo,cpupara,
  25. node,symconst;
  26. type
  27. tcg68k = class(tcg)
  28. procedure a_call_name(list : taasmoutput;const s : string);override;
  29. procedure a_call_ref(list : taasmoutput;const ref : treference);override;
  30. procedure a_load_const_reg(list : taasmoutput;size : tcgsize;a : aword;register : tregister);override;
  31. procedure a_load_reg_ref(list : taasmoutput;size : tcgsize;register : tregister;const ref : treference);override;
  32. procedure a_load_reg_reg(list : taasmoutput;size : tcgsize;reg1,reg2 : tregister);override;
  33. procedure a_load_ref_reg(list : taasmoutput;size : tcgsize;const ref : treference;register : tregister);override;
  34. procedure a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister);override;
  35. procedure a_loadfpu_reg_reg(list: taasmoutput; reg1, reg2: tregister); override;
  36. procedure a_loadfpu_ref_reg(list: taasmoutput; size: tcgsize; const ref: treference; reg: tregister); override;
  37. procedure a_loadfpu_reg_ref(list: taasmoutput; size: tcgsize; reg: tregister; const ref: treference); override;
  38. procedure a_loadmm_reg_reg(list: taasmoutput; reg1, reg2: tregister); override;
  39. procedure a_loadmm_ref_reg(list: taasmoutput; const ref: treference; reg: tregister); override;
  40. procedure a_loadmm_reg_ref(list: taasmoutput; reg: tregister; const ref: treference); override;
  41. procedure a_parammm_reg(list: taasmoutput; reg: tregister); override;
  42. procedure a_op_const_reg(list : taasmoutput; Op: TOpCG; a: AWord; reg: TRegister); override;
  43. procedure a_op_reg_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); override;
  44. procedure a_cmp_const_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aword;reg : tregister;
  45. l : tasmlabel);override;
  46. procedure a_cmp_reg_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
  47. procedure a_jmp_always(list : taasmoutput;l: tasmlabel); override;
  48. procedure a_jmp_flags(list : taasmoutput;const f : TResFlags;l: tasmlabel); override;
  49. procedure g_flags2reg(list: taasmoutput; size: TCgSize; const f: tresflags; reg: TRegister); override;
  50. procedure g_concatcopy(list : taasmoutput;const source,dest : treference;len : aword;delsource,loadref : boolean);override;
  51. { generates overflow checking code for a node }
  52. procedure g_overflowcheck(list: taasmoutput; const p: tnode); override;
  53. procedure g_copyvaluepara_openarray(list : taasmoutput;const ref:treference;elesize:integer); override;
  54. {
  55. This routine should setup the stack frame and allocate @var(localsize) bytes on
  56. the local stack (for local variables). It should also setup the frame pointer,
  57. so that all variables are now accessed via the frame pointer register.
  58. }
  59. procedure g_stackframe_entry(list : taasmoutput;localsize : longint);override;
  60. { restores the previous frame pointer at procedure exit }
  61. procedure g_restore_frame_pointer(list : taasmoutput);override;
  62. { This routine should update the stack pointer so that parasize are freed
  63. from the stack. It should also emit the return instruction
  64. }
  65. procedure g_return_from_proc(list : taasmoutput;parasize : aword);override;
  66. procedure g_save_standard_registers(list : taasmoutput);override;
  67. procedure g_restore_standard_registers(list : taasmoutput);override;
  68. procedure g_save_all_registers(list : taasmoutput);override;
  69. procedure g_restore_all_registers(list : taasmoutput;selfused,accused,acchiused:boolean);override;
  70. protected
  71. function fixref(list: taasmoutput; var ref: treference): boolean;
  72. private
  73. { # Sign or zero extend the register to a full 32-bit value.
  74. The new value is left in the same register.
  75. }
  76. procedure sign_extend(list: taasmoutput;_oldsize : tcgsize; reg: tregister);
  77. procedure a_jmp_cond(list : taasmoutput;cond : TOpCmp;l: tasmlabel);
  78. end;
  79. { This function returns true if the reference+offset is valid.
  80. Otherwise extra code must be generated to solve the reference.
  81. On the m68k, this verifies that the reference is valid
  82. (e.g : if index register is used, then the max displacement
  83. is 256 bytes, if only base is used, then max displacement
  84. is 32K
  85. }
  86. function isvalidrefoffset(const ref: treference): boolean;
  87. const
  88. TCGSize2OpSize: Array[tcgsize] of topsize =
  89. (S_NO,S_B,S_W,S_L,S_L,S_B,S_W,S_L,S_L,
  90. S_FS,S_FD,S_FX,S_NO,
  91. S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO);
  92. Implementation
  93. uses
  94. globtype,globals,verbose,systems,cutils,
  95. symdef,symsym,defbase,paramgr,
  96. rgobj,tgobj,rgcpu;
  97. const
  98. { opcode table lookup }
  99. topcg2tasmop: Array[topcg] of tasmop =
  100. (
  101. A_NONE,
  102. A_ADD,
  103. A_AND,
  104. A_DIVU,
  105. A_DIVS,
  106. A_MULS,
  107. A_MULU,
  108. A_NEG,
  109. A_NOT,
  110. A_OR,
  111. A_ASR,
  112. A_LSL,
  113. A_LSR,
  114. A_SUB,
  115. A_EOR
  116. );
  117. TOpCmp2AsmCond: Array[topcmp] of TAsmCond =
  118. (
  119. C_NONE,
  120. C_EQ,
  121. C_GT,
  122. C_LT,
  123. C_GE,
  124. C_LE,
  125. C_NE,
  126. C_LS,
  127. C_CS,
  128. C_CC,
  129. C_HI
  130. );
  131. function isvalidrefoffset(const ref: treference): boolean;
  132. begin
  133. isvalidrefoffset := true;
  134. if ref.index <> R_NO then
  135. begin
  136. if ref.base <> R_NO then
  137. internalerror(20020814);
  138. if (ref.offset < low(shortint)) or (ref.offset > high(shortint)) then
  139. isvalidrefoffset := false
  140. end
  141. else
  142. begin
  143. if (ref.offset < low(smallint)) or (ref.offset > high(smallint)) then
  144. isvalidrefoffset := false;
  145. end;
  146. end;
  147. function tcg68k.fixref(list: taasmoutput; var ref: treference): boolean;
  148. var
  149. tmpreg: tregister;
  150. begin
  151. result := false;
  152. if (ref.base <> R_NO) then
  153. begin
  154. if (ref.index <> R_NO) and assigned(ref.symbol) then
  155. internalerror(20020814);
  156. { base + reg }
  157. if ref.index <> R_NO then
  158. begin
  159. { base + reg + offset }
  160. if (ref.offset < low(shortint)) or (ref.offset > high(shortint)) then
  161. begin
  162. list.concat(taicpu.op_const_reg(A_ADD,S_L,ref.offset,ref.base));
  163. fixref := true;
  164. ref.offset := 0;
  165. exit;
  166. end;
  167. end
  168. else
  169. { base + offset }
  170. if (ref.offset < low(smallint)) or (ref.offset > high(smallint)) then
  171. begin
  172. list.concat(taicpu.op_const_reg(A_ADD,S_L,ref.offset,ref.base));
  173. fixref := true;
  174. ref.offset := 0;
  175. exit;
  176. end;
  177. end;
  178. end;
  179. procedure tcg68k.a_call_name(list : taasmoutput;const s : string);
  180. begin
  181. list.concat(taicpu.op_sym(A_JSR,S_NO,objectlibrary.newasmsymbol(s)));
  182. end;
  183. procedure tcg68k.a_call_ref(list : taasmoutput;const ref : treference);
  184. var
  185. href : treference;
  186. begin
  187. href := ref;
  188. fixref(list,href);
  189. list.concat(taicpu.op_ref(A_JSR,S_NO,href));
  190. end;
  191. procedure tcg68k.a_load_const_reg(list : taasmoutput;size : tcgsize;a : aword;register : tregister);
  192. begin
  193. if (rg.isaddressregister(register)) then
  194. begin
  195. list.concat(taicpu.op_const_reg(A_MOVE,S_L,a,register))
  196. end
  197. else
  198. if a = 0 then
  199. list.concat(taicpu.op_reg(A_CLR,S_L,register))
  200. else
  201. begin
  202. if (longint(a) >= low(shortint)) and (longint(a) <= high(shortint)) then
  203. list.concat(taicpu.op_const_reg(A_MOVEQ,S_L,a,register))
  204. else
  205. list.concat(taicpu.op_const_reg(A_MOVE,S_L,a,register))
  206. end;
  207. end;
  208. procedure tcg68k.a_load_reg_ref(list : taasmoutput;size : tcgsize;register : tregister;const ref : treference);
  209. var
  210. href : treference;
  211. begin
  212. href := ref;
  213. fixref(list,href);
  214. { move to destination reference }
  215. list.concat(taicpu.op_reg_ref(A_MOVE,TCGSize2OpSize[size],register,href));
  216. end;
  217. procedure tcg68k.a_load_reg_reg(list : taasmoutput;size : tcgsize;reg1,reg2 : tregister);
  218. begin
  219. { move to destination register }
  220. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg1,reg2));
  221. { zero/sign extend register to 32-bit }
  222. sign_extend(list, size, reg2);
  223. end;
  224. procedure tcg68k.a_load_ref_reg(list : taasmoutput;size : tcgsize;const ref : treference;register : tregister);
  225. var
  226. href : treference;
  227. begin
  228. href := ref;
  229. fixref(list,href);
  230. list.concat(taicpu.op_ref_reg(A_MOVE,TCGSize2OpSize[size],href,register));
  231. { extend the value in the register }
  232. sign_extend(list, size, register);
  233. end;
  234. procedure tcg68k.a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister);
  235. var
  236. href : treference;
  237. begin
  238. if (not rg.isaddressregister(r)) then
  239. begin
  240. internalerror(2002072901);
  241. end;
  242. href:=ref;
  243. fixref(list, href);
  244. list.concat(taicpu.op_ref_reg(A_LEA,S_L,href,r));
  245. end;
  246. procedure tcg68k.a_loadfpu_reg_reg(list: taasmoutput; reg1, reg2: tregister);
  247. begin
  248. list.concat(taicpu.op_reg_reg(A_FMOVE,S_FD,reg1,reg2));
  249. end;
  250. procedure tcg68k.a_loadfpu_ref_reg(list: taasmoutput; size: tcgsize; const ref: treference; reg: tregister);
  251. var
  252. opsize : topsize;
  253. href : treference;
  254. begin
  255. opsize := tcgsize2opsize[size];
  256. { extended is not supported, since it is not available on Coldfire }
  257. if opsize = S_FX then
  258. internalerror(20020729);
  259. fixref(list,href);
  260. list.concat(taicpu.op_ref_reg(A_FMOVE,opsize,href,reg));
  261. end;
  262. procedure tcg68k.a_loadfpu_reg_ref(list: taasmoutput; size: tcgsize; reg: tregister; const ref: treference);
  263. var
  264. opsize : topsize;
  265. begin
  266. opsize := tcgsize2opsize[size];
  267. { extended is not supported, since it is not available on Coldfire }
  268. if opsize = S_FX then
  269. internalerror(20020729);
  270. list.concat(taicpu.op_reg_ref(A_FMOVE,opsize,reg, ref));
  271. end;
  272. procedure tcg68k.a_loadmm_reg_reg(list: taasmoutput; reg1, reg2: tregister);
  273. begin
  274. internalerror(20020729);
  275. end;
  276. procedure tcg68k.a_loadmm_ref_reg(list: taasmoutput; const ref: treference; reg: tregister);
  277. begin
  278. internalerror(20020729);
  279. end;
  280. procedure tcg68k.a_loadmm_reg_ref(list: taasmoutput; reg: tregister; const ref: treference);
  281. begin
  282. internalerror(20020729);
  283. end;
  284. procedure tcg68k.a_parammm_reg(list: taasmoutput; reg: tregister);
  285. begin
  286. internalerror(20020729);
  287. end;
  288. procedure tcg68k.a_op_const_reg(list : taasmoutput; Op: TOpCG; a: AWord; reg: TRegister);
  289. var
  290. scratch_reg : tregister;
  291. scratch_reg2: tregister;
  292. opcode : tasmop;
  293. begin
  294. { need to emit opcode? }
  295. if not optimize_const_reg(op, a) then
  296. exit;
  297. opcode := topcg2tasmop[op];
  298. case op of
  299. OP_ADD :
  300. Begin
  301. if (a >= 1) and (a <= 8) then
  302. list.concat(taicpu.op_const_reg(A_ADDQ,S_L,a, reg))
  303. else
  304. begin
  305. { all others, including coldfire }
  306. list.concat(taicpu.op_const_reg(A_ADD,S_L,a, reg));
  307. end;
  308. end;
  309. OP_AND,
  310. OP_OR:
  311. Begin
  312. list.concat(taicpu.op_const_reg(topcg2tasmop[op],S_L,a, reg));
  313. end;
  314. OP_DIV :
  315. Begin
  316. {$warning To complete DIV opcode}
  317. end;
  318. OP_IDIV :
  319. Begin
  320. {$warning To complete IDIV opcode}
  321. end;
  322. OP_IMUL :
  323. Begin
  324. if aktoptprocessor = MC68000 then
  325. begin
  326. rg.getexplicitregisterint(list,R_D0);
  327. rg.getexplicitregisterint(list,R_D1);
  328. list.concat(taicpu.op_const_reg(A_MOVE,S_L,a, R_D0));
  329. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg, R_D1));
  330. cg.a_call_name(list,'FPC_MUL_LONGINT');
  331. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,R_D0, reg));
  332. rg.ungetregisterint(list,R_D0);
  333. rg.ungetregisterint(list,R_D1);
  334. end
  335. else
  336. begin
  337. if (rg.isaddressregister(reg)) then
  338. begin
  339. scratch_reg := cg.get_scratch_reg_int(list);
  340. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg, scratch_reg));
  341. list.concat(taicpu.op_const_reg(A_MULS,S_L,a,scratch_reg));
  342. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,scratch_reg,reg));
  343. cg.free_scratch_reg(list,scratch_reg);
  344. end
  345. else
  346. list.concat(taicpu.op_const_reg(A_MULS,S_L,a,reg));
  347. end;
  348. end;
  349. OP_MUL :
  350. Begin
  351. if aktoptprocessor = MC68000 then
  352. begin
  353. rg.getexplicitregisterint(list,R_D0);
  354. rg.getexplicitregisterint(list,R_D1);
  355. list.concat(taicpu.op_const_reg(A_MOVE,S_L,a, R_D0));
  356. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg, R_D1));
  357. cg.a_call_name(list,'FPC_MUL_CARDINAL');
  358. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,R_D0, reg));
  359. rg.ungetregisterint(list,R_D0);
  360. rg.ungetregisterint(list,R_D1);
  361. end
  362. else
  363. begin
  364. if (rg.isaddressregister(reg)) then
  365. begin
  366. scratch_reg := cg.get_scratch_reg_int(list);
  367. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg, scratch_reg));
  368. list.concat(taicpu.op_const_reg(A_MULU,S_L,a,scratch_reg));
  369. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,scratch_reg,reg));
  370. cg.free_scratch_reg(list,scratch_reg);
  371. end
  372. else
  373. list.concat(taicpu.op_const_reg(A_MULU,S_L,a,reg));
  374. end;
  375. end;
  376. OP_SAR,
  377. OP_SHL,
  378. OP_SHR :
  379. Begin
  380. if (a >= 1) and (a <= 8) then
  381. begin
  382. { now allowed to shift an address register }
  383. if (rg.isaddressregister(reg)) then
  384. begin
  385. scratch_reg := cg.get_scratch_reg_int(list);
  386. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg, scratch_reg));
  387. list.concat(taicpu.op_const_reg(opcode,S_L,a, scratch_reg));
  388. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,scratch_reg,reg));
  389. cg.free_scratch_reg(list,scratch_reg);
  390. end
  391. else
  392. list.concat(taicpu.op_const_reg(opcode,S_L,a, reg));
  393. end
  394. else
  395. begin
  396. { we must load the data into a register ... :() }
  397. scratch_reg := cg.get_scratch_reg_int(list);
  398. list.concat(taicpu.op_const_reg(A_MOVE,S_L,a, scratch_reg));
  399. { again... since shifting with address register is not allowed }
  400. if (rg.isaddressregister(reg)) then
  401. begin
  402. scratch_reg2 := cg.get_scratch_reg_int(list);
  403. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg, scratch_reg2));
  404. list.concat(taicpu.op_reg_reg(opcode,S_L,scratch_reg, scratch_reg2));
  405. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,scratch_reg2,reg));
  406. cg.free_scratch_reg(list,scratch_reg2);
  407. end
  408. else
  409. list.concat(taicpu.op_reg_reg(opcode,S_L,scratch_reg, reg));
  410. cg.free_scratch_reg(list,scratch_reg);
  411. end;
  412. end;
  413. OP_SUB :
  414. Begin
  415. if (a >= 1) and (a <= 8) then
  416. list.concat(taicpu.op_const_reg(A_SUBQ,S_L,a,reg))
  417. else
  418. begin
  419. { all others, including coldfire }
  420. list.concat(taicpu.op_const_reg(A_SUB,S_L,a, reg));
  421. end;
  422. end;
  423. OP_XOR :
  424. Begin
  425. list.concat(taicpu.op_const_reg(A_EORI,S_L,a, reg));
  426. end;
  427. else
  428. internalerror(20020729);
  429. end;
  430. end;
  431. procedure tcg68k.a_op_reg_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister);
  432. var
  433. hreg1,hreg2: tregister;
  434. begin
  435. case op of
  436. OP_ADD :
  437. Begin
  438. if aktoptprocessor = ColdFire then
  439. begin
  440. { operation only allowed only a longword }
  441. sign_extend(list, size, reg1);
  442. sign_extend(list, size, reg2);
  443. list.concat(taicpu.op_reg_reg(A_ADD,S_L,reg1, reg2));
  444. end
  445. else
  446. begin
  447. list.concat(taicpu.op_reg_reg(A_ADD,TCGSize2OpSize[size],reg1, reg2));
  448. end;
  449. end;
  450. OP_AND,OP_OR,
  451. OP_SAR,OP_SHL,
  452. OP_SHR,OP_SUB,OP_XOR :
  453. Begin
  454. { load to data registers }
  455. if (rg.isaddressregister(reg1)) then
  456. begin
  457. hreg1 := cg.get_scratch_reg_int(list);
  458. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg1,hreg1));
  459. end
  460. else
  461. hreg1 := reg1;
  462. if (rg.isaddressregister(reg2)) then
  463. begin
  464. hreg2:= cg.get_scratch_reg_int(list);
  465. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg2,hreg2));
  466. end
  467. else
  468. hreg2 := reg2;
  469. if aktoptprocessor = ColdFire then
  470. begin
  471. { operation only allowed only a longword }
  472. {!***************************************
  473. in the case of shifts, the value to
  474. shift by, should already be valid, so
  475. no need to sign extend the value
  476. !
  477. }
  478. if op in [OP_AND,OP_OR,OP_SUB,OP_XOR] then
  479. sign_extend(list, size, hreg1);
  480. sign_extend(list, size, hreg2);
  481. list.concat(taicpu.op_reg_reg(topcg2tasmop[op],S_L,hreg1, hreg2));
  482. end
  483. else
  484. begin
  485. list.concat(taicpu.op_reg_reg(topcg2tasmop[op],TCGSize2OpSize[size],hreg1, hreg2));
  486. end;
  487. if reg1 <> hreg1 then
  488. cg.free_scratch_reg(list,hreg1);
  489. { move back result into destination register }
  490. if reg2 <> hreg2 then
  491. begin
  492. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,hreg2,reg2));
  493. cg.free_scratch_reg(list,hreg2);
  494. end;
  495. end;
  496. OP_DIV :
  497. Begin
  498. {$warning DIV to complete}
  499. end;
  500. OP_IDIV :
  501. Begin
  502. {$warning IDIV to complete}
  503. end;
  504. OP_IMUL :
  505. Begin
  506. sign_extend(list, size,reg1);
  507. sign_extend(list, size,reg2);
  508. if aktoptprocessor = MC68000 then
  509. begin
  510. rg.getexplicitregisterint(list,R_D0);
  511. rg.getexplicitregisterint(list,R_D1);
  512. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg1, R_D0));
  513. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg2, R_D1));
  514. cg.a_call_name(list,'FPC_MUL_LONGINT');
  515. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,R_D0, reg2));
  516. rg.ungetregisterint(list,R_D0);
  517. rg.ungetregisterint(list,R_D1);
  518. end
  519. else
  520. begin
  521. if (rg.isaddressregister(reg1)) then
  522. hreg1 := cg.get_scratch_reg_int(list)
  523. else
  524. hreg1 := reg1;
  525. if (rg.isaddressregister(reg2)) then
  526. hreg2:= cg.get_scratch_reg_int(list)
  527. else
  528. hreg2 := reg2;
  529. if reg1 <> hreg1 then
  530. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg1,hreg1));
  531. if reg2 <> hreg2 then
  532. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg2,hreg2));
  533. list.concat(taicpu.op_reg_reg(A_MULS,S_L,reg1,reg2));
  534. if reg1 <> hreg1 then
  535. cg.free_scratch_reg(list,hreg1);
  536. { move back result into destination register }
  537. if reg2 <> hreg2 then
  538. begin
  539. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,hreg2,reg2));
  540. cg.free_scratch_reg(list,hreg2);
  541. end;
  542. end;
  543. end;
  544. OP_MUL :
  545. Begin
  546. sign_extend(list, size,reg1);
  547. sign_extend(list, size,reg2);
  548. if aktoptprocessor = MC68000 then
  549. begin
  550. rg.getexplicitregisterint(list,R_D0);
  551. rg.getexplicitregisterint(list,R_D1);
  552. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg1, R_D0));
  553. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg2, R_D1));
  554. cg.a_call_name(list,'FPC_MUL_CARDINAL');
  555. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,R_D0, reg2));
  556. rg.ungetregisterint(list,R_D0);
  557. rg.ungetregisterint(list,R_D1);
  558. end
  559. else
  560. begin
  561. if (rg.isaddressregister(reg1)) then
  562. begin
  563. hreg1 := cg.get_scratch_reg_int(list);
  564. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg1,hreg1));
  565. end
  566. else
  567. hreg1 := reg1;
  568. if (rg.isaddressregister(reg2)) then
  569. begin
  570. hreg2:= cg.get_scratch_reg_int(list);
  571. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg2,hreg2));
  572. end
  573. else
  574. hreg2 := reg2;
  575. list.concat(taicpu.op_reg_reg(A_MULU,S_L,reg1,reg2));
  576. if reg1 <> hreg1 then
  577. cg.free_scratch_reg(list,hreg1);
  578. { move back result into destination register }
  579. if reg2 <> hreg2 then
  580. begin
  581. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,hreg2,reg2));
  582. cg.free_scratch_reg(list,hreg2);
  583. end;
  584. end;
  585. end;
  586. OP_NEG,
  587. OP_NOT :
  588. Begin
  589. if reg1 <> R_NO then
  590. internalerror(200112291);
  591. if (rg.isaddressregister(reg2)) then
  592. begin
  593. hreg2 := cg.get_scratch_reg_int(list);
  594. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg2,hreg2));
  595. end
  596. else
  597. hreg2 := reg2;
  598. { coldfire only supports long version }
  599. if aktoptprocessor = ColdFire then
  600. begin
  601. sign_extend(list, size,hreg2);
  602. list.concat(taicpu.op_reg(topcg2tasmop[op],S_L,hreg2));
  603. end
  604. else
  605. begin
  606. list.concat(taicpu.op_reg(topcg2tasmop[op],TCGSize2OpSize[size],hreg2));
  607. end;
  608. if reg2 <> hreg2 then
  609. begin
  610. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,hreg2,reg2));
  611. cg.free_scratch_reg(list,hreg2);
  612. end;
  613. end;
  614. else
  615. internalerror(20020729);
  616. end;
  617. end;
  618. procedure tcg68k.a_cmp_const_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aword;reg : tregister;
  619. l : tasmlabel);
  620. var
  621. hregister : tregister;
  622. begin
  623. if a = 0 then
  624. begin
  625. list.concat(taicpu.op_reg(A_TST,TCGSize2OpSize[size],reg));
  626. end
  627. else
  628. begin
  629. if (aktoptprocessor = ColdFire) then
  630. begin
  631. {
  632. only longword comparison is supported,
  633. and only on data registers.
  634. }
  635. hregister := cg.get_scratch_reg_int(list);
  636. { always move to a data register }
  637. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,reg,hregister));
  638. { sign/zero extend the register }
  639. sign_extend(list, size,hregister);
  640. list.concat(taicpu.op_const_reg(A_CMPI,S_L,a,hregister));
  641. cg.free_scratch_reg(list,hregister);
  642. end
  643. else
  644. begin
  645. list.concat(taicpu.op_const_reg(A_CMPI,TCGSize2OpSize[size],a,reg));
  646. end;
  647. end;
  648. { emit the actual jump to the label }
  649. a_jmp_cond(list,cmp_op,l);
  650. end;
  651. procedure tcg68k.a_cmp_reg_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
  652. begin
  653. list.concat(taicpu.op_reg_reg(A_CMP,tcgsize2opsize[size],reg1,reg2));
  654. { emit the actual jump to the label }
  655. a_jmp_cond(list,cmp_op,l);
  656. end;
  657. procedure tcg68k.a_jmp_always(list : taasmoutput;l: tasmlabel);
  658. var
  659. ai: taicpu;
  660. begin
  661. ai := Taicpu.op_sym(A_JMP,S_NO,l);
  662. ai.is_jmp := true;
  663. list.concat(ai);
  664. end;
  665. procedure tcg68k.a_jmp_flags(list : taasmoutput;const f : TResFlags;l: tasmlabel);
  666. var
  667. ai : taicpu;
  668. begin
  669. ai := Taicpu.op_sym(A_BXX,S_NO,l);
  670. ai.SetCondition(flags_to_cond(f));
  671. ai.is_jmp := true;
  672. list.concat(ai);
  673. end;
  674. procedure tcg68k.g_flags2reg(list: taasmoutput; size: TCgSize; const f: tresflags; reg: TRegister);
  675. var
  676. ai : taicpu;
  677. hreg : tregister;
  678. begin
  679. { move to a Dx register? }
  680. if (rg.isaddressregister(reg)) then
  681. begin
  682. hreg := get_scratch_reg_int(list);
  683. a_load_const_reg(list,size,0,hreg);
  684. ai:=Taicpu.Op_reg(A_Sxx,S_B,hreg);
  685. ai.SetCondition(flags_to_cond(f));
  686. list.concat(ai);
  687. if (aktoptprocessor = ColdFire) then
  688. begin
  689. { neg.b does not exist on the Coldfire
  690. so we need to sign extend the value
  691. before doing a neg.l
  692. }
  693. list.concat(taicpu.op_reg(A_EXTB,S_L,hreg));
  694. list.concat(taicpu.op_reg(A_NEG,S_L,hreg));
  695. end
  696. else
  697. begin
  698. list.concat(taicpu.op_reg(A_NEG,S_B,hreg));
  699. end;
  700. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,hreg,reg));
  701. free_scratch_reg(list,hreg);
  702. end
  703. else
  704. begin
  705. a_load_const_reg(list,size,0,reg);
  706. ai:=Taicpu.Op_reg(A_Sxx,S_B,reg);
  707. ai.SetCondition(flags_to_cond(f));
  708. list.concat(ai);
  709. if (aktoptprocessor = ColdFire) then
  710. begin
  711. { neg.b does not exist on the Coldfire
  712. so we need to sign extend the value
  713. before doing a neg.l
  714. }
  715. list.concat(taicpu.op_reg(A_EXTB,S_L,reg));
  716. list.concat(taicpu.op_reg(A_NEG,S_L,reg));
  717. end
  718. else
  719. begin
  720. list.concat(taicpu.op_reg(A_NEG,S_B,reg));
  721. end;
  722. end;
  723. end;
  724. procedure tcg68k.g_concatcopy(list : taasmoutput;const source,dest : treference;len : aword;delsource,loadref : boolean);
  725. var
  726. helpsize : longint;
  727. i : byte;
  728. reg8,reg32 : tregister;
  729. swap : boolean;
  730. hregister : tregister;
  731. iregister : tregister;
  732. jregister : tregister;
  733. hp1 : treference;
  734. hp2 : treference;
  735. hl : tasmlabel;
  736. hl2: tasmlabel;
  737. popaddress : boolean;
  738. srcref,dstref : treference;
  739. begin
  740. popaddress := false;
  741. { this should never occur }
  742. if len > 65535 then
  743. internalerror(0);
  744. hregister := get_scratch_reg_int(list);
  745. if delsource then
  746. reference_release(list,source);
  747. { from 12 bytes movs is being used }
  748. if (not loadref) and ((len<=8) or (not(cs_littlesize in aktglobalswitches) and (len<=12))) then
  749. begin
  750. srcref := source;
  751. dstref := dest;
  752. helpsize:=len div 4;
  753. { move a dword x times }
  754. for i:=1 to helpsize do
  755. begin
  756. a_load_ref_reg(list,OS_INT,srcref,hregister);
  757. a_load_reg_ref(list,OS_INT,hregister,dstref);
  758. inc(srcref.offset,4);
  759. inc(dstref.offset,4);
  760. dec(len,4);
  761. end;
  762. { move a word }
  763. if len>1 then
  764. begin
  765. a_load_ref_reg(list,OS_16,srcref,hregister);
  766. a_load_reg_ref(list,OS_16,hregister,dstref);
  767. inc(srcref.offset,2);
  768. inc(dstref.offset,2);
  769. dec(len,2);
  770. end;
  771. { move a single byte }
  772. if len>0 then
  773. begin
  774. a_load_ref_reg(list,OS_8,srcref,hregister);
  775. a_load_reg_ref(list,OS_8,hregister,dstref);
  776. end
  777. end
  778. else
  779. begin
  780. iregister := get_scratch_reg_address(list);
  781. jregister := get_scratch_reg_address(list);
  782. { reference for move (An)+,(An)+ }
  783. reference_reset(hp1);
  784. hp1.base := iregister; { source register }
  785. hp1.direction := dir_inc;
  786. reference_reset(hp2);
  787. hp2.base := jregister;
  788. hp2.direction := dir_inc;
  789. { iregister = source }
  790. { jregister = destination }
  791. if loadref then
  792. a_load_ref_reg(list,OS_INT,source,iregister)
  793. else
  794. a_loadaddr_ref_reg(list,source,iregister);
  795. a_loadaddr_ref_reg(list,dest,jregister);
  796. { double word move only on 68020+ machines }
  797. { because of possible alignment problems }
  798. { use fast loop mode }
  799. if (aktoptprocessor=MC68020) then
  800. begin
  801. helpsize := len - len mod 4;
  802. len := len mod 4;
  803. list.concat(taicpu.op_const_reg(A_MOVE,S_L,helpsize div 4,hregister));
  804. objectlibrary.getlabel(hl2);
  805. a_jmp_always(list,hl2);
  806. objectlibrary.getlabel(hl);
  807. a_label(list,hl);
  808. list.concat(taicpu.op_ref_ref(A_MOVE,S_L,hp1,hp2));
  809. cg.a_label(list,hl2);
  810. list.concat(taicpu.op_reg_sym(A_DBRA,S_L,hregister,hl));
  811. if len > 1 then
  812. begin
  813. dec(len,2);
  814. list.concat(taicpu.op_ref_ref(A_MOVE,S_W,hp1,hp2));
  815. end;
  816. if len = 1 then
  817. list.concat(taicpu.op_ref_ref(A_MOVE,S_B,hp1,hp2));
  818. end
  819. else
  820. begin
  821. { Fast 68010 loop mode with no possible alignment problems }
  822. helpsize := len;
  823. list.concat(taicpu.op_const_reg(A_MOVE,S_L,helpsize,hregister));
  824. objectlibrary.getlabel(hl2);
  825. a_jmp_always(list,hl2);
  826. objectlibrary.getlabel(hl);
  827. a_label(list,hl);
  828. list.concat(taicpu.op_ref_ref(A_MOVE,S_B,hp1,hp2));
  829. a_label(list,hl2);
  830. list.concat(taicpu.op_reg_sym(A_DBRA,S_L,hregister,hl));
  831. end;
  832. { restore the registers that we have just used olny if they are used! }
  833. if jregister = R_A1 then
  834. hp2.base := R_NO;
  835. if iregister = R_A0 then
  836. hp1.base := R_NO;
  837. reference_release(list,hp1);
  838. reference_release(list,hp2);
  839. end;
  840. { loading SELF-reference again }
  841. g_maybe_loadself(list);
  842. if delsource then
  843. tg.ungetiftemp(list,source);
  844. free_scratch_reg(list,hregister);
  845. end;
  846. procedure tcg68k.g_overflowcheck(list: taasmoutput; const p: tnode);
  847. begin
  848. end;
  849. procedure tcg68k.g_copyvaluepara_openarray(list : taasmoutput;const ref:treference;elesize:integer);
  850. begin
  851. end;
  852. procedure tcg68k.g_stackframe_entry(list : taasmoutput;localsize : longint);
  853. begin
  854. if localsize<>0 then
  855. begin
  856. { Not to complicate the code generator too much, and since some }
  857. { of the systems only support this format, the localsize cannot }
  858. { exceed 32K in size. }
  859. if (localsize < low(smallint)) or (localsize > high(smallint)) then
  860. CGMessage(cg_e_stacklimit_in_local_routine);
  861. list.concat(taicpu.op_reg_const(A_LINK,S_W,frame_pointer_reg,-localsize));
  862. end { endif localsize <> 0 }
  863. else
  864. begin
  865. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,frame_pointer_reg,R_SPPUSH));
  866. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,stack_pointer_reg,frame_pointer_reg));
  867. end;
  868. end;
  869. procedure tcg68k.g_restore_frame_pointer(list : taasmoutput);
  870. begin
  871. list.concat(taicpu.op_reg(A_UNLK,S_NO,frame_pointer_reg));
  872. end;
  873. procedure tcg68k.g_return_from_proc(list : taasmoutput;parasize : aword);
  874. var
  875. hregister : tregister;
  876. begin
  877. {Routines with the poclearstack flag set use only a ret.}
  878. { also routines with parasize=0 }
  879. if (po_clearstack in aktprocdef.procoptions) then
  880. begin
  881. { complex return values are removed from stack in C code PM }
  882. if paramanager.ret_in_param(aktprocdef.rettype.def) then
  883. list.concat(taicpu.op_const(A_RTD,S_NO,4))
  884. else
  885. list.concat(taicpu.op_none(A_RTS,S_NO));
  886. end
  887. else if (parasize=0) then
  888. begin
  889. list.concat(taicpu.op_none(A_RTS,S_NO));
  890. end
  891. else
  892. begin
  893. { return with immediate size possible here }
  894. { signed! }
  895. { RTD is not supported on the coldfire }
  896. if (aktoptprocessor = MC68020) and (parasize < $7FFF) then
  897. list.concat(taicpu.op_const(A_RTD,S_NO,parasize))
  898. { manually restore the stack }
  899. else
  900. begin
  901. { We must pull the PC Counter from the stack, before }
  902. { restoring the stack pointer, otherwise the PC would }
  903. { point to nowhere! }
  904. { save the PC counter (pop it from the stack) }
  905. hregister := get_scratch_reg_address(list);
  906. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,R_SPPULL,hregister));
  907. { can we do a quick addition ... }
  908. if (parasize > 0) and (parasize < 9) then
  909. list.concat(taicpu.op_const_reg(A_ADDQ,S_L,parasize,R_SP))
  910. else { nope ... }
  911. list.concat(taicpu.op_const_reg(A_ADD,S_L,parasize,R_SP));
  912. { restore the PC counter (push it on the stack) }
  913. list.concat(taicpu.op_reg_reg(A_MOVE,S_L,hregister,R_SPPUSH));
  914. list.concat(taicpu.op_none(A_RTS,S_NO));
  915. free_scratch_reg(list,hregister);
  916. end;
  917. end;
  918. end;
  919. procedure tcg68k.g_save_standard_registers(list : taasmoutput);
  920. begin
  921. end;
  922. procedure tcg68k.g_restore_standard_registers(list : taasmoutput);
  923. begin
  924. end;
  925. procedure tcg68k.g_save_all_registers(list : taasmoutput);
  926. begin
  927. end;
  928. procedure tcg68k.g_restore_all_registers(list : taasmoutput;selfused,accused,acchiused:boolean);
  929. begin
  930. end;
  931. procedure tcg68k.sign_extend(list: taasmoutput;_oldsize : tcgsize; reg: tregister);
  932. begin
  933. case _oldsize of
  934. { sign extend }
  935. OS_S8:
  936. begin
  937. if (rg.isaddressregister(reg)) then
  938. internalerror(20020729);
  939. if (aktoptprocessor = MC68000) then
  940. begin
  941. list.concat(taicpu.op_reg(A_EXT,S_W,reg));
  942. list.concat(taicpu.op_reg(A_EXT,S_L,reg));
  943. end
  944. else
  945. begin
  946. list.concat(taicpu.op_reg(A_EXTB,S_L,reg));
  947. end;
  948. end;
  949. OS_S16:
  950. begin
  951. if (rg.isaddressregister(reg)) then
  952. internalerror(20020729);
  953. list.concat(taicpu.op_reg(A_EXT,S_L,reg));
  954. end;
  955. { zero extend }
  956. OS_8:
  957. begin
  958. if (rg.isaddressregister(reg)) then
  959. internalerror(20020729);
  960. list.concat(taicpu.op_const_reg(A_AND,S_L,$FF,reg));
  961. end;
  962. OS_16:
  963. begin
  964. if (rg.isaddressregister(reg)) then
  965. internalerror(20020729);
  966. list.concat(taicpu.op_const_reg(A_AND,S_L,$FFFF,reg));
  967. end;
  968. end; { otherwise the size is already correct }
  969. end;
  970. procedure tcg68k.a_jmp_cond(list : taasmoutput;cond : TOpCmp;l: tasmlabel);
  971. var
  972. ai : taicpu;
  973. begin
  974. if cond=OC_None then
  975. ai := Taicpu.Op_sym(A_JMP,S_NO,l)
  976. else
  977. begin
  978. ai:=Taicpu.Op_sym(A_Bxx,S_NO,l);
  979. ai.SetCondition(TOpCmp2AsmCond[cond]);
  980. end;
  981. ai.is_jmp:=true;
  982. list.concat(ai);
  983. end;
  984. begin
  985. cg := tcg68k.create;
  986. { cg64 :=tcg64fppc.create;}
  987. end.
  988. {
  989. $Log$
  990. Revision 1.3 2002-08-15 08:13:54 carl
  991. - a_load_sym_ofs_reg removed
  992. * loadvmt now calls loadaddr_ref_reg instead
  993. Revision 1.2 2002/08/14 19:16:34 carl
  994. + m68k type conversion nodes
  995. + started some mathematical nodes
  996. * out of bound references should now be handled correctly
  997. Revision 1.1 2002/08/13 18:30:22 carl
  998. * rename swatoperands to swapoperands
  999. + m68k first compilable version (still needs a lot of testing):
  1000. assembler generator, system information , inline
  1001. assembler reader.
  1002. Revision 1.5 2002/08/12 15:08:43 carl
  1003. + stab register indexes for powerpc (moved from gdb to cpubase)
  1004. + tprocessor enumeration moved to cpuinfo
  1005. + linker in target_info is now a class
  1006. * many many updates for m68k (will soon start to compile)
  1007. - removed some ifdef or correct them for correct cpu
  1008. Revision 1.2 2002/08/05 17:27:52 carl
  1009. + updated m68k
  1010. Revision 1.1 2002/07/29 17:51:32 carl
  1011. + restart m68k support
  1012. }