rax86.pas 25 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Carl Eric Codere and Peter Vreman
  4. Handles the common x86 assembler reader routines
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {
  19. Contains the common x86 (i386 and x86-64) assembler reader routines.
  20. }
  21. unit rax86;
  22. {$i fpcdefs.inc}
  23. interface
  24. uses
  25. aasmbase,aasmtai,aasmcpu,
  26. cpubase,rautils,cclasses;
  27. { Parser helpers }
  28. function is_prefix(t:tasmop):boolean;
  29. function is_override(t:tasmop):boolean;
  30. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  31. Function CheckOverride(overrideop,op:tasmop): Boolean;
  32. Procedure FWaitWarning;
  33. type
  34. T386Operand=class(TOperand)
  35. opsize : topsize;
  36. Procedure SetSize(_size:longint;force:boolean);override;
  37. Procedure SetCorrectSize(opcode:tasmop);override;
  38. end;
  39. T386Instruction=class(TInstruction)
  40. OpOrder : TOperandOrder;
  41. opsize : topsize;
  42. constructor Create(optype : tcoperand);override;
  43. { Operand sizes }
  44. procedure AddReferenceSizes;
  45. procedure SetInstructionOpsize;
  46. procedure CheckOperandSizes;
  47. procedure CheckNonCommutativeOpcodes;
  48. procedure SwapOperands;
  49. { opcode adding }
  50. function ConcatInstruction(p : taasmoutput) : tai;override;
  51. end;
  52. const
  53. AsmPrefixes = 6;
  54. AsmPrefix : array[0..AsmPrefixes-1] of TasmOP =(
  55. A_LOCK,A_REP,A_REPE,A_REPNE,A_REPNZ,A_REPZ
  56. );
  57. AsmOverrides = 6;
  58. AsmOverride : array[0..AsmOverrides-1] of TasmOP =(
  59. A_SEGCS,A_SEGES,A_SEGDS,A_SEGFS,A_SEGGS,A_SEGSS
  60. );
  61. CondAsmOps=3;
  62. CondAsmOp:array[0..CondAsmOps-1] of TasmOp=(
  63. A_CMOVcc, A_Jcc, A_SETcc
  64. );
  65. CondAsmOpStr:array[0..CondAsmOps-1] of string[4]=(
  66. 'CMOV','J','SET'
  67. );
  68. implementation
  69. uses
  70. globtype,globals,systems,verbose,
  71. cpuinfo,cgbase,
  72. itcpugas,cgx86;
  73. {$define ATTOP}
  74. {$define INTELOP}
  75. {$ifdef NORA386INT}
  76. {$ifdef NOAG386NSM}
  77. {$ifdef NOAG386INT}
  78. {$undef INTELOP}
  79. {$endif}
  80. {$endif}
  81. {$endif}
  82. {$ifdef NORA386ATT}
  83. {$ifdef NOAG386ATT}
  84. {$undef ATTOP}
  85. {$endif}
  86. {$endif}
  87. {*****************************************************************************
  88. Parser Helpers
  89. *****************************************************************************}
  90. function is_prefix(t:tasmop):boolean;
  91. var
  92. i : longint;
  93. Begin
  94. is_prefix:=false;
  95. for i:=1 to AsmPrefixes do
  96. if t=AsmPrefix[i-1] then
  97. begin
  98. is_prefix:=true;
  99. exit;
  100. end;
  101. end;
  102. function is_override(t:tasmop):boolean;
  103. var
  104. i : longint;
  105. Begin
  106. is_override:=false;
  107. for i:=1 to AsmOverrides do
  108. if t=AsmOverride[i-1] then
  109. begin
  110. is_override:=true;
  111. exit;
  112. end;
  113. end;
  114. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  115. { Checks if the prefix is valid with the following opcode }
  116. { return false if not, otherwise true }
  117. Begin
  118. CheckPrefix := TRUE;
  119. (* Case prefix of
  120. A_REP,A_REPNE,A_REPE:
  121. Case opcode Of
  122. A_SCASB,A_SCASW,A_SCASD,
  123. A_INS,A_OUTS,A_MOVS,A_CMPS,A_LODS,A_STOS:;
  124. Else
  125. Begin
  126. CheckPrefix := FALSE;
  127. exit;
  128. end;
  129. end; { case }
  130. A_LOCK:
  131. Case opcode Of
  132. A_BT,A_BTS,A_BTR,A_BTC,A_XCHG,A_ADD,A_OR,A_ADC,A_SBB,A_AND,A_SUB,
  133. A_XOR,A_NOT,A_NEG,A_INC,A_DEC:;
  134. Else
  135. Begin
  136. CheckPrefix := FALSE;
  137. Exit;
  138. end;
  139. end; { case }
  140. A_NONE: exit; { no prefix here }
  141. else
  142. CheckPrefix := FALSE;
  143. end; { end case } *)
  144. end;
  145. Function CheckOverride(overrideop,op:tasmop): Boolean;
  146. { Check if the override is valid, and if so then }
  147. { update the instr variable accordingly. }
  148. Begin
  149. CheckOverride := true;
  150. { Case instr.getinstruction of
  151. A_MOVS,A_XLAT,A_CMPS:
  152. Begin
  153. CheckOverride := TRUE;
  154. Message(assem_e_segment_override_not_supported);
  155. end
  156. end }
  157. end;
  158. Procedure FWaitWarning;
  159. begin
  160. if (target_info.system=system_i386_GO32V2) and (cs_fp_emulation in aktmoduleswitches) then
  161. Message(asmr_w_fwait_emu_prob);
  162. end;
  163. {*****************************************************************************
  164. T386Operand
  165. *****************************************************************************}
  166. Procedure T386Operand.SetSize(_size:longint;force:boolean);
  167. begin
  168. inherited SetSize(_size,force);
  169. { OS_64 will be set to S_L and be fixed later
  170. in SetCorrectSize }
  171. opsize:=TCGSize2Opsize[size];
  172. end;
  173. Procedure T386Operand.SetCorrectSize(opcode:tasmop);
  174. begin
  175. if gas_needsuffix[opcode]=attsufFPU then
  176. begin
  177. case size of
  178. OS_32 : opsize:=S_FS;
  179. OS_64 : opsize:=S_FL;
  180. end;
  181. end
  182. else if gas_needsuffix[opcode]=attsufFPUint then
  183. begin
  184. case size of
  185. OS_16 : opsize:=S_IS;
  186. OS_32 : opsize:=S_IL;
  187. OS_64 : opsize:=S_IQ;
  188. end;
  189. end;
  190. end;
  191. {*****************************************************************************
  192. T386Instruction
  193. *****************************************************************************}
  194. constructor T386Instruction.Create(optype : tcoperand);
  195. begin
  196. inherited Create(optype);
  197. Opsize:=S_NO;
  198. end;
  199. procedure T386Instruction.SwapOperands;
  200. begin
  201. Inherited SwapOperands;
  202. { mark the correct order }
  203. if OpOrder=op_intel then
  204. OpOrder:=op_att
  205. else
  206. OpOrder:=op_intel;
  207. end;
  208. procedure T386Instruction.AddReferenceSizes;
  209. { this will add the sizes for references like [esi] which do not
  210. have the size set yet, it will take only the size if the other
  211. operand is a register }
  212. var
  213. operand2,i : longint;
  214. s : tasmsymbol;
  215. so : longint;
  216. begin
  217. for i:=1to ops do
  218. begin
  219. operands[i].SetCorrectSize(opcode);
  220. if t386operand(operands[i]).opsize=S_NO then
  221. begin
  222. case operands[i].Opr.Typ of
  223. OPR_LOCAL,
  224. OPR_REFERENCE :
  225. begin
  226. if i=2 then
  227. operand2:=1
  228. else
  229. operand2:=2;
  230. if operand2<ops then
  231. begin
  232. { Only allow register as operand to take the size from }
  233. if operands[operand2].opr.typ=OPR_REGISTER then
  234. begin
  235. if ((opcode<>A_MOVD) and
  236. (opcode<>A_CVTSI2SS)) then
  237. t386operand(operands[i]).opsize:=t386operand(operands[operand2]).opsize;
  238. end
  239. else
  240. begin
  241. { if no register then take the opsize (which is available with ATT),
  242. if not availble then give an error }
  243. if opsize<>S_NO then
  244. t386operand(operands[i]).opsize:=opsize
  245. else
  246. begin
  247. Message(asmr_e_unable_to_determine_reference_size);
  248. { recovery }
  249. t386operand(operands[i]).opsize:=S_L;
  250. end;
  251. end;
  252. end
  253. else
  254. begin
  255. if opsize<>S_NO then
  256. t386operand(operands[i]).opsize:=opsize
  257. end;
  258. end;
  259. OPR_SYMBOL :
  260. begin
  261. { Fix lea which need a reference }
  262. if opcode=A_LEA then
  263. begin
  264. s:=operands[i].opr.symbol;
  265. so:=operands[i].opr.symofs;
  266. operands[i].opr.typ:=OPR_REFERENCE;
  267. Fillchar(operands[i].opr.ref,sizeof(treference),0);
  268. operands[i].opr.ref.symbol:=s;
  269. operands[i].opr.ref.offset:=so;
  270. end;
  271. t386operand(operands[i]).opsize:=S_L;
  272. end;
  273. end;
  274. end;
  275. end;
  276. end;
  277. procedure T386Instruction.SetInstructionOpsize;
  278. begin
  279. if opsize<>S_NO then
  280. exit;
  281. if (OpOrder=op_intel) then
  282. SwapOperands;
  283. case ops of
  284. 0 : ;
  285. 1 :
  286. begin
  287. { "push es" must be stored as a long PM }
  288. if ((opcode=A_PUSH) or
  289. (opcode=A_POP)) and
  290. (operands[1].opr.typ=OPR_REGISTER) and
  291. is_segment_reg(operands[1].opr.reg) then
  292. opsize:=S_L
  293. else
  294. opsize:=t386operand(operands[1]).opsize;
  295. end;
  296. 2 :
  297. begin
  298. case opcode of
  299. A_MOVZX,A_MOVSX :
  300. begin
  301. case t386operand(operands[1]).opsize of
  302. S_W :
  303. case t386operand(operands[2]).opsize of
  304. S_L :
  305. opsize:=S_WL;
  306. end;
  307. S_B :
  308. case t386operand(operands[2]).opsize of
  309. S_W :
  310. opsize:=S_BW;
  311. S_L :
  312. opsize:=S_BL;
  313. end;
  314. end;
  315. end;
  316. A_MOVD : { movd is a move from a mmx register to a
  317. 32 bit register or memory, so no opsize is correct here PM }
  318. exit;
  319. A_OUT :
  320. opsize:=t386operand(operands[1]).opsize;
  321. else
  322. opsize:=t386operand(operands[2]).opsize;
  323. end;
  324. end;
  325. 3 :
  326. opsize:=t386operand(operands[3]).opsize;
  327. end;
  328. end;
  329. procedure T386Instruction.CheckOperandSizes;
  330. var
  331. sizeerr : boolean;
  332. i : longint;
  333. begin
  334. { Check only the most common opcodes here, the others are done in
  335. the assembler pass }
  336. case opcode of
  337. A_PUSH,A_POP,A_DEC,A_INC,A_NOT,A_NEG,
  338. A_CMP,A_MOV,
  339. A_ADD,A_SUB,A_ADC,A_SBB,
  340. A_AND,A_OR,A_TEST,A_XOR: ;
  341. else
  342. exit;
  343. end;
  344. { Handle the BW,BL,WL separatly }
  345. sizeerr:=false;
  346. { special push/pop selector case }
  347. if ((opcode=A_PUSH) or
  348. (opcode=A_POP)) and
  349. (operands[1].opr.typ=OPR_REGISTER) and
  350. is_segment_reg(operands[1].opr.reg) then
  351. exit;
  352. if opsize in [S_BW,S_BL,S_WL] then
  353. begin
  354. if ops<>2 then
  355. sizeerr:=true
  356. else
  357. begin
  358. case opsize of
  359. S_BW :
  360. sizeerr:=(t386operand(operands[1]).opsize<>S_B) or (t386operand(operands[2]).opsize<>S_W);
  361. S_BL :
  362. sizeerr:=(t386operand(operands[1]).opsize<>S_B) or (t386operand(operands[2]).opsize<>S_L);
  363. S_WL :
  364. sizeerr:=(t386operand(operands[1]).opsize<>S_W) or (t386operand(operands[2]).opsize<>S_L);
  365. end;
  366. end;
  367. end
  368. else
  369. begin
  370. for i:=1 to ops do
  371. begin
  372. if (operands[i].opr.typ<>OPR_CONSTANT) and
  373. (t386operand(operands[i]).opsize in [S_B,S_W,S_L]) and
  374. (t386operand(operands[i]).opsize<>opsize) then
  375. sizeerr:=true;
  376. end;
  377. end;
  378. if sizeerr then
  379. begin
  380. { if range checks are on then generate an error }
  381. if (cs_compilesystem in aktmoduleswitches) or
  382. not (cs_check_range in aktlocalswitches) then
  383. Message(asmr_w_size_suffix_and_dest_dont_match)
  384. else
  385. Message(asmr_e_size_suffix_and_dest_dont_match);
  386. end;
  387. end;
  388. { This check must be done with the operand in ATT order
  389. i.e.after swapping in the intel reader
  390. but before swapping in the NASM and TASM writers PM }
  391. procedure T386Instruction.CheckNonCommutativeOpcodes;
  392. begin
  393. if (OpOrder=op_intel) then
  394. SwapOperands;
  395. if (
  396. (ops=2) and
  397. (operands[1].opr.typ=OPR_REGISTER) and
  398. (operands[2].opr.typ=OPR_REGISTER) and
  399. { if the first is ST and the second is also a register
  400. it is necessarily ST1 .. ST7 }
  401. ((operands[1].opr.reg=NR_ST) or
  402. (operands[1].opr.reg=NR_ST0))
  403. ) or
  404. (ops=0) then
  405. if opcode=A_FSUBR then
  406. opcode:=A_FSUB
  407. else if opcode=A_FSUB then
  408. opcode:=A_FSUBR
  409. else if opcode=A_FDIVR then
  410. opcode:=A_FDIV
  411. else if opcode=A_FDIV then
  412. opcode:=A_FDIVR
  413. else if opcode=A_FSUBRP then
  414. opcode:=A_FSUBP
  415. else if opcode=A_FSUBP then
  416. opcode:=A_FSUBRP
  417. else if opcode=A_FDIVRP then
  418. opcode:=A_FDIVP
  419. else if opcode=A_FDIVP then
  420. opcode:=A_FDIVRP;
  421. if (
  422. (ops=1) and
  423. (operands[1].opr.typ=OPR_REGISTER) and
  424. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  425. (operands[1].opr.reg<>NR_ST) and
  426. (operands[1].opr.reg<>NR_ST0)
  427. ) then
  428. if opcode=A_FSUBRP then
  429. opcode:=A_FSUBP
  430. else if opcode=A_FSUBP then
  431. opcode:=A_FSUBRP
  432. else if opcode=A_FDIVRP then
  433. opcode:=A_FDIVP
  434. else if opcode=A_FDIVP then
  435. opcode:=A_FDIVRP;
  436. end;
  437. {*****************************************************************************
  438. opcode Adding
  439. *****************************************************************************}
  440. function T386Instruction.ConcatInstruction(p : taasmoutput) : tai;
  441. var
  442. siz : topsize;
  443. i,asize : longint;
  444. ai : taicpu;
  445. begin
  446. if (OpOrder=op_intel) then
  447. SwapOperands;
  448. { Get Opsize }
  449. if (opsize<>S_NO) or (Ops=0) then
  450. siz:=opsize
  451. else
  452. begin
  453. if (Ops=2) and (operands[1].opr.typ=OPR_REGISTER) then
  454. siz:=t386operand(operands[1]).opsize
  455. else
  456. siz:=t386operand(operands[Ops]).opsize;
  457. { MOVD should be of size S_LQ or S_QL, but these do not exist PM }
  458. if (ops=2) and
  459. (t386operand(operands[1]).opsize<>S_NO) and
  460. (t386operand(operands[2]).opsize<>S_NO) and
  461. (t386operand(operands[1]).opsize<>t386operand(operands[2]).opsize) then
  462. siz:=S_NO;
  463. end;
  464. if ((opcode=A_MOVD)or
  465. (opcode=A_CVTSI2SS)) and
  466. ((t386operand(operands[1]).opsize=S_NO) or
  467. (t386operand(operands[2]).opsize=S_NO)) then
  468. siz:=S_NO;
  469. { NASM does not support FADD without args
  470. as alias of FADDP
  471. and GNU AS interprets FADD without operand differently
  472. for version 2.9.1 and 2.9.5 !! }
  473. if (ops=0) and
  474. ((opcode=A_FADD) or
  475. (opcode=A_FMUL) or
  476. (opcode=A_FSUB) or
  477. (opcode=A_FSUBR) or
  478. (opcode=A_FDIV) or
  479. (opcode=A_FDIVR)) then
  480. begin
  481. if opcode=A_FADD then
  482. opcode:=A_FADDP
  483. else if opcode=A_FMUL then
  484. opcode:=A_FMULP
  485. else if opcode=A_FSUB then
  486. opcode:=A_FSUBP
  487. else if opcode=A_FSUBR then
  488. opcode:=A_FSUBRP
  489. else if opcode=A_FDIV then
  490. opcode:=A_FDIVP
  491. else if opcode=A_FDIVR then
  492. opcode:=A_FDIVRP;
  493. {$ifdef ATTOP}
  494. message1(asmr_w_fadd_to_faddp,gas_op2str[opcode]);
  495. {$else}
  496. {$ifdef INTELOP}
  497. message1(asmr_w_fadd_to_faddp,std_op2str[opcode]);
  498. {$else}
  499. message1(asmr_w_fadd_to_faddp,'fXX');
  500. {$endif INTELOP}
  501. {$endif ATTOP}
  502. end;
  503. { GNU AS interprets FDIV without operand differently
  504. for version 2.9.1 and 2.10
  505. we add explicit args to it !! }
  506. if (ops=0) and
  507. ((opcode=A_FSUBP) or
  508. (opcode=A_FSUBRP) or
  509. (opcode=A_FDIVP) or
  510. (opcode=A_FDIVRP) or
  511. (opcode=A_FSUB) or
  512. (opcode=A_FSUBR) or
  513. (opcode=A_FADD) or
  514. (opcode=A_FADDP) or
  515. (opcode=A_FDIV) or
  516. (opcode=A_FDIVR)) then
  517. begin
  518. {$ifdef ATTOP}
  519. message1(asmr_w_adding_explicit_args_fXX,gas_op2str[opcode]);
  520. {$else}
  521. {$ifdef INTELOP}
  522. message1(asmr_w_adding_explicit_args_fXX,std_op2str[opcode]);
  523. {$else}
  524. message1(asmr_w_adding_explicit_args_fXX,'fXX');
  525. {$endif INTELOP}
  526. {$endif ATTOP}
  527. ops:=2;
  528. operands[1].opr.typ:=OPR_REGISTER;
  529. operands[2].opr.typ:=OPR_REGISTER;
  530. operands[1].opr.reg:=NR_ST0;
  531. operands[2].opr.reg:=NR_ST1;
  532. end;
  533. if (ops=1) and
  534. (
  535. (operands[1].opr.typ=OPR_REGISTER) and
  536. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  537. (operands[1].opr.reg<>NR_ST) and
  538. (operands[1].opr.reg<>NR_ST0)
  539. ) and
  540. (
  541. (opcode=A_FSUBP) or
  542. (opcode=A_FSUBRP) or
  543. (opcode=A_FDIVP) or
  544. (opcode=A_FDIVRP) or
  545. (opcode=A_FADDP) or
  546. (opcode=A_FMULP)
  547. ) then
  548. begin
  549. {$ifdef ATTOP}
  550. message1(asmr_w_adding_explicit_first_arg_fXX,gas_op2str[opcode]);
  551. {$else}
  552. {$ifdef INTELOP}
  553. message1(asmr_w_adding_explicit_first_arg_fXX,std_op2str[opcode]);
  554. {$else}
  555. message1(asmr_w_adding_explicit_first_arg_fXX,'fXX');
  556. {$endif INTELOP}
  557. {$endif ATTOP}
  558. ops:=2;
  559. operands[2].opr.typ:=OPR_REGISTER;
  560. operands[2].opr.reg:=operands[1].opr.reg;
  561. operands[1].opr.reg:=NR_ST0;
  562. end;
  563. if (ops=1) and
  564. (
  565. (operands[1].opr.typ=OPR_REGISTER) and
  566. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  567. (operands[1].opr.reg<>NR_ST) and
  568. (operands[1].opr.reg<>NR_ST0)
  569. ) and
  570. (
  571. (opcode=A_FSUB) or
  572. (opcode=A_FSUBR) or
  573. (opcode=A_FDIV) or
  574. (opcode=A_FDIVR) or
  575. (opcode=A_FADD) or
  576. (opcode=A_FMUL)
  577. ) then
  578. begin
  579. {$ifdef ATTOP}
  580. message1(asmr_w_adding_explicit_second_arg_fXX,gas_op2str[opcode]);
  581. {$else}
  582. {$ifdef INTELOP}
  583. message1(asmr_w_adding_explicit_second_arg_fXX,std_op2str[opcode]);
  584. {$else}
  585. message1(asmr_w_adding_explicit_second_arg_fXX,'fXX');
  586. {$endif INTELOP}
  587. {$endif ATTOP}
  588. ops:=2;
  589. operands[2].opr.typ:=OPR_REGISTER;
  590. operands[2].opr.reg:=NR_ST0;
  591. end;
  592. { I tried to convince Linus Torvalds to add
  593. code to support ENTER instruction
  594. (when raising a stack page fault)
  595. but he replied that ENTER is a bad instruction and
  596. Linux does not need to support it
  597. So I think its at least a good idea to add a warning
  598. if someone uses this in assembler code
  599. FPC itself does not use it at all PM }
  600. if (opcode=A_ENTER) and
  601. (target_info.system in [system_i386_linux,system_i386_FreeBSD]) then
  602. Message(asmr_w_enter_not_supported_by_linux);
  603. ai:=taicpu.op_none(opcode,siz);
  604. ai.SetOperandOrder(OpOrder);
  605. ai.Ops:=Ops;
  606. ai.Allocate_oper(Ops);
  607. for i:=1 to Ops do
  608. begin
  609. case operands[i].opr.typ of
  610. OPR_CONSTANT :
  611. ai.loadconst(i-1,aword(operands[i].opr.val));
  612. OPR_REGISTER:
  613. ai.loadreg(i-1,operands[i].opr.reg);
  614. OPR_SYMBOL:
  615. ai.loadsymbol(i-1,operands[i].opr.symbol,operands[i].opr.symofs);
  616. OPR_LOCAL :
  617. ai.loadlocal(i-1,operands[i].opr.localsym,operands[i].opr.localsymofs,operands[i].opr.localindexreg,
  618. operands[i].opr.localscale,operands[i].opr.localgetoffset);
  619. OPR_REFERENCE:
  620. begin
  621. ai.loadref(i-1,operands[i].opr.ref);
  622. if operands[i].size<>OS_NO then
  623. begin
  624. asize:=0;
  625. case operands[i].size of
  626. OS_8,OS_S8 :
  627. asize:=OT_BITS8;
  628. OS_16,OS_S16 :
  629. asize:=OT_BITS16;
  630. OS_32,OS_S32,OS_F32 :
  631. asize:=OT_BITS32;
  632. OS_64,OS_S64:
  633. begin
  634. { Only FPU operations know about 64bit values, for all
  635. integer operations it is seen as 32bit }
  636. if gas_needsuffix[opcode] in [attsufFPU,attsufFPUint] then
  637. asize:=OT_BITS64
  638. else
  639. asize:=OT_BITS32;
  640. end;
  641. OS_F64,OS_C64 :
  642. asize:=OT_BITS64;
  643. OS_F80 :
  644. asize:=OT_BITS80;
  645. end;
  646. if asize<>0 then
  647. ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and not OT_SIZE_MASK) or asize;
  648. end;
  649. end;
  650. end;
  651. end;
  652. if (opcode=A_CALL) and (opsize=S_FAR) then
  653. opcode:=A_LCALL;
  654. if (opcode=A_JMP) and (opsize=S_FAR) then
  655. opcode:=A_LJMP;
  656. if (opcode=A_LCALL) or (opcode=A_LJMP) then
  657. opsize:=S_FAR;
  658. { Condition ? }
  659. if condition<>C_None then
  660. ai.SetCondition(condition);
  661. { Concat the opcode or give an error }
  662. if assigned(ai) then
  663. begin
  664. { Check the instruction if it's valid }
  665. {$ifndef NOAG386BIN}
  666. ai.CheckIfValid;
  667. {$endif NOAG386BIN}
  668. p.concat(ai);
  669. end
  670. else
  671. Message(asmr_e_invalid_opcode_and_operand);
  672. result:=ai;
  673. end;
  674. end.
  675. {
  676. $Log$
  677. Revision 1.15 2003-11-17 23:23:47 florian
  678. + first part of arm assembler reader
  679. Revision 1.14 2003/11/12 16:05:40 florian
  680. * assembler readers OOPed
  681. + typed currency constants
  682. + typed 128 bit float constants if the CPU supports it
  683. Revision 1.13 2003/10/30 19:59:00 peter
  684. * support scalefactor for opr_local
  685. * support reference with opr_local set, fixes tw2631
  686. Revision 1.12 2003/10/29 15:40:20 peter
  687. * support indexing and offset retrieval for locals
  688. Revision 1.11 2003/10/21 15:15:36 peter
  689. * taicpu_abstract.oper[] changed to pointers
  690. Revision 1.10 2003/10/01 20:34:51 peter
  691. * procinfo unit contains tprocinfo
  692. * cginfo renamed to cgbase
  693. * moved cgmessage to verbose
  694. * fixed ppc and sparc compiles
  695. Revision 1.9 2003/09/23 17:56:06 peter
  696. * locals and paras are allocated in the code generation
  697. * tvarsym.localloc contains the location of para/local when
  698. generating code for the current procedure
  699. Revision 1.8 2003/09/03 15:55:02 peter
  700. * NEWRA branch merged
  701. Revision 1.7.2.4 2003/08/31 16:18:05 peter
  702. * more fixes
  703. Revision 1.7.2.3 2003/08/29 17:29:00 peter
  704. * next batch of updates
  705. Revision 1.7.2.2 2003/08/28 18:35:08 peter
  706. * tregister changed to cardinal
  707. Revision 1.7.2.1 2003/08/27 21:06:34 peter
  708. * more updates
  709. Revision 1.7 2003/08/26 12:42:45 peter
  710. * fix wrong registers in reference
  711. Revision 1.6 2003/06/20 12:57:15 pierre
  712. * fix a bug preventing correct reading of intel 'mov [edi],al'
  713. Revision 1.5 2003/06/07 10:23:50 peter
  714. * 32bit operands need ofcourse 32bit size
  715. Revision 1.4 2003/05/31 16:22:28 peter
  716. * fixed opsize and operand size setting for 64bit values
  717. Revision 1.3 2003/05/30 23:57:08 peter
  718. * more sparc cleanup
  719. * accumulator removed, splitted in function_return_reg (called) and
  720. function_result_reg (caller)
  721. Revision 1.2 2003/05/22 21:33:31 peter
  722. * removed some unit dependencies
  723. Revision 1.1 2003/04/30 15:45:35 florian
  724. * merged more x86-64/i386 code
  725. Revision 1.30 2003/04/25 12:04:31 florian
  726. * merged agx64att and ag386att to x86/agx86att
  727. Revision 1.29 2003/02/19 22:00:16 daniel
  728. * Code generator converted to new register notation
  729. - Horribily outdated todo.txt removed
  730. Revision 1.28 2003/02/03 22:47:14 daniel
  731. - Removed reg_2_opsize array
  732. Revision 1.27 2003/01/08 18:43:57 daniel
  733. * Tregister changed into a record
  734. Revision 1.26 2002/11/15 01:58:58 peter
  735. * merged changes from 1.0.7 up to 04-11
  736. - -V option for generating bug report tracing
  737. - more tracing for option parsing
  738. - errors for cdecl and high()
  739. - win32 import stabs
  740. - win32 records<=8 are returned in eax:edx (turned off by default)
  741. - heaptrc update
  742. - more info for temp management in .s file with EXTDEBUG
  743. Revision 1.25 2002/10/31 13:28:32 pierre
  744. * correct last wrong fix for tw2158
  745. Revision 1.24 2002/10/30 17:10:00 pierre
  746. * merge of fix for tw2158 bug
  747. Revision 1.23 2002/07/26 21:15:44 florian
  748. * rewrote the system handling
  749. Revision 1.22 2002/07/01 18:46:34 peter
  750. * internal linker
  751. * reorganized aasm layer
  752. Revision 1.21 2002/05/18 13:34:25 peter
  753. * readded missing revisions
  754. Revision 1.20 2002/05/16 19:46:52 carl
  755. + defines.inc -> fpcdefs.inc to avoid conflicts if compiling by hand
  756. + try to fix temp allocation (still in ifdef)
  757. + generic constructor calls
  758. + start of tassembler / tmodulebase class cleanup
  759. Revision 1.18 2002/05/12 16:53:18 peter
  760. * moved entry and exitcode to ncgutil and cgobj
  761. * foreach gets extra argument for passing local data to the
  762. iterator function
  763. * -CR checks also class typecasts at runtime by changing them
  764. into as
  765. * fixed compiler to cycle with the -CR option
  766. * fixed stabs with elf writer, finally the global variables can
  767. be watched
  768. * removed a lot of routines from cga unit and replaced them by
  769. calls to cgobj
  770. * u32bit-s32bit updates for and,or,xor nodes. When one element is
  771. u32bit then the other is typecasted also to u32bit without giving
  772. a rangecheck warning/error.
  773. * fixed pascal calling method with reversing also the high tree in
  774. the parast, detected by tcalcst3 test
  775. Revision 1.17 2002/04/15 19:12:09 carl
  776. + target_info.size_of_pointer -> pointer_size
  777. + some cleanup of unused types/variables
  778. * move several constants from cpubase to their specific units
  779. (where they are used)
  780. + att_Reg2str -> gas_reg2str
  781. + int_reg2str -> std_reg2str
  782. Revision 1.16 2002/04/04 19:06:13 peter
  783. * removed unused units
  784. * use tlocation.size in cg.a_*loc*() routines
  785. Revision 1.15 2002/04/02 17:11:39 peter
  786. * tlocation,treference update
  787. * LOC_CONSTANT added for better constant handling
  788. * secondadd splitted in multiple routines
  789. * location_force_reg added for loading a location to a register
  790. of a specified size
  791. * secondassignment parses now first the right and then the left node
  792. (this is compatible with Kylix). This saves a lot of push/pop especially
  793. with string operations
  794. * adapted some routines to use the new cg methods
  795. Revision 1.14 2002/01/24 18:25:53 peter
  796. * implicit result variable generation for assembler routines
  797. * removed m_tp modeswitch, use m_tp7 or not(m_fpc) instead
  798. }