.. |
aasmcpu.pas
|
c4061e49e6
* ARM: Fixed issue where some offsets of ADR assembly instructions
|
hai 1 ano |
agarmgas.pas
|
9feafc7bd7
+ ARM: started on vfpv5 support
|
%!s(int64=3) %!d(string=hai) anos |
agarmvasm.pas
|
e9b3db0d78
* more fixes to support vasm on arm
|
%!s(int64=4) %!d(string=hai) anos |
aoptcpu.pas
|
53bf5dc6ef
Avoid wrong typecast by adding check that p1 is an instuction before casting it to taicpu
|
hai 1 ano |
aoptcpub.pas
|
29916bc6f6
* arm: Fixed "RegInInstruction" and "RegModifiedByInstruction" not handling the flags properly
|
hai 1 ano |
aoptcpud.pas
|
790a4fe2d3
* log and id tags removed
|
%!s(int64=20) %!d(string=hai) anos |
armatt.inc
|
867df5362c
+ basic Neon support in the assembler writer
|
%!s(int64=6) %!d(string=hai) anos |
armatts.inc
|
867df5362c
+ basic Neon support in the assembler writer
|
%!s(int64=6) %!d(string=hai) anos |
armins.dat
|
0316a7697f
* arm thumb1: several fixes for the internal assembler writer
|
%!s(int64=4) %!d(string=hai) anos |
armnop.inc
|
867df5362c
+ basic Neon support in the assembler writer
|
%!s(int64=6) %!d(string=hai) anos |
armop.inc
|
867df5362c
+ basic Neon support in the assembler writer
|
%!s(int64=6) %!d(string=hai) anos |
armreg.dat
|
2a93e65511
* seperator => separator
|
%!s(int64=3) %!d(string=hai) anos |
armtab.inc
|
0316a7697f
* arm thumb1: several fixes for the internal assembler writer
|
%!s(int64=4) %!d(string=hai) anos |
cgcpu.pas
|
a71cc71585
+ function needs_check_for_fpu_exceptions to unify fpu exception handling
|
hai 1 ano |
cpubase.pas
|
d03c3c0669
Disable overflow/range check in some part of the arm code
|
%!s(int64=4) %!d(string=hai) anos |
cpuelf.pas
|
637976e83f
* patch by Marģers to unify internal error numbers, resolves #37888
|
%!s(int64=4) %!d(string=hai) anos |
cpuinfo.pas
|
652f21b656
RP2040 support based on modification by Michael Ring (https://github.com/michael-ring/freepascal).
|
hai 1 ano |
cpunode.pas
|
245b58c249
+ support for arm attributes
|
%!s(int64=5) %!d(string=hai) anos |
cpupara.pas
|
03a961709b
arm paramanager: always create at least one paraloc
|
%!s(int64=3) %!d(string=hai) anos |
cpupi.pas
|
e7d1a77f9a
* rename the ARM/AArch64-Darwin targets to ARM/AArch64-iOS
|
%!s(int64=5) %!d(string=hai) anos |
cputarg.pas
|
4ab310e0ed
+ ARM: basic vasm support
|
%!s(int64=4) %!d(string=hai) anos |
hlcgcpu.pas
|
d1f035f456
* arm: Labels to constants are now data labels and not jump labels
|
%!s(int64=3) %!d(string=hai) anos |
itcpugas.pas
|
47d43750e4
* remove unused units from uses statements
|
%!s(int64=12) %!d(string=hai) anos |
narmadd.pas
|
8146443336
+ set pi_do_call on ARM as well if we check for fpu exceptions
|
hai 1 ano |
narmcal.pas
|
7c2c8581b7
* get rid of fpu_vfp_first/last hack
|
%!s(int64=5) %!d(string=hai) anos |
narmcnv.pas
|
637976e83f
* patch by Marģers to unify internal error numbers, resolves #37888
|
%!s(int64=4) %!d(string=hai) anos |
narmcon.pas
|
f7bfa0e426
* range checking is already performed in pass_typecheck
|
hai 1 ano |
narminl.pas
|
8146443336
+ set pi_do_call on ARM as well if we check for fpu exceptions
|
hai 1 ano |
narmld.pas
|
637976e83f
* patch by Marģers to unify internal error numbers, resolves #37888
|
%!s(int64=4) %!d(string=hai) anos |
narmmat.pas
|
8535c758ef
+ initial support for ARMv2
|
%!s(int64=4) %!d(string=hai) anos |
narmmem.pas
|
d6de2c03cb
* generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe
|
%!s(int64=10) %!d(string=hai) anos |
narmset.pas
|
0ffd4f8780
* fix compilation of arm compiler on 32 bit hosts
|
%!s(int64=4) %!d(string=hai) anos |
narmutil.pas
|
4e8b1cb97a
* Fixed signature of insert_init_final_table
|
hai 1 ano |
pp.lpi.template
|
1f032375c3
* improved template with help from Mattias Gaertner
|
%!s(int64=19) %!d(string=hai) anos |
raarm.pas
|
0316a7697f
* arm thumb1: several fixes for the internal assembler writer
|
%!s(int64=4) %!d(string=hai) anos |
raarmgas.pas
|
f1d30a5bc6
Add .force_thumb pseudo-directive support forarm reader
|
%!s(int64=4) %!d(string=hai) anos |
rarmcon.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
%!s(int64=10) %!d(string=hai) anos |
rarmdwa.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
%!s(int64=10) %!d(string=hai) anos |
rarmnor.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
%!s(int64=10) %!d(string=hai) anos |
rarmnum.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
%!s(int64=10) %!d(string=hai) anos |
rarmrni.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
%!s(int64=10) %!d(string=hai) anos |
rarmsri.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
%!s(int64=10) %!d(string=hai) anos |
rarmsta.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
%!s(int64=10) %!d(string=hai) anos |
rarmstd.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
%!s(int64=10) %!d(string=hai) anos |
rarmsup.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
%!s(int64=10) %!d(string=hai) anos |
rgcpu.pas
|
c2faf6a8fd
Avoid invalid typecast if hp is not an instruction
|
%!s(int64=4) %!d(string=hai) anos |
symcpu.pas
|
7f3a5eb9ab
* extend tabstractprocdef.getcopyas by a parameter to control whether the copy should be registered or not
|
%!s(int64=3) %!d(string=hai) anos |
tripletcpu.pas
|
2ed4071c1e
ARM: fixed compiler compilation after 75c16b612660
|
%!s(int64=3) %!d(string=hai) anos |