cpubase.pas 14 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Peter Vreman
  3. Contains the base types for MIPS
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. {# Base unit for processor information. This unit contains
  18. enumerations of registers, opcodes, sizes, and other
  19. such things which are processor specific.
  20. }
  21. unit cpubase;
  22. {$i fpcdefs.inc}
  23. interface
  24. uses
  25. cutils,cclasses,
  26. globtype,globals,
  27. cpuinfo,
  28. aasmbase,
  29. cgbase
  30. ;
  31. {*****************************************************************************
  32. Assembler Opcodes
  33. *****************************************************************************}
  34. type
  35. TAsmOp=({$i opcode.inc});
  36. { This should define the array of instructions as string }
  37. op2strtable=array[tasmop] of string[11];
  38. const
  39. { First value of opcode enumeration }
  40. firstop = low(tasmop);
  41. { Last value of opcode enumeration }
  42. lastop = high(tasmop);
  43. {*****************************************************************************
  44. Registers
  45. *****************************************************************************}
  46. type
  47. { Number of registers used for indexing in tables }
  48. tregisterindex=0..{$i rmipsnor.inc}-1;
  49. const
  50. { Available Superregisters }
  51. {$i rmipssup.inc}
  52. { No Subregisters }
  53. R_SUBWHOLE = R_SUBD;
  54. { Available Registers }
  55. {$i rmipscon.inc}
  56. { Integer Super registers first and last }
  57. first_int_supreg = RS_R0;
  58. first_int_imreg = $20;
  59. { Float Super register first and last }
  60. first_fpu_supreg = RS_F0;
  61. first_fpu_imreg = $20;
  62. { MM Super register first and last }
  63. first_mm_supreg = 0;
  64. first_mm_imreg = 1;
  65. { TODO: Calculate bsstart}
  66. regnumber_count_bsstart = 64;
  67. regnumber_table : array[tregisterindex] of tregister = (
  68. {$i rmipsnum.inc}
  69. );
  70. regstabs_table : array[tregisterindex] of shortint = (
  71. {$i rmipssta.inc}
  72. );
  73. regdwarf_table : array[tregisterindex] of shortint = (
  74. {$i rmipsdwf.inc}
  75. );
  76. { registers which may be destroyed by calls }
  77. VOLATILE_INTREGISTERS = [RS_R0..RS_R3,RS_R12..RS_R15];
  78. VOLATILE_FPUREGISTERS = [RS_F0..RS_F3];
  79. {*****************************************************************************
  80. Conditions
  81. *****************************************************************************}
  82. type
  83. TAsmCond=(C_None,
  84. C_EQ, C_NE, C_LT, C_LE, C_GT, C_GE, C_LTU, C_LEU, C_GTU, C_GEU,
  85. C_LTZ, C_LEZ, C_GTZ, C_GEZ,
  86. C_COP1TRUE,
  87. C_COP1FALSE
  88. );
  89. const
  90. cond2str : array[TAsmCond] of string[3]=('',
  91. 'eq','ne','lt','le','gt','ge','ltu','leu','gtu','geu',
  92. 'ltz','lez','gtz','gez',
  93. 'c1t','c1f'
  94. );
  95. type
  96. TResFlags=record
  97. reg1: TRegister;
  98. cond: TOpCmp;
  99. case use_const: boolean of
  100. False: (reg2: TRegister);
  101. True: (value: aint);
  102. end;
  103. {*****************************************************************************
  104. Constants
  105. *****************************************************************************}
  106. const
  107. max_operands = 4;
  108. maxintregs = 31;
  109. maxfpuregs = 8;
  110. maxaddrregs = 0;
  111. {*****************************************************************************
  112. Constants
  113. *****************************************************************************}
  114. const
  115. maxvarregs = 7;
  116. varregs : Array [1..maxvarregs] of tsuperregister =
  117. (RS_R4,RS_R5,RS_R6,RS_R7,RS_R8,RS_R9,RS_R10);
  118. maxfpuvarregs = 4;
  119. fpuvarregs : Array [1..maxfpuvarregs] of tsuperregister =
  120. (RS_F4,RS_F5,RS_F6,RS_F7);
  121. {*****************************************************************************
  122. Default generic sizes
  123. *****************************************************************************}
  124. {$ifdef mips64}
  125. { Defines the default address size for a processor, }
  126. OS_ADDR = OS_64;
  127. { the natural int size for a processor,
  128. has to match osuinttype/ossinttype as initialized in psystem }
  129. OS_INT = OS_64;
  130. OS_SINT = OS_S64;
  131. {$else mips64}
  132. { Defines the default address size for a processor, }
  133. OS_ADDR = OS_32;
  134. { the natural int size for a processor,
  135. has to match osuinttype/ossinttype as initialized in psystem }
  136. OS_INT = OS_32;
  137. OS_SINT = OS_S32;
  138. {$endif mips64}
  139. { the maximum float size for a processor, }
  140. OS_FLOAT = OS_F64;
  141. { the size of a vector register for a processor }
  142. OS_VECTOR = OS_M32;
  143. {*****************************************************************************
  144. Generic Register names
  145. *****************************************************************************}
  146. { PIC Code }
  147. NR_GP = NR_R28;
  148. NR_PIC_FUNC = NR_R25;
  149. RS_GP = RS_R28;
  150. RS_PIC_FUNC = RS_R25;
  151. { VMT code }
  152. NR_VMT = NR_R24;
  153. RS_VMT = RS_R24;
  154. NR_SP = NR_R29;
  155. NR_S8 = NR_R30;
  156. NR_FP = NR_R30;
  157. NR_RA = NR_R31;
  158. RS_SP = RS_R29;
  159. RS_S8 = RS_R30;
  160. RS_FP = RS_R30;
  161. RS_RA = RS_R31;
  162. {# Stack pointer register }
  163. NR_STACK_POINTER_REG = NR_SP;
  164. RS_STACK_POINTER_REG = RS_SP;
  165. {# Frame pointer register }
  166. NR_FRAME_POINTER_REG = NR_FP;
  167. RS_FRAME_POINTER_REG = RS_FP;
  168. NR_RETURN_ADDRESS_REG = NR_R7;
  169. { the return_result_reg, is used inside the called function to store its return
  170. value when that is a scalar value otherwise a pointer to the address of the
  171. result is placed inside it }
  172. { Results are returned in this register (32-bit values) }
  173. NR_FUNCTION_RETURN_REG = NR_R2;
  174. RS_FUNCTION_RETURN_REG = RS_R2;
  175. { Low part of 64bit return value }
  176. NR_FUNCTION_RETURN64_LOW_REG = NR_R2;
  177. RS_FUNCTION_RETURN64_LOW_REG = RS_R2;
  178. { High part of 64bit return value }
  179. NR_FUNCTION_RETURN64_HIGH_REG = NR_R3;
  180. RS_FUNCTION_RETURN64_HIGH_REG = RS_R3;
  181. { The value returned from a function is available in this register }
  182. NR_FUNCTION_RESULT_REG = NR_R2;
  183. RS_FUNCTION_RESULT_REG = RS_R2;
  184. { The lowh part of 64bit value returned from a function }
  185. NR_FUNCTION_RESULT64_LOW_REG = NR_R2;
  186. RS_FUNCTION_RESULT64_LOW_REG = RS_R2;
  187. { The high part of 64bit value returned from a function }
  188. NR_FUNCTION_RESULT64_HIGH_REG = NR_R3;
  189. RS_FUNCTION_RESULT64_HIGH_REG = RS_R3;
  190. NR_FPU_RESULT_REG = NR_F0;
  191. NR_MM_RESULT_REG = NR_NO;
  192. NR_DEFAULTFLAGS = NR_NO;
  193. {*****************************************************************************
  194. GCC /ABI linking information
  195. *****************************************************************************}
  196. const
  197. { Required parameter alignment when calling a routine declared as
  198. stdcall and cdecl. The alignment value should be the one defined
  199. by GCC or the target ABI.
  200. The value of this constant is equal to the constant
  201. PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
  202. }
  203. std_param_align = 4;
  204. {*****************************************************************************
  205. CPU Dependent Constants
  206. *****************************************************************************}
  207. const
  208. simm16lo = -32768;
  209. simm16hi = 32767;
  210. {*****************************************************************************
  211. Helpers
  212. *****************************************************************************}
  213. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  214. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  215. { Checks if Subset is a subset of c (e.g. "less than" is a subset of "less than or equal" }
  216. function condition_in(const Subset, c: TAsmCond): Boolean;
  217. { Returns the tcgsize corresponding with the size of reg.}
  218. function reg_cgsize(const reg: tregister) : tcgsize;
  219. function cgsize2subreg(regtype: tregistertype; s:tcgsize):tsubregister;
  220. function is_calljmp(o:tasmop):boolean;
  221. function findreg_by_number(r:Tregister):tregisterindex;
  222. function std_regnum_search(const s:string):Tregister;
  223. function std_regname(r:Tregister):string;
  224. function dwarf_reg(r:tregister):shortint;
  225. function dwarf_reg_no_error(r:tregister):shortint;
  226. function eh_return_data_regno(nr: longint): longint;
  227. implementation
  228. uses
  229. rgBase,verbose;
  230. const
  231. std_regname_table : TRegNameTable = (
  232. {$i rmipsstd.inc}
  233. );
  234. regnumber_index : array[tregisterindex] of tregisterindex = (
  235. {$i rmipsrni.inc}
  236. );
  237. std_regname_index : array[tregisterindex] of tregisterindex = (
  238. {$i rmipssri.inc}
  239. );
  240. function cgsize2subreg(regtype: tregistertype; s:tcgsize):tsubregister;
  241. begin
  242. case regtype of
  243. R_FPUREGISTER:
  244. if s=OS_F32 then
  245. result:=R_SUBFS
  246. else if s=OS_F64 then
  247. result:=R_SUBFD
  248. else
  249. internalerror(2013021301);
  250. else
  251. result:=R_SUBWHOLE;
  252. end;
  253. end;
  254. function reg_cgsize(const reg: tregister): tcgsize;
  255. begin
  256. case getregtype(reg) of
  257. R_INTREGISTER :
  258. reg_cgsize:=OS_INT;
  259. R_FPUREGISTER :
  260. begin
  261. if getsubreg(reg)=R_SUBFD then
  262. result:=OS_F64
  263. else
  264. result:=OS_F32;
  265. end;
  266. else
  267. internalerror(200303181);
  268. end;
  269. end;
  270. function is_calljmp(o:tasmop):boolean;
  271. begin
  272. is_calljmp:= o in [A_J,A_JAL,A_JALR,{ A_JALX, }A_JR, A_BA, A_BC];
  273. end;
  274. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  275. const
  276. inverse: array[TAsmCond] of TAsmCond=(C_None,
  277. C_NE, C_EQ, C_GE, C_GT, C_LE, C_LT, C_GEU, C_GTU, C_LEU, C_LTU,
  278. C_GEZ, C_GTZ, C_LEZ, C_LTZ,
  279. C_COP1FALSE,
  280. C_COP1TRUE
  281. );
  282. begin
  283. result := inverse[c];
  284. end;
  285. function findreg_by_number(r:Tregister):tregisterindex;
  286. begin
  287. { the register table for MIPS cpu only contains
  288. R_SUBFS and R_SUBD register types.
  289. This function is called by dbgstabs unit,
  290. here were are only interested in register,
  291. not its subtype, thus we change subreg to
  292. R_SUBFS or R_SUBD. }
  293. case getsubreg(r) of
  294. R_SUBFD:
  295. setsubreg(r, R_SUBFS);
  296. R_SUBL, R_SUBW, R_SUBD, R_SUBQ:
  297. setsubreg(r, R_SUBD);
  298. else
  299. ;
  300. end;
  301. result:=rgBase.findreg_by_number_table(r,regnumber_index);
  302. end;
  303. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  304. begin
  305. result := c1 = c2;
  306. end;
  307. { Checks if Subset is a subset of c (e.g. "less than" is a subset of "less than or equal" }
  308. function condition_in(const Subset, c: TAsmCond): Boolean;
  309. begin
  310. Result := (c = C_None) or conditions_equal(Subset, c);
  311. { Please update as necessary. [Kit] }
  312. if not Result then
  313. case Subset of
  314. C_EQ:
  315. Result := (c in [C_GE, C_LE, C_GEU, C_LEU]);
  316. C_LT:
  317. Result := (c in [C_LE]);
  318. C_LTU:
  319. Result := (c in [C_LEU]);
  320. C_GT:
  321. Result := (c in [C_GE]);
  322. C_GTU:
  323. Result := (c in [C_GEU]);
  324. else
  325. Result := False;
  326. end;
  327. end;
  328. function std_regnum_search(const s:string):Tregister;
  329. begin
  330. result:=regnumber_table[findreg_by_name_table(s,std_regname_table,std_regname_index)];
  331. end;
  332. function std_regname(r:Tregister):string;
  333. var
  334. p : tregisterindex;
  335. hr : tregister;
  336. begin
  337. hr:=r;
  338. case getsubreg(hr) of
  339. R_SUBFD:
  340. setsubreg(hr, R_SUBFS);
  341. R_SUBL, R_SUBW, R_SUBD, R_SUBQ:
  342. setsubreg(hr, R_SUBD);
  343. else
  344. ;
  345. end;
  346. p:=findreg_by_number_table(hr,regnumber_index);
  347. if p<>0 then
  348. result:=std_regname_table[p]
  349. else if getregtype(r)=R_SPECIALREGISTER then
  350. result:=tostr(getsupreg(r))
  351. else
  352. result:=generic_regname(r);
  353. end;
  354. function dwarf_reg(r:tregister):shortint;
  355. begin
  356. case getsubreg(r) of
  357. R_SUBFD:
  358. setsubreg(r, R_SUBFS);
  359. R_SUBL, R_SUBW, R_SUBD, R_SUBQ:
  360. setsubreg(r, R_SUBD);
  361. else
  362. ;
  363. end;
  364. result:=regdwarf_table[findreg_by_number(r)];
  365. if result=-1 then
  366. internalerror(200603251);
  367. end;
  368. function dwarf_reg_no_error(r:tregister):shortint;
  369. begin
  370. case getsubreg(r) of
  371. R_SUBFD:
  372. setsubreg(r, R_SUBFS);
  373. R_SUBL, R_SUBW, R_SUBD, R_SUBQ:
  374. setsubreg(r, R_SUBD);
  375. else
  376. ;
  377. end;
  378. result:=regdwarf_table[findreg_by_number(r)];
  379. end;
  380. function eh_return_data_regno(nr: longint): longint;
  381. begin
  382. if (nr>=0) and (nr<2) then
  383. result:=nr+4
  384. else
  385. result:=-1;
  386. end;
  387. begin
  388. end.