| .. |
|
aasmcpu.pas
|
b8920670f4
Change is_macro to return true for A_JAL if in pic mode
|
há 2 anos atrás |
|
aoptcpu.pas
|
75a9c5b500
Also avoid invalid typecast for RegLoadedWithNewValue method for mips, sparcgen and xtensa
|
há 4 anos atrás |
|
aoptcpub.pas
|
9b0ff05ee8
- get rid of MaxOps, it is redundant with max_operands
|
há 6 anos atrás |
|
aoptcpud.pas
|
0c8546f94c
* more MIPS code of David Zhang integrated
|
há 15 anos atrás |
|
cgcpu.pas
|
dc04a8a677
Fix storing of unaligned 64-bit to memory
|
há 2 anos atrás |
|
cpubase.pas
|
8bd1f19639
* few MIPS64 fixes
|
há 3 anos atrás |
|
cpuelf.pas
|
637976e83f
* patch by Marģers to unify internal error numbers, resolves #37888
|
há 4 anos atrás |
|
cpugas.pas
|
637976e83f
* patch by Marģers to unify internal error numbers, resolves #37888
|
há 4 anos atrás |
|
cpuinfo.pas
|
27fb9086aa
* cleanup: cs_opt_loopunroll is a generic optimization for a long time already
|
há 3 anos atrás |
|
cpunode.pas
|
a0efde8167
* automatically generate necessary indirect symbols when a new assembler
|
há 9 anos atrás |
|
cpupara.pas
|
d153c75e84
* small MIPS64 fix
|
há 3 anos atrás |
|
cpupi.pas
|
79dfd9fb51
+ MIPS: take care of setnoat
|
há 5 anos atrás |
|
cputarg.pas
|
b2b26f84cf
* partially merged the mips-embedded branch of Michael Ring:
|
há 11 anos atrás |
|
hlcgcpu.pas
|
637976e83f
* patch by Marģers to unify internal error numbers, resolves #37888
|
há 4 anos atrás |
|
itcpugas.pas
|
281b3ad276
* fix case completeness and unreachable code warnings in compiler that would
|
há 6 anos atrás |
|
mipsreg.dat
|
f870b0f8fc
Fix stabs number for FPU register, which start at 38 instead of 32
|
há 8 anos atrás |
|
ncpuadd.pas
|
b2e553d3c4
* mips64el compiler can be compiled
|
há 3 anos atrás |
|
ncpucall.pas
|
4c68ea1000
* use pocalls_cdecl and cstylearrayofconst more consistently instead of
|
há 8 anos atrás |
|
ncpucnv.pas
|
637976e83f
* patch by Marģers to unify internal error numbers, resolves #37888
|
há 4 anos atrás |
|
ncpuinln.pas
|
637976e83f
* patch by Marģers to unify internal error numbers, resolves #37888
|
há 4 anos atrás |
|
ncpuld.pas
|
281b3ad276
* fix case completeness and unreachable code warnings in compiler that would
|
há 6 anos atrás |
|
ncpumat.pas
|
85c7368759
* handle also simulated flags in tmipselnotnode.second_boolean, resolves #39877
|
há 3 anos atrás |
|
ncpuset.pas
|
07bd4ba517
* let all the case code generation work with tconstexprint instead of aint,
|
há 6 anos atrás |
|
opcode.inc
|
4e7c908b0d
+ MIPS: added movn and movz instructions.
|
há 11 anos atrás |
|
racpugas.pas
|
637976e83f
* patch by Marģers to unify internal error numbers, resolves #37888
|
há 4 anos atrás |
|
rgcpu.pas
|
03f4685455
+ sanity checks in mips and sparc register allocator
|
há 3 anos atrás |
|
rmipscon.inc
|
e367ccc0ee
* MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names.
|
há 11 anos atrás |
|
rmipsdwf.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
há 11 anos atrás |
|
rmipsgas.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
há 11 anos atrás |
|
rmipsgri.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
há 11 anos atrás |
|
rmipsgss.inc
|
f58fcdf401
+ basic mips stuff
|
há 20 anos atrás |
|
rmipsnor.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
há 11 anos atrás |
|
rmipsnum.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
há 11 anos atrás |
|
rmipsrni.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
há 11 anos atrás |
|
rmipssri.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
há 11 anos atrás |
|
rmipssta.inc
|
fd6d3b4971
Regenerated after change in mipsreg.dat
|
há 8 anos atrás |
|
rmipsstd.inc
|
c260879439
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
há 11 anos atrás |
|
rmipssup.inc
|
e367ccc0ee
* MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names.
|
há 11 anos atrás |
|
strinst.inc
|
4e7c908b0d
+ MIPS: added movn and movz instructions.
|
há 11 anos atrás |
|
symcpu.pas
|
7dd1d6aa77
o fixes handling of iso i/o parameters/program parameters:
|
há 10 anos atrás |
|
tripletcpu.pas
|
eb7ba1690e
* mark all external assemblers using an LLVM tool using af_llvm
|
há 5 anos atrás |
Pierre Muller
dc04a8a677
Fix storing of unaligned 64-bit to memory