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pp.pas 9.8 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Commandline compiler for Free Pascal
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. program pp;
  18. {
  19. possible compiler switches:
  20. -----------------------------------------------------------------
  21. Supported CPUs, alphabetically sorted
  22. -----------------------------------------------------------------
  23. AARCH64 generate a compiler for the AARCH64 (64bit ARM)
  24. ARM generate a compiler for the ARM
  25. AVR generate a compiler for the AVR
  26. I386 generate a compiler for the Intel i386+
  27. I8086 generate a compiler for the Intel 8086+
  28. JVM generate a compiler for the JVM (Java Virtual Machine)
  29. M68K generate a compiler for the M68000
  30. MIPS generate a compiler for the MIPS (Big Endian)
  31. MIPSEL generate a compiler for the MIPSEL (Littel Endian)
  32. POWERPC generate a compiler for the PowerPC
  33. POWERPC64 generate a compiler for the PowerPC64 architecture
  34. RISCV32 generate a compiler for the RiscV32 architecture
  35. RISCV64 generate a compiler for the RiscV64 architecture
  36. SPARC generate a compiler for SPARC
  37. SPARC64 generate a compiler for SPARC64
  38. WASM32 generate a compiler for WebAssembly 32-bit
  39. X86_64 generate a compiler for the AMD x86-64 architecture
  40. XTENSA generate a compiler for XTENSA
  41. Z80 generate a compiler for Z80
  42. LOONGARCH64 generate a compiler for the LoongArch64 architecture
  43. -----------------------------------------------------------------
  44. Other compiler switches
  45. -----------------------------------------------------------------
  46. CMEM use cmem unit for better memory debugging
  47. =======
  48. DEBUG version with debug code is generated
  49. EXTDEBUG some extra debug code is executed
  50. EXTERN_MSG Don't compile the msgfiles in the compiler, always
  51. use external messagefiles, default for TP
  52. LLVM Create an LLVM-based code generator for the selected
  53. target architecture (not supported for all targets)
  54. -----------------------------------------------------------------
  55. ARM specfic switches
  56. -----------------------------------------------------------------
  57. FPC_ARMEL create an arm eabi compiler
  58. FPC_ARMEB create an arm big endian compiler
  59. FPC_OARM create an arm oabi compiler, only needed when the host
  60. compiler is ARMEL or ARMEB
  61. FPC_ARMHF create an armhf (eabi vfp variant) compiler
  62. -----------------------------------------------------------------
  63. I386 specfic switches
  64. -----------------------------------------------------------------
  65. SUPPORT_MMX only i386: releases the compiler switch
  66. MMX which allows the compiler to generate
  67. MMX instructions
  68. -----------------------------------------------------------------
  69. Switches automatically inside fpcdefs.inc
  70. -----------------------------------------------------------------
  71. cpuflags The target processor has status flags (on by default)
  72. cpufpemu The target compiler will also support emitting software
  73. floating point operations
  74. cpu64bitaddr Generate code for a 64-bit address space
  75. cpu64bitalu The target cpu has 64-bit registers and a 64 bit alu
  76. (required for cpu64bitaddr; optional with 32 bit addr space)
  77. -----------------------------------------------------------------
  78. }
  79. {$i fpcdefs.inc}
  80. { Require at least 3.2.0 }
  81. {$if FPC_FULLVERSION<30200}
  82. {$fatal At least FPC 3.2.0 is required to compile the compiler}
  83. {$endif}
  84. { exactly one target CPU must be defined }
  85. {$ifdef I8086}
  86. {$ifdef CPUDEFINED}
  87. {$fatal ONLY one of the switches for the CPU type must be defined}
  88. {$endif CPUDEFINED}
  89. {$define CPUDEFINED}
  90. {$endif I8086}
  91. {$ifdef I386}
  92. {$ifdef CPUDEFINED}
  93. {$fatal ONLY one of the switches for the CPU type must be defined}
  94. {$endif CPUDEFINED}
  95. {$define CPUDEFINED}
  96. {$endif I386}
  97. {$ifdef x86_64}
  98. {$ifdef CPUDEFINED}
  99. {$fatal ONLY one of the switches for the CPU type must be defined}
  100. {$endif CPUDEFINED}
  101. {$define CPUDEFINED}
  102. {$endif x86_64}
  103. {$ifdef M68K}
  104. {$ifdef CPUDEFINED}
  105. {$fatal ONLY one of the switches for the CPU type must be defined}
  106. {$endif CPUDEFINED}
  107. {$define CPUDEFINED}
  108. {$endif M68K}
  109. {$ifdef POWERPC}
  110. {$ifdef CPUDEFINED}
  111. {$fatal ONLY one of the switches for the CPU type must be defined}
  112. {$endif CPUDEFINED}
  113. {$define CPUDEFINED}
  114. {$endif POWERPC}
  115. {$ifdef POWERPC64}
  116. {$ifdef CPUDEFINED}
  117. {$fatal ONLY one of the switches for the CPU type must be defined}
  118. {$endif CPUDEFINED}
  119. {$define CPUDEFINED}
  120. {$endif POWERPC64}
  121. {$ifdef SPARC}
  122. {$ifdef CPUDEFINED}
  123. {$fatal ONLY one of the switches for the CPU type must be defined}
  124. {$endif CPUDEFINED}
  125. {$define CPUDEFINED}
  126. {$endif SPARC}
  127. {$ifdef SPARC64}
  128. {$ifdef CPUDEFINED}
  129. {$fatal ONLY one of the switches for the CPU type must be defined}
  130. {$endif CPUDEFINED}
  131. {$define CPUDEFINED}
  132. {$endif SPARC64}
  133. {$ifdef ARM}
  134. {$ifdef CPUDEFINED}
  135. {$fatal ONLY one of the switches for the CPU type must be defined}
  136. {$endif CPUDEFINED}
  137. {$define CPUDEFINED}
  138. {$endif ARM}
  139. {$ifdef MIPS}
  140. {$ifdef CPUDEFINED}
  141. {$fatal ONLY one of the switches for the CPU type must be defined}
  142. {$endif CPUDEFINED}
  143. {$define CPUDEFINED}
  144. {$endif MIPS}
  145. {$ifdef AVR}
  146. {$ifdef CPUDEFINED}
  147. {$fatal ONLY one of the switches for the CPU type must be defined}
  148. {$endif CPUDEFINED}
  149. {$define CPUDEFINED}
  150. {$endif AVR}
  151. {$ifdef JVM}
  152. {$ifdef CPUDEFINED}
  153. {$fatal ONLY one of the switches for the CPU type must be defined}
  154. {$endif CPUDEFINED}
  155. {$define CPUDEFINED}
  156. {$endif}
  157. {$ifdef AARCH64}
  158. {$ifdef CPUDEFINED}
  159. {$fatal ONLY one of the switches for the CPU type must be defined}
  160. {$endif CPUDEFINED}
  161. {$define CPUDEFINED}
  162. {$endif AARCH64}
  163. {$ifdef RISCV32}
  164. {$ifdef CPUDEFINED}
  165. {$fatal ONLY one of the switches for the CPU type must be defined}
  166. {$endif CPUDEFINED}
  167. {$define CPUDEFINED}
  168. {$endif RISCV32}
  169. {$ifdef RISCV64}
  170. {$ifdef CPUDEFINED}
  171. {$fatal ONLY one of the switches for the CPU type must be defined}
  172. {$endif CPUDEFINED}
  173. {$define CPUDEFINED}
  174. {$endif RISCV64}
  175. {$ifdef XTENSA}
  176. {$ifdef CPUDEFINED}
  177. {$fatal ONLY one of the switches for the CPU type must be defined}
  178. {$endif CPUDEFINED}
  179. {$define CPUDEFINED}
  180. {$endif XTENSA}
  181. {$ifdef Z80}
  182. {$ifdef CPUDEFINED}
  183. {$fatal ONLY one of the switches for the CPU type must be defined}
  184. {$endif CPUDEFINED}
  185. {$define CPUDEFINED}
  186. {$endif Z80}
  187. {$ifdef WASM32}
  188. {$ifdef CPUDEFINED}
  189. {$fatal ONLY one of the switches for the CPU type must be defined}
  190. {$endif CPUDEFINED}
  191. {$define CPUDEFINED}
  192. {$endif WASM32}
  193. {$ifdef LOONGARCH64}
  194. {$ifdef CPUDEFINED}
  195. {$fatal ONLY one of the switches for the CPU type must be defined}
  196. {$endif CPUDEFINED}
  197. {$define CPUDEFINED}
  198. {$endif LOONGARCH64}
  199. {$ifndef CPUDEFINED}
  200. {$fatal A CPU type switch must be defined}
  201. {$endif CPUDEFINED}
  202. {$ifdef support_mmx}
  203. {$ifndef i386}
  204. {$fatal I386 switch must be on for MMX support}
  205. {$endif i386}
  206. {$endif support_mmx}
  207. { Don't care about minstacksize or maxstacksize not beeing supported by current OS }
  208. {$WARN 2077 OFF}
  209. {$WARN 2078 OFF}
  210. {$ifdef win32}
  211. { 256 MB stack }
  212. { under windows the stack can't grow }
  213. {$MAXSTACKSIZE 256000000}
  214. {$setpeflags $20}
  215. {$else win32}
  216. {$ifdef win64}
  217. { 512 MB stack }
  218. { under windows the stack can't grow }
  219. {$MAXSTACKSIZE 512000000}
  220. {$else win64}
  221. { 1 MB stack }
  222. {$MINSTACKSIZE 1000000}
  223. {$endif win64}
  224. {$endif win32}
  225. uses
  226. {$ifdef heaptrc}
  227. ppheap,
  228. {$endif heaptrc}
  229. {$ifdef cmem}
  230. cmem,
  231. {$endif cmem}
  232. {$ifdef profile}
  233. profile,
  234. {$endif profile}
  235. {$ifndef NOCATCH}
  236. {$if defined(Unix) or defined(Go32v2) or defined(Watcom)}
  237. catch,
  238. {$endif}
  239. {$endif NOCATCH}
  240. globals,compiler;
  241. var
  242. oldexit : pointer;
  243. procedure myexit;
  244. begin
  245. exitproc:=oldexit;
  246. {$ifdef nocatch}
  247. exit;
  248. {$endif nocatch}
  249. { Show Runtime error if there was an error }
  250. if (erroraddr<>nil) then
  251. begin
  252. case exitcode of
  253. 100:
  254. begin
  255. erroraddr:=nil;
  256. writeln('Error while reading file');
  257. end;
  258. 101:
  259. begin
  260. erroraddr:=nil;
  261. writeln('Error while writing file');
  262. end;
  263. 202:
  264. begin
  265. erroraddr:=nil;
  266. writeln('Error: Stack Overflow');
  267. end;
  268. 203:
  269. begin
  270. erroraddr:=nil;
  271. writeln('Error: Out of memory');
  272. end;
  273. end;
  274. { we cannot use current_filepos.file because all memory might have been
  275. freed already !
  276. But we can use global parser_current_file var }
  277. Writeln('Compilation aborted ',parser_current_file,':',current_filepos.line);
  278. end;
  279. end;
  280. begin
  281. oldexit:=exitproc;
  282. exitproc:=@myexit;
  283. {$ifdef EXTDEBUG}
  284. { Increase the maximum stack trace depth, since the default 8 is often not
  285. enough for debugging the compiler }
  286. Max_Frame_Dump:=50;
  287. {$endif EXTDEBUG}
  288. { Call the compiler with empty command, so it will take the parameters }
  289. Halt(compiler.Compile(''));
  290. end.