| .. |
|
aasmcpu.pas
|
e047e7db91
+ RiscV: initial support of pic generation
|
4 years ago |
|
agrvgas.pas
|
8382c6f586
Added generic WCH32Vx RISC-V processor types using memory size suffixes
|
1 year ago |
|
aoptcpurv.pas
|
c2c7982a22
Fix check that third parameter of ADDI hp1 instruction is a constant
|
4 years ago |
|
cgrv.pas
|
a71cc71585
+ function needs_check_for_fpu_exceptions to unify fpu exception handling
|
1 year ago |
|
cpubase.pas
|
a05aa25aad
* Risc-V: allow also register aliases in register modification lists after asm blocks, last part to resolve #39738
|
3 years ago |
|
hlcgrv.pas
|
637976e83f
* patch by Marģers to unify internal error numbers, resolves #37888
|
4 years ago |
|
itcpugas.pas
|
ec3a04da9b
+ forgotten pseudo-instructions added
|
3 years ago |
|
nrvadd.pas
|
a736a4bba7
+ set pi_do_call on RiscV as well if we check for fpu exceptions
|
1 year ago |
|
nrvcnv.pas
|
ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
|
7 years ago |
|
nrvcon.pas
|
ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
|
7 years ago |
|
nrvinl.pas
|
a736a4bba7
+ set pi_do_call on RiscV as well if we check for fpu exceptions
|
1 year ago |
|
nrvset.pas
|
07bd4ba517
* let all the case code generation work with tconstexprint instead of aint,
|
6 years ago |
|
rarv.pas
|
d1fb44044f
* unified RiscV32 and RiscV64 GAS readers
|
4 years ago |
|
rarvgas.pas
|
a05aa25aad
* Risc-V: allow also register aliases in register modification lists after asm blocks, last part to resolve #39738
|
3 years ago |
|
rgcpu.pas
|
92b0ea7d02
Add explicit smallint typecast to first marameter of SarSmallint call to avoid range check errors
|
5 years ago |
|
rvreg.dat
|
ae457a18ad
* unified Risc-V 32 and 64 register data file
|
3 years ago |
florian
a736a4bba7
+ set pi_do_call on RiscV as well if we check for fpu exceptions