nx86cnv.pas 21 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate for x86-64 and i386 assembler for type converting nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit nx86cnv;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ncgcnv,defutil;
  22. type
  23. tx86typeconvnode = class(tcgtypeconvnode)
  24. private
  25. function int_to_real_mm_location: boolean;
  26. protected
  27. function first_real_to_real : tnode;override;
  28. { procedure second_int_to_int;override; }
  29. { procedure second_string_to_string;override; }
  30. { procedure second_cstring_to_pchar;override; }
  31. { procedure second_string_to_chararray;override; }
  32. { procedure second_array_to_pointer;override; }
  33. { procedure second_pointer_to_array;override; }
  34. { procedure second_chararray_to_string;override; }
  35. { procedure second_char_to_string;override; }
  36. function first_int_to_real: tnode; override;
  37. procedure second_int_to_real;override;
  38. { procedure second_real_to_real;override; }
  39. { procedure second_cord_to_pointer;override; }
  40. { procedure second_proc_to_procvar;override; }
  41. { procedure second_bool_to_int;override; }
  42. procedure second_int_to_bool;override;
  43. { procedure second_set_to_set;override; }
  44. { procedure second_ansistring_to_pchar;override; }
  45. { procedure second_pchar_to_string;override; }
  46. { procedure second_class_to_intf;override; }
  47. { procedure second_char_to_char;override; }
  48. end;
  49. implementation
  50. uses
  51. verbose,globals,globtype,
  52. aasmbase,aasmtai,aasmdata,aasmcpu,
  53. symconst,symdef,
  54. cgbase,cga,pass_1,pass_2,
  55. cpuinfo,
  56. ncnv,
  57. cpubase,
  58. cgutils,cgobj,hlcgobj,cgx86,
  59. tgobj;
  60. function tx86typeconvnode.first_real_to_real : tnode;
  61. begin
  62. first_real_to_real:=nil;
  63. if use_vectorfpu(resultdef) then
  64. expectloc:=LOC_MMREGISTER
  65. else
  66. expectloc:=LOC_FPUREGISTER;
  67. end;
  68. procedure tx86typeconvnode.second_int_to_bool;
  69. var
  70. {$ifndef cpu64bitalu}
  71. hreg2,
  72. hregister : tregister;
  73. href : treference;
  74. i : integer;
  75. {$endif not cpu64bitalu}
  76. resflags : tresflags;
  77. hlabel : tasmlabel;
  78. newsize : tcgsize;
  79. begin
  80. secondpass(left);
  81. if codegenerror then
  82. exit;
  83. { Explicit typecasts from any ordinal type to a boolean type }
  84. { must not change the ordinal value }
  85. if (nf_explicit in flags) and
  86. not(left.location.loc in [LOC_FLAGS,LOC_JUMP]) then
  87. begin
  88. location_copy(location,left.location);
  89. newsize:=def_cgsize(resultdef);
  90. { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
  91. if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
  92. ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
  93. hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
  94. else
  95. location.size:=newsize;
  96. exit;
  97. end;
  98. { Load left node into flag F_NE/F_E }
  99. resflags:=F_NE;
  100. if (left.location.loc in [LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF]) then
  101. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  102. case left.location.loc of
  103. LOC_CREFERENCE,
  104. LOC_REFERENCE :
  105. begin
  106. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  107. {$ifndef cpu64bitalu}
  108. if left.location.size in [OS_64,OS_S64{$ifdef cpu16bitalu},OS_32,OS_S32{$endif}] then
  109. begin
  110. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  111. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,left.location.reference,hregister);
  112. href:=left.location.reference;
  113. for i:=2 to tcgsize2size[left.location.size] div tcgsize2size[OS_INT] do
  114. begin
  115. inc(href.offset,tcgsize2size[OS_INT]);
  116. cg.a_op_ref_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,href,hregister);
  117. end;
  118. end
  119. else
  120. {$endif not cpu64bitalu}
  121. begin
  122. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  123. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
  124. end;
  125. end;
  126. LOC_FLAGS :
  127. begin
  128. resflags:=left.location.resflags;
  129. end;
  130. LOC_REGISTER,LOC_CREGISTER :
  131. begin
  132. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  133. {$if defined(cpu32bitalu)}
  134. if left.location.size in [OS_64,OS_S64] then
  135. begin
  136. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  137. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,left.location.register64.reglo,hregister);
  138. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reghi,hregister);
  139. end
  140. else
  141. {$elseif defined(cpu16bitalu)}
  142. if left.location.size in [OS_64,OS_S64] then
  143. begin
  144. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_16);
  145. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,left.location.register64.reglo,hregister);
  146. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,cg.GetNextReg(left.location.register64.reglo),hregister);
  147. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,left.location.register64.reghi,hregister);
  148. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,cg.GetNextReg(left.location.register64.reghi),hregister);
  149. end
  150. else
  151. if left.location.size in [OS_32,OS_S32] then
  152. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,left.location.register,cg.GetNextReg(left.location.register))
  153. else
  154. {$endif}
  155. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
  156. end;
  157. LOC_JUMP :
  158. begin
  159. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  160. location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  161. current_asmdata.getjumplabel(hlabel);
  162. cg.a_label(current_asmdata.CurrAsmList,left.location.truelabel);
  163. if not(is_cbool(resultdef)) then
  164. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,1,location.register)
  165. else
  166. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,-1,location.register);
  167. cg.a_jmp_always(current_asmdata.CurrAsmList,hlabel);
  168. cg.a_label(current_asmdata.CurrAsmList,left.location.falselabel);
  169. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,0,location.register);
  170. cg.a_label(current_asmdata.CurrAsmList,hlabel);
  171. end;
  172. else
  173. internalerror(10062);
  174. end;
  175. if (left.location.loc<>LOC_JUMP) then
  176. begin
  177. { load flags to register }
  178. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  179. {$ifndef cpu64bitalu}
  180. if (location.size in [OS_64,OS_S64]) then
  181. begin
  182. hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  183. cg.g_flags2reg(current_asmdata.CurrAsmList,OS_32,resflags,hreg2);
  184. cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  185. if (is_cbool(resultdef)) then
  186. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_32,hreg2,hreg2);
  187. location.register64.reglo:=hreg2;
  188. location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  189. if (is_cbool(resultdef)) then
  190. { reglo is either 0 or -1 -> reghi has to become the same }
  191. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,location.register64.reglo,location.register64.reghi)
  192. else
  193. { unsigned }
  194. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
  195. end
  196. else
  197. {$endif not cpu64bitalu}
  198. begin
  199. location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  200. cg.g_flags2reg(current_asmdata.CurrAsmList,location.size,resflags,location.register);
  201. cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  202. if (is_cbool(resultdef)) then
  203. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,location.size,location.register,location.register);
  204. end
  205. end;
  206. end;
  207. function tx86typeconvnode.int_to_real_mm_location : boolean;
  208. begin
  209. result:=use_vectorfpu(resultdef) and
  210. {$ifdef cpu64bitalu}
  211. ((torddef(left.resultdef).ordtype in [s32bit,s64bit]) or
  212. ((torddef(left.resultdef).ordtype in [u32bit,u64bit]) and
  213. (FPUX86_HAS_AVX512F in fpu_capabilities[current_settings.fputype]))
  214. );
  215. {$else cpu64bitalu}
  216. ((torddef(left.resultdef).ordtype=s32bit)
  217. {$ifdef i386}
  218. or ((torddef(left.resultdef).ordtype=u32bit) and
  219. (FPUX86_HAS_AVX512F in fpu_capabilities[current_settings.fputype]))
  220. {$endif i386}
  221. );
  222. {$endif cpu64bitalu}
  223. end;
  224. function tx86typeconvnode.first_int_to_real : tnode;
  225. begin
  226. first_int_to_real:=nil;
  227. if (left.resultdef.size<4) then
  228. begin
  229. inserttypeconv(left,s32inttype);
  230. firstpass(left)
  231. end;
  232. if int_to_real_mm_location then
  233. expectloc:=LOC_MMREGISTER
  234. else
  235. expectloc:=LOC_FPUREGISTER;
  236. end;
  237. procedure tx86typeconvnode.second_int_to_real;
  238. var
  239. leftref,
  240. href : treference;
  241. l1,l2 : tasmlabel;
  242. op: tasmop;
  243. opsize: topsize;
  244. signtested : boolean;
  245. use_bt: boolean; { true = use BT (386+), false = use TEST (286-) }
  246. begin
  247. {$ifdef i8086}
  248. use_bt:=current_settings.cputype>=cpu_386;
  249. {$else i8086}
  250. use_bt:=true;
  251. {$endif i8086}
  252. if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
  253. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  254. if int_to_real_mm_location then
  255. begin
  256. location_reset(location,LOC_MMREGISTER,def_cgsize(resultdef));
  257. location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
  258. if UseAVX then
  259. case location.size of
  260. OS_F32:
  261. if torddef(left.resultdef).ordtype in [s32bit,s64bit] then
  262. op:=A_VCVTSI2SS
  263. else
  264. op:=A_VCVTUSI2SS;
  265. OS_F64:
  266. if torddef(left.resultdef).ordtype in [s32bit,s64bit] then
  267. op:=A_VCVTSI2SD
  268. else
  269. op:=A_VCVTUSI2SD;
  270. else
  271. internalerror(2007120902);
  272. end
  273. else
  274. begin
  275. { do not use is_signed here as it checks the boundaries instead
  276. of the ordtype }
  277. if not(torddef(left.resultdef).ordtype in [s32bit,s64bit]) then
  278. Internalerror(2020101001);
  279. case location.size of
  280. OS_F32:
  281. op:=A_CVTSI2SS;
  282. OS_F64:
  283. op:=A_CVTSI2SD;
  284. else
  285. internalerror(2007120904);
  286. end;
  287. end;
  288. { don't use left.location.size, because that one may be OS_32/OS_64
  289. if the lower bound of the orddef >= 0
  290. }
  291. case torddef(left.resultdef).ordtype of
  292. s32bit,u32bit:
  293. opsize:=S_L;
  294. s64bit,u64bit:
  295. opsize:=S_Q;
  296. else
  297. internalerror(2007120903);
  298. end;
  299. case left.location.loc of
  300. LOC_REFERENCE,
  301. LOC_CREFERENCE:
  302. begin
  303. href:=left.location.reference;
  304. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
  305. if UseAVX then
  306. { VCVTSI2.. requires a second source operand to copy bits 64..127 }
  307. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg_reg(op,opsize,href,location.register,location.register))
  308. else
  309. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(op,opsize,href,location.register));
  310. end;
  311. LOC_REGISTER,
  312. LOC_CREGISTER:
  313. if UseAVX then
  314. { VCVTSI2.. requires a second source operand to copy bits 64..127 }
  315. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,opsize,left.location.register,location.register,location.register))
  316. else
  317. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(op,opsize,left.location.register,location.register));
  318. else
  319. internalerror(2019050708);
  320. end;
  321. end
  322. else
  323. begin
  324. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  325. if (left.location.loc=LOC_REGISTER) and (torddef(left.resultdef).ordtype=u64bit) then
  326. begin
  327. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  328. if use_bt then
  329. begin
  330. {$if defined(cpu64bitalu)}
  331. emit_const_reg(A_BT,S_Q,63,left.location.register);
  332. {$elseif defined(cpu32bitalu)}
  333. emit_const_reg(A_BT,S_L,31,left.location.register64.reghi);
  334. {$elseif defined(cpu16bitalu)}
  335. emit_const_reg(A_BT,S_W,15,cg.GetNextReg(left.location.register64.reghi));
  336. {$endif}
  337. end
  338. else
  339. begin
  340. {$ifdef i8086}
  341. emit_const_reg(A_TEST,S_W,aint($8000),cg.GetNextReg(left.location.register64.reghi));
  342. {$else i8086}
  343. internalerror(2013052510);
  344. {$endif i8086}
  345. end;
  346. signtested:=true;
  347. end
  348. else
  349. signtested:=false;
  350. { We need to load from a reference }
  351. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  352. { don't change left.location.reference, because if it's a temp we
  353. need the original location at the end so we can free it }
  354. leftref:=left.location.reference;
  355. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,leftref);
  356. { For u32bit we need to load it as comp and need to
  357. make it 64bits }
  358. if (torddef(left.resultdef).ordtype=u32bit) then
  359. begin
  360. tg.GetTemp(current_asmdata.CurrAsmList,8,8,tt_normal,href);
  361. location_freetemp(current_asmdata.CurrAsmList,left.location);
  362. cg.a_load_ref_ref(current_asmdata.CurrAsmList,left.location.size,OS_32,leftref,href);
  363. inc(href.offset,4);
  364. cg.a_load_const_ref(current_asmdata.CurrAsmList,OS_32,0,href);
  365. dec(href.offset,4);
  366. { could be a temp with an offset > 32 bit on x86_64 }
  367. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
  368. leftref:=href;
  369. end;
  370. { Load from reference to fpu reg }
  371. case torddef(left.resultdef).ordtype of
  372. u32bit,
  373. scurrency,
  374. s64bit:
  375. begin
  376. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,leftref));
  377. end;
  378. u64bit:
  379. begin
  380. { unsigned 64 bit ints are harder to handle:
  381. we load bits 0..62 and then check bit 63:
  382. if it is 1 then we add 2**64 as float.
  383. Since 2**64 can be represented exactly, use a single-precision
  384. constant to save space. }
  385. current_asmdata.getglobaldatalabel(l1);
  386. current_asmdata.getjumplabel(l2);
  387. if not(signtested) then
  388. begin
  389. if use_bt then
  390. begin
  391. {$if defined(cpu64bitalu) or defined(cpu32bitalu)}
  392. inc(leftref.offset,4);
  393. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  394. emit_const_ref(A_BT,S_L,31,leftref);
  395. dec(leftref.offset,4);
  396. {$elseif defined(cpu16bitalu)}
  397. inc(leftref.offset,6);
  398. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  399. emit_const_ref(A_BT,S_W,15,leftref);
  400. dec(leftref.offset,6);
  401. {$endif}
  402. end
  403. else
  404. begin
  405. {$ifdef i8086}
  406. { reading a byte, instead of word is faster on a true }
  407. { 8088, because of the 8-bit data bus }
  408. inc(leftref.offset,7);
  409. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  410. emit_const_ref(A_TEST,S_B,aint($80),leftref);
  411. dec(leftref.offset,7);
  412. {$else i8086}
  413. internalerror(2013052511);
  414. {$endif i8086}
  415. end;
  416. end;
  417. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,leftref));
  418. if use_bt then
  419. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NC,l2)
  420. else
  421. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_E,l2);
  422. cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  423. new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata_norel,l1.name,const_align(sizeof(pint)));
  424. current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l1));
  425. { I got this constant from a test program (FK) }
  426. { It's actually the bit representation of 2^64 as a Single [Kit] }
  427. current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($5f800000));
  428. reference_reset_symbol(href,l1,0,4,[]);
  429. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
  430. current_asmdata.CurrAsmList.concat(Taicpu.Op_ref(A_FADD,S_FS,href));
  431. cg.a_label(current_asmdata.CurrAsmList,l2);
  432. end
  433. else
  434. begin
  435. if left.resultdef.size<4 then
  436. internalerror(2007120901);
  437. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IL,leftref));
  438. end;
  439. end;
  440. tcgx86(cg).inc_fpu_stack;
  441. location.register:=NR_ST;
  442. tg.ungetiftemp(current_asmdata.CurrAsmList,leftref);
  443. end;
  444. end;
  445. begin
  446. ctypeconvnode:=tx86typeconvnode
  447. end.