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aoptcpu.pas
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a7fe49f38f
* x86: CMOVcc/Jcc pairs are now changed to MOV/Jcc if the register is not used if the jump doesn't branch
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1 year ago |
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aoptcpub.pas
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9b0ff05ee8
- get rid of MaxOps, it is redundant with max_operands
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6 years ago |
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aoptcpud.pas
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790a4fe2d3
* log and id tags removed
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20 years ago |
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cgcpu.pas
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fe39f9ca21
Fixed bug on x86 platforms where the stack pointer was not allocated if it was different to the frame pointer
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3 years ago |
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cpubase.inc
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7de177e3f3
* fixed x86-64 NR_RETURN_ADDRESS_REG
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6 years ago |
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cpuelf.pas
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9003114a8f
+ support R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX
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4 years ago |
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cpuinfo.pas
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cad21584e5
+ Skylake-X
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1 year ago |
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cpunode.pas
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597a23d278
+ tls support for x86_64-linux (not yet enabled by default)
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6 years ago |
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cpupara.pas
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0ca260e08c
LLVM: fix currency parameters passed on the stack on x86-64
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1 year ago |
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cpupi.pas
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ded001753d
+ initial native x86-64 support
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6 years ago |
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cputarg.pas
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10b15628ab
* split i/t_darwin from i/t_bsd, as they don't have that much in common
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5 years ago |
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hlcgcpu.pas
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a401898139
* spelling fixes
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3 years ago |
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nx64add.pas
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5bddb3a435
* x86-64 can handle overflows in 64 bit multiplications directly, part of resolving #39450
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3 years ago |
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nx64cal.pas
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568d4de77e
* aros64: recent developments hanged the library call ABI, lets try to follow it (aros64 is experimental)
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3 years ago |
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nx64cnv.pas
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6f24c8b4ef
* x86: Code generation fixes where FLAGS
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3 years ago |
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nx64flw.pas
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2b47425f08
+ tx64tryfinallynode.dogetcopy properly implemented, resolves #37305
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4 years ago |
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nx64inl.pas
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1bcc276dcf
* remove implicit typecast to extended automatically inserted for trunc/round
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10 years ago |
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nx64mat.pas
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ecc3ce64ea
* x86: some fixes to enable 8 and 16 bit operations
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4 years ago |
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nx64set.pas
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ba1b4b1c92
+ support for verifying whether a case statements handles all possibilities
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6 years ago |
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r8664ari.inc
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4dc5442fa5
support vector operand writemask,zeroflag
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7 years ago |
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r8664att.inc
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4dc5442fa5
support vector operand writemask,zeroflag
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7 years ago |
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r8664con.inc
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4dc5442fa5
support vector operand writemask,zeroflag
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7 years ago |
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r8664dwrf.inc
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4dc5442fa5
support vector operand writemask,zeroflag
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7 years ago |
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r8664int.inc
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4dc5442fa5
support vector operand writemask,zeroflag
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7 years ago |
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r8664iri.inc
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4dc5442fa5
support vector operand writemask,zeroflag
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7 years ago |
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r8664nasm.inc
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4dc5442fa5
support vector operand writemask,zeroflag
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7 years ago |
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r8664nor.inc
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4dc5442fa5
support vector operand writemask,zeroflag
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7 years ago |
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r8664num.inc
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4dc5442fa5
support vector operand writemask,zeroflag
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7 years ago |
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r8664ot.inc
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867d145e50
support vector operand bcst,{sae},{er} + k-register
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7 years ago |
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r8664rni.inc
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4dc5442fa5
support vector operand writemask,zeroflag
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7 years ago |
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r8664sri.inc
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4dc5442fa5
support vector operand writemask,zeroflag
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7 years ago |
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r8664stab.inc
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4dc5442fa5
support vector operand writemask,zeroflag
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7 years ago |
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r8664std.inc
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4dc5442fa5
support vector operand writemask,zeroflag
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7 years ago |
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rax64att.pas
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2f74a51eb8
* fix .seh_savereg: the offset is checked with a bitmask, not a divisor, so use "and", not "mod"
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6 years ago |
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rax64int.pas
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637976e83f
* patch by Marģers to unify internal error numbers, resolves #37888
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4 years ago |
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rgcpu.pas
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a3f58e84be
* rbp can be used for normal purpose under certain conditions so it shouldn't interfere with all other registers
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11 years ago |
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symcpu.pas
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7f3a5eb9ab
* extend tabstractprocdef.getcopyas by a parameter to control whether the copy should be registered or not
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3 years ago |
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tripletcpu.pas
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eb7ba1690e
* mark all external assemblers using an LLVM tool using af_llvm
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5 years ago |
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win64unw.pas
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637976e83f
* patch by Marģers to unify internal error numbers, resolves #37888
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4 years ago |
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x8664ats.inc
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6c7e6191f6
+ support of SHA extension in the internal assembler
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3 years ago |
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x8664att.inc
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6c7e6191f6
+ support of SHA extension in the internal assembler
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3 years ago |
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x8664int.inc
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6c7e6191f6
+ support of SHA extension in the internal assembler
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3 years ago |
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x8664nop.inc
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6c7e6191f6
+ support of SHA extension in the internal assembler
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3 years ago |
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x8664op.inc
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6c7e6191f6
+ support of SHA extension in the internal assembler
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3 years ago |
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x8664pro.inc
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14466ee9d9
* change table updates
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2 years ago |
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x8664tab.inc
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6c7e6191f6
+ support of SHA extension in the internal assembler
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3 years ago |
J. Gareth "Curious Kit" Moreton
a7fe49f38f
* x86: CMOVcc/Jcc pairs are now changed to MOV/Jcc if the register is not used if the jump doesn't branch