atmega1284rfr2.pp 101 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085
  1. unit ATmega1284RFR2;
  2. interface
  3. var
  4. PINA: byte absolute $20; // Port A Input Pins Address
  5. DDRA: byte absolute $21; // Port A Data Direction Register
  6. PORTA: byte absolute $22; // Port A Data Register
  7. PINB: byte absolute $23; // Port B Input Pins Address
  8. DDRB: byte absolute $24; // Port B Data Direction Register
  9. PORTB: byte absolute $25; // Port B Data Register
  10. PINC: byte absolute $26; // Port C Input Pins Address
  11. DDRC: byte absolute $27; // Port C Data Direction Register
  12. PORTC: byte absolute $28; // Port C Data Register
  13. PIND: byte absolute $29; // Port D Input Pins Address
  14. DDRD: byte absolute $2A; // Port D Data Direction Register
  15. PORTD: byte absolute $2B; // Port D Data Register
  16. PINE: byte absolute $2C; // Port E Input Pins Address
  17. DDRE: byte absolute $2D; // Port E Data Direction Register
  18. PORTE: byte absolute $2E; // Port E Data Register
  19. PINF: byte absolute $2F; // Port F Input Pins Address
  20. DDRF: byte absolute $30; // Port F Data Direction Register
  21. PORTF: byte absolute $31; // Port F Data Register
  22. PING: byte absolute $32; // Port G Input Pins Address
  23. DDRG: byte absolute $33; // Port G Data Direction Register
  24. PORTG: byte absolute $34; // Port G Data Register
  25. TIFR0: byte absolute $35; // Timer/Counter0 Interrupt Flag Register
  26. TIFR1: byte absolute $36; // Timer/Counter1 Interrupt Flag Register
  27. TIFR2: byte absolute $37; // Timer/Counter Interrupt Flag Register
  28. TIFR3: byte absolute $38; // Timer/Counter3 Interrupt Flag Register
  29. TIFR4: byte absolute $39; // Timer/Counter4 Interrupt Flag Register
  30. TIFR5: byte absolute $3A; // Timer/Counter5 Interrupt Flag Register
  31. PCIFR: byte absolute $3B; // Pin Change Interrupt Flag Register
  32. EIFR: byte absolute $3C; // External Interrupt Flag Register
  33. EIMSK: byte absolute $3D; // External Interrupt Mask Register
  34. GPIOR0: byte absolute $3E; // General Purpose IO Register 0
  35. EECR: byte absolute $3F; // EEPROM Control Register
  36. EEDR: byte absolute $40; // EEPROM Data Register
  37. EEAR: word absolute $41; // EEPROM Address Register Bytes
  38. EEARL: byte absolute $41; // EEPROM Address Register Bytes
  39. EEARH: byte absolute $42; // EEPROM Address Register Bytes;
  40. GTCCR: byte absolute $43; // General Timer Counter Control register
  41. TCCR0A: byte absolute $44; // Timer/Counter0 Control Register A
  42. TCCR0B: byte absolute $45; // Timer/Counter0 Control Register B
  43. TCNT0: byte absolute $46; // Timer/Counter0 Register
  44. OCR0A: byte absolute $47; // Timer/Counter0 Output Compare Register
  45. OCR0B: byte absolute $48; // Timer/Counter0 Output Compare Register B
  46. GPIOR1: byte absolute $4A; // General Purpose IO Register 1
  47. GPIOR2: byte absolute $4B; // General Purpose I/O Register 2
  48. SPCR: byte absolute $4C; // SPI Control Register
  49. SPSR: byte absolute $4D; // SPI Status Register
  50. SPDR: byte absolute $4E; // SPI Data Register
  51. ACSR: byte absolute $50; // Analog Comparator Control And Status Register
  52. OCDR: byte absolute $51; // On-Chip Debug Register
  53. SMCR: byte absolute $53; // Sleep Mode Control Register
  54. MCUSR: byte absolute $54; // MCU Status Register
  55. MCUCR: byte absolute $55; // MCU Control Register
  56. SPMCSR: byte absolute $57; // Store Program Memory Control Register
  57. RAMPZ: byte absolute $5B; // Extended Z-pointer Register for ELPM/SPM
  58. SP: word absolute $5D; // Stack Pointer
  59. SPL: byte absolute $5D; // Stack Pointer
  60. SPH: byte absolute $5E; // Stack Pointer ;
  61. SREG: byte absolute $5F; // Status Register
  62. WDTCSR: byte absolute $60; // Watchdog Timer Control Register
  63. CLKPR: byte absolute $61; // Clock Prescale Register
  64. PRR2: byte absolute $63; // Power Reduction Register 2
  65. PRR0: byte absolute $64; // Power Reduction Register0
  66. PRR1: byte absolute $65; // Power Reduction Register 1
  67. OSCCAL: byte absolute $66; // Oscillator Calibration Value
  68. BGCR: byte absolute $67; // Reference Voltage Calibration Register
  69. PCICR: byte absolute $68; // Pin Change Interrupt Control Register
  70. EICRA: byte absolute $69; // External Interrupt Control Register A
  71. EICRB: byte absolute $6A; // External Interrupt Control Register B
  72. PCMSK0: byte absolute $6B; // Pin Change Mask Register 0
  73. PCMSK1: byte absolute $6C; // Pin Change Mask Register 1
  74. PCMSK2: byte absolute $6D; // Pin Change Mask Register 2
  75. TIMSK0: byte absolute $6E; // Timer/Counter0 Interrupt Mask Register
  76. TIMSK1: byte absolute $6F; // Timer/Counter1 Interrupt Mask Register
  77. TIMSK2: byte absolute $70; // Timer/Counter Interrupt Mask register
  78. TIMSK3: byte absolute $71; // Timer/Counter3 Interrupt Mask Register
  79. TIMSK4: byte absolute $72; // Timer/Counter4 Interrupt Mask Register
  80. TIMSK5: byte absolute $73; // Timer/Counter5 Interrupt Mask Register
  81. NEMCR: byte absolute $75; // Flash Extended-Mode Control-Register
  82. ADCSRC: byte absolute $77; // The ADC Control and Status Register C
  83. ADC: word absolute $78; // ADC Data Register Bytes
  84. ADCL: byte absolute $78; // ADC Data Register Bytes
  85. ADCH: byte absolute $79; // ADC Data Register Bytes;
  86. ADCSRA: byte absolute $7A; // The ADC Control and Status Register A
  87. ADCSRB: byte absolute $7B; // The ADC Control and Status Register B
  88. ADMUX: byte absolute $7C; // The ADC Multiplexer Selection Register
  89. DIDR2: byte absolute $7D; // Digital Input Disable Register 2
  90. DIDR0: byte absolute $7E; // Digital Input Disable Register 0
  91. DIDR1: byte absolute $7F; // Digital Input Disable Register 1
  92. TCCR1A: byte absolute $80; // Timer/Counter1 Control Register A
  93. TCCR1B: byte absolute $81; // Timer/Counter1 Control Register B
  94. TCCR1C: byte absolute $82; // Timer/Counter1 Control Register C
  95. TCNT1: word absolute $84; // Timer/Counter1 Bytes
  96. TCNT1L: byte absolute $84; // Timer/Counter1 Bytes
  97. TCNT1H: byte absolute $85; // Timer/Counter1 Bytes;
  98. ICR1: word absolute $86; // Timer/Counter1 Input Capture Register Bytes
  99. ICR1L: byte absolute $86; // Timer/Counter1 Input Capture Register Bytes
  100. ICR1H: byte absolute $87; // Timer/Counter1 Input Capture Register Bytes;
  101. OCR1A: word absolute $88; // Timer/Counter1 Output Compare Register A Bytes
  102. OCR1AL: byte absolute $88; // Timer/Counter1 Output Compare Register A Bytes
  103. OCR1AH: byte absolute $89; // Timer/Counter1 Output Compare Register A Bytes;
  104. OCR1B: word absolute $8A; // Timer/Counter1 Output Compare Register B Bytes
  105. OCR1BL: byte absolute $8A; // Timer/Counter1 Output Compare Register B Bytes
  106. OCR1BH: byte absolute $8B; // Timer/Counter1 Output Compare Register B Bytes;
  107. OCR1C: word absolute $8C; // Timer/Counter1 Output Compare Register C Bytes
  108. OCR1CL: byte absolute $8C; // Timer/Counter1 Output Compare Register C Bytes
  109. OCR1CH: byte absolute $8D; // Timer/Counter1 Output Compare Register C Bytes;
  110. TCCR3A: byte absolute $90; // Timer/Counter3 Control Register A
  111. TCCR3B: byte absolute $91; // Timer/Counter3 Control Register B
  112. TCCR3C: byte absolute $92; // Timer/Counter3 Control Register C
  113. TCNT3: word absolute $94; // Timer/Counter3 Bytes
  114. TCNT3L: byte absolute $94; // Timer/Counter3 Bytes
  115. TCNT3H: byte absolute $95; // Timer/Counter3 Bytes;
  116. ICR3: word absolute $96; // Timer/Counter3 Input Capture Register Bytes
  117. ICR3L: byte absolute $96; // Timer/Counter3 Input Capture Register Bytes
  118. ICR3H: byte absolute $97; // Timer/Counter3 Input Capture Register Bytes;
  119. OCR3A: word absolute $98; // Timer/Counter3 Output Compare Register A Bytes
  120. OCR3AL: byte absolute $98; // Timer/Counter3 Output Compare Register A Bytes
  121. OCR3AH: byte absolute $99; // Timer/Counter3 Output Compare Register A Bytes;
  122. OCR3B: word absolute $9A; // Timer/Counter3 Output Compare Register B Bytes
  123. OCR3BL: byte absolute $9A; // Timer/Counter3 Output Compare Register B Bytes
  124. OCR3BH: byte absolute $9B; // Timer/Counter3 Output Compare Register B Bytes;
  125. OCR3C: word absolute $9C; // Timer/Counter3 Output Compare Register C Bytes
  126. OCR3CL: byte absolute $9C; // Timer/Counter3 Output Compare Register C Bytes
  127. OCR3CH: byte absolute $9D; // Timer/Counter3 Output Compare Register C Bytes;
  128. TCCR4A: byte absolute $A0; // Timer/Counter4 Control Register A
  129. TCCR4B: byte absolute $A1; // Timer/Counter4 Control Register B
  130. TCCR4C: byte absolute $A2; // Timer/Counter4 Control Register C
  131. TCNT4: word absolute $A4; // Timer/Counter4 Bytes
  132. TCNT4L: byte absolute $A4; // Timer/Counter4 Bytes
  133. TCNT4H: byte absolute $A5; // Timer/Counter4 Bytes;
  134. ICR4: word absolute $A6; // Timer/Counter4 Input Capture Register Bytes
  135. ICR4L: byte absolute $A6; // Timer/Counter4 Input Capture Register Bytes
  136. ICR4H: byte absolute $A7; // Timer/Counter4 Input Capture Register Bytes;
  137. OCR4A: word absolute $A8; // Timer/Counter4 Output Compare Register A Bytes
  138. OCR4AL: byte absolute $A8; // Timer/Counter4 Output Compare Register A Bytes
  139. OCR4AH: byte absolute $A9; // Timer/Counter4 Output Compare Register A Bytes;
  140. OCR4B: word absolute $AA; // Timer/Counter4 Output Compare Register B Bytes
  141. OCR4BL: byte absolute $AA; // Timer/Counter4 Output Compare Register B Bytes
  142. OCR4BH: byte absolute $AB; // Timer/Counter4 Output Compare Register B Bytes;
  143. OCR4C: word absolute $AC; // Timer/Counter4 Output Compare Register C Bytes
  144. OCR4CL: byte absolute $AC; // Timer/Counter4 Output Compare Register C Bytes
  145. OCR4CH: byte absolute $AD; // Timer/Counter4 Output Compare Register C Bytes;
  146. TCCR2A: byte absolute $B0; // Timer/Counter2 Control Register A
  147. TCCR2B: byte absolute $B1; // Timer/Counter2 Control Register B
  148. TCNT2: byte absolute $B2; // Timer/Counter2
  149. OCR2A: byte absolute $B3; // Timer/Counter2 Output Compare Register A
  150. OCR2B: byte absolute $B4; // Timer/Counter2 Output Compare Register B
  151. ASSR: byte absolute $B6; // Asynchronous Status Register
  152. TWBR: byte absolute $B8; // TWI Bit Rate Register
  153. TWSR: byte absolute $B9; // TWI Status Register
  154. TWAR: byte absolute $BA; // TWI (Slave) Address Register
  155. TWDR: byte absolute $BB; // TWI Data Register
  156. TWCR: byte absolute $BC; // TWI Control Register
  157. TWAMR: byte absolute $BD; // TWI (Slave) Address Mask Register
  158. IRQ_MASK1: byte absolute $BE; // Transceiver Interrupt Enable Register 1
  159. IRQ_STATUS1: byte absolute $BF; // Transceiver Interrupt Status Register 1
  160. UCSR0A: byte absolute $C0; // USART0 MSPIM Control and Status Register A
  161. UCSR0B: byte absolute $C1; // USART0 MSPIM Control and Status Register B
  162. UCSR0C: byte absolute $C2; // USART0 MSPIM Control and Status Register C
  163. UBRR0: word absolute $C4; // USART0 Baud Rate Register Bytes
  164. UBRR0L: byte absolute $C4; // USART0 Baud Rate Register Bytes
  165. UBRR0H: byte absolute $C5; // USART0 Baud Rate Register Bytes;
  166. UDR0: byte absolute $C6; // USART0 I/O Data Register
  167. UCSR1A: byte absolute $C8; // USART1 MSPIM Control and Status Register A
  168. UCSR1B: byte absolute $C9; // USART1 MSPIM Control and Status Register B
  169. UCSR1C: byte absolute $CA; // USART1 MSPIM Control and Status Register C
  170. UBRR1: word absolute $CC; // USART1 Baud Rate Register Bytes
  171. UBRR1L: byte absolute $CC; // USART1 Baud Rate Register Bytes
  172. UBRR1H: byte absolute $CD; // USART1 Baud Rate Register Bytes;
  173. UDR1: byte absolute $CE; // USART1 I/O Data Register
  174. SCRSTRLL: byte absolute $D7; // Symbol Counter Received Frame Timestamp Register LL-Byte
  175. SCRSTRLH: byte absolute $D8; // Symbol Counter Received Frame Timestamp Register LH-Byte
  176. SCRSTRHL: byte absolute $D9; // Symbol Counter Received Frame Timestamp Register HL-Byte
  177. SCRSTRHH: byte absolute $DA; // Symbol Counter Received Frame Timestamp Register HH-Byte
  178. SCCSR: byte absolute $DB; // Symbol Counter Compare Source Register
  179. SCCR0: byte absolute $DC; // Symbol Counter Control Register 0
  180. SCCR1: byte absolute $DD; // Symbol Counter Control Register 1
  181. SCSR: byte absolute $DE; // Symbol Counter Status Register
  182. SCIRQM: byte absolute $DF; // Symbol Counter Interrupt Mask Register
  183. SCIRQS: byte absolute $E0; // Symbol Counter Interrupt Status Register
  184. SCCNTLL: byte absolute $E1; // Symbol Counter Register LL-Byte
  185. SCCNTLH: byte absolute $E2; // Symbol Counter Register LH-Byte
  186. SCCNTHL: byte absolute $E3; // Symbol Counter Register HL-Byte
  187. SCCNTHH: byte absolute $E4; // Symbol Counter Register HH-Byte
  188. SCBTSRLL: byte absolute $E5; // Symbol Counter Beacon Timestamp Register LL-Byte
  189. SCBTSRLH: byte absolute $E6; // Symbol Counter Beacon Timestamp Register LH-Byte
  190. SCBTSRHL: byte absolute $E7; // Symbol Counter Beacon Timestamp Register HL-Byte
  191. SCBTSRHH: byte absolute $E8; // Symbol Counter Beacon Timestamp Register HH-Byte
  192. SCTSRLL: byte absolute $E9; // Symbol Counter Frame Timestamp Register LL-Byte
  193. SCTSRLH: byte absolute $EA; // Symbol Counter Frame Timestamp Register LH-Byte
  194. SCTSRHL: byte absolute $EB; // Symbol Counter Frame Timestamp Register HL-Byte
  195. SCTSRHH: byte absolute $EC; // Symbol Counter Frame Timestamp Register HH-Byte
  196. SCOCR3LL: byte absolute $ED; // Symbol Counter Output Compare Register 3 LL-Byte
  197. SCOCR3LH: byte absolute $EE; // Symbol Counter Output Compare Register 3 LH-Byte
  198. SCOCR3HL: byte absolute $EF; // Symbol Counter Output Compare Register 3 HL-Byte
  199. SCOCR3HH: byte absolute $F0; // Symbol Counter Output Compare Register 3 HH-Byte
  200. SCOCR2LL: byte absolute $F1; // Symbol Counter Output Compare Register 2 LL-Byte
  201. SCOCR2LH: byte absolute $F2; // Symbol Counter Output Compare Register 2 LH-Byte
  202. SCOCR2HL: byte absolute $F3; // Symbol Counter Output Compare Register 2 HL-Byte
  203. SCOCR2HH: byte absolute $F4; // Symbol Counter Output Compare Register 2 HH-Byte
  204. SCOCR1LL: byte absolute $F5; // Symbol Counter Output Compare Register 1 LL-Byte
  205. SCOCR1LH: byte absolute $F6; // Symbol Counter Output Compare Register 1 LH-Byte
  206. SCOCR1HL: byte absolute $F7; // Symbol Counter Output Compare Register 1 HL-Byte
  207. SCOCR1HH: byte absolute $F8; // Symbol Counter Output Compare Register 1 HH-Byte
  208. SCTSTRLL: byte absolute $F9; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  209. SCTSTRLH: byte absolute $FA; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  210. SCTSTRHL: byte absolute $FB; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  211. SCTSTRHH: byte absolute $FC; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  212. MAFCR0: byte absolute $10C; // Multiple Address Filter Configuration Register 0
  213. MAFCR1: byte absolute $10D; // Multiple Address Filter Configuration Register 1
  214. MAFSA0L: byte absolute $10E; // Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)
  215. MAFSA0H: byte absolute $10F; // Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)
  216. MAFPA0L: byte absolute $110; // Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)
  217. MAFPA0H: byte absolute $111; // Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)
  218. MAFSA1L: byte absolute $112; // Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)
  219. MAFSA1H: byte absolute $113; // Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)
  220. MAFPA1L: byte absolute $114; // Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)
  221. MAFPA1H: byte absolute $115; // Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)
  222. MAFSA2L: byte absolute $116; // Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)
  223. MAFSA2H: byte absolute $117; // Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)
  224. MAFPA2L: byte absolute $118; // Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)
  225. MAFPA2H: byte absolute $119; // Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)
  226. MAFSA3L: byte absolute $11A; // Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)
  227. MAFSA3H: byte absolute $11B; // Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)
  228. MAFPA3L: byte absolute $11C; // Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)
  229. MAFPA3H: byte absolute $11D; // Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)
  230. TCCR5A: byte absolute $120; // Timer/Counter5 Control Register A
  231. TCCR5B: byte absolute $121; // Timer/Counter5 Control Register B
  232. TCCR5C: byte absolute $122; // Timer/Counter5 Control Register C
  233. TCNT5: word absolute $124; // Timer/Counter5 Bytes
  234. TCNT5L: byte absolute $124; // Timer/Counter5 Bytes
  235. TCNT5H: byte absolute $125; // Timer/Counter5 Bytes;
  236. ICR5: word absolute $126; // Timer/Counter5 Input Capture Register Bytes
  237. ICR5L: byte absolute $126; // Timer/Counter5 Input Capture Register Bytes
  238. ICR5H: byte absolute $127; // Timer/Counter5 Input Capture Register Bytes;
  239. OCR5A: word absolute $128; // Timer/Counter5 Output Compare Register A Bytes
  240. OCR5AL: byte absolute $128; // Timer/Counter5 Output Compare Register A Bytes
  241. OCR5AH: byte absolute $129; // Timer/Counter5 Output Compare Register A Bytes;
  242. OCR5B: word absolute $12A; // Timer/Counter5 Output Compare Register B Bytes
  243. OCR5BL: byte absolute $12A; // Timer/Counter5 Output Compare Register B Bytes
  244. OCR5BH: byte absolute $12B; // Timer/Counter5 Output Compare Register B Bytes;
  245. OCR5C: word absolute $12C; // Timer/Counter5 Output Compare Register C Bytes
  246. OCR5CL: byte absolute $12C; // Timer/Counter5 Output Compare Register C Bytes
  247. OCR5CH: byte absolute $12D; // Timer/Counter5 Output Compare Register C Bytes;
  248. LLCR: byte absolute $12F; // Low Leakage Voltage Regulator Control Register
  249. LLDRL: byte absolute $130; // Low Leakage Voltage Regulator Data Register (Low-Byte)
  250. LLDRH: byte absolute $131; // Low Leakage Voltage Regulator Data Register (High-Byte)
  251. DRTRAM3: byte absolute $132; // Data Retention Configuration Register #3
  252. DRTRAM2: byte absolute $133; // Data Retention Configuration Register #2
  253. DRTRAM1: byte absolute $134; // Data Retention Configuration Register #1
  254. DRTRAM0: byte absolute $135; // Data Retention Configuration Register #0
  255. DPDS0: byte absolute $136; // Port Driver Strength Register 0
  256. DPDS1: byte absolute $137; // Port Driver Strength Register 1
  257. PARCR: byte absolute $138; // Power Amplifier Ramp up/down Control Register
  258. TRXPR: byte absolute $139; // Transceiver Pin Register
  259. AES_CTRL: byte absolute $13C; // AES Control Register
  260. AES_STATUS: byte absolute $13D; // AES Status Register
  261. AES_STATE: byte absolute $13E; // AES Plain and Cipher Text Buffer Register
  262. AES_KEY: byte absolute $13F; // AES Encryption and Decryption Key Buffer Register
  263. TRX_STATUS: byte absolute $141; // Transceiver Status Register
  264. TRX_STATE: byte absolute $142; // Transceiver State Control Register
  265. TRX_CTRL_0: byte absolute $143; // Reserved
  266. TRX_CTRL_1: byte absolute $144; // Transceiver Control Register 1
  267. PHY_TX_PWR: byte absolute $145; // Transceiver Transmit Power Control Register
  268. PHY_RSSI: byte absolute $146; // Receiver Signal Strength Indicator Register
  269. PHY_ED_LEVEL: byte absolute $147; // Transceiver Energy Detection Level Register
  270. PHY_CC_CCA: byte absolute $148; // Transceiver Clear Channel Assessment (CCA) Control Register
  271. CCA_THRES: byte absolute $149; // Transceiver CCA Threshold Setting Register
  272. RX_CTRL: byte absolute $14A; // Transceiver Receive Control Register
  273. SFD_VALUE: byte absolute $14B; // Start of Frame Delimiter Value Register
  274. TRX_CTRL_2: byte absolute $14C; // Transceiver Control Register 2
  275. ANT_DIV: byte absolute $14D; // Antenna Diversity Control Register
  276. IRQ_MASK: byte absolute $14E; // Transceiver Interrupt Enable Register
  277. IRQ_STATUS: byte absolute $14F; // Transceiver Interrupt Status Register
  278. VREG_CTRL: byte absolute $150; // Voltage Regulator Control and Status Register
  279. BATMON: byte absolute $151; // Battery Monitor Control and Status Register
  280. XOSC_CTRL: byte absolute $152; // Crystal Oscillator Control Register
  281. CC_CTRL_0: byte absolute $153; // Channel Control Register 0
  282. CC_CTRL_1: byte absolute $154; // Channel Control Register 1
  283. RX_SYN: byte absolute $155; // Transceiver Receiver Sensitivity Control Register
  284. TRX_RPC: byte absolute $156; // Transceiver Reduced Power Consumption Control
  285. XAH_CTRL_1: byte absolute $157; // Transceiver Acknowledgment Frame Control Register 1
  286. FTN_CTRL: byte absolute $158; // Transceiver Filter Tuning Control Register
  287. PLL_CF: byte absolute $15A; // Transceiver Center Frequency Calibration Control Register
  288. PLL_DCU: byte absolute $15B; // Transceiver Delay Cell Calibration Control Register
  289. PART_NUM: byte absolute $15C; // Device Identification Register (Part Number)
  290. VERSION_NUM: byte absolute $15D; // Device Identification Register (Version Number)
  291. MAN_ID_0: byte absolute $15E; // Device Identification Register (Manufacture ID Low Byte)
  292. MAN_ID_1: byte absolute $15F; // Device Identification Register (Manufacture ID High Byte)
  293. SHORT_ADDR_0: byte absolute $160; // Transceiver MAC Short Address Register (Low Byte)
  294. SHORT_ADDR_1: byte absolute $161; // Transceiver MAC Short Address Register (High Byte)
  295. PAN_ID_0: byte absolute $162; // Transceiver Personal Area Network ID Register (Low Byte)
  296. PAN_ID_1: byte absolute $163; // Transceiver Personal Area Network ID Register (High Byte)
  297. IEEE_ADDR_0: byte absolute $164; // Transceiver MAC IEEE Address Register 0
  298. IEEE_ADDR_1: byte absolute $165; // Transceiver MAC IEEE Address Register 1
  299. IEEE_ADDR_2: byte absolute $166; // Transceiver MAC IEEE Address Register 2
  300. IEEE_ADDR_3: byte absolute $167; // Transceiver MAC IEEE Address Register 3
  301. IEEE_ADDR_4: byte absolute $168; // Transceiver MAC IEEE Address Register 4
  302. IEEE_ADDR_5: byte absolute $169; // Transceiver MAC IEEE Address Register 5
  303. IEEE_ADDR_6: byte absolute $16A; // Transceiver MAC IEEE Address Register 6
  304. IEEE_ADDR_7: byte absolute $16B; // Transceiver MAC IEEE Address Register 7
  305. XAH_CTRL_0: byte absolute $16C; // Transceiver Extended Operating Mode Control Register
  306. CSMA_SEED_0: byte absolute $16D; // Transceiver CSMA-CA Random Number Generator Seed Register
  307. CSMA_SEED_1: byte absolute $16E; // Transceiver Acknowledgment Frame Control Register 2
  308. CSMA_BE: byte absolute $16F; // Transceiver CSMA-CA Back-off Exponent Control Register
  309. TST_CTRL_DIGI: byte absolute $176; // Transceiver Digital Test Control Register
  310. TST_RX_LENGTH: byte absolute $17B; // Transceiver Received Frame Length Register
  311. TRXFBST: byte absolute $180; // Start of frame buffer
  312. TRXFBEND: byte absolute $1FF; // End of frame buffer
  313. const
  314. // Port A Data Register
  315. PA0 = $00;
  316. PA1 = $01;
  317. PA2 = $02;
  318. PA3 = $03;
  319. PA4 = $04;
  320. PA5 = $05;
  321. PA6 = $06;
  322. PA7 = $07;
  323. // Port B Data Register
  324. PB0 = $00;
  325. PB1 = $01;
  326. PB2 = $02;
  327. PB3 = $03;
  328. PB4 = $04;
  329. PB5 = $05;
  330. PB6 = $06;
  331. PB7 = $07;
  332. // Port C Data Register
  333. PC0 = $00;
  334. PC1 = $01;
  335. PC2 = $02;
  336. PC3 = $03;
  337. PC4 = $04;
  338. PC5 = $05;
  339. PC6 = $06;
  340. PC7 = $07;
  341. // Port D Data Register
  342. PD0 = $00;
  343. PD1 = $01;
  344. PD2 = $02;
  345. PD3 = $03;
  346. PD4 = $04;
  347. PD5 = $05;
  348. PD6 = $06;
  349. PD7 = $07;
  350. // Port E Data Register
  351. PE0 = $00;
  352. PE1 = $01;
  353. PE2 = $02;
  354. PE3 = $03;
  355. PE4 = $04;
  356. PE5 = $05;
  357. PE6 = $06;
  358. PE7 = $07;
  359. // Port F Data Register
  360. PF0 = $00;
  361. PF1 = $01;
  362. PF2 = $02;
  363. PF3 = $03;
  364. PF4 = $04;
  365. PF5 = $05;
  366. PF6 = $06;
  367. PF7 = $07;
  368. // Port G Data Register
  369. PG0 = $00;
  370. PG1 = $01;
  371. PG2 = $02;
  372. PG3 = $03;
  373. PG4 = $04;
  374. PG5 = $05;
  375. PG6 = $06;
  376. PG7 = $07;
  377. // Timer/Counter0 Interrupt Flag Register
  378. TOV0 = $00;
  379. OCF0A = $01;
  380. OCF0B = $02;
  381. // Timer/Counter1 Interrupt Flag Register
  382. TOV1 = $00;
  383. OCF1A = $01;
  384. OCF1B = $02;
  385. OCF1C = $03;
  386. ICF1 = $05;
  387. // Timer/Counter Interrupt Flag Register
  388. TOV2 = $00;
  389. OCF2A = $01;
  390. OCF2B = $02;
  391. // Timer/Counter3 Interrupt Flag Register
  392. TOV3 = $00;
  393. OCF3A = $01;
  394. OCF3B = $02;
  395. OCF3C = $03;
  396. ICF3 = $05;
  397. // Timer/Counter4 Interrupt Flag Register
  398. TOV4 = $00;
  399. OCF4A = $01;
  400. OCF4B = $02;
  401. OCF4C = $03;
  402. ICF4 = $05;
  403. // Timer/Counter5 Interrupt Flag Register
  404. TOV5 = $00;
  405. OCF5A = $01;
  406. OCF5B = $02;
  407. OCF5C = $03;
  408. ICF5 = $05;
  409. // Pin Change Interrupt Flag Register
  410. PCIF0 = $00; // Pin Change Interrupt Flags
  411. PCIF1 = $01; // Pin Change Interrupt Flags
  412. PCIF2 = $02; // Pin Change Interrupt Flags
  413. // External Interrupt Flag Register
  414. INTF0 = $00; // External Interrupt Flag
  415. INTF1 = $01; // External Interrupt Flag
  416. INTF2 = $02; // External Interrupt Flag
  417. INTF3 = $03; // External Interrupt Flag
  418. INTF4 = $04; // External Interrupt Flag
  419. INTF5 = $05; // External Interrupt Flag
  420. INTF6 = $06; // External Interrupt Flag
  421. INTF7 = $07; // External Interrupt Flag
  422. // External Interrupt Mask Register
  423. INT0 = $00; // External Interrupt Request Enable
  424. INT1 = $01; // External Interrupt Request Enable
  425. INT2 = $02; // External Interrupt Request Enable
  426. INT3 = $03; // External Interrupt Request Enable
  427. INT4 = $04; // External Interrupt Request Enable
  428. INT5 = $05; // External Interrupt Request Enable
  429. INT6 = $06; // External Interrupt Request Enable
  430. INT7 = $07; // External Interrupt Request Enable
  431. // General Purpose IO Register 0
  432. GPIOR00 = $00;
  433. GPIOR01 = $01;
  434. GPIOR02 = $02;
  435. GPIOR03 = $03;
  436. GPIOR04 = $04;
  437. GPIOR05 = $05;
  438. GPIOR06 = $06;
  439. GPIOR07 = $07;
  440. // EEPROM Control Register
  441. EERE = $00;
  442. EEPE = $01;
  443. EEMPE = $02;
  444. EERIE = $03;
  445. EEPM0 = $04; // EEPROM Programming Mode
  446. EEPM1 = $05; // EEPROM Programming Mode
  447. // General Timer Counter Control register
  448. PSRSYNC = $00;
  449. PSRASY = $01;
  450. TSM = $07;
  451. // Timer/Counter0 Control Register A
  452. WGM00 = $00; // Waveform Generation Mode
  453. WGM01 = $01; // Waveform Generation Mode
  454. COM0B0 = $04; // Compare Match Output B Mode
  455. COM0B1 = $05; // Compare Match Output B Mode
  456. COM0A0 = $06; // Compare Match Output A Mode
  457. COM0A1 = $07; // Compare Match Output A Mode
  458. // Timer/Counter0 Control Register B
  459. CS00 = $00; // Clock Select
  460. CS01 = $01; // Clock Select
  461. CS02 = $02; // Clock Select
  462. WGM02 = $03;
  463. FOC0B = $06;
  464. FOC0A = $07;
  465. // General Purpose I/O Register 2
  466. GPIOR20 = $00; // General Purpose I/O Register 2 Value
  467. GPIOR21 = $01; // General Purpose I/O Register 2 Value
  468. GPIOR22 = $02; // General Purpose I/O Register 2 Value
  469. GPIOR23 = $03; // General Purpose I/O Register 2 Value
  470. GPIOR24 = $04; // General Purpose I/O Register 2 Value
  471. GPIOR25 = $05; // General Purpose I/O Register 2 Value
  472. GPIOR26 = $06; // General Purpose I/O Register 2 Value
  473. GPIOR27 = $07; // General Purpose I/O Register 2 Value
  474. // SPI Control Register
  475. SPR0 = $00; // SPI Clock Rate Select 1 and 0
  476. SPR1 = $01; // SPI Clock Rate Select 1 and 0
  477. CPHA = $02;
  478. CPOL = $03;
  479. MSTR = $04;
  480. DORD = $05;
  481. SPE = $06;
  482. SPIE = $07;
  483. // SPI Status Register
  484. SPI2X = $00;
  485. WCOL = $06;
  486. SPIF = $07;
  487. // Analog Comparator Control And Status Register
  488. ACIS0 = $00; // Analog Comparator Interrupt Mode Select
  489. ACIS1 = $01; // Analog Comparator Interrupt Mode Select
  490. ACIC = $02;
  491. ACIE = $03;
  492. ACI = $04;
  493. ACO = $05;
  494. ACBG = $06;
  495. ACD = $07;
  496. // On-Chip Debug Register
  497. OCDR0 = $00; // On-Chip Debug Register Data
  498. OCDR1 = $01; // On-Chip Debug Register Data
  499. OCDR2 = $02; // On-Chip Debug Register Data
  500. OCDR3 = $03; // On-Chip Debug Register Data
  501. OCDR4 = $04; // On-Chip Debug Register Data
  502. OCDR5 = $05; // On-Chip Debug Register Data
  503. OCDR6 = $06; // On-Chip Debug Register Data
  504. OCDR7 = $07; // On-Chip Debug Register Data
  505. // Sleep Mode Control Register
  506. SE = $00;
  507. SM0 = $01; // Sleep Mode Select bits
  508. SM1 = $02; // Sleep Mode Select bits
  509. SM2 = $03; // Sleep Mode Select bits
  510. // MCU Status Register
  511. PORF = $00;
  512. EXTRF = $01;
  513. BORF = $02;
  514. WDRF = $03;
  515. JTRF = $04;
  516. // MCU Control Register
  517. IVCE = $00;
  518. IVSEL = $01;
  519. PUD = $04;
  520. JTD = $07;
  521. // Store Program Memory Control Register
  522. SPMEN = $00;
  523. PGERS = $01;
  524. PGWRT = $02;
  525. BLBSET = $03;
  526. RWWSRE = $04;
  527. SIGRD = $05;
  528. RWWSB = $06;
  529. SPMIE = $07;
  530. // Extended Z-pointer Register for ELPM/SPM
  531. RAMPZ0 = $00;
  532. // Status Register
  533. C = $00;
  534. Z = $01;
  535. N = $02;
  536. V = $03;
  537. S = $04;
  538. H = $05;
  539. T = $06;
  540. I = $07;
  541. // Watchdog Timer Control Register
  542. WDE = $03;
  543. WDCE = $04;
  544. WDP0 = $00; // Watchdog Timer Prescaler Bits
  545. WDP1 = $01; // Watchdog Timer Prescaler Bits
  546. WDP2 = $02; // Watchdog Timer Prescaler Bits
  547. WDP3 = $05; // Watchdog Timer Prescaler Bits
  548. WDIE = $06;
  549. WDIF = $07;
  550. // Clock Prescale Register
  551. CLKPS0 = $00; // Clock Prescaler Select Bits
  552. CLKPS1 = $01; // Clock Prescaler Select Bits
  553. CLKPS2 = $02; // Clock Prescaler Select Bits
  554. CLKPS3 = $03; // Clock Prescaler Select Bits
  555. CLKPCE = $07;
  556. // Power Reduction Register 2
  557. PRRAM0 = $00;
  558. PRRAM1 = $01;
  559. PRRAM2 = $02;
  560. PRRAM3 = $03;
  561. // Power Reduction Register0
  562. PRADC = $00;
  563. PRUSART0 = $01;
  564. PRSPI = $02;
  565. PRTIM1 = $03;
  566. PRPGA = $04;
  567. PRTIM0 = $05;
  568. PRTIM2 = $06;
  569. PRTWI = $07;
  570. // Power Reduction Register 1
  571. PRUSART1 = $00;
  572. PRTIM3 = $03;
  573. PRTIM4 = $04;
  574. PRTIM5 = $05;
  575. PRTRX24 = $06;
  576. // Oscillator Calibration Value
  577. CAL0 = $00; // Oscillator Calibration Tuning Value
  578. CAL1 = $01; // Oscillator Calibration Tuning Value
  579. CAL2 = $02; // Oscillator Calibration Tuning Value
  580. CAL3 = $03; // Oscillator Calibration Tuning Value
  581. CAL4 = $04; // Oscillator Calibration Tuning Value
  582. CAL5 = $05; // Oscillator Calibration Tuning Value
  583. CAL6 = $06; // Oscillator Calibration Tuning Value
  584. CAL7 = $07; // Oscillator Calibration Tuning Value
  585. // Reference Voltage Calibration Register
  586. BGCAL0 = $00; // Coarse Calibration Bits
  587. BGCAL1 = $01; // Coarse Calibration Bits
  588. BGCAL2 = $02; // Coarse Calibration Bits
  589. BGCAL_FINE0 = $03; // Fine Calibration Bits
  590. BGCAL_FINE1 = $04; // Fine Calibration Bits
  591. BGCAL_FINE2 = $05; // Fine Calibration Bits
  592. BGCAL_FINE3 = $06; // Fine Calibration Bits
  593. // Pin Change Interrupt Control Register
  594. PCIE0 = $00; // Pin Change Interrupt Enables
  595. PCIE1 = $01; // Pin Change Interrupt Enables
  596. PCIE2 = $02; // Pin Change Interrupt Enables
  597. // External Interrupt Control Register A
  598. ISC00 = $00; // External Interrupt 0 Sense Control Bit
  599. ISC01 = $01; // External Interrupt 0 Sense Control Bit
  600. ISC10 = $02; // External Interrupt 1 Sense Control Bit
  601. ISC11 = $03; // External Interrupt 1 Sense Control Bit
  602. ISC20 = $04; // External Interrupt 2 Sense Control Bit
  603. ISC21 = $05; // External Interrupt 2 Sense Control Bit
  604. ISC30 = $06; // External Interrupt 3 Sense Control Bit
  605. ISC31 = $07; // External Interrupt 3 Sense Control Bit
  606. // External Interrupt Control Register B
  607. ISC40 = $00; // External Interrupt 4 Sense Control Bit
  608. ISC41 = $01; // External Interrupt 4 Sense Control Bit
  609. ISC50 = $02; // External Interrupt 5 Sense Control Bit
  610. ISC51 = $03; // External Interrupt 5 Sense Control Bit
  611. ISC60 = $04; // External Interrupt 6 Sense Control Bit
  612. ISC61 = $05; // External Interrupt 6 Sense Control Bit
  613. ISC70 = $06; // External Interrupt 7 Sense Control Bit
  614. ISC71 = $07; // External Interrupt 7 Sense Control Bit
  615. // Pin Change Mask Register 2
  616. PCINT16 = $00; // Pin Change Enable Mask
  617. PCINT17 = $01; // Pin Change Enable Mask
  618. PCINT18 = $02; // Pin Change Enable Mask
  619. PCINT19 = $03; // Pin Change Enable Mask
  620. PCINT20 = $04; // Pin Change Enable Mask
  621. PCINT21 = $05; // Pin Change Enable Mask
  622. PCINT22 = $06; // Pin Change Enable Mask
  623. PCINT23 = $07; // Pin Change Enable Mask
  624. // Timer/Counter0 Interrupt Mask Register
  625. TOIE0 = $00;
  626. OCIE0A = $01;
  627. OCIE0B = $02;
  628. // Timer/Counter1 Interrupt Mask Register
  629. TOIE1 = $00;
  630. OCIE1A = $01;
  631. OCIE1B = $02;
  632. OCIE1C = $03;
  633. ICIE1 = $05;
  634. // Timer/Counter Interrupt Mask register
  635. TOIE2 = $00;
  636. OCIE2A = $01;
  637. OCIE2B = $02;
  638. // Timer/Counter3 Interrupt Mask Register
  639. TOIE3 = $00;
  640. OCIE3A = $01;
  641. OCIE3B = $02;
  642. OCIE3C = $03;
  643. ICIE3 = $05;
  644. // Timer/Counter4 Interrupt Mask Register
  645. TOIE4 = $00;
  646. OCIE4A = $01;
  647. OCIE4B = $02;
  648. OCIE4C = $03;
  649. ICIE4 = $05;
  650. // Timer/Counter5 Interrupt Mask Register
  651. TOIE5 = $00;
  652. OCIE5A = $01;
  653. OCIE5B = $02;
  654. OCIE5C = $03;
  655. ICIE5 = $05;
  656. // Flash Extended-Mode Control-Register
  657. AEAM0 = $04; // Address for Extended Address Mode of Extra Rows
  658. AEAM1 = $05; // Address for Extended Address Mode of Extra Rows
  659. ENEAM = $06;
  660. // The ADC Control and Status Register C
  661. ADSUT0 = $00; // ADC Start-up Time
  662. ADSUT1 = $01; // ADC Start-up Time
  663. ADSUT2 = $02; // ADC Start-up Time
  664. ADSUT3 = $03; // ADC Start-up Time
  665. ADSUT4 = $04; // ADC Start-up Time
  666. ADTHT0 = $06; // ADC Track-and-Hold Time
  667. ADTHT1 = $07; // ADC Track-and-Hold Time
  668. // The ADC Control and Status Register A
  669. ADPS0 = $00; // ADC Prescaler Select Bits
  670. ADPS1 = $01; // ADC Prescaler Select Bits
  671. ADPS2 = $02; // ADC Prescaler Select Bits
  672. ADIE = $03;
  673. ADIF = $04;
  674. ADATE = $05;
  675. ADSC = $06;
  676. ADEN = $07;
  677. // The ADC Control and Status Register B
  678. ADTS0 = $00; // ADC Auto Trigger Source
  679. ADTS1 = $01; // ADC Auto Trigger Source
  680. ADTS2 = $02; // ADC Auto Trigger Source
  681. MUX5 = $03;
  682. ACCH = $04;
  683. REFOK = $05;
  684. ACME = $06;
  685. AVDDOK = $07;
  686. // The ADC Multiplexer Selection Register
  687. MUX0 = $00; // Analog Channel and Gain Selection Bits
  688. MUX1 = $01; // Analog Channel and Gain Selection Bits
  689. MUX2 = $02; // Analog Channel and Gain Selection Bits
  690. MUX3 = $03; // Analog Channel and Gain Selection Bits
  691. MUX4 = $04; // Analog Channel and Gain Selection Bits
  692. ADLAR = $05;
  693. REFS0 = $06; // Reference Selection Bits
  694. REFS1 = $07; // Reference Selection Bits
  695. // Digital Input Disable Register 2
  696. ADC8D = $00;
  697. ADC9D = $01;
  698. ADC10D = $02;
  699. ADC11D = $03;
  700. ADC12D = $04;
  701. ADC13D = $05;
  702. ADC14D = $06;
  703. ADC15D = $07;
  704. // Digital Input Disable Register 0
  705. ADC0D = $00;
  706. ADC1D = $01;
  707. ADC2D = $02;
  708. ADC3D = $03;
  709. ADC4D = $04;
  710. ADC5D = $05;
  711. ADC6D = $06;
  712. ADC7D = $07;
  713. // Digital Input Disable Register 1
  714. AIN0D = $00;
  715. AIN1D = $01;
  716. // Timer/Counter1 Control Register A
  717. WGM10 = $00; // Waveform Generation Mode
  718. WGM11 = $01; // Waveform Generation Mode
  719. COM1C0 = $02; // Compare Output Mode for Channel C
  720. COM1C1 = $03; // Compare Output Mode for Channel C
  721. COM1B0 = $04; // Compare Output Mode for Channel B
  722. COM1B1 = $05; // Compare Output Mode for Channel B
  723. COM1A0 = $06; // Compare Output Mode for Channel A
  724. COM1A1 = $07; // Compare Output Mode for Channel A
  725. // Timer/Counter1 Control Register B
  726. CS10 = $00; // Clock Select
  727. CS11 = $01; // Clock Select
  728. CS12 = $02; // Clock Select
  729. ICES1 = $06;
  730. ICNC1 = $07;
  731. // Timer/Counter1 Control Register C
  732. FOC1C = $05;
  733. FOC1B = $06;
  734. FOC1A = $07;
  735. // Timer/Counter3 Control Register A
  736. WGM30 = $00; // Waveform Generation Mode
  737. WGM31 = $01; // Waveform Generation Mode
  738. COM3C0 = $02; // Compare Output Mode for Channel C
  739. COM3C1 = $03; // Compare Output Mode for Channel C
  740. COM3B0 = $04; // Compare Output Mode for Channel B
  741. COM3B1 = $05; // Compare Output Mode for Channel B
  742. COM3A0 = $06; // Compare Output Mode for Channel A
  743. COM3A1 = $07; // Compare Output Mode for Channel A
  744. // Timer/Counter3 Control Register B
  745. CS30 = $00; // Clock Select
  746. CS31 = $01; // Clock Select
  747. CS32 = $02; // Clock Select
  748. ICES3 = $06;
  749. ICNC3 = $07;
  750. // Timer/Counter3 Control Register C
  751. FOC3C = $05;
  752. FOC3B = $06;
  753. FOC3A = $07;
  754. // Timer/Counter4 Control Register A
  755. WGM40 = $00; // Waveform Generation Mode
  756. WGM41 = $01; // Waveform Generation Mode
  757. COM4C0 = $02; // Compare Output Mode for Channel C
  758. COM4C1 = $03; // Compare Output Mode for Channel C
  759. COM4B0 = $04; // Compare Output Mode for Channel B
  760. COM4B1 = $05; // Compare Output Mode for Channel B
  761. COM4A0 = $06; // Compare Output Mode for Channel A
  762. COM4A1 = $07; // Compare Output Mode for Channel A
  763. // Timer/Counter4 Control Register B
  764. CS40 = $00; // Clock Select
  765. CS41 = $01; // Clock Select
  766. CS42 = $02; // Clock Select
  767. ICES4 = $06;
  768. ICNC4 = $07;
  769. // Timer/Counter4 Control Register C
  770. FOC4C = $05;
  771. FOC4B = $06;
  772. FOC4A = $07;
  773. // Timer/Counter2 Control Register A
  774. WGM20 = $00; // Waveform Generation Mode
  775. WGM21 = $01; // Waveform Generation Mode
  776. COM2B0 = $04; // Compare Match Output B Mode
  777. COM2B1 = $05; // Compare Match Output B Mode
  778. COM2A0 = $06; // Compare Match Output A Mode
  779. COM2A1 = $07; // Compare Match Output A Mode
  780. // Timer/Counter2 Control Register B
  781. CS20 = $00; // Clock Select
  782. CS21 = $01; // Clock Select
  783. CS22 = $02; // Clock Select
  784. WGM22 = $03;
  785. FOC2B = $06;
  786. FOC2A = $07;
  787. // Asynchronous Status Register
  788. TCR2BUB = $00;
  789. TCR2AUB = $01;
  790. OCR2BUB = $02;
  791. OCR2AUB = $03;
  792. TCN2UB = $04;
  793. AS2 = $05;
  794. EXCLK = $06;
  795. EXCLKAMR = $07;
  796. // TWI Status Register
  797. TWPS0 = $00; // TWI Prescaler Bits
  798. TWPS1 = $01; // TWI Prescaler Bits
  799. TWS3 = $03; // TWI Status
  800. TWS4 = $04; // TWI Status
  801. TWS5 = $05; // TWI Status
  802. TWS6 = $06; // TWI Status
  803. TWS7 = $07; // TWI Status
  804. // TWI (Slave) Address Register
  805. TWGCE = $00;
  806. TWA0 = $01; // TWI (Slave) Address
  807. TWA1 = $02; // TWI (Slave) Address
  808. TWA2 = $03; // TWI (Slave) Address
  809. TWA3 = $04; // TWI (Slave) Address
  810. TWA4 = $05; // TWI (Slave) Address
  811. TWA5 = $06; // TWI (Slave) Address
  812. TWA6 = $07; // TWI (Slave) Address
  813. // TWI Control Register
  814. TWIE = $00;
  815. TWEN = $02;
  816. TWWC = $03;
  817. TWSTO = $04;
  818. TWSTA = $05;
  819. TWEA = $06;
  820. TWINT = $07;
  821. // TWI (Slave) Address Mask Register
  822. Res = $00;
  823. TWAM0 = $01; // TWI Address Mask
  824. TWAM1 = $02; // TWI Address Mask
  825. TWAM2 = $03; // TWI Address Mask
  826. TWAM3 = $04; // TWI Address Mask
  827. TWAM4 = $05; // TWI Address Mask
  828. TWAM5 = $06; // TWI Address Mask
  829. TWAM6 = $07; // TWI Address Mask
  830. // Transceiver Interrupt Enable Register 1
  831. TX_START_EN = $00;
  832. MAF_0_AMI_EN = $01;
  833. MAF_1_AMI_EN = $02;
  834. MAF_2_AMI_EN = $03;
  835. MAF_3_AMI_EN = $04;
  836. // Transceiver Interrupt Status Register 1
  837. TX_START = $00;
  838. MAF_0_AMI = $01;
  839. MAF_1_AMI = $02;
  840. MAF_2_AMI = $03;
  841. MAF_3_AMI = $04;
  842. // USART0 MSPIM Control and Status Register A
  843. MPCM0 = $00;
  844. U2X0 = $01;
  845. UPE0 = $02;
  846. DOR0 = $03;
  847. FE0 = $04;
  848. UDRE0 = $05;
  849. TXC0 = $06;
  850. RXC0 = $07;
  851. // USART0 MSPIM Control and Status Register B
  852. TXB80 = $00;
  853. RXB80 = $01;
  854. UCSZ02 = $02;
  855. TXEN0 = $03;
  856. RXEN0 = $04;
  857. UDRIE0 = $05;
  858. TXCIE0 = $06;
  859. RXCIE0 = $07;
  860. // USART0 MSPIM Control and Status Register C
  861. UCPOL0 = $00;
  862. UCPHA0 = $01;
  863. UDORD0 = $02;
  864. UCSZ00 = $01; // Character Size
  865. UCSZ01 = $02; // Character Size
  866. USBS0 = $03;
  867. UPM00 = $04; // Parity Mode
  868. UPM01 = $05; // Parity Mode
  869. UMSEL00 = $06; // USART Mode Select
  870. UMSEL01 = $07; // USART Mode Select
  871. // USART1 MSPIM Control and Status Register A
  872. MPCM1 = $00;
  873. U2X1 = $01;
  874. UPE1 = $02;
  875. DOR1 = $03;
  876. FE1 = $04;
  877. UDRE1 = $05;
  878. TXC1 = $06;
  879. RXC1 = $07;
  880. // USART1 MSPIM Control and Status Register B
  881. TXB81 = $00;
  882. RXB81 = $01;
  883. UCSZ12 = $02;
  884. TXEN1 = $03;
  885. RXEN1 = $04;
  886. UDRIE1 = $05;
  887. TXCIE1 = $06;
  888. RXCIE1 = $07;
  889. // USART1 MSPIM Control and Status Register C
  890. UCPOL1 = $00;
  891. UCPHA1 = $01;
  892. UDORD1 = $02;
  893. UCSZ10 = $01; // Character Size
  894. UCSZ11 = $02; // Character Size
  895. USBS1 = $03;
  896. UPM10 = $04; // Parity Mode
  897. UPM11 = $05; // Parity Mode
  898. UMSEL10 = $06; // USART Mode Select
  899. UMSEL11 = $07; // USART Mode Select
  900. // Symbol Counter Received Frame Timestamp Register LL-Byte
  901. SCRSTRLL0 = $00; // Symbol Counter Received Frame Timestamp Register LL-Byte
  902. SCRSTRLL1 = $01; // Symbol Counter Received Frame Timestamp Register LL-Byte
  903. SCRSTRLL2 = $02; // Symbol Counter Received Frame Timestamp Register LL-Byte
  904. SCRSTRLL3 = $03; // Symbol Counter Received Frame Timestamp Register LL-Byte
  905. SCRSTRLL4 = $04; // Symbol Counter Received Frame Timestamp Register LL-Byte
  906. SCRSTRLL5 = $05; // Symbol Counter Received Frame Timestamp Register LL-Byte
  907. SCRSTRLL6 = $06; // Symbol Counter Received Frame Timestamp Register LL-Byte
  908. SCRSTRLL7 = $07; // Symbol Counter Received Frame Timestamp Register LL-Byte
  909. // Symbol Counter Received Frame Timestamp Register LH-Byte
  910. SCRSTRLH0 = $00; // Symbol Counter Received Frame Timestamp Register LH-Byte
  911. SCRSTRLH1 = $01; // Symbol Counter Received Frame Timestamp Register LH-Byte
  912. SCRSTRLH2 = $02; // Symbol Counter Received Frame Timestamp Register LH-Byte
  913. SCRSTRLH3 = $03; // Symbol Counter Received Frame Timestamp Register LH-Byte
  914. SCRSTRLH4 = $04; // Symbol Counter Received Frame Timestamp Register LH-Byte
  915. SCRSTRLH5 = $05; // Symbol Counter Received Frame Timestamp Register LH-Byte
  916. SCRSTRLH6 = $06; // Symbol Counter Received Frame Timestamp Register LH-Byte
  917. SCRSTRLH7 = $07; // Symbol Counter Received Frame Timestamp Register LH-Byte
  918. // Symbol Counter Received Frame Timestamp Register HL-Byte
  919. SCRSTRHL0 = $00; // Symbol Counter Received Frame Timestamp Register HL-Byte
  920. SCRSTRHL1 = $01; // Symbol Counter Received Frame Timestamp Register HL-Byte
  921. SCRSTRHL2 = $02; // Symbol Counter Received Frame Timestamp Register HL-Byte
  922. SCRSTRHL3 = $03; // Symbol Counter Received Frame Timestamp Register HL-Byte
  923. SCRSTRHL4 = $04; // Symbol Counter Received Frame Timestamp Register HL-Byte
  924. SCRSTRHL5 = $05; // Symbol Counter Received Frame Timestamp Register HL-Byte
  925. SCRSTRHL6 = $06; // Symbol Counter Received Frame Timestamp Register HL-Byte
  926. SCRSTRHL7 = $07; // Symbol Counter Received Frame Timestamp Register HL-Byte
  927. // Symbol Counter Received Frame Timestamp Register HH-Byte
  928. SCRSTRHH0 = $00; // Symbol Counter Received Frame Timestamp Register HH-Byte
  929. SCRSTRHH1 = $01; // Symbol Counter Received Frame Timestamp Register HH-Byte
  930. SCRSTRHH2 = $02; // Symbol Counter Received Frame Timestamp Register HH-Byte
  931. SCRSTRHH3 = $03; // Symbol Counter Received Frame Timestamp Register HH-Byte
  932. SCRSTRHH4 = $04; // Symbol Counter Received Frame Timestamp Register HH-Byte
  933. SCRSTRHH5 = $05; // Symbol Counter Received Frame Timestamp Register HH-Byte
  934. SCRSTRHH6 = $06; // Symbol Counter Received Frame Timestamp Register HH-Byte
  935. SCRSTRHH7 = $07; // Symbol Counter Received Frame Timestamp Register HH-Byte
  936. // Symbol Counter Compare Source Register
  937. SCCS10 = $00; // Symbol Counter Compare Source select register for Compare Units
  938. SCCS11 = $01; // Symbol Counter Compare Source select register for Compare Units
  939. SCCS20 = $02; // Symbol Counter Compare Source select register for Compare Unit 2
  940. SCCS21 = $03; // Symbol Counter Compare Source select register for Compare Unit 2
  941. SCCS30 = $04; // Symbol Counter Compare Source select register for Compare Unit 3
  942. SCCS31 = $05; // Symbol Counter Compare Source select register for Compare Unit 3
  943. // Symbol Counter Control Register 0
  944. SCCMP1 = $00; // Symbol Counter Compare Unit 3 Mode select
  945. SCCMP2 = $01; // Symbol Counter Compare Unit 3 Mode select
  946. SCCMP3 = $02; // Symbol Counter Compare Unit 3 Mode select
  947. SCTSE = $03;
  948. SCCKSEL = $04;
  949. SCEN = $05;
  950. SCMBTS = $06;
  951. SCRES = $07;
  952. // Symbol Counter Control Register 1
  953. SCENBO = $00;
  954. SCEECLK = $01;
  955. SCCKDIV0 = $02; // Clock divider for synchronous clock source (16MHz Transceiver Clock)
  956. SCCKDIV1 = $03; // Clock divider for synchronous clock source (16MHz Transceiver Clock)
  957. SCCKDIV2 = $04; // Clock divider for synchronous clock source (16MHz Transceiver Clock)
  958. SCBTSM = $05;
  959. // Symbol Counter Status Register
  960. SCBSY = $00;
  961. // Symbol Counter Interrupt Mask Register
  962. IRQMCP1 = $00; // Symbol Counter Compare Match 3 IRQ enable
  963. IRQMCP2 = $01; // Symbol Counter Compare Match 3 IRQ enable
  964. IRQMCP3 = $02; // Symbol Counter Compare Match 3 IRQ enable
  965. IRQMOF = $03;
  966. IRQMBO = $04;
  967. // Symbol Counter Interrupt Status Register
  968. IRQSCP1 = $00; // Compare Unit 3 Compare Match IRQ
  969. IRQSCP2 = $01; // Compare Unit 3 Compare Match IRQ
  970. IRQSCP3 = $02; // Compare Unit 3 Compare Match IRQ
  971. IRQSOF = $03;
  972. IRQSBO = $04;
  973. // Symbol Counter Register LL-Byte
  974. SCCNTLL0 = $00; // Symbol Counter Register LL-Byte
  975. SCCNTLL1 = $01; // Symbol Counter Register LL-Byte
  976. SCCNTLL2 = $02; // Symbol Counter Register LL-Byte
  977. SCCNTLL3 = $03; // Symbol Counter Register LL-Byte
  978. SCCNTLL4 = $04; // Symbol Counter Register LL-Byte
  979. SCCNTLL5 = $05; // Symbol Counter Register LL-Byte
  980. SCCNTLL6 = $06; // Symbol Counter Register LL-Byte
  981. SCCNTLL7 = $07; // Symbol Counter Register LL-Byte
  982. // Symbol Counter Register LH-Byte
  983. SCCNTLH0 = $00; // Symbol Counter Register LH-Byte
  984. SCCNTLH1 = $01; // Symbol Counter Register LH-Byte
  985. SCCNTLH2 = $02; // Symbol Counter Register LH-Byte
  986. SCCNTLH3 = $03; // Symbol Counter Register LH-Byte
  987. SCCNTLH4 = $04; // Symbol Counter Register LH-Byte
  988. SCCNTLH5 = $05; // Symbol Counter Register LH-Byte
  989. SCCNTLH6 = $06; // Symbol Counter Register LH-Byte
  990. SCCNTLH7 = $07; // Symbol Counter Register LH-Byte
  991. // Symbol Counter Register HL-Byte
  992. SCCNTHL0 = $00; // Symbol Counter Register HL-Byte
  993. SCCNTHL1 = $01; // Symbol Counter Register HL-Byte
  994. SCCNTHL2 = $02; // Symbol Counter Register HL-Byte
  995. SCCNTHL3 = $03; // Symbol Counter Register HL-Byte
  996. SCCNTHL4 = $04; // Symbol Counter Register HL-Byte
  997. SCCNTHL5 = $05; // Symbol Counter Register HL-Byte
  998. SCCNTHL6 = $06; // Symbol Counter Register HL-Byte
  999. SCCNTHL7 = $07; // Symbol Counter Register HL-Byte
  1000. // Symbol Counter Register HH-Byte
  1001. SCCNTHH0 = $00; // Symbol Counter Register HH-Byte
  1002. SCCNTHH1 = $01; // Symbol Counter Register HH-Byte
  1003. SCCNTHH2 = $02; // Symbol Counter Register HH-Byte
  1004. SCCNTHH3 = $03; // Symbol Counter Register HH-Byte
  1005. SCCNTHH4 = $04; // Symbol Counter Register HH-Byte
  1006. SCCNTHH5 = $05; // Symbol Counter Register HH-Byte
  1007. SCCNTHH6 = $06; // Symbol Counter Register HH-Byte
  1008. SCCNTHH7 = $07; // Symbol Counter Register HH-Byte
  1009. // Symbol Counter Beacon Timestamp Register LL-Byte
  1010. SCBTSRLL0 = $00; // Symbol Counter Beacon Timestamp Register LL-Byte
  1011. SCBTSRLL1 = $01; // Symbol Counter Beacon Timestamp Register LL-Byte
  1012. SCBTSRLL2 = $02; // Symbol Counter Beacon Timestamp Register LL-Byte
  1013. SCBTSRLL3 = $03; // Symbol Counter Beacon Timestamp Register LL-Byte
  1014. SCBTSRLL4 = $04; // Symbol Counter Beacon Timestamp Register LL-Byte
  1015. SCBTSRLL5 = $05; // Symbol Counter Beacon Timestamp Register LL-Byte
  1016. SCBTSRLL6 = $06; // Symbol Counter Beacon Timestamp Register LL-Byte
  1017. SCBTSRLL7 = $07; // Symbol Counter Beacon Timestamp Register LL-Byte
  1018. // Symbol Counter Beacon Timestamp Register LH-Byte
  1019. SCBTSRLH0 = $00; // Symbol Counter Beacon Timestamp Register LH-Byte
  1020. SCBTSRLH1 = $01; // Symbol Counter Beacon Timestamp Register LH-Byte
  1021. SCBTSRLH2 = $02; // Symbol Counter Beacon Timestamp Register LH-Byte
  1022. SCBTSRLH3 = $03; // Symbol Counter Beacon Timestamp Register LH-Byte
  1023. SCBTSRLH4 = $04; // Symbol Counter Beacon Timestamp Register LH-Byte
  1024. SCBTSRLH5 = $05; // Symbol Counter Beacon Timestamp Register LH-Byte
  1025. SCBTSRLH6 = $06; // Symbol Counter Beacon Timestamp Register LH-Byte
  1026. SCBTSRLH7 = $07; // Symbol Counter Beacon Timestamp Register LH-Byte
  1027. // Symbol Counter Beacon Timestamp Register HL-Byte
  1028. SCBTSRHL0 = $00; // Symbol Counter Beacon Timestamp Register HL-Byte
  1029. SCBTSRHL1 = $01; // Symbol Counter Beacon Timestamp Register HL-Byte
  1030. SCBTSRHL2 = $02; // Symbol Counter Beacon Timestamp Register HL-Byte
  1031. SCBTSRHL3 = $03; // Symbol Counter Beacon Timestamp Register HL-Byte
  1032. SCBTSRHL4 = $04; // Symbol Counter Beacon Timestamp Register HL-Byte
  1033. SCBTSRHL5 = $05; // Symbol Counter Beacon Timestamp Register HL-Byte
  1034. SCBTSRHL6 = $06; // Symbol Counter Beacon Timestamp Register HL-Byte
  1035. SCBTSRHL7 = $07; // Symbol Counter Beacon Timestamp Register HL-Byte
  1036. // Symbol Counter Beacon Timestamp Register HH-Byte
  1037. SCBTSRHH0 = $00; // Symbol Counter Beacon Timestamp Register HH-Byte
  1038. SCBTSRHH1 = $01; // Symbol Counter Beacon Timestamp Register HH-Byte
  1039. SCBTSRHH2 = $02; // Symbol Counter Beacon Timestamp Register HH-Byte
  1040. SCBTSRHH3 = $03; // Symbol Counter Beacon Timestamp Register HH-Byte
  1041. SCBTSRHH4 = $04; // Symbol Counter Beacon Timestamp Register HH-Byte
  1042. SCBTSRHH5 = $05; // Symbol Counter Beacon Timestamp Register HH-Byte
  1043. SCBTSRHH6 = $06; // Symbol Counter Beacon Timestamp Register HH-Byte
  1044. SCBTSRHH7 = $07; // Symbol Counter Beacon Timestamp Register HH-Byte
  1045. // Symbol Counter Frame Timestamp Register LL-Byte
  1046. SCTSRLL0 = $00; // Symbol Counter Frame Timestamp Register LL-Byte
  1047. SCTSRLL1 = $01; // Symbol Counter Frame Timestamp Register LL-Byte
  1048. SCTSRLL2 = $02; // Symbol Counter Frame Timestamp Register LL-Byte
  1049. SCTSRLL3 = $03; // Symbol Counter Frame Timestamp Register LL-Byte
  1050. SCTSRLL4 = $04; // Symbol Counter Frame Timestamp Register LL-Byte
  1051. SCTSRLL5 = $05; // Symbol Counter Frame Timestamp Register LL-Byte
  1052. SCTSRLL6 = $06; // Symbol Counter Frame Timestamp Register LL-Byte
  1053. SCTSRLL7 = $07; // Symbol Counter Frame Timestamp Register LL-Byte
  1054. // Symbol Counter Frame Timestamp Register LH-Byte
  1055. SCTSRLH0 = $00; // Symbol Counter Frame Timestamp Register LH-Byte
  1056. SCTSRLH1 = $01; // Symbol Counter Frame Timestamp Register LH-Byte
  1057. SCTSRLH2 = $02; // Symbol Counter Frame Timestamp Register LH-Byte
  1058. SCTSRLH3 = $03; // Symbol Counter Frame Timestamp Register LH-Byte
  1059. SCTSRLH4 = $04; // Symbol Counter Frame Timestamp Register LH-Byte
  1060. SCTSRLH5 = $05; // Symbol Counter Frame Timestamp Register LH-Byte
  1061. SCTSRLH6 = $06; // Symbol Counter Frame Timestamp Register LH-Byte
  1062. SCTSRLH7 = $07; // Symbol Counter Frame Timestamp Register LH-Byte
  1063. // Symbol Counter Frame Timestamp Register HL-Byte
  1064. SCTSRHL0 = $00; // Symbol Counter Frame Timestamp Register HL-Byte
  1065. SCTSRHL1 = $01; // Symbol Counter Frame Timestamp Register HL-Byte
  1066. SCTSRHL2 = $02; // Symbol Counter Frame Timestamp Register HL-Byte
  1067. SCTSRHL3 = $03; // Symbol Counter Frame Timestamp Register HL-Byte
  1068. SCTSRHL4 = $04; // Symbol Counter Frame Timestamp Register HL-Byte
  1069. SCTSRHL5 = $05; // Symbol Counter Frame Timestamp Register HL-Byte
  1070. SCTSRHL6 = $06; // Symbol Counter Frame Timestamp Register HL-Byte
  1071. SCTSRHL7 = $07; // Symbol Counter Frame Timestamp Register HL-Byte
  1072. // Symbol Counter Frame Timestamp Register HH-Byte
  1073. SCTSRHH0 = $00; // Symbol Counter Frame Timestamp Register HH-Byte
  1074. SCTSRHH1 = $01; // Symbol Counter Frame Timestamp Register HH-Byte
  1075. SCTSRHH2 = $02; // Symbol Counter Frame Timestamp Register HH-Byte
  1076. SCTSRHH3 = $03; // Symbol Counter Frame Timestamp Register HH-Byte
  1077. SCTSRHH4 = $04; // Symbol Counter Frame Timestamp Register HH-Byte
  1078. SCTSRHH5 = $05; // Symbol Counter Frame Timestamp Register HH-Byte
  1079. SCTSRHH6 = $06; // Symbol Counter Frame Timestamp Register HH-Byte
  1080. SCTSRHH7 = $07; // Symbol Counter Frame Timestamp Register HH-Byte
  1081. // Symbol Counter Output Compare Register 3 LL-Byte
  1082. SCOCR3LL0 = $00; // Symbol Counter Output Compare Register 3 LL-Byte
  1083. SCOCR3LL1 = $01; // Symbol Counter Output Compare Register 3 LL-Byte
  1084. SCOCR3LL2 = $02; // Symbol Counter Output Compare Register 3 LL-Byte
  1085. SCOCR3LL3 = $03; // Symbol Counter Output Compare Register 3 LL-Byte
  1086. SCOCR3LL4 = $04; // Symbol Counter Output Compare Register 3 LL-Byte
  1087. SCOCR3LL5 = $05; // Symbol Counter Output Compare Register 3 LL-Byte
  1088. SCOCR3LL6 = $06; // Symbol Counter Output Compare Register 3 LL-Byte
  1089. SCOCR3LL7 = $07; // Symbol Counter Output Compare Register 3 LL-Byte
  1090. // Symbol Counter Output Compare Register 3 LH-Byte
  1091. SCOCR3LH0 = $00; // Symbol Counter Output Compare Register 3 LH-Byte
  1092. SCOCR3LH1 = $01; // Symbol Counter Output Compare Register 3 LH-Byte
  1093. SCOCR3LH2 = $02; // Symbol Counter Output Compare Register 3 LH-Byte
  1094. SCOCR3LH3 = $03; // Symbol Counter Output Compare Register 3 LH-Byte
  1095. SCOCR3LH4 = $04; // Symbol Counter Output Compare Register 3 LH-Byte
  1096. SCOCR3LH5 = $05; // Symbol Counter Output Compare Register 3 LH-Byte
  1097. SCOCR3LH6 = $06; // Symbol Counter Output Compare Register 3 LH-Byte
  1098. SCOCR3LH7 = $07; // Symbol Counter Output Compare Register 3 LH-Byte
  1099. // Symbol Counter Output Compare Register 3 HL-Byte
  1100. SCOCR3HL0 = $00; // Symbol Counter Output Compare Register 3 HL-Byte
  1101. SCOCR3HL1 = $01; // Symbol Counter Output Compare Register 3 HL-Byte
  1102. SCOCR3HL2 = $02; // Symbol Counter Output Compare Register 3 HL-Byte
  1103. SCOCR3HL3 = $03; // Symbol Counter Output Compare Register 3 HL-Byte
  1104. SCOCR3HL4 = $04; // Symbol Counter Output Compare Register 3 HL-Byte
  1105. SCOCR3HL5 = $05; // Symbol Counter Output Compare Register 3 HL-Byte
  1106. SCOCR3HL6 = $06; // Symbol Counter Output Compare Register 3 HL-Byte
  1107. SCOCR3HL7 = $07; // Symbol Counter Output Compare Register 3 HL-Byte
  1108. // Symbol Counter Output Compare Register 3 HH-Byte
  1109. SCOCR3HH0 = $00; // Symbol Counter Output Compare Register 3 HH-Byte
  1110. SCOCR3HH1 = $01; // Symbol Counter Output Compare Register 3 HH-Byte
  1111. SCOCR3HH2 = $02; // Symbol Counter Output Compare Register 3 HH-Byte
  1112. SCOCR3HH3 = $03; // Symbol Counter Output Compare Register 3 HH-Byte
  1113. SCOCR3HH4 = $04; // Symbol Counter Output Compare Register 3 HH-Byte
  1114. SCOCR3HH5 = $05; // Symbol Counter Output Compare Register 3 HH-Byte
  1115. SCOCR3HH6 = $06; // Symbol Counter Output Compare Register 3 HH-Byte
  1116. SCOCR3HH7 = $07; // Symbol Counter Output Compare Register 3 HH-Byte
  1117. // Symbol Counter Output Compare Register 2 LL-Byte
  1118. SCOCR2LL0 = $00; // Symbol Counter Output Compare Register 2 LL-Byte
  1119. SCOCR2LL1 = $01; // Symbol Counter Output Compare Register 2 LL-Byte
  1120. SCOCR2LL2 = $02; // Symbol Counter Output Compare Register 2 LL-Byte
  1121. SCOCR2LL3 = $03; // Symbol Counter Output Compare Register 2 LL-Byte
  1122. SCOCR2LL4 = $04; // Symbol Counter Output Compare Register 2 LL-Byte
  1123. SCOCR2LL5 = $05; // Symbol Counter Output Compare Register 2 LL-Byte
  1124. SCOCR2LL6 = $06; // Symbol Counter Output Compare Register 2 LL-Byte
  1125. SCOCR2LL7 = $07; // Symbol Counter Output Compare Register 2 LL-Byte
  1126. // Symbol Counter Output Compare Register 2 LH-Byte
  1127. SCOCR2LH0 = $00; // Symbol Counter Output Compare Register 2 LH-Byte
  1128. SCOCR2LH1 = $01; // Symbol Counter Output Compare Register 2 LH-Byte
  1129. SCOCR2LH2 = $02; // Symbol Counter Output Compare Register 2 LH-Byte
  1130. SCOCR2LH3 = $03; // Symbol Counter Output Compare Register 2 LH-Byte
  1131. SCOCR2LH4 = $04; // Symbol Counter Output Compare Register 2 LH-Byte
  1132. SCOCR2LH5 = $05; // Symbol Counter Output Compare Register 2 LH-Byte
  1133. SCOCR2LH6 = $06; // Symbol Counter Output Compare Register 2 LH-Byte
  1134. SCOCR2LH7 = $07; // Symbol Counter Output Compare Register 2 LH-Byte
  1135. // Symbol Counter Output Compare Register 2 HL-Byte
  1136. SCOCR2HL0 = $00; // Symbol Counter Output Compare Register 2 HL-Byte
  1137. SCOCR2HL1 = $01; // Symbol Counter Output Compare Register 2 HL-Byte
  1138. SCOCR2HL2 = $02; // Symbol Counter Output Compare Register 2 HL-Byte
  1139. SCOCR2HL3 = $03; // Symbol Counter Output Compare Register 2 HL-Byte
  1140. SCOCR2HL4 = $04; // Symbol Counter Output Compare Register 2 HL-Byte
  1141. SCOCR2HL5 = $05; // Symbol Counter Output Compare Register 2 HL-Byte
  1142. SCOCR2HL6 = $06; // Symbol Counter Output Compare Register 2 HL-Byte
  1143. SCOCR2HL7 = $07; // Symbol Counter Output Compare Register 2 HL-Byte
  1144. // Symbol Counter Output Compare Register 2 HH-Byte
  1145. SCOCR2HH0 = $00; // Symbol Counter Output Compare Register 2 HH-Byte
  1146. SCOCR2HH1 = $01; // Symbol Counter Output Compare Register 2 HH-Byte
  1147. SCOCR2HH2 = $02; // Symbol Counter Output Compare Register 2 HH-Byte
  1148. SCOCR2HH3 = $03; // Symbol Counter Output Compare Register 2 HH-Byte
  1149. SCOCR2HH4 = $04; // Symbol Counter Output Compare Register 2 HH-Byte
  1150. SCOCR2HH5 = $05; // Symbol Counter Output Compare Register 2 HH-Byte
  1151. SCOCR2HH6 = $06; // Symbol Counter Output Compare Register 2 HH-Byte
  1152. SCOCR2HH7 = $07; // Symbol Counter Output Compare Register 2 HH-Byte
  1153. // Symbol Counter Output Compare Register 1 LL-Byte
  1154. SCOCR1LL0 = $00; // Symbol Counter Output Compare Register 1 LL-Byte
  1155. SCOCR1LL1 = $01; // Symbol Counter Output Compare Register 1 LL-Byte
  1156. SCOCR1LL2 = $02; // Symbol Counter Output Compare Register 1 LL-Byte
  1157. SCOCR1LL3 = $03; // Symbol Counter Output Compare Register 1 LL-Byte
  1158. SCOCR1LL4 = $04; // Symbol Counter Output Compare Register 1 LL-Byte
  1159. SCOCR1LL5 = $05; // Symbol Counter Output Compare Register 1 LL-Byte
  1160. SCOCR1LL6 = $06; // Symbol Counter Output Compare Register 1 LL-Byte
  1161. SCOCR1LL7 = $07; // Symbol Counter Output Compare Register 1 LL-Byte
  1162. // Symbol Counter Output Compare Register 1 LH-Byte
  1163. SCOCR1LH0 = $00; // Symbol Counter Output Compare Register 1 LH-Byte
  1164. SCOCR1LH1 = $01; // Symbol Counter Output Compare Register 1 LH-Byte
  1165. SCOCR1LH2 = $02; // Symbol Counter Output Compare Register 1 LH-Byte
  1166. SCOCR1LH3 = $03; // Symbol Counter Output Compare Register 1 LH-Byte
  1167. SCOCR1LH4 = $04; // Symbol Counter Output Compare Register 1 LH-Byte
  1168. SCOCR1LH5 = $05; // Symbol Counter Output Compare Register 1 LH-Byte
  1169. SCOCR1LH6 = $06; // Symbol Counter Output Compare Register 1 LH-Byte
  1170. SCOCR1LH7 = $07; // Symbol Counter Output Compare Register 1 LH-Byte
  1171. // Symbol Counter Output Compare Register 1 HL-Byte
  1172. SCOCR1HL0 = $00; // Symbol Counter Output Compare Register 1 HL-Byte
  1173. SCOCR1HL1 = $01; // Symbol Counter Output Compare Register 1 HL-Byte
  1174. SCOCR1HL2 = $02; // Symbol Counter Output Compare Register 1 HL-Byte
  1175. SCOCR1HL3 = $03; // Symbol Counter Output Compare Register 1 HL-Byte
  1176. SCOCR1HL4 = $04; // Symbol Counter Output Compare Register 1 HL-Byte
  1177. SCOCR1HL5 = $05; // Symbol Counter Output Compare Register 1 HL-Byte
  1178. SCOCR1HL6 = $06; // Symbol Counter Output Compare Register 1 HL-Byte
  1179. SCOCR1HL7 = $07; // Symbol Counter Output Compare Register 1 HL-Byte
  1180. // Symbol Counter Output Compare Register 1 HH-Byte
  1181. SCOCR1HH0 = $00; // Symbol Counter Output Compare Register 1 HH-Byte
  1182. SCOCR1HH1 = $01; // Symbol Counter Output Compare Register 1 HH-Byte
  1183. SCOCR1HH2 = $02; // Symbol Counter Output Compare Register 1 HH-Byte
  1184. SCOCR1HH3 = $03; // Symbol Counter Output Compare Register 1 HH-Byte
  1185. SCOCR1HH4 = $04; // Symbol Counter Output Compare Register 1 HH-Byte
  1186. SCOCR1HH5 = $05; // Symbol Counter Output Compare Register 1 HH-Byte
  1187. SCOCR1HH6 = $06; // Symbol Counter Output Compare Register 1 HH-Byte
  1188. SCOCR1HH7 = $07; // Symbol Counter Output Compare Register 1 HH-Byte
  1189. // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1190. SCTSTRLL0 = $00; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1191. SCTSTRLL1 = $01; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1192. SCTSTRLL2 = $02; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1193. SCTSTRLL3 = $03; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1194. SCTSTRLL4 = $04; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1195. SCTSTRLL5 = $05; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1196. SCTSTRLL6 = $06; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1197. SCTSTRLL7 = $07; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1198. // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1199. SCTSTRLH0 = $00; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1200. SCTSTRLH1 = $01; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1201. SCTSTRLH2 = $02; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1202. SCTSTRLH3 = $03; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1203. SCTSTRLH4 = $04; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1204. SCTSTRLH5 = $05; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1205. SCTSTRLH6 = $06; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1206. SCTSTRLH7 = $07; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1207. // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1208. SCTSTRHL0 = $00; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1209. SCTSTRHL1 = $01; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1210. SCTSTRHL2 = $02; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1211. SCTSTRHL3 = $03; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1212. SCTSTRHL4 = $04; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1213. SCTSTRHL5 = $05; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1214. SCTSTRHL6 = $06; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1215. SCTSTRHL7 = $07; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1216. // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1217. SCTSTRHH0 = $00; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1218. SCTSTRHH1 = $01; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1219. SCTSTRHH2 = $02; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1220. SCTSTRHH3 = $03; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1221. SCTSTRHH4 = $04; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1222. SCTSTRHH5 = $05; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1223. SCTSTRHH6 = $06; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1224. SCTSTRHH7 = $07; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1225. // Multiple Address Filter Configuration Register 0
  1226. MAF0EN = $00;
  1227. MAF1EN = $01;
  1228. MAF2EN = $02;
  1229. MAF3EN = $03;
  1230. // Multiple Address Filter Configuration Register 1
  1231. AACK_0_I_AM_COORD = $00;
  1232. AACK_0_SET_PD = $01;
  1233. AACK_1_I_AM_COORD = $02;
  1234. AACK_1_SET_PD = $03;
  1235. AACK_2_I_AM_COORD = $04;
  1236. AACK_2_SET_PD = $05;
  1237. AACK_3_I_AM_COORD = $06;
  1238. AACK_3_SET_PD = $07;
  1239. // Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)
  1240. MAFSA0L0 = $00; // MAC Short Address low Byte for Frame Filter 0
  1241. MAFSA0L1 = $01; // MAC Short Address low Byte for Frame Filter 0
  1242. MAFSA0L2 = $02; // MAC Short Address low Byte for Frame Filter 0
  1243. MAFSA0L3 = $03; // MAC Short Address low Byte for Frame Filter 0
  1244. MAFSA0L4 = $04; // MAC Short Address low Byte for Frame Filter 0
  1245. MAFSA0L5 = $05; // MAC Short Address low Byte for Frame Filter 0
  1246. MAFSA0L6 = $06; // MAC Short Address low Byte for Frame Filter 0
  1247. MAFSA0L7 = $07; // MAC Short Address low Byte for Frame Filter 0
  1248. // Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)
  1249. MAFSA0H0 = $00; // MAC Short Address high Byte for Frame Filter 0
  1250. MAFSA0H1 = $01; // MAC Short Address high Byte for Frame Filter 0
  1251. MAFSA0H2 = $02; // MAC Short Address high Byte for Frame Filter 0
  1252. MAFSA0H3 = $03; // MAC Short Address high Byte for Frame Filter 0
  1253. MAFSA0H4 = $04; // MAC Short Address high Byte for Frame Filter 0
  1254. MAFSA0H5 = $05; // MAC Short Address high Byte for Frame Filter 0
  1255. MAFSA0H6 = $06; // MAC Short Address high Byte for Frame Filter 0
  1256. MAFSA0H7 = $07; // MAC Short Address high Byte for Frame Filter 0
  1257. // Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)
  1258. MAFPA0L0 = $00; // MAC Personal Area Network ID low Byte for Frame Filter 0
  1259. MAFPA0L1 = $01; // MAC Personal Area Network ID low Byte for Frame Filter 0
  1260. MAFPA0L2 = $02; // MAC Personal Area Network ID low Byte for Frame Filter 0
  1261. MAFPA0L3 = $03; // MAC Personal Area Network ID low Byte for Frame Filter 0
  1262. MAFPA0L4 = $04; // MAC Personal Area Network ID low Byte for Frame Filter 0
  1263. MAFPA0L5 = $05; // MAC Personal Area Network ID low Byte for Frame Filter 0
  1264. MAFPA0L6 = $06; // MAC Personal Area Network ID low Byte for Frame Filter 0
  1265. MAFPA0L7 = $07; // MAC Personal Area Network ID low Byte for Frame Filter 0
  1266. // Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)
  1267. MAFPA0H0 = $00; // MAC Personal Area Network ID high Byte for Frame Filter 0
  1268. MAFPA0H1 = $01; // MAC Personal Area Network ID high Byte for Frame Filter 0
  1269. MAFPA0H2 = $02; // MAC Personal Area Network ID high Byte for Frame Filter 0
  1270. MAFPA0H3 = $03; // MAC Personal Area Network ID high Byte for Frame Filter 0
  1271. MAFPA0H4 = $04; // MAC Personal Area Network ID high Byte for Frame Filter 0
  1272. MAFPA0H5 = $05; // MAC Personal Area Network ID high Byte for Frame Filter 0
  1273. MAFPA0H6 = $06; // MAC Personal Area Network ID high Byte for Frame Filter 0
  1274. MAFPA0H7 = $07; // MAC Personal Area Network ID high Byte for Frame Filter 0
  1275. // Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)
  1276. MAFSA1L0 = $00; // MAC Short Address low Byte for Frame Filter 1
  1277. MAFSA1L1 = $01; // MAC Short Address low Byte for Frame Filter 1
  1278. MAFSA1L2 = $02; // MAC Short Address low Byte for Frame Filter 1
  1279. MAFSA1L3 = $03; // MAC Short Address low Byte for Frame Filter 1
  1280. MAFSA1L4 = $04; // MAC Short Address low Byte for Frame Filter 1
  1281. MAFSA1L5 = $05; // MAC Short Address low Byte for Frame Filter 1
  1282. MAFSA1L6 = $06; // MAC Short Address low Byte for Frame Filter 1
  1283. MAFSA1L7 = $07; // MAC Short Address low Byte for Frame Filter 1
  1284. // Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)
  1285. MAFSA1H0 = $00; // MAC Short Address high Byte for Frame Filter 1
  1286. MAFSA1H1 = $01; // MAC Short Address high Byte for Frame Filter 1
  1287. MAFSA1H2 = $02; // MAC Short Address high Byte for Frame Filter 1
  1288. MAFSA1H3 = $03; // MAC Short Address high Byte for Frame Filter 1
  1289. MAFSA1H4 = $04; // MAC Short Address high Byte for Frame Filter 1
  1290. MAFSA1H5 = $05; // MAC Short Address high Byte for Frame Filter 1
  1291. MAFSA1H6 = $06; // MAC Short Address high Byte for Frame Filter 1
  1292. MAFSA1H7 = $07; // MAC Short Address high Byte for Frame Filter 1
  1293. // Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)
  1294. MAFPA1L0 = $00; // MAC Personal Area Network ID low Byte for Frame Filter 1
  1295. MAFPA1L1 = $01; // MAC Personal Area Network ID low Byte for Frame Filter 1
  1296. MAFPA1L2 = $02; // MAC Personal Area Network ID low Byte for Frame Filter 1
  1297. MAFPA1L3 = $03; // MAC Personal Area Network ID low Byte for Frame Filter 1
  1298. MAFPA1L4 = $04; // MAC Personal Area Network ID low Byte for Frame Filter 1
  1299. MAFPA1L5 = $05; // MAC Personal Area Network ID low Byte for Frame Filter 1
  1300. MAFPA1L6 = $06; // MAC Personal Area Network ID low Byte for Frame Filter 1
  1301. MAFPA1L7 = $07; // MAC Personal Area Network ID low Byte for Frame Filter 1
  1302. // Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)
  1303. MAFPA1H0 = $00; // MAC Personal Area Network ID high Byte for Frame Filter 1
  1304. MAFPA1H1 = $01; // MAC Personal Area Network ID high Byte for Frame Filter 1
  1305. MAFPA1H2 = $02; // MAC Personal Area Network ID high Byte for Frame Filter 1
  1306. MAFPA1H3 = $03; // MAC Personal Area Network ID high Byte for Frame Filter 1
  1307. MAFPA1H4 = $04; // MAC Personal Area Network ID high Byte for Frame Filter 1
  1308. MAFPA1H5 = $05; // MAC Personal Area Network ID high Byte for Frame Filter 1
  1309. MAFPA1H6 = $06; // MAC Personal Area Network ID high Byte for Frame Filter 1
  1310. MAFPA1H7 = $07; // MAC Personal Area Network ID high Byte for Frame Filter 1
  1311. // Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)
  1312. MAFSA2L0 = $00; // MAC Short Address low Byte for Frame Filter 2
  1313. MAFSA2L1 = $01; // MAC Short Address low Byte for Frame Filter 2
  1314. MAFSA2L2 = $02; // MAC Short Address low Byte for Frame Filter 2
  1315. MAFSA2L3 = $03; // MAC Short Address low Byte for Frame Filter 2
  1316. MAFSA2L4 = $04; // MAC Short Address low Byte for Frame Filter 2
  1317. MAFSA2L5 = $05; // MAC Short Address low Byte for Frame Filter 2
  1318. MAFSA2L6 = $06; // MAC Short Address low Byte for Frame Filter 2
  1319. MAFSA2L7 = $07; // MAC Short Address low Byte for Frame Filter 2
  1320. // Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)
  1321. MAFSA2H0 = $00; // MAC Short Address high Byte for Frame Filter 2
  1322. MAFSA2H1 = $01; // MAC Short Address high Byte for Frame Filter 2
  1323. MAFSA2H2 = $02; // MAC Short Address high Byte for Frame Filter 2
  1324. MAFSA2H3 = $03; // MAC Short Address high Byte for Frame Filter 2
  1325. MAFSA2H4 = $04; // MAC Short Address high Byte for Frame Filter 2
  1326. MAFSA2H5 = $05; // MAC Short Address high Byte for Frame Filter 2
  1327. MAFSA2H6 = $06; // MAC Short Address high Byte for Frame Filter 2
  1328. MAFSA2H7 = $07; // MAC Short Address high Byte for Frame Filter 2
  1329. // Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)
  1330. MAFPA2L0 = $00; // MAC Personal Area Network ID low Byte for Frame Filter 2
  1331. MAFPA2L1 = $01; // MAC Personal Area Network ID low Byte for Frame Filter 2
  1332. MAFPA2L2 = $02; // MAC Personal Area Network ID low Byte for Frame Filter 2
  1333. MAFPA2L3 = $03; // MAC Personal Area Network ID low Byte for Frame Filter 2
  1334. MAFPA2L4 = $04; // MAC Personal Area Network ID low Byte for Frame Filter 2
  1335. MAFPA2L5 = $05; // MAC Personal Area Network ID low Byte for Frame Filter 2
  1336. MAFPA2L6 = $06; // MAC Personal Area Network ID low Byte for Frame Filter 2
  1337. MAFPA2L7 = $07; // MAC Personal Area Network ID low Byte for Frame Filter 2
  1338. // Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)
  1339. MAFPA2H0 = $00; // MAC Personal Area Network ID high Byte for Frame Filter 2
  1340. MAFPA2H1 = $01; // MAC Personal Area Network ID high Byte for Frame Filter 2
  1341. MAFPA2H2 = $02; // MAC Personal Area Network ID high Byte for Frame Filter 2
  1342. MAFPA2H3 = $03; // MAC Personal Area Network ID high Byte for Frame Filter 2
  1343. MAFPA2H4 = $04; // MAC Personal Area Network ID high Byte for Frame Filter 2
  1344. MAFPA2H5 = $05; // MAC Personal Area Network ID high Byte for Frame Filter 2
  1345. MAFPA2H6 = $06; // MAC Personal Area Network ID high Byte for Frame Filter 2
  1346. MAFPA2H7 = $07; // MAC Personal Area Network ID high Byte for Frame Filter 2
  1347. // Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)
  1348. MAFSA3L0 = $00; // MAC Short Address low Byte for Frame Filter 3
  1349. MAFSA3L1 = $01; // MAC Short Address low Byte for Frame Filter 3
  1350. MAFSA3L2 = $02; // MAC Short Address low Byte for Frame Filter 3
  1351. MAFSA3L3 = $03; // MAC Short Address low Byte for Frame Filter 3
  1352. MAFSA3L4 = $04; // MAC Short Address low Byte for Frame Filter 3
  1353. MAFSA3L5 = $05; // MAC Short Address low Byte for Frame Filter 3
  1354. MAFSA3L6 = $06; // MAC Short Address low Byte for Frame Filter 3
  1355. MAFSA3L7 = $07; // MAC Short Address low Byte for Frame Filter 3
  1356. // Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)
  1357. MAFSA3H0 = $00; // MAC Short Address high Byte for Frame Filter 3
  1358. MAFSA3H1 = $01; // MAC Short Address high Byte for Frame Filter 3
  1359. MAFSA3H2 = $02; // MAC Short Address high Byte for Frame Filter 3
  1360. MAFSA3H3 = $03; // MAC Short Address high Byte for Frame Filter 3
  1361. MAFSA3H4 = $04; // MAC Short Address high Byte for Frame Filter 3
  1362. MAFSA3H5 = $05; // MAC Short Address high Byte for Frame Filter 3
  1363. MAFSA3H6 = $06; // MAC Short Address high Byte for Frame Filter 3
  1364. MAFSA3H7 = $07; // MAC Short Address high Byte for Frame Filter 3
  1365. // Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)
  1366. MAFPA3L0 = $00; // MAC Personal Area Network ID low Byte for Frame Filter 3
  1367. MAFPA3L1 = $01; // MAC Personal Area Network ID low Byte for Frame Filter 3
  1368. MAFPA3L2 = $02; // MAC Personal Area Network ID low Byte for Frame Filter 3
  1369. MAFPA3L3 = $03; // MAC Personal Area Network ID low Byte for Frame Filter 3
  1370. MAFPA3L4 = $04; // MAC Personal Area Network ID low Byte for Frame Filter 3
  1371. MAFPA3L5 = $05; // MAC Personal Area Network ID low Byte for Frame Filter 3
  1372. MAFPA3L6 = $06; // MAC Personal Area Network ID low Byte for Frame Filter 3
  1373. MAFPA3L7 = $07; // MAC Personal Area Network ID low Byte for Frame Filter 3
  1374. // Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)
  1375. MAFPA3H0 = $00; // MAC Personal Area Network ID high Byte for Frame Filter 3
  1376. MAFPA3H1 = $01; // MAC Personal Area Network ID high Byte for Frame Filter 3
  1377. MAFPA3H2 = $02; // MAC Personal Area Network ID high Byte for Frame Filter 3
  1378. MAFPA3H3 = $03; // MAC Personal Area Network ID high Byte for Frame Filter 3
  1379. MAFPA3H4 = $04; // MAC Personal Area Network ID high Byte for Frame Filter 3
  1380. MAFPA3H5 = $05; // MAC Personal Area Network ID high Byte for Frame Filter 3
  1381. MAFPA3H6 = $06; // MAC Personal Area Network ID high Byte for Frame Filter 3
  1382. MAFPA3H7 = $07; // MAC Personal Area Network ID high Byte for Frame Filter 3
  1383. // Timer/Counter5 Control Register A
  1384. WGM50 = $00; // Waveform Generation Mode
  1385. WGM51 = $01; // Waveform Generation Mode
  1386. COM5C0 = $02; // Compare Output Mode for Channel C
  1387. COM5C1 = $03; // Compare Output Mode for Channel C
  1388. COM5B0 = $04; // Compare Output Mode for Channel B
  1389. COM5B1 = $05; // Compare Output Mode for Channel B
  1390. COM5A0 = $06; // Compare Output Mode for Channel A
  1391. COM5A1 = $07; // Compare Output Mode for Channel A
  1392. // Timer/Counter5 Control Register B
  1393. CS50 = $00; // Clock Select
  1394. CS51 = $01; // Clock Select
  1395. CS52 = $02; // Clock Select
  1396. ICES5 = $06;
  1397. ICNC5 = $07;
  1398. // Timer/Counter5 Control Register C
  1399. FOC5C = $05;
  1400. FOC5B = $06;
  1401. FOC5A = $07;
  1402. // Low Leakage Voltage Regulator Control Register
  1403. LLENCAL = $00;
  1404. LLSHORT = $01;
  1405. LLTCO = $02;
  1406. LLCAL = $03;
  1407. LLCOMP = $04;
  1408. LLDONE = $05;
  1409. // Low Leakage Voltage Regulator Data Register (Low-Byte)
  1410. LLDRL0 = $00; // Low-Byte Data Register Bits
  1411. LLDRL1 = $01; // Low-Byte Data Register Bits
  1412. LLDRL2 = $02; // Low-Byte Data Register Bits
  1413. LLDRL3 = $03; // Low-Byte Data Register Bits
  1414. // Low Leakage Voltage Regulator Data Register (High-Byte)
  1415. LLDRH0 = $00; // High-Byte Data Register Bits
  1416. LLDRH1 = $01; // High-Byte Data Register Bits
  1417. LLDRH2 = $02; // High-Byte Data Register Bits
  1418. LLDRH3 = $03; // High-Byte Data Register Bits
  1419. LLDRH4 = $04; // High-Byte Data Register Bits
  1420. // Data Retention Configuration Register #0
  1421. ENDRT = $04;
  1422. DRTSWOK = $05;
  1423. // Port Driver Strength Register 0
  1424. PBDRV0 = $00; // Driver Strength Port B
  1425. PBDRV1 = $01; // Driver Strength Port B
  1426. PDDRV0 = $02; // Driver Strength Port D
  1427. PDDRV1 = $03; // Driver Strength Port D
  1428. PEDRV0 = $04; // Driver Strength Port E
  1429. PEDRV1 = $05; // Driver Strength Port E
  1430. PFDRV0 = $06; // Driver Strength Port F
  1431. PFDRV1 = $07; // Driver Strength Port F
  1432. // Port Driver Strength Register 1
  1433. PGDRV0 = $00; // Driver Strength Port G
  1434. PGDRV1 = $01; // Driver Strength Port G
  1435. // Power Amplifier Ramp up/down Control Register
  1436. PARUFI = $00;
  1437. PARDFI = $01;
  1438. PALTU0 = $02; // ext. PA Ramp Up Lead Time
  1439. PALTU1 = $03; // ext. PA Ramp Up Lead Time
  1440. PALTU2 = $04; // ext. PA Ramp Up Lead Time
  1441. PALTD0 = $05; // ext. PA Ramp Down Lead Time
  1442. PALTD1 = $06; // ext. PA Ramp Down Lead Time
  1443. PALTD2 = $07; // ext. PA Ramp Down Lead Time
  1444. // Transceiver Pin Register
  1445. TRXRST = $00;
  1446. SLPTR = $01;
  1447. // AES Control Register
  1448. AES_IM = $02;
  1449. AES_DIR = $03;
  1450. AES_MODE = $05;
  1451. AES_REQUEST = $07;
  1452. // AES Status Register
  1453. AES_DONE = $00;
  1454. AES_ER = $07;
  1455. // AES Plain and Cipher Text Buffer Register
  1456. AES_STATE0 = $00; // AES Plain and Cipher Text Buffer
  1457. AES_STATE1 = $01; // AES Plain and Cipher Text Buffer
  1458. AES_STATE2 = $02; // AES Plain and Cipher Text Buffer
  1459. AES_STATE3 = $03; // AES Plain and Cipher Text Buffer
  1460. AES_STATE4 = $04; // AES Plain and Cipher Text Buffer
  1461. AES_STATE5 = $05; // AES Plain and Cipher Text Buffer
  1462. AES_STATE6 = $06; // AES Plain and Cipher Text Buffer
  1463. AES_STATE7 = $07; // AES Plain and Cipher Text Buffer
  1464. // AES Encryption and Decryption Key Buffer Register
  1465. AES_KEY0 = $00; // AES Encryption/Decryption Key Buffer
  1466. AES_KEY1 = $01; // AES Encryption/Decryption Key Buffer
  1467. AES_KEY2 = $02; // AES Encryption/Decryption Key Buffer
  1468. AES_KEY3 = $03; // AES Encryption/Decryption Key Buffer
  1469. AES_KEY4 = $04; // AES Encryption/Decryption Key Buffer
  1470. AES_KEY5 = $05; // AES Encryption/Decryption Key Buffer
  1471. AES_KEY6 = $06; // AES Encryption/Decryption Key Buffer
  1472. AES_KEY7 = $07; // AES Encryption/Decryption Key Buffer
  1473. // Transceiver Status Register
  1474. TRX_STATUS0 = $00; // Transceiver Main Status
  1475. TRX_STATUS1 = $01; // Transceiver Main Status
  1476. TRX_STATUS2 = $02; // Transceiver Main Status
  1477. TRX_STATUS3 = $03; // Transceiver Main Status
  1478. TRX_STATUS4 = $04; // Transceiver Main Status
  1479. TST_STATUS = $05;
  1480. CCA_STATUS = $06;
  1481. CCA_DONE = $07;
  1482. // Transceiver State Control Register
  1483. TRX_CMD0 = $00; // State Control Command
  1484. TRX_CMD1 = $01; // State Control Command
  1485. TRX_CMD2 = $02; // State Control Command
  1486. TRX_CMD3 = $03; // State Control Command
  1487. TRX_CMD4 = $04; // State Control Command
  1488. TRAC_STATUS0 = $05; // Transaction Status
  1489. TRAC_STATUS1 = $06; // Transaction Status
  1490. TRAC_STATUS2 = $07; // Transaction Status
  1491. // Reserved
  1492. PMU_IF_INV = $04;
  1493. PMU_START = $05;
  1494. PMU_EN = $06;
  1495. Res7 = $07;
  1496. // Transceiver Control Register 1
  1497. PLL_TX_FLT = $04;
  1498. TX_AUTO_CRC_ON = $05;
  1499. IRQ_2_EXT_EN = $06;
  1500. PA_EXT_EN = $07;
  1501. // Transceiver Transmit Power Control Register
  1502. TX_PWR0 = $00; // Transmit Power Setting
  1503. TX_PWR1 = $01; // Transmit Power Setting
  1504. TX_PWR2 = $02; // Transmit Power Setting
  1505. TX_PWR3 = $03; // Transmit Power Setting
  1506. // Receiver Signal Strength Indicator Register
  1507. RSSI0 = $00; // Receiver Signal Strength Indicator
  1508. RSSI1 = $01; // Receiver Signal Strength Indicator
  1509. RSSI2 = $02; // Receiver Signal Strength Indicator
  1510. RSSI3 = $03; // Receiver Signal Strength Indicator
  1511. RSSI4 = $04; // Receiver Signal Strength Indicator
  1512. RND_VALUE0 = $05; // Random Value
  1513. RND_VALUE1 = $06; // Random Value
  1514. RX_CRC_VALID = $07;
  1515. // Transceiver Energy Detection Level Register
  1516. ED_LEVEL0 = $00; // Energy Detection Level
  1517. ED_LEVEL1 = $01; // Energy Detection Level
  1518. ED_LEVEL2 = $02; // Energy Detection Level
  1519. ED_LEVEL3 = $03; // Energy Detection Level
  1520. ED_LEVEL4 = $04; // Energy Detection Level
  1521. ED_LEVEL5 = $05; // Energy Detection Level
  1522. ED_LEVEL6 = $06; // Energy Detection Level
  1523. ED_LEVEL7 = $07; // Energy Detection Level
  1524. // Transceiver Clear Channel Assessment (CCA) Control Register
  1525. CHANNEL0 = $00; // RX/TX Channel Selection
  1526. CHANNEL1 = $01; // RX/TX Channel Selection
  1527. CHANNEL2 = $02; // RX/TX Channel Selection
  1528. CHANNEL3 = $03; // RX/TX Channel Selection
  1529. CHANNEL4 = $04; // RX/TX Channel Selection
  1530. CCA_MODE0 = $05; // Select CCA Measurement Mode
  1531. CCA_MODE1 = $06; // Select CCA Measurement Mode
  1532. CCA_REQUEST = $07;
  1533. // Transceiver CCA Threshold Setting Register
  1534. CCA_ED_THRES0 = $00; // ED Threshold Level for CCA Measurement
  1535. CCA_ED_THRES1 = $01; // ED Threshold Level for CCA Measurement
  1536. CCA_ED_THRES2 = $02; // ED Threshold Level for CCA Measurement
  1537. CCA_ED_THRES3 = $03; // ED Threshold Level for CCA Measurement
  1538. CCA_CS_THRES0 = $04; // CS Threshold Level for CCA Measurement
  1539. CCA_CS_THRES1 = $05; // CS Threshold Level for CCA Measurement
  1540. CCA_CS_THRES2 = $06; // CS Threshold Level for CCA Measurement
  1541. CCA_CS_THRES3 = $07; // CS Threshold Level for CCA Measurement
  1542. // Transceiver Receive Control Register
  1543. PDT_THRES0 = $00; // Receiver Sensitivity Control
  1544. PDT_THRES1 = $01; // Receiver Sensitivity Control
  1545. PDT_THRES2 = $02; // Receiver Sensitivity Control
  1546. PDT_THRES3 = $03; // Receiver Sensitivity Control
  1547. // Start of Frame Delimiter Value Register
  1548. SFD_VALUE0 = $00; // Start of Frame Delimiter Value
  1549. SFD_VALUE1 = $01; // Start of Frame Delimiter Value
  1550. SFD_VALUE2 = $02; // Start of Frame Delimiter Value
  1551. SFD_VALUE3 = $03; // Start of Frame Delimiter Value
  1552. SFD_VALUE4 = $04; // Start of Frame Delimiter Value
  1553. SFD_VALUE5 = $05; // Start of Frame Delimiter Value
  1554. SFD_VALUE6 = $06; // Start of Frame Delimiter Value
  1555. SFD_VALUE7 = $07; // Start of Frame Delimiter Value
  1556. // Transceiver Control Register 2
  1557. OQPSK_DATA_RATE0 = $00; // Data Rate Selection
  1558. OQPSK_DATA_RATE1 = $01; // Data Rate Selection
  1559. RX_SAFE_MODE = $07;
  1560. // Antenna Diversity Control Register
  1561. ANT_CTRL0 = $00; // Static Antenna Diversity Switch Control
  1562. ANT_CTRL1 = $01; // Static Antenna Diversity Switch Control
  1563. ANT_EXT_SW_EN = $02;
  1564. ANT_DIV_EN = $03;
  1565. ANT_SEL = $07;
  1566. // Transceiver Interrupt Enable Register
  1567. PLL_LOCK_EN = $00;
  1568. PLL_UNLOCK_EN = $01;
  1569. RX_START_EN = $02;
  1570. RX_END_EN = $03;
  1571. CCA_ED_DONE_EN = $04;
  1572. AMI_EN = $05;
  1573. TX_END_EN = $06;
  1574. AWAKE_EN = $07;
  1575. // Transceiver Interrupt Status Register
  1576. PLL_LOCK = $00;
  1577. PLL_UNLOCK = $01;
  1578. RX_START = $02;
  1579. RX_END = $03;
  1580. CCA_ED_DONE = $04;
  1581. AMI = $05;
  1582. TX_END = $06;
  1583. AWAKE = $07;
  1584. // Voltage Regulator Control and Status Register
  1585. DVDD_OK = $02;
  1586. DVREG_EXT = $03;
  1587. AVDD_OK = $06;
  1588. AVREG_EXT = $07;
  1589. // Battery Monitor Control and Status Register
  1590. BATMON_VTH0 = $00; // Battery Monitor Threshold Voltage
  1591. BATMON_VTH1 = $01; // Battery Monitor Threshold Voltage
  1592. BATMON_VTH2 = $02; // Battery Monitor Threshold Voltage
  1593. BATMON_VTH3 = $03; // Battery Monitor Threshold Voltage
  1594. BATMON_HR = $04;
  1595. BATMON_OK = $05;
  1596. BAT_LOW_EN = $06;
  1597. BAT_LOW = $07;
  1598. // Crystal Oscillator Control Register
  1599. XTAL_TRIM0 = $00; // Crystal Oscillator Load Capacitance Trimming
  1600. XTAL_TRIM1 = $01; // Crystal Oscillator Load Capacitance Trimming
  1601. XTAL_TRIM2 = $02; // Crystal Oscillator Load Capacitance Trimming
  1602. XTAL_TRIM3 = $03; // Crystal Oscillator Load Capacitance Trimming
  1603. XTAL_MODE0 = $04; // Crystal Oscillator Operating Mode
  1604. XTAL_MODE1 = $05; // Crystal Oscillator Operating Mode
  1605. XTAL_MODE2 = $06; // Crystal Oscillator Operating Mode
  1606. XTAL_MODE3 = $07; // Crystal Oscillator Operating Mode
  1607. // Channel Control Register 0
  1608. CC_NUMBER0 = $00; // Channel Number
  1609. CC_NUMBER1 = $01; // Channel Number
  1610. CC_NUMBER2 = $02; // Channel Number
  1611. CC_NUMBER3 = $03; // Channel Number
  1612. CC_NUMBER4 = $04; // Channel Number
  1613. CC_NUMBER5 = $05; // Channel Number
  1614. CC_NUMBER6 = $06; // Channel Number
  1615. CC_NUMBER7 = $07; // Channel Number
  1616. // Channel Control Register 1
  1617. CC_BAND0 = $00; // Channel Band
  1618. CC_BAND1 = $01; // Channel Band
  1619. CC_BAND2 = $02; // Channel Band
  1620. CC_BAND3 = $03; // Channel Band
  1621. // Transceiver Receiver Sensitivity Control Register
  1622. RX_PDT_LEVEL0 = $00; // Reduce Receiver Sensitivity
  1623. RX_PDT_LEVEL1 = $01; // Reduce Receiver Sensitivity
  1624. RX_PDT_LEVEL2 = $02; // Reduce Receiver Sensitivity
  1625. RX_PDT_LEVEL3 = $03; // Reduce Receiver Sensitivity
  1626. RX_OVERRIDE = $06;
  1627. RX_PDT_DIS = $07;
  1628. // Transceiver Reduced Power Consumption Control
  1629. XAH_RPC_EN = $00;
  1630. IPAN_RPC_EN = $01;
  1631. Res0 = $02;
  1632. PLL_RPC_EN = $03;
  1633. PDT_RPC_EN = $04;
  1634. RX_RPC_EN = $05;
  1635. RX_RPC_CTRL0 = $06; // Smart Receiving Mode Timing
  1636. RX_RPC_CTRL1 = $07; // Smart Receiving Mode Timing
  1637. // Transceiver Acknowledgment Frame Control Register 1
  1638. AACK_PROM_MODE = $01;
  1639. AACK_ACK_TIME = $02;
  1640. AACK_UPLD_RES_FT = $04;
  1641. AACK_FLTR_RES_FT = $05;
  1642. // Transceiver Filter Tuning Control Register
  1643. FTN_START = $07;
  1644. // Transceiver Center Frequency Calibration Control Register
  1645. PLL_CF_START = $07;
  1646. // Transceiver Delay Cell Calibration Control Register
  1647. PLL_DCU_START = $07;
  1648. // Device Identification Register (Part Number)
  1649. PART_NUM0 = $00; // Part Number
  1650. PART_NUM1 = $01; // Part Number
  1651. PART_NUM2 = $02; // Part Number
  1652. PART_NUM3 = $03; // Part Number
  1653. PART_NUM4 = $04; // Part Number
  1654. PART_NUM5 = $05; // Part Number
  1655. PART_NUM6 = $06; // Part Number
  1656. PART_NUM7 = $07; // Part Number
  1657. // Device Identification Register (Version Number)
  1658. VERSION_NUM0 = $00; // Version Number
  1659. VERSION_NUM1 = $01; // Version Number
  1660. VERSION_NUM2 = $02; // Version Number
  1661. VERSION_NUM3 = $03; // Version Number
  1662. VERSION_NUM4 = $04; // Version Number
  1663. VERSION_NUM5 = $05; // Version Number
  1664. VERSION_NUM6 = $06; // Version Number
  1665. VERSION_NUM7 = $07; // Version Number
  1666. // Device Identification Register (Manufacture ID Low Byte)
  1667. MAN_ID_00 = $00;
  1668. MAN_ID_01 = $01;
  1669. MAN_ID_02 = $02;
  1670. MAN_ID_03 = $03;
  1671. MAN_ID_04 = $04;
  1672. MAN_ID_05 = $05;
  1673. MAN_ID_06 = $06;
  1674. MAN_ID_07 = $07;
  1675. // Device Identification Register (Manufacture ID High Byte)
  1676. MAN_ID_10 = $00; // Manufacturer ID (High Byte)
  1677. MAN_ID_11 = $01; // Manufacturer ID (High Byte)
  1678. MAN_ID_12 = $02; // Manufacturer ID (High Byte)
  1679. MAN_ID_13 = $03; // Manufacturer ID (High Byte)
  1680. MAN_ID_14 = $04; // Manufacturer ID (High Byte)
  1681. MAN_ID_15 = $05; // Manufacturer ID (High Byte)
  1682. MAN_ID_16 = $06; // Manufacturer ID (High Byte)
  1683. MAN_ID_17 = $07; // Manufacturer ID (High Byte)
  1684. // Transceiver MAC Short Address Register (Low Byte)
  1685. SHORT_ADDR_00 = $00;
  1686. SHORT_ADDR_01 = $01;
  1687. SHORT_ADDR_02 = $02;
  1688. SHORT_ADDR_03 = $03;
  1689. SHORT_ADDR_04 = $04;
  1690. SHORT_ADDR_05 = $05;
  1691. SHORT_ADDR_06 = $06;
  1692. SHORT_ADDR_07 = $07;
  1693. // Transceiver MAC Short Address Register (High Byte)
  1694. SHORT_ADDR_10 = $00; // MAC Short Address
  1695. SHORT_ADDR_11 = $01; // MAC Short Address
  1696. SHORT_ADDR_12 = $02; // MAC Short Address
  1697. SHORT_ADDR_13 = $03; // MAC Short Address
  1698. SHORT_ADDR_14 = $04; // MAC Short Address
  1699. SHORT_ADDR_15 = $05; // MAC Short Address
  1700. SHORT_ADDR_16 = $06; // MAC Short Address
  1701. SHORT_ADDR_17 = $07; // MAC Short Address
  1702. // Transceiver Personal Area Network ID Register (Low Byte)
  1703. PAN_ID_00 = $00;
  1704. PAN_ID_01 = $01;
  1705. PAN_ID_02 = $02;
  1706. PAN_ID_03 = $03;
  1707. PAN_ID_04 = $04;
  1708. PAN_ID_05 = $05;
  1709. PAN_ID_06 = $06;
  1710. PAN_ID_07 = $07;
  1711. // Transceiver Personal Area Network ID Register (High Byte)
  1712. PAN_ID_10 = $00; // MAC Personal Area Network ID
  1713. PAN_ID_11 = $01; // MAC Personal Area Network ID
  1714. PAN_ID_12 = $02; // MAC Personal Area Network ID
  1715. PAN_ID_13 = $03; // MAC Personal Area Network ID
  1716. PAN_ID_14 = $04; // MAC Personal Area Network ID
  1717. PAN_ID_15 = $05; // MAC Personal Area Network ID
  1718. PAN_ID_16 = $06; // MAC Personal Area Network ID
  1719. PAN_ID_17 = $07; // MAC Personal Area Network ID
  1720. // Transceiver MAC IEEE Address Register 0
  1721. IEEE_ADDR_00 = $00;
  1722. IEEE_ADDR_01 = $01;
  1723. IEEE_ADDR_02 = $02;
  1724. IEEE_ADDR_03 = $03;
  1725. IEEE_ADDR_04 = $04;
  1726. IEEE_ADDR_05 = $05;
  1727. IEEE_ADDR_06 = $06;
  1728. IEEE_ADDR_07 = $07;
  1729. // Transceiver MAC IEEE Address Register 1
  1730. IEEE_ADDR_10 = $00; // MAC IEEE Address
  1731. IEEE_ADDR_11 = $01; // MAC IEEE Address
  1732. IEEE_ADDR_12 = $02; // MAC IEEE Address
  1733. IEEE_ADDR_13 = $03; // MAC IEEE Address
  1734. IEEE_ADDR_14 = $04; // MAC IEEE Address
  1735. IEEE_ADDR_15 = $05; // MAC IEEE Address
  1736. IEEE_ADDR_16 = $06; // MAC IEEE Address
  1737. IEEE_ADDR_17 = $07; // MAC IEEE Address
  1738. // Transceiver Extended Operating Mode Control Register
  1739. SLOTTED_OPERATION = $00;
  1740. MAX_CSMA_RETRIES0 = $01; // Maximum Number of CSMA-CA Procedure Repetition Attempts
  1741. MAX_CSMA_RETRIES1 = $02; // Maximum Number of CSMA-CA Procedure Repetition Attempts
  1742. MAX_CSMA_RETRIES2 = $03; // Maximum Number of CSMA-CA Procedure Repetition Attempts
  1743. MAX_FRAME_RETRIES0 = $04; // Maximum Number of Frame Re-transmission Attempts
  1744. MAX_FRAME_RETRIES1 = $05; // Maximum Number of Frame Re-transmission Attempts
  1745. MAX_FRAME_RETRIES2 = $06; // Maximum Number of Frame Re-transmission Attempts
  1746. MAX_FRAME_RETRIES3 = $07; // Maximum Number of Frame Re-transmission Attempts
  1747. // Transceiver CSMA-CA Random Number Generator Seed Register
  1748. CSMA_SEED_00 = $00;
  1749. CSMA_SEED_01 = $01;
  1750. CSMA_SEED_02 = $02;
  1751. CSMA_SEED_03 = $03;
  1752. CSMA_SEED_04 = $04;
  1753. CSMA_SEED_05 = $05;
  1754. CSMA_SEED_06 = $06;
  1755. CSMA_SEED_07 = $07;
  1756. // Transceiver Acknowledgment Frame Control Register 2
  1757. CSMA_SEED_10 = $00; // Seed Value for CSMA Random Number Generator
  1758. CSMA_SEED_11 = $01; // Seed Value for CSMA Random Number Generator
  1759. CSMA_SEED_12 = $02; // Seed Value for CSMA Random Number Generator
  1760. AACK_I_AM_COORD = $03;
  1761. AACK_DIS_ACK = $04;
  1762. AACK_SET_PD = $05;
  1763. AACK_FVN_MODE0 = $06; // Acknowledgment Frame Filter Mode
  1764. AACK_FVN_MODE1 = $07; // Acknowledgment Frame Filter Mode
  1765. // Transceiver CSMA-CA Back-off Exponent Control Register
  1766. MIN_BE0 = $00; // Minimum Back-off Exponent
  1767. MIN_BE1 = $01; // Minimum Back-off Exponent
  1768. MIN_BE2 = $02; // Minimum Back-off Exponent
  1769. MIN_BE3 = $03; // Minimum Back-off Exponent
  1770. MAX_BE0 = $04; // Maximum Back-off Exponent
  1771. MAX_BE1 = $05; // Maximum Back-off Exponent
  1772. MAX_BE2 = $06; // Maximum Back-off Exponent
  1773. MAX_BE3 = $07; // Maximum Back-off Exponent
  1774. // Transceiver Digital Test Control Register
  1775. TST_CTRL_DIG0 = $00; // Digital Test Controller Register
  1776. TST_CTRL_DIG1 = $01; // Digital Test Controller Register
  1777. TST_CTRL_DIG2 = $02; // Digital Test Controller Register
  1778. TST_CTRL_DIG3 = $03; // Digital Test Controller Register
  1779. // Transceiver Received Frame Length Register
  1780. RX_LENGTH0 = $00; // Received Frame Length
  1781. RX_LENGTH1 = $01; // Received Frame Length
  1782. RX_LENGTH2 = $02; // Received Frame Length
  1783. RX_LENGTH3 = $03; // Received Frame Length
  1784. RX_LENGTH4 = $04; // Received Frame Length
  1785. RX_LENGTH5 = $05; // Received Frame Length
  1786. RX_LENGTH6 = $06; // Received Frame Length
  1787. RX_LENGTH7 = $07; // Received Frame Length
  1788. implementation
  1789. {$i avrcommon.inc}
  1790. procedure INT0_ISR; external name 'INT0_ISR'; // Interrupt 1 External Interrupt Request 0
  1791. procedure INT1_ISR; external name 'INT1_ISR'; // Interrupt 2 External Interrupt Request 1
  1792. procedure INT2_ISR; external name 'INT2_ISR'; // Interrupt 3 External Interrupt Request 2
  1793. procedure INT3_ISR; external name 'INT3_ISR'; // Interrupt 4 External Interrupt Request 3
  1794. procedure INT4_ISR; external name 'INT4_ISR'; // Interrupt 5 External Interrupt Request 4
  1795. procedure INT5_ISR; external name 'INT5_ISR'; // Interrupt 6 External Interrupt Request 5
  1796. procedure INT6_ISR; external name 'INT6_ISR'; // Interrupt 7 External Interrupt Request 6
  1797. procedure INT7_ISR; external name 'INT7_ISR'; // Interrupt 8 External Interrupt Request 7
  1798. procedure PCINT0_ISR; external name 'PCINT0_ISR'; // Interrupt 9 Pin Change Interrupt Request 0
  1799. procedure PCINT1_ISR; external name 'PCINT1_ISR'; // Interrupt 10 Pin Change Interrupt Request 1
  1800. procedure PCINT2_ISR; external name 'PCINT2_ISR'; // Interrupt 11 Pin Change Interrupt Request 2
  1801. procedure WDT_ISR; external name 'WDT_ISR'; // Interrupt 12 Watchdog Time-out Interrupt
  1802. procedure TIMER2_COMPA_ISR; external name 'TIMER2_COMPA_ISR'; // Interrupt 13 Timer/Counter2 Compare Match A
  1803. procedure TIMER2_COMPB_ISR; external name 'TIMER2_COMPB_ISR'; // Interrupt 14 Timer/Counter2 Compare Match B
  1804. procedure TIMER2_OVF_ISR; external name 'TIMER2_OVF_ISR'; // Interrupt 15 Timer/Counter2 Overflow
  1805. procedure TIMER1_CAPT_ISR; external name 'TIMER1_CAPT_ISR'; // Interrupt 16 Timer/Counter1 Capture Event
  1806. procedure TIMER1_COMPA_ISR; external name 'TIMER1_COMPA_ISR'; // Interrupt 17 Timer/Counter1 Compare Match A
  1807. procedure TIMER1_COMPB_ISR; external name 'TIMER1_COMPB_ISR'; // Interrupt 18 Timer/Counter1 Compare Match B
  1808. procedure TIMER1_COMPC_ISR; external name 'TIMER1_COMPC_ISR'; // Interrupt 19 Timer/Counter1 Compare Match C
  1809. procedure TIMER1_OVF_ISR; external name 'TIMER1_OVF_ISR'; // Interrupt 20 Timer/Counter1 Overflow
  1810. procedure TIMER0_COMPA_ISR; external name 'TIMER0_COMPA_ISR'; // Interrupt 21 Timer/Counter0 Compare Match A
  1811. procedure TIMER0_COMPB_ISR; external name 'TIMER0_COMPB_ISR'; // Interrupt 22 Timer/Counter0 Compare Match B
  1812. procedure TIMER0_OVF_ISR; external name 'TIMER0_OVF_ISR'; // Interrupt 23 Timer/Counter0 Overflow
  1813. procedure SPI_STC_ISR; external name 'SPI_STC_ISR'; // Interrupt 24 SPI Serial Transfer Complete
  1814. procedure USART0_RX_ISR; external name 'USART0_RX_ISR'; // Interrupt 25 USART0, Rx Complete
  1815. procedure USART0_UDRE_ISR; external name 'USART0_UDRE_ISR'; // Interrupt 26 USART0 Data register Empty
  1816. procedure USART0_TX_ISR; external name 'USART0_TX_ISR'; // Interrupt 27 USART0, Tx Complete
  1817. procedure ANALOG_COMP_ISR; external name 'ANALOG_COMP_ISR'; // Interrupt 28 Analog Comparator
  1818. procedure ADC_ISR; external name 'ADC_ISR'; // Interrupt 29 ADC Conversion Complete
  1819. procedure EE_READY_ISR; external name 'EE_READY_ISR'; // Interrupt 30 EEPROM Ready
  1820. procedure TIMER3_CAPT_ISR; external name 'TIMER3_CAPT_ISR'; // Interrupt 31 Timer/Counter3 Capture Event
  1821. procedure TIMER3_COMPA_ISR; external name 'TIMER3_COMPA_ISR'; // Interrupt 32 Timer/Counter3 Compare Match A
  1822. procedure TIMER3_COMPB_ISR; external name 'TIMER3_COMPB_ISR'; // Interrupt 33 Timer/Counter3 Compare Match B
  1823. procedure TIMER3_COMPC_ISR; external name 'TIMER3_COMPC_ISR'; // Interrupt 34 Timer/Counter3 Compare Match C
  1824. procedure TIMER3_OVF_ISR; external name 'TIMER3_OVF_ISR'; // Interrupt 35 Timer/Counter3 Overflow
  1825. procedure USART1_RX_ISR; external name 'USART1_RX_ISR'; // Interrupt 36 USART1, Rx Complete
  1826. procedure USART1_UDRE_ISR; external name 'USART1_UDRE_ISR'; // Interrupt 37 USART1 Data register Empty
  1827. procedure USART1_TX_ISR; external name 'USART1_TX_ISR'; // Interrupt 38 USART1, Tx Complete
  1828. procedure TWI_ISR; external name 'TWI_ISR'; // Interrupt 39 2-wire Serial Interface
  1829. procedure SPM_READY_ISR; external name 'SPM_READY_ISR'; // Interrupt 40 Store Program Memory Read
  1830. procedure TIMER4_CAPT_ISR; external name 'TIMER4_CAPT_ISR'; // Interrupt 41 Timer/Counter4 Capture Event
  1831. procedure TIMER4_COMPA_ISR; external name 'TIMER4_COMPA_ISR'; // Interrupt 42 Timer/Counter4 Compare Match A
  1832. procedure TIMER4_COMPB_ISR; external name 'TIMER4_COMPB_ISR'; // Interrupt 43 Timer/Counter4 Compare Match B
  1833. procedure TIMER4_COMPC_ISR; external name 'TIMER4_COMPC_ISR'; // Interrupt 44 Timer/Counter4 Compare Match C
  1834. procedure TIMER4_OVF_ISR; external name 'TIMER4_OVF_ISR'; // Interrupt 45 Timer/Counter4 Overflow
  1835. procedure TIMER5_CAPT_ISR; external name 'TIMER5_CAPT_ISR'; // Interrupt 46 Timer/Counter5 Capture Event
  1836. procedure TIMER5_COMPA_ISR; external name 'TIMER5_COMPA_ISR'; // Interrupt 47 Timer/Counter5 Compare Match A
  1837. procedure TIMER5_COMPB_ISR; external name 'TIMER5_COMPB_ISR'; // Interrupt 48 Timer/Counter5 Compare Match B
  1838. procedure TIMER5_COMPC_ISR; external name 'TIMER5_COMPC_ISR'; // Interrupt 49 Timer/Counter5 Compare Match C
  1839. procedure TIMER5_OVF_ISR; external name 'TIMER5_OVF_ISR'; // Interrupt 50 Timer/Counter5 Overflow
  1840. procedure TRX24_PLL_LOCK_ISR; external name 'TRX24_PLL_LOCK_ISR'; // Interrupt 57 TRX24 - PLL lock interrupt
  1841. procedure TRX24_PLL_UNLOCK_ISR; external name 'TRX24_PLL_UNLOCK_ISR'; // Interrupt 58 TRX24 - PLL unlock interrupt
  1842. procedure TRX24_RX_START_ISR; external name 'TRX24_RX_START_ISR'; // Interrupt 59 TRX24 - Receive start interrupt
  1843. procedure TRX24_RX_END_ISR; external name 'TRX24_RX_END_ISR'; // Interrupt 60 TRX24 - RX_END interrupt
  1844. procedure TRX24_CCA_ED_DONE_ISR; external name 'TRX24_CCA_ED_DONE_ISR'; // Interrupt 61 TRX24 - CCA/ED done interrupt
  1845. procedure TRX24_XAH_AMI_ISR; external name 'TRX24_XAH_AMI_ISR'; // Interrupt 62 TRX24 - XAH - AMI
  1846. procedure TRX24_TX_END_ISR; external name 'TRX24_TX_END_ISR'; // Interrupt 63 TRX24 - TX_END interrupt
  1847. procedure TRX24_AWAKE_ISR; external name 'TRX24_AWAKE_ISR'; // Interrupt 64 TRX24 AWAKE - tranceiver is reaching state TRX_OFF
  1848. procedure SCNT_CMP1_ISR; external name 'SCNT_CMP1_ISR'; // Interrupt 65 Symbol counter - compare match 1 interrupt
  1849. procedure SCNT_CMP2_ISR; external name 'SCNT_CMP2_ISR'; // Interrupt 66 Symbol counter - compare match 2 interrupt
  1850. procedure SCNT_CMP3_ISR; external name 'SCNT_CMP3_ISR'; // Interrupt 67 Symbol counter - compare match 3 interrupt
  1851. procedure SCNT_OVFL_ISR; external name 'SCNT_OVFL_ISR'; // Interrupt 68 Symbol counter - overflow interrupt
  1852. procedure SCNT_BACKOFF_ISR; external name 'SCNT_BACKOFF_ISR'; // Interrupt 69 Symbol counter - backoff interrupt
  1853. procedure AES_READY_ISR; external name 'AES_READY_ISR'; // Interrupt 70 AES engine ready interrupt
  1854. procedure BAT_LOW_ISR; external name 'BAT_LOW_ISR'; // Interrupt 71 Battery monitor indicates supply voltage below threshold
  1855. procedure TRX24_TX_START_ISR; external name 'TRX24_TX_START_ISR'; // Interrupt 72 TRX24 TX start interrupt
  1856. procedure TRX24_AMI0_ISR; external name 'TRX24_AMI0_ISR'; // Interrupt 73 Address match interrupt of address filter 0
  1857. procedure TRX24_AMI1_ISR; external name 'TRX24_AMI1_ISR'; // Interrupt 74 Address match interrupt of address filter 1
  1858. procedure TRX24_AMI2_ISR; external name 'TRX24_AMI2_ISR'; // Interrupt 75 Address match interrupt of address filter 2
  1859. procedure TRX24_AMI3_ISR; external name 'TRX24_AMI3_ISR'; // Interrupt 76 Address match interrupt of address filter 3
  1860. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  1861. asm
  1862. jmp __dtors_end
  1863. jmp INT0_ISR
  1864. jmp INT1_ISR
  1865. jmp INT2_ISR
  1866. jmp INT3_ISR
  1867. jmp INT4_ISR
  1868. jmp INT5_ISR
  1869. jmp INT6_ISR
  1870. jmp INT7_ISR
  1871. jmp PCINT0_ISR
  1872. jmp PCINT1_ISR
  1873. jmp PCINT2_ISR
  1874. jmp WDT_ISR
  1875. jmp TIMER2_COMPA_ISR
  1876. jmp TIMER2_COMPB_ISR
  1877. jmp TIMER2_OVF_ISR
  1878. jmp TIMER1_CAPT_ISR
  1879. jmp TIMER1_COMPA_ISR
  1880. jmp TIMER1_COMPB_ISR
  1881. jmp TIMER1_COMPC_ISR
  1882. jmp TIMER1_OVF_ISR
  1883. jmp TIMER0_COMPA_ISR
  1884. jmp TIMER0_COMPB_ISR
  1885. jmp TIMER0_OVF_ISR
  1886. jmp SPI_STC_ISR
  1887. jmp USART0_RX_ISR
  1888. jmp USART0_UDRE_ISR
  1889. jmp USART0_TX_ISR
  1890. jmp ANALOG_COMP_ISR
  1891. jmp ADC_ISR
  1892. jmp EE_READY_ISR
  1893. jmp TIMER3_CAPT_ISR
  1894. jmp TIMER3_COMPA_ISR
  1895. jmp TIMER3_COMPB_ISR
  1896. jmp TIMER3_COMPC_ISR
  1897. jmp TIMER3_OVF_ISR
  1898. jmp USART1_RX_ISR
  1899. jmp USART1_UDRE_ISR
  1900. jmp USART1_TX_ISR
  1901. jmp TWI_ISR
  1902. jmp SPM_READY_ISR
  1903. jmp TIMER4_CAPT_ISR
  1904. jmp TIMER4_COMPA_ISR
  1905. jmp TIMER4_COMPB_ISR
  1906. jmp TIMER4_COMPC_ISR
  1907. jmp TIMER4_OVF_ISR
  1908. jmp TIMER5_CAPT_ISR
  1909. jmp TIMER5_COMPA_ISR
  1910. jmp TIMER5_COMPB_ISR
  1911. jmp TIMER5_COMPC_ISR
  1912. jmp TIMER5_OVF_ISR
  1913. jmp TRX24_PLL_LOCK_ISR
  1914. jmp TRX24_PLL_UNLOCK_ISR
  1915. jmp TRX24_RX_START_ISR
  1916. jmp TRX24_RX_END_ISR
  1917. jmp TRX24_CCA_ED_DONE_ISR
  1918. jmp TRX24_XAH_AMI_ISR
  1919. jmp TRX24_TX_END_ISR
  1920. jmp TRX24_AWAKE_ISR
  1921. jmp SCNT_CMP1_ISR
  1922. jmp SCNT_CMP2_ISR
  1923. jmp SCNT_CMP3_ISR
  1924. jmp SCNT_OVFL_ISR
  1925. jmp SCNT_BACKOFF_ISR
  1926. jmp AES_READY_ISR
  1927. jmp BAT_LOW_ISR
  1928. jmp TRX24_TX_START_ISR
  1929. jmp TRX24_AMI0_ISR
  1930. jmp TRX24_AMI1_ISR
  1931. jmp TRX24_AMI2_ISR
  1932. jmp TRX24_AMI3_ISR
  1933. .weak INT0_ISR
  1934. .weak INT1_ISR
  1935. .weak INT2_ISR
  1936. .weak INT3_ISR
  1937. .weak INT4_ISR
  1938. .weak INT5_ISR
  1939. .weak INT6_ISR
  1940. .weak INT7_ISR
  1941. .weak PCINT0_ISR
  1942. .weak PCINT1_ISR
  1943. .weak PCINT2_ISR
  1944. .weak WDT_ISR
  1945. .weak TIMER2_COMPA_ISR
  1946. .weak TIMER2_COMPB_ISR
  1947. .weak TIMER2_OVF_ISR
  1948. .weak TIMER1_CAPT_ISR
  1949. .weak TIMER1_COMPA_ISR
  1950. .weak TIMER1_COMPB_ISR
  1951. .weak TIMER1_COMPC_ISR
  1952. .weak TIMER1_OVF_ISR
  1953. .weak TIMER0_COMPA_ISR
  1954. .weak TIMER0_COMPB_ISR
  1955. .weak TIMER0_OVF_ISR
  1956. .weak SPI_STC_ISR
  1957. .weak USART0_RX_ISR
  1958. .weak USART0_UDRE_ISR
  1959. .weak USART0_TX_ISR
  1960. .weak ANALOG_COMP_ISR
  1961. .weak ADC_ISR
  1962. .weak EE_READY_ISR
  1963. .weak TIMER3_CAPT_ISR
  1964. .weak TIMER3_COMPA_ISR
  1965. .weak TIMER3_COMPB_ISR
  1966. .weak TIMER3_COMPC_ISR
  1967. .weak TIMER3_OVF_ISR
  1968. .weak USART1_RX_ISR
  1969. .weak USART1_UDRE_ISR
  1970. .weak USART1_TX_ISR
  1971. .weak TWI_ISR
  1972. .weak SPM_READY_ISR
  1973. .weak TIMER4_CAPT_ISR
  1974. .weak TIMER4_COMPA_ISR
  1975. .weak TIMER4_COMPB_ISR
  1976. .weak TIMER4_COMPC_ISR
  1977. .weak TIMER4_OVF_ISR
  1978. .weak TIMER5_CAPT_ISR
  1979. .weak TIMER5_COMPA_ISR
  1980. .weak TIMER5_COMPB_ISR
  1981. .weak TIMER5_COMPC_ISR
  1982. .weak TIMER5_OVF_ISR
  1983. .weak TRX24_PLL_LOCK_ISR
  1984. .weak TRX24_PLL_UNLOCK_ISR
  1985. .weak TRX24_RX_START_ISR
  1986. .weak TRX24_RX_END_ISR
  1987. .weak TRX24_CCA_ED_DONE_ISR
  1988. .weak TRX24_XAH_AMI_ISR
  1989. .weak TRX24_TX_END_ISR
  1990. .weak TRX24_AWAKE_ISR
  1991. .weak SCNT_CMP1_ISR
  1992. .weak SCNT_CMP2_ISR
  1993. .weak SCNT_CMP3_ISR
  1994. .weak SCNT_OVFL_ISR
  1995. .weak SCNT_BACKOFF_ISR
  1996. .weak AES_READY_ISR
  1997. .weak BAT_LOW_ISR
  1998. .weak TRX24_TX_START_ISR
  1999. .weak TRX24_AMI0_ISR
  2000. .weak TRX24_AMI1_ISR
  2001. .weak TRX24_AMI2_ISR
  2002. .weak TRX24_AMI3_ISR
  2003. .set INT0_ISR, Default_IRQ_handler
  2004. .set INT1_ISR, Default_IRQ_handler
  2005. .set INT2_ISR, Default_IRQ_handler
  2006. .set INT3_ISR, Default_IRQ_handler
  2007. .set INT4_ISR, Default_IRQ_handler
  2008. .set INT5_ISR, Default_IRQ_handler
  2009. .set INT6_ISR, Default_IRQ_handler
  2010. .set INT7_ISR, Default_IRQ_handler
  2011. .set PCINT0_ISR, Default_IRQ_handler
  2012. .set PCINT1_ISR, Default_IRQ_handler
  2013. .set PCINT2_ISR, Default_IRQ_handler
  2014. .set WDT_ISR, Default_IRQ_handler
  2015. .set TIMER2_COMPA_ISR, Default_IRQ_handler
  2016. .set TIMER2_COMPB_ISR, Default_IRQ_handler
  2017. .set TIMER2_OVF_ISR, Default_IRQ_handler
  2018. .set TIMER1_CAPT_ISR, Default_IRQ_handler
  2019. .set TIMER1_COMPA_ISR, Default_IRQ_handler
  2020. .set TIMER1_COMPB_ISR, Default_IRQ_handler
  2021. .set TIMER1_COMPC_ISR, Default_IRQ_handler
  2022. .set TIMER1_OVF_ISR, Default_IRQ_handler
  2023. .set TIMER0_COMPA_ISR, Default_IRQ_handler
  2024. .set TIMER0_COMPB_ISR, Default_IRQ_handler
  2025. .set TIMER0_OVF_ISR, Default_IRQ_handler
  2026. .set SPI_STC_ISR, Default_IRQ_handler
  2027. .set USART0_RX_ISR, Default_IRQ_handler
  2028. .set USART0_UDRE_ISR, Default_IRQ_handler
  2029. .set USART0_TX_ISR, Default_IRQ_handler
  2030. .set ANALOG_COMP_ISR, Default_IRQ_handler
  2031. .set ADC_ISR, Default_IRQ_handler
  2032. .set EE_READY_ISR, Default_IRQ_handler
  2033. .set TIMER3_CAPT_ISR, Default_IRQ_handler
  2034. .set TIMER3_COMPA_ISR, Default_IRQ_handler
  2035. .set TIMER3_COMPB_ISR, Default_IRQ_handler
  2036. .set TIMER3_COMPC_ISR, Default_IRQ_handler
  2037. .set TIMER3_OVF_ISR, Default_IRQ_handler
  2038. .set USART1_RX_ISR, Default_IRQ_handler
  2039. .set USART1_UDRE_ISR, Default_IRQ_handler
  2040. .set USART1_TX_ISR, Default_IRQ_handler
  2041. .set TWI_ISR, Default_IRQ_handler
  2042. .set SPM_READY_ISR, Default_IRQ_handler
  2043. .set TIMER4_CAPT_ISR, Default_IRQ_handler
  2044. .set TIMER4_COMPA_ISR, Default_IRQ_handler
  2045. .set TIMER4_COMPB_ISR, Default_IRQ_handler
  2046. .set TIMER4_COMPC_ISR, Default_IRQ_handler
  2047. .set TIMER4_OVF_ISR, Default_IRQ_handler
  2048. .set TIMER5_CAPT_ISR, Default_IRQ_handler
  2049. .set TIMER5_COMPA_ISR, Default_IRQ_handler
  2050. .set TIMER5_COMPB_ISR, Default_IRQ_handler
  2051. .set TIMER5_COMPC_ISR, Default_IRQ_handler
  2052. .set TIMER5_OVF_ISR, Default_IRQ_handler
  2053. .set TRX24_PLL_LOCK_ISR, Default_IRQ_handler
  2054. .set TRX24_PLL_UNLOCK_ISR, Default_IRQ_handler
  2055. .set TRX24_RX_START_ISR, Default_IRQ_handler
  2056. .set TRX24_RX_END_ISR, Default_IRQ_handler
  2057. .set TRX24_CCA_ED_DONE_ISR, Default_IRQ_handler
  2058. .set TRX24_XAH_AMI_ISR, Default_IRQ_handler
  2059. .set TRX24_TX_END_ISR, Default_IRQ_handler
  2060. .set TRX24_AWAKE_ISR, Default_IRQ_handler
  2061. .set SCNT_CMP1_ISR, Default_IRQ_handler
  2062. .set SCNT_CMP2_ISR, Default_IRQ_handler
  2063. .set SCNT_CMP3_ISR, Default_IRQ_handler
  2064. .set SCNT_OVFL_ISR, Default_IRQ_handler
  2065. .set SCNT_BACKOFF_ISR, Default_IRQ_handler
  2066. .set AES_READY_ISR, Default_IRQ_handler
  2067. .set BAT_LOW_ISR, Default_IRQ_handler
  2068. .set TRX24_TX_START_ISR, Default_IRQ_handler
  2069. .set TRX24_AMI0_ISR, Default_IRQ_handler
  2070. .set TRX24_AMI1_ISR, Default_IRQ_handler
  2071. .set TRX24_AMI2_ISR, Default_IRQ_handler
  2072. .set TRX24_AMI3_ISR, Default_IRQ_handler
  2073. end;
  2074. end.