atmega809.pp 57 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193
  1. unit ATmega809;
  2. interface
  3. type
  4. TAC = object //Analog Comparator
  5. CTRLA: byte; //Control A
  6. Reserved1: byte;
  7. MUXCTRLA: byte; //Mux Control A
  8. Reserved3: byte;
  9. DACREF: byte; //Referance scale control
  10. Reserved5: byte;
  11. INTCTRL: byte; //Interrupt Control
  12. STATUS: byte; //Status
  13. const
  14. // Enable
  15. ENABLEbm = $01;
  16. // AC_HYSMODE
  17. HYSMODEmask = $06;
  18. HYSMODE_OFF = $00;
  19. HYSMODE_10mV = $02;
  20. HYSMODE_25mV = $04;
  21. HYSMODE_50mV = $06;
  22. // AC_INTMODE
  23. INTMODEmask = $30;
  24. INTMODE_BOTHEDGE = $00;
  25. INTMODE_NEGEDGE = $20;
  26. INTMODE_POSEDGE = $30;
  27. // AC_LPMODE
  28. LPMODEmask = $08;
  29. LPMODE_DIS = $00;
  30. LPMODE_EN = $08;
  31. // Output Buffer Enable
  32. OUTENbm = $40;
  33. // Run in Standby Mode
  34. RUNSTDBYbm = $80;
  35. // DAC voltage reference
  36. DATA0bm = $01;
  37. DATA1bm = $02;
  38. DATA2bm = $04;
  39. DATA3bm = $08;
  40. DATA4bm = $10;
  41. DATA5bm = $20;
  42. DATA6bm = $40;
  43. DATA7bm = $80;
  44. // Analog Comparator 0 Interrupt Enable
  45. CMPbm = $01;
  46. // Invert AC Output
  47. INVERTbm = $80;
  48. // AC_MUXNEG
  49. MUXNEGmask = $03;
  50. MUXNEG_PIN0 = $00;
  51. MUXNEG_PIN1 = $01;
  52. MUXNEG_PIN2 = $02;
  53. MUXNEG_DACREF = $03;
  54. // AC_MUXPOS
  55. MUXPOSmask = $18;
  56. MUXPOS_PIN0 = $00;
  57. MUXPOS_PIN1 = $08;
  58. MUXPOS_PIN2 = $10;
  59. MUXPOS_PIN3 = $18;
  60. // Analog Comparator State
  61. STATEbm = $10;
  62. end;
  63. TADC = object //Analog to Digital Converter
  64. CTRLA: byte; //Control A
  65. CTRLB: byte; //Control B
  66. CTRLC: byte; //Control C
  67. CTRLD: byte; //Control D
  68. CTRLE: byte; //Control E
  69. SAMPCTRL: byte; //Sample Control
  70. MUXPOS: byte; //Positive mux input
  71. Reserved7: byte;
  72. COMMAND: byte; //Command
  73. EVCTRL: byte; //Event Control
  74. INTCTRL: byte; //Interrupt Control
  75. INTFLAGS: byte; //Interrupt Flags
  76. DBGCTRL: byte; //Debug Control
  77. TEMP: byte; //Temporary Data
  78. Reserved14: byte;
  79. Reserved15: byte;
  80. RES: word; //ADC Accumulator Result
  81. WINLT: word; //Window comparator low threshold
  82. WINHT: word; //Window comparator high threshold
  83. CALIB: byte; //Calibration
  84. const
  85. // ADC_DUTYCYC
  86. DUTYCYCmask = $01;
  87. DUTYCYC_DUTY50 = $00;
  88. DUTYCYC_DUTY25 = $01;
  89. // Start Conversion Operation
  90. STCONVbm = $01;
  91. // ADC Enable
  92. ENABLEbm = $01;
  93. // ADC Freerun mode
  94. FREERUNbm = $02;
  95. // ADC_RESSEL
  96. RESSELmask = $04;
  97. RESSEL_10BIT = $00;
  98. RESSEL_8BIT = $04;
  99. // Run standby mode
  100. RUNSTBYbm = $80;
  101. // ADC_SAMPNUM
  102. SAMPNUMmask = $07;
  103. SAMPNUM_ACC1 = $00;
  104. SAMPNUM_ACC2 = $01;
  105. SAMPNUM_ACC4 = $02;
  106. SAMPNUM_ACC8 = $03;
  107. SAMPNUM_ACC16 = $04;
  108. SAMPNUM_ACC32 = $05;
  109. SAMPNUM_ACC64 = $06;
  110. // ADC_PRESC
  111. PRESCmask = $07;
  112. PRESC_DIV2 = $00;
  113. PRESC_DIV4 = $01;
  114. PRESC_DIV8 = $02;
  115. PRESC_DIV16 = $03;
  116. PRESC_DIV32 = $04;
  117. PRESC_DIV64 = $05;
  118. PRESC_DIV128 = $06;
  119. PRESC_DIV256 = $07;
  120. // ADC_REFSEL
  121. REFSELmask = $30;
  122. REFSEL_INTREF = $00;
  123. REFSEL_VDDREF = $10;
  124. REFSEL_VREFA = $20;
  125. // Sample Capacitance Selection
  126. SAMPCAPbm = $40;
  127. // ADC_ASDV
  128. ASDVmask = $10;
  129. ASDV_ASVOFF = $00;
  130. ASDV_ASVON = $10;
  131. // ADC_INITDLY
  132. INITDLYmask = $E0;
  133. INITDLY_DLY0 = $00;
  134. INITDLY_DLY16 = $20;
  135. INITDLY_DLY32 = $40;
  136. INITDLY_DLY64 = $60;
  137. INITDLY_DLY128 = $80;
  138. INITDLY_DLY256 = $A0;
  139. // Sampling Delay Selection
  140. SAMPDLY0bm = $01;
  141. SAMPDLY1bm = $02;
  142. SAMPDLY2bm = $04;
  143. SAMPDLY3bm = $08;
  144. // ADC_WINCM
  145. WINCMmask = $07;
  146. WINCM_NONE = $00;
  147. WINCM_BELOW = $01;
  148. WINCM_ABOVE = $02;
  149. WINCM_INSIDE = $03;
  150. WINCM_OUTSIDE = $04;
  151. // Debug run
  152. DBGRUNbm = $01;
  153. // Start Event Input Enable
  154. STARTEIbm = $01;
  155. // Result Ready Interrupt Enable
  156. RESRDYbm = $01;
  157. // Window Comparator Interrupt Enable
  158. WCMPbm = $02;
  159. // ADC_MUXPOS
  160. MUXPOSmask = $1F;
  161. MUXPOS_AIN0 = $00;
  162. MUXPOS_AIN1 = $01;
  163. MUXPOS_AIN2 = $02;
  164. MUXPOS_AIN3 = $03;
  165. MUXPOS_AIN4 = $04;
  166. MUXPOS_AIN5 = $05;
  167. MUXPOS_AIN6 = $06;
  168. MUXPOS_AIN7 = $07;
  169. MUXPOS_AIN8 = $08;
  170. MUXPOS_AIN9 = $09;
  171. MUXPOS_AIN10 = $0A;
  172. MUXPOS_AIN11 = $0B;
  173. MUXPOS_AIN12 = $0C;
  174. MUXPOS_AIN13 = $0D;
  175. MUXPOS_AIN14 = $0E;
  176. MUXPOS_AIN15 = $0F;
  177. MUXPOS_DACREF = $1C;
  178. MUXPOS_TEMPSENSE = $1E;
  179. MUXPOS_GND = $1F;
  180. // Sample lenght
  181. SAMPLEN0bm = $01;
  182. SAMPLEN1bm = $02;
  183. SAMPLEN2bm = $04;
  184. SAMPLEN3bm = $08;
  185. SAMPLEN4bm = $10;
  186. // Temporary
  187. TEMP0bm = $01;
  188. TEMP1bm = $02;
  189. TEMP2bm = $04;
  190. TEMP3bm = $08;
  191. TEMP4bm = $10;
  192. TEMP5bm = $20;
  193. TEMP6bm = $40;
  194. TEMP7bm = $80;
  195. end;
  196. TBOD = object //Bod interface
  197. CTRLA: byte; //Control A
  198. CTRLB: byte; //Control B
  199. Reserved2: byte;
  200. Reserved3: byte;
  201. Reserved4: byte;
  202. Reserved5: byte;
  203. Reserved6: byte;
  204. Reserved7: byte;
  205. VLMCTRLA: byte; //Voltage level monitor Control
  206. INTCTRL: byte; //Voltage level monitor interrupt Control
  207. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  208. STATUS: byte; //Voltage level monitor status
  209. const
  210. // BOD_ACTIVE
  211. ACTIVEmask = $0C;
  212. ACTIVE_DIS = $00;
  213. ACTIVE_ENABLED = $04;
  214. ACTIVE_SAMPLED = $08;
  215. ACTIVE_ENWAKE = $0C;
  216. // BOD_SAMPFREQ
  217. SAMPFREQmask = $10;
  218. SAMPFREQ_1KHZ = $00;
  219. SAMPFREQ_125HZ = $10;
  220. // BOD_SLEEP
  221. SLEEPmask = $03;
  222. SLEEP_DIS = $00;
  223. SLEEP_ENABLED = $01;
  224. SLEEP_SAMPLED = $02;
  225. // BOD_LVL
  226. LVLmask = $07;
  227. LVL_BODLEVEL0 = $00;
  228. LVL_BODLEVEL2 = $02;
  229. LVL_BODLEVEL7 = $07;
  230. // BOD_VLMCFG
  231. VLMCFGmask = $06;
  232. VLMCFG_BELOW = $00;
  233. VLMCFG_ABOVE = $02;
  234. VLMCFG_CROSS = $04;
  235. // voltage level monitor interrrupt enable
  236. VLMIEbm = $01;
  237. // Voltage level monitor interrupt flag
  238. VLMIFbm = $01;
  239. // Voltage level monitor status
  240. VLMSbm = $01;
  241. // BOD_VLMLVL
  242. VLMLVLmask = $03;
  243. VLMLVL_5ABOVE = $00;
  244. VLMLVL_15ABOVE = $01;
  245. VLMLVL_25ABOVE = $02;
  246. end;
  247. TCCL = object //Configurable Custom Logic
  248. CTRLA: byte; //Control Register A
  249. SEQCTRL0: byte; //Sequential Control 0
  250. SEQCTRL1: byte; //Sequential Control 1
  251. Reserved3: byte;
  252. Reserved4: byte;
  253. INTCTRL0: byte; //Interrupt Control 0
  254. Reserved6: byte;
  255. INTFLAGS: byte; //Interrupt Flags
  256. LUT0CTRLA: byte; //LUT Control 0 A
  257. LUT0CTRLB: byte; //LUT Control 0 B
  258. LUT0CTRLC: byte; //LUT Control 0 C
  259. TRUTH0: byte; //Truth 0
  260. LUT1CTRLA: byte; //LUT Control 1 A
  261. LUT1CTRLB: byte; //LUT Control 1 B
  262. LUT1CTRLC: byte; //LUT Control 1 C
  263. TRUTH1: byte; //Truth 1
  264. LUT2CTRLA: byte; //LUT Control 2 A
  265. LUT2CTRLB: byte; //LUT Control 2 B
  266. LUT2CTRLC: byte; //LUT Control 2 C
  267. TRUTH2: byte; //Truth 2
  268. LUT3CTRLA: byte; //LUT Control 3 A
  269. LUT3CTRLB: byte; //LUT Control 3 B
  270. LUT3CTRLC: byte; //LUT Control 3 C
  271. TRUTH3: byte; //Truth 3
  272. const
  273. // Enable
  274. ENABLEbm = $01;
  275. // Run in Standby
  276. RUNSTDBYbm = $40;
  277. // CCL_INTMODE0
  278. INTMODE0mask = $03;
  279. INTMODE0_INTDISABLE = $00;
  280. INTMODE0_RISING = $01;
  281. INTMODE0_FALLING = $02;
  282. INTMODE0_BOTH = $03;
  283. // CCL_INTMODE1
  284. INTMODE1mask = $0C;
  285. INTMODE1_INTDISABLE = $00;
  286. INTMODE1_RISING = $04;
  287. INTMODE1_FALLING = $08;
  288. INTMODE1_BOTH = $0C;
  289. // CCL_INTMODE2
  290. INTMODE2mask = $30;
  291. INTMODE2_INTDISABLE = $00;
  292. INTMODE2_RISING = $10;
  293. INTMODE2_FALLING = $20;
  294. INTMODE2_BOTH = $30;
  295. // CCL_INTMODE3
  296. INTMODE3mask = $C0;
  297. INTMODE3_INTDISABLE = $00;
  298. INTMODE3_RISING = $40;
  299. INTMODE3_FALLING = $80;
  300. INTMODE3_BOTH = $C0;
  301. // Interrupt Flags
  302. INT0bm = $01;
  303. INT1bm = $02;
  304. INT2bm = $04;
  305. INT3bm = $08;
  306. // CCL_CLKSRC
  307. CLKSRCmask = $0E;
  308. CLKSRC_CLKPER = $00;
  309. CLKSRC_IN2 = $02;
  310. CLKSRC_OSC20M = $08;
  311. CLKSRC_OSCULP32K = $0A;
  312. CLKSRC_OSCULP1K = $0C;
  313. // CCL_EDGEDET
  314. EDGEDETmask = $80;
  315. EDGEDET_DIS = $00;
  316. EDGEDET_EN = $80;
  317. // CCL_FILTSEL
  318. FILTSELmask = $30;
  319. FILTSEL_DISABLE = $00;
  320. FILTSEL_SYNCH = $10;
  321. FILTSEL_FILTER = $20;
  322. // Output Enable
  323. OUTENbm = $40;
  324. // CCL_INSEL0
  325. INSEL0mask = $0F;
  326. INSEL0_MASK = $00;
  327. INSEL0_FEEDBACK = $01;
  328. INSEL0_LINK = $02;
  329. INSEL0_EVENTA = $03;
  330. INSEL0_EVENTB = $04;
  331. INSEL0_IO = $05;
  332. INSEL0_AC0 = $06;
  333. INSEL0_USART0 = $08;
  334. INSEL0_SPI0 = $09;
  335. INSEL0_TCA0 = $0A;
  336. INSEL0_TCB0 = $0C;
  337. // CCL_INSEL1
  338. INSEL1mask = $F0;
  339. INSEL1_MASK = $00;
  340. INSEL1_FEEDBACK = $10;
  341. INSEL1_LINK = $20;
  342. INSEL1_EVENTA = $30;
  343. INSEL1_EVENTB = $40;
  344. INSEL1_IO = $50;
  345. INSEL1_AC0 = $60;
  346. INSEL1_USART1 = $80;
  347. INSEL1_SPI0 = $90;
  348. INSEL1_TCA0 = $A0;
  349. INSEL1_TCB1 = $C0;
  350. // CCL_INSEL2
  351. INSEL2mask = $0F;
  352. INSEL2_MASK = $00;
  353. INSEL2_FEEDBACK = $01;
  354. INSEL2_LINK = $02;
  355. INSEL2_EVENTA = $03;
  356. INSEL2_EVENTB = $04;
  357. INSEL2_IO = $05;
  358. INSEL2_AC0 = $06;
  359. INSEL2_USART2 = $08;
  360. INSEL2_SPI0 = $09;
  361. INSEL2_TCA0 = $0A;
  362. INSEL2_TCB2 = $0C;
  363. // CCL_SEQSEL0
  364. SEQSEL0mask = $07;
  365. SEQSEL0_DISABLE = $00;
  366. SEQSEL0_DFF = $01;
  367. SEQSEL0_JK = $02;
  368. SEQSEL0_LATCH = $03;
  369. SEQSEL0_RS = $04;
  370. // CCL_SEQSEL1
  371. SEQSEL1mask = $07;
  372. SEQSEL1_DISABLE = $00;
  373. SEQSEL1_DFF = $01;
  374. SEQSEL1_JK = $02;
  375. SEQSEL1_LATCH = $03;
  376. SEQSEL1_RS = $04;
  377. end;
  378. TCLKCTRL = object //Clock controller
  379. MCLKCTRLA: byte; //MCLK Control A
  380. MCLKCTRLB: byte; //MCLK Control B
  381. MCLKLOCK: byte; //MCLK Lock
  382. MCLKSTATUS: byte; //MCLK Status
  383. Reserved4: byte;
  384. Reserved5: byte;
  385. Reserved6: byte;
  386. Reserved7: byte;
  387. Reserved8: byte;
  388. Reserved9: byte;
  389. Reserved10: byte;
  390. Reserved11: byte;
  391. Reserved12: byte;
  392. Reserved13: byte;
  393. Reserved14: byte;
  394. Reserved15: byte;
  395. OSC20MCTRLA: byte; //OSC20M Control A
  396. OSC20MCALIBA: byte; //OSC20M Calibration A
  397. OSC20MCALIBB: byte; //OSC20M Calibration B
  398. Reserved19: byte;
  399. Reserved20: byte;
  400. Reserved21: byte;
  401. Reserved22: byte;
  402. Reserved23: byte;
  403. OSC32KCTRLA: byte; //OSC32K Control A
  404. Reserved25: byte;
  405. Reserved26: byte;
  406. Reserved27: byte;
  407. XOSC32KCTRLA: byte; //XOSC32K Control A
  408. const
  409. // System clock out
  410. CLKOUTbm = $80;
  411. // CLKCTRL_CLKSEL
  412. CLKSELmask = $03;
  413. CLKSEL_OSC20M = $00;
  414. CLKSEL_OSCULP32K = $01;
  415. CLKSEL_XOSC32K = $02;
  416. CLKSEL_EXTCLK = $03;
  417. // CLKCTRL_PDIV
  418. PDIVmask = $1E;
  419. PDIV_2X = $00;
  420. PDIV_4X = $02;
  421. PDIV_8X = $04;
  422. PDIV_16X = $06;
  423. PDIV_32X = $08;
  424. PDIV_64X = $0A;
  425. PDIV_6X = $10;
  426. PDIV_10X = $12;
  427. PDIV_12X = $14;
  428. PDIV_24X = $16;
  429. PDIV_48X = $18;
  430. // Prescaler enable
  431. PENbm = $01;
  432. // lock ebable
  433. LOCKENbm = $01;
  434. // External Clock status
  435. EXTSbm = $80;
  436. // 20MHz oscillator status
  437. OSC20MSbm = $10;
  438. // 32KHz oscillator status
  439. OSC32KSbm = $20;
  440. // System Oscillator changing
  441. SOSCbm = $01;
  442. // 32.768 kHz Crystal Oscillator status
  443. XOSC32KSbm = $40;
  444. // Calibration
  445. CAL20M0bm = $01;
  446. CAL20M1bm = $02;
  447. CAL20M2bm = $04;
  448. CAL20M3bm = $08;
  449. CAL20M4bm = $10;
  450. CAL20M5bm = $20;
  451. CAL20M6bm = $40;
  452. // Lock
  453. LOCKbm = $80;
  454. // Oscillator temperature coefficient
  455. TEMPCAL20M0bm = $01;
  456. TEMPCAL20M1bm = $02;
  457. TEMPCAL20M2bm = $04;
  458. TEMPCAL20M3bm = $08;
  459. // Run standby
  460. RUNSTDBYbm = $02;
  461. // CLKCTRL_CSUT
  462. CSUTmask = $30;
  463. CSUT_1K = $00;
  464. CSUT_16K = $10;
  465. CSUT_32K = $20;
  466. CSUT_64K = $30;
  467. // Enable
  468. ENABLEbm = $01;
  469. // Select
  470. SELbm = $04;
  471. end;
  472. TCPU = object //CPU
  473. Reserved0: byte;
  474. Reserved1: byte;
  475. Reserved2: byte;
  476. Reserved3: byte;
  477. CCP: byte; //Configuration Change Protection
  478. Reserved5: byte;
  479. Reserved6: byte;
  480. Reserved7: byte;
  481. Reserved8: byte;
  482. Reserved9: byte;
  483. Reserved10: byte;
  484. Reserved11: byte;
  485. Reserved12: byte;
  486. SPL: byte; //Stack Pointer Low
  487. SPH: byte; //Stack Pointer High
  488. SREG: byte; //Status Register
  489. const
  490. // CPU_CCP
  491. CCPmask = $FF;
  492. CCP_SPM = $9D;
  493. CCP_IOREG = $D8;
  494. // Carry Flag
  495. Cbm = $01;
  496. // Half Carry Flag
  497. Hbm = $20;
  498. // Global Interrupt Enable Flag
  499. Ibm = $80;
  500. // Negative Flag
  501. Nbm = $04;
  502. // N Exclusive Or V Flag
  503. Sbm = $10;
  504. // Transfer Bit
  505. Tbm = $40;
  506. // Two's Complement Overflow Flag
  507. Vbm = $08;
  508. // Zero Flag
  509. Zbm = $02;
  510. end;
  511. TCPUINT = object //Interrupt Controller
  512. CTRLA: byte; //Control A
  513. STATUS: byte; //Status
  514. LVL0PRI: byte; //Interrupt Level 0 Priority
  515. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  516. const
  517. // Compact Vector Table
  518. CVTbm = $20;
  519. // Interrupt Vector Select
  520. IVSELbm = $40;
  521. // Round-robin Scheduling Enable
  522. LVL0RRbm = $01;
  523. // Interrupt Level Priority
  524. LVL0PRI0bm = $01;
  525. LVL0PRI1bm = $02;
  526. LVL0PRI2bm = $04;
  527. LVL0PRI3bm = $08;
  528. LVL0PRI4bm = $10;
  529. LVL0PRI5bm = $20;
  530. LVL0PRI6bm = $40;
  531. LVL0PRI7bm = $80;
  532. // Interrupt Vector with High Priority
  533. LVL1VEC0bm = $01;
  534. LVL1VEC1bm = $02;
  535. LVL1VEC2bm = $04;
  536. LVL1VEC3bm = $08;
  537. LVL1VEC4bm = $10;
  538. LVL1VEC5bm = $20;
  539. LVL1VEC6bm = $40;
  540. LVL1VEC7bm = $80;
  541. // Level 0 Interrupt Executing
  542. LVL0EXbm = $01;
  543. // Level 1 Interrupt Executing
  544. LVL1EXbm = $02;
  545. // Non-maskable Interrupt Executing
  546. NMIEXbm = $80;
  547. end;
  548. TCRCSCAN = object //CRCSCAN
  549. CTRLA: byte; //Control A
  550. CTRLB: byte; //Control B
  551. STATUS: byte; //Status
  552. const
  553. // Enable CRC scan
  554. ENABLEbm = $01;
  555. // Enable NMI Trigger
  556. NMIENbm = $02;
  557. // Reset CRC scan
  558. RESETbm = $80;
  559. // CRCSCAN_SRC
  560. SRCmask = $03;
  561. SRC_FLASH = $00;
  562. SRC_APPLICATION = $01;
  563. SRC_BOOT = $02;
  564. // CRC Busy
  565. BUSYbm = $01;
  566. // CRC Ok
  567. OKbm = $02;
  568. end;
  569. TEVSYS = object //Event System
  570. STROBE: byte; //Channel Strobe
  571. Reserved1: byte;
  572. Reserved2: byte;
  573. Reserved3: byte;
  574. Reserved4: byte;
  575. Reserved5: byte;
  576. Reserved6: byte;
  577. Reserved7: byte;
  578. Reserved8: byte;
  579. Reserved9: byte;
  580. Reserved10: byte;
  581. Reserved11: byte;
  582. Reserved12: byte;
  583. Reserved13: byte;
  584. Reserved14: byte;
  585. Reserved15: byte;
  586. CHANNEL0: byte; //Multiplexer Channel 0
  587. CHANNEL1: byte; //Multiplexer Channel 1
  588. CHANNEL2: byte; //Multiplexer Channel 2
  589. CHANNEL3: byte; //Multiplexer Channel 3
  590. CHANNEL4: byte; //Multiplexer Channel 4
  591. CHANNEL5: byte; //Multiplexer Channel 5
  592. CHANNEL6: byte; //Multiplexer Channel 6
  593. CHANNEL7: byte; //Multiplexer Channel 7
  594. Reserved24: byte;
  595. Reserved25: byte;
  596. Reserved26: byte;
  597. Reserved27: byte;
  598. Reserved28: byte;
  599. Reserved29: byte;
  600. Reserved30: byte;
  601. Reserved31: byte;
  602. USERCCLLUT0A: byte; //User CCL LUT0 Event A
  603. USERCCLLUT0B: byte; //User CCL LUT0 Event B
  604. USERCCLLUT1A: byte; //User CCL LUT1 Event A
  605. USERCCLLUT1B: byte; //User CCL LUT1 Event B
  606. USERCCLLUT2A: byte; //User CCL LUT2 Event A
  607. USERCCLLUT2B: byte; //User CCL LUT2 Event B
  608. USERCCLLUT3A: byte; //User CCL LUT3 Event A
  609. USERCCLLUT3B: byte; //User CCL LUT3 Event B
  610. USERADC0: byte; //User ADC0
  611. USEREVOUTA: byte; //User EVOUT Port A
  612. USEREVOUTB: byte; //User EVOUT Port B
  613. USEREVOUTC: byte; //User EVOUT Port C
  614. USEREVOUTD: byte; //User EVOUT Port D
  615. USEREVOUTE: byte; //User EVOUT Port E
  616. USEREVOUTF: byte; //User EVOUT Port F
  617. USERUSART0: byte; //User USART0
  618. USERUSART1: byte; //User USART1
  619. USERUSART2: byte; //User USART2
  620. USERUSART3: byte; //User USART3
  621. USERTCA0: byte; //User TCA0
  622. USERTCB0: byte; //User TCB0
  623. USERTCB1: byte; //User TCB1
  624. USERTCB2: byte; //User TCB2
  625. USERTCB3: byte; //User TCB3
  626. const
  627. // EVSYS_GENERATOR
  628. GENERATORmask = $FF;
  629. GENERATOR_OFF = $00;
  630. GENERATOR_UPDI = $01;
  631. GENERATOR_RTC_OVF = $06;
  632. GENERATOR_RTC_CMP = $07;
  633. GENERATOR_RTC_PIT0 = $08;
  634. GENERATOR_RTC_PIT1 = $09;
  635. GENERATOR_RTC_PIT2 = $0A;
  636. GENERATOR_RTC_PIT3 = $0B;
  637. GENERATOR_CCL_LUT0 = $10;
  638. GENERATOR_CCL_LUT1 = $11;
  639. GENERATOR_CCL_LUT2 = $12;
  640. GENERATOR_CCL_LUT3 = $13;
  641. GENERATOR_AC0_OUT = $20;
  642. GENERATOR_ADC0_RESRDY = $24;
  643. GENERATOR_PORT0_PIN0 = $40;
  644. GENERATOR_PORT0_PIN1 = $41;
  645. GENERATOR_PORT0_PIN2 = $42;
  646. GENERATOR_PORT0_PIN3 = $43;
  647. GENERATOR_PORT0_PIN4 = $44;
  648. GENERATOR_PORT0_PIN5 = $45;
  649. GENERATOR_PORT0_PIN6 = $46;
  650. GENERATOR_PORT0_PIN7 = $47;
  651. GENERATOR_PORT1_PIN0 = $48;
  652. GENERATOR_PORT1_PIN1 = $49;
  653. GENERATOR_PORT1_PIN2 = $4A;
  654. GENERATOR_PORT1_PIN3 = $4B;
  655. GENERATOR_PORT1_PIN4 = $4C;
  656. GENERATOR_PORT1_PIN5 = $4D;
  657. GENERATOR_PORT1_PIN6 = $4E;
  658. GENERATOR_PORT1_PIN7 = $4F;
  659. GENERATOR_USART0_XCK = $60;
  660. GENERATOR_USART1_XCK = $61;
  661. GENERATOR_USART2_XCK = $62;
  662. GENERATOR_USART3_XCK = $63;
  663. GENERATOR_SPI0_SCK = $68;
  664. GENERATOR_TCA0_OVF_LUNF = $80;
  665. GENERATOR_TCA0_HUNF = $81;
  666. GENERATOR_TCA0_CMP0 = $84;
  667. GENERATOR_TCA0_CMP1 = $85;
  668. GENERATOR_TCA0_CMP2 = $86;
  669. GENERATOR_TCB0_CAPT = $A0;
  670. GENERATOR_TCB1_CAPT = $A2;
  671. GENERATOR_TCB2_CAPT = $A4;
  672. GENERATOR_TCB3_CAPT = $A6;
  673. // EVSYS_STROBE0
  674. STROBE0mask = $FF;
  675. STROBE0_EV_STROBE_CH0 = $01;
  676. STROBE0_EV_STROBE_CH1 = $02;
  677. STROBE0_EV_STROBE_CH2 = $04;
  678. STROBE0_EV_STROBE_CH3 = $08;
  679. STROBE0_EV_STROBE_CH4 = $10;
  680. STROBE0_EV_STROBE_CH5 = $20;
  681. STROBE0_EV_STROBE_CH6 = $40;
  682. STROBE0_EV_STROBE_CH7 = $80;
  683. // EVSYS_CHANNEL
  684. CHANNELmask = $FF;
  685. CHANNEL_OFF = $00;
  686. CHANNEL_CHANNEL0 = $01;
  687. CHANNEL_CHANNEL1 = $02;
  688. CHANNEL_CHANNEL2 = $03;
  689. CHANNEL_CHANNEL3 = $04;
  690. CHANNEL_CHANNEL4 = $05;
  691. CHANNEL_CHANNEL5 = $06;
  692. CHANNEL_CHANNEL6 = $07;
  693. CHANNEL_CHANNEL7 = $08;
  694. end;
  695. TFUSE = object //Fuses
  696. WDTCFG: byte; //Watchdog Configuration
  697. BODCFG: byte; //BOD Configuration
  698. OSCCFG: byte; //Oscillator Configuration
  699. Reserved3: byte;
  700. Reserved4: byte;
  701. SYSCFG0: byte; //System Configuration 0
  702. SYSCFG1: byte; //System Configuration 1
  703. APPEND: byte; //Application Code Section End
  704. BOOTEND: byte; //Boot Section End
  705. const
  706. // FUSE_ACTIVE
  707. ACTIVEmask = $0C;
  708. ACTIVE_DIS = $00;
  709. ACTIVE_ENABLED = $04;
  710. ACTIVE_SAMPLED = $08;
  711. ACTIVE_ENWAKE = $0C;
  712. // FUSE_LVL
  713. LVLmask = $E0;
  714. LVL_BODLEVEL0 = $00;
  715. LVL_BODLEVEL2 = $40;
  716. LVL_BODLEVEL7 = $E0;
  717. // FUSE_SAMPFREQ
  718. SAMPFREQmask = $10;
  719. SAMPFREQ_1KHZ = $00;
  720. SAMPFREQ_125HZ = $10;
  721. // FUSE_SLEEP
  722. SLEEPmask = $03;
  723. SLEEP_DIS = $00;
  724. SLEEP_ENABLED = $01;
  725. SLEEP_SAMPLED = $02;
  726. // FUSE_FREQSEL
  727. FREQSELmask = $03;
  728. FREQSEL_16MHZ = $01;
  729. FREQSEL_20MHZ = $02;
  730. // Oscillator Lock
  731. OSCLOCKbm = $80;
  732. // FUSE_CRCSRC
  733. CRCSRCmask = $C0;
  734. CRCSRC_FLASH = $00;
  735. CRCSRC_BOOT = $40;
  736. CRCSRC_BOOTAPP = $80;
  737. CRCSRC_NOCRC = $C0;
  738. // EEPROM Save
  739. EESAVEbm = $01;
  740. // FUSE_RSTPINCFG
  741. RSTPINCFGmask = $08;
  742. RSTPINCFG_GPIO = $00;
  743. RSTPINCFG_RST = $08;
  744. // FUSE_SUT
  745. SUTmask = $07;
  746. SUT_0MS = $00;
  747. SUT_1MS = $01;
  748. SUT_2MS = $02;
  749. SUT_4MS = $03;
  750. SUT_8MS = $04;
  751. SUT_16MS = $05;
  752. SUT_32MS = $06;
  753. SUT_64MS = $07;
  754. // FUSE_PERIOD
  755. PERIODmask = $0F;
  756. PERIOD_OFF = $00;
  757. PERIOD_8CLK = $01;
  758. PERIOD_16CLK = $02;
  759. PERIOD_32CLK = $03;
  760. PERIOD_64CLK = $04;
  761. PERIOD_128CLK = $05;
  762. PERIOD_256CLK = $06;
  763. PERIOD_512CLK = $07;
  764. PERIOD_1KCLK = $08;
  765. PERIOD_2KCLK = $09;
  766. PERIOD_4KCLK = $0A;
  767. PERIOD_8KCLK = $0B;
  768. // FUSE_WINDOW
  769. WINDOWmask = $F0;
  770. WINDOW_OFF = $00;
  771. WINDOW_8CLK = $10;
  772. WINDOW_16CLK = $20;
  773. WINDOW_32CLK = $30;
  774. WINDOW_64CLK = $40;
  775. WINDOW_128CLK = $50;
  776. WINDOW_256CLK = $60;
  777. WINDOW_512CLK = $70;
  778. WINDOW_1KCLK = $80;
  779. WINDOW_2KCLK = $90;
  780. WINDOW_4KCLK = $A0;
  781. WINDOW_8KCLK = $B0;
  782. end;
  783. TGPIO = object //General Purpose IO
  784. GPIOR0: byte; //General Purpose IO Register 0
  785. GPIOR1: byte; //General Purpose IO Register 1
  786. GPIOR2: byte; //General Purpose IO Register 2
  787. GPIOR3: byte; //General Purpose IO Register 3
  788. end;
  789. TLOCKBIT = object //Lockbit
  790. LOCKBIT: byte; //Lock Bits
  791. const
  792. // LOCKBIT_LB
  793. LBmask = $FF;
  794. LB_RWLOCK = $3A;
  795. LB_NOLOCK = $C5;
  796. end;
  797. TNVMCTRL = object //Non-volatile Memory Controller
  798. CTRLA: byte; //Control A
  799. CTRLB: byte; //Control B
  800. STATUS: byte; //Status
  801. INTCTRL: byte; //Interrupt Control
  802. INTFLAGS: byte; //Interrupt Flags
  803. Reserved5: byte;
  804. DATA: word; //Data
  805. ADDR: word; //Address
  806. const
  807. // NVMCTRL_CMD
  808. CMDmask = $07;
  809. CMD_NONE = $00;
  810. CMD_PAGEWRITE = $01;
  811. CMD_PAGEERASE = $02;
  812. CMD_PAGEERASEWRITE = $03;
  813. CMD_PAGEBUFCLR = $04;
  814. CMD_CHIPERASE = $05;
  815. CMD_EEERASE = $06;
  816. CMD_FUSEWRITE = $07;
  817. // Application code write protect
  818. APCWPbm = $01;
  819. // Boot Lock
  820. BOOTLOCKbm = $02;
  821. // EEPROM Ready
  822. EEREADYbm = $01;
  823. // EEPROM busy
  824. EEBUSYbm = $02;
  825. // Flash busy
  826. FBUSYbm = $01;
  827. // Write error
  828. WRERRORbm = $04;
  829. end;
  830. TPORT = object //I/O Ports
  831. DIR: byte; //Data Direction
  832. DIRSET: byte; //Data Direction Set
  833. DIRCLR: byte; //Data Direction Clear
  834. DIRTGL: byte; //Data Direction Toggle
  835. OUT_: byte; //Output Value
  836. OUTSET: byte; //Output Value Set
  837. OUTCLR: byte; //Output Value Clear
  838. OUTTGL: byte; //Output Value Toggle
  839. IN_: byte; //Input Value
  840. INTFLAGS: byte; //Interrupt Flags
  841. PORTCTRL: byte; //Port Control
  842. Reserved11: byte;
  843. Reserved12: byte;
  844. Reserved13: byte;
  845. Reserved14: byte;
  846. Reserved15: byte;
  847. PIN0CTRL: byte; //Pin 0 Control
  848. PIN1CTRL: byte; //Pin 1 Control
  849. PIN2CTRL: byte; //Pin 2 Control
  850. PIN3CTRL: byte; //Pin 3 Control
  851. PIN4CTRL: byte; //Pin 4 Control
  852. PIN5CTRL: byte; //Pin 5 Control
  853. PIN6CTRL: byte; //Pin 6 Control
  854. PIN7CTRL: byte; //Pin 7 Control
  855. const
  856. // Pin Interrupt
  857. INT0bm = $01;
  858. INT1bm = $02;
  859. INT2bm = $04;
  860. INT3bm = $08;
  861. INT4bm = $10;
  862. INT5bm = $20;
  863. INT6bm = $40;
  864. INT7bm = $80;
  865. // Inverted I/O Enable
  866. INVENbm = $80;
  867. // PORT_ISC
  868. ISCmask = $07;
  869. ISC_INTDISABLE = $00;
  870. ISC_BOTHEDGES = $01;
  871. ISC_RISING = $02;
  872. ISC_FALLING = $03;
  873. ISC_INPUT_DISABLE = $04;
  874. ISC_LEVEL = $05;
  875. // Pullup enable
  876. PULLUPENbm = $08;
  877. // Slew Rate Limit Enable
  878. SRLbm = $01;
  879. end;
  880. TPORTMUX = object //Port Multiplexer
  881. EVSYSROUTEA: byte; //Port Multiplexer EVSYS
  882. CCLROUTEA: byte; //Port Multiplexer CCL
  883. USARTROUTEA: byte; //Port Multiplexer USART register A
  884. TWISPIROUTEA: byte; //Port Multiplexer TWI and SPI
  885. TCAROUTEA: byte; //Port Multiplexer TCA
  886. TCBROUTEA: byte; //Port Multiplexer TCB
  887. const
  888. // CCL LUT0
  889. LUT0bm = $01;
  890. // CCL LUT1
  891. LUT1bm = $02;
  892. // CCL LUT2
  893. LUT2bm = $04;
  894. // CCL LUT3
  895. LUT3bm = $08;
  896. // Event Output 0
  897. EVOUT0bm = $01;
  898. // Event Output 1
  899. EVOUT1bm = $02;
  900. // Event Output 2
  901. EVOUT2bm = $04;
  902. // Event Output 3
  903. EVOUT3bm = $08;
  904. // Event Output 4
  905. EVOUT4bm = $10;
  906. // Event Output 5
  907. EVOUT5bm = $20;
  908. // PORTMUX_TCA0
  909. TCA0mask = $07;
  910. TCA0_PORTA = $00;
  911. TCA0_PORTB = $01;
  912. TCA0_PORTC = $02;
  913. TCA0_PORTD = $03;
  914. TCA0_PORTE = $04;
  915. TCA0_PORTF = $05;
  916. // Port Multiplexer TCB0
  917. TCB0bm = $01;
  918. // Port Multiplexer TCB1
  919. TCB1bm = $02;
  920. // Port Multiplexer TCB2
  921. TCB2bm = $04;
  922. // Port Multiplexer TCB3
  923. TCB3bm = $08;
  924. // PORTMUX_SPI0
  925. SPI0mask = $03;
  926. SPI0_DEFAULT = $00;
  927. SPI0_ALT1 = $01;
  928. SPI0_ALT2 = $02;
  929. SPI0_NONE = $03;
  930. // PORTMUX_TWI0
  931. TWI0mask = $30;
  932. TWI0_DEFAULT = $00;
  933. TWI0_ALT1 = $10;
  934. TWI0_ALT2 = $20;
  935. TWI0_NONE = $30;
  936. // PORTMUX_USART0
  937. USART0mask = $03;
  938. USART0_DEFAULT = $00;
  939. USART0_ALT1 = $01;
  940. USART0_NONE = $03;
  941. // PORTMUX_USART1
  942. USART1mask = $0C;
  943. USART1_DEFAULT = $00;
  944. USART1_ALT1 = $04;
  945. USART1_NONE = $0C;
  946. // PORTMUX_USART2
  947. USART2mask = $30;
  948. USART2_DEFAULT = $00;
  949. USART2_ALT1 = $10;
  950. USART2_NONE = $30;
  951. // PORTMUX_USART3
  952. USART3mask = $C0;
  953. USART3_DEFAULT = $00;
  954. USART3_ALT1 = $40;
  955. USART3_NONE = $C0;
  956. end;
  957. TRSTCTRL = object //Reset controller
  958. RSTFR: byte; //Reset Flags
  959. SWRR: byte; //Software Reset
  960. const
  961. // Brown out detector Reset flag
  962. BORFbm = $02;
  963. // External Reset flag
  964. EXTRFbm = $04;
  965. // Power on Reset flag
  966. PORFbm = $01;
  967. // Software Reset flag
  968. SWRFbm = $10;
  969. // UPDI Reset flag
  970. UPDIRFbm = $20;
  971. // Watch dog Reset flag
  972. WDRFbm = $08;
  973. // Software reset enable
  974. SWREbm = $01;
  975. end;
  976. TRTC = object //Real-Time Counter
  977. CTRLA: byte; //Control A
  978. STATUS: byte; //Status
  979. INTCTRL: byte; //Interrupt Control
  980. INTFLAGS: byte; //Interrupt Flags
  981. TEMP: byte; //Temporary
  982. DBGCTRL: byte; //Debug control
  983. CALIB: byte; //Calibration
  984. CLKSEL: byte; //Clock Select
  985. CNT: word; //Counter
  986. PER: word; //Period
  987. CMP: word; //Compare
  988. Reserved14: byte;
  989. Reserved15: byte;
  990. PITCTRLA: byte; //PIT Control A
  991. PITSTATUS: byte; //PIT Status
  992. PITINTCTRL: byte; //PIT Interrupt Control
  993. PITINTFLAGS: byte; //PIT Interrupt Flags
  994. Reserved20: byte;
  995. PITDBGCTRL: byte; //PIT Debug control
  996. const
  997. // Error Correction Value
  998. ERROR0bm = $01;
  999. ERROR1bm = $02;
  1000. ERROR2bm = $04;
  1001. ERROR3bm = $08;
  1002. ERROR4bm = $10;
  1003. ERROR5bm = $20;
  1004. ERROR6bm = $40;
  1005. // Error Correction Sign Bit
  1006. SIGNbm = $80;
  1007. // RTC_CLKSEL
  1008. CLKSELmask = $03;
  1009. CLKSEL_INT32K = $00;
  1010. CLKSEL_INT1K = $01;
  1011. CLKSEL_TOSC32K = $02;
  1012. CLKSEL_EXTCLK = $03;
  1013. // Correction enable
  1014. CORRENbm = $04;
  1015. // RTC_PRESCALER
  1016. PRESCALERmask = $78;
  1017. PRESCALER_DIV1 = $00;
  1018. PRESCALER_DIV2 = $08;
  1019. PRESCALER_DIV4 = $10;
  1020. PRESCALER_DIV8 = $18;
  1021. PRESCALER_DIV16 = $20;
  1022. PRESCALER_DIV32 = $28;
  1023. PRESCALER_DIV64 = $30;
  1024. PRESCALER_DIV128 = $38;
  1025. PRESCALER_DIV256 = $40;
  1026. PRESCALER_DIV512 = $48;
  1027. PRESCALER_DIV1024 = $50;
  1028. PRESCALER_DIV2048 = $58;
  1029. PRESCALER_DIV4096 = $60;
  1030. PRESCALER_DIV8192 = $68;
  1031. PRESCALER_DIV16384 = $70;
  1032. PRESCALER_DIV32768 = $78;
  1033. // Enable
  1034. RTCENbm = $01;
  1035. // Run In Standby
  1036. RUNSTDBYbm = $80;
  1037. // Run in debug
  1038. DBGRUNbm = $01;
  1039. // Compare Match Interrupt enable
  1040. CMPbm = $02;
  1041. // Overflow Interrupt enable
  1042. OVFbm = $01;
  1043. // RTC_PERIOD
  1044. PERIODmask = $78;
  1045. PERIOD_OFF = $00;
  1046. PERIOD_CYC4 = $08;
  1047. PERIOD_CYC8 = $10;
  1048. PERIOD_CYC16 = $18;
  1049. PERIOD_CYC32 = $20;
  1050. PERIOD_CYC64 = $28;
  1051. PERIOD_CYC128 = $30;
  1052. PERIOD_CYC256 = $38;
  1053. PERIOD_CYC512 = $40;
  1054. PERIOD_CYC1024 = $48;
  1055. PERIOD_CYC2048 = $50;
  1056. PERIOD_CYC4096 = $58;
  1057. PERIOD_CYC8192 = $60;
  1058. PERIOD_CYC16384 = $68;
  1059. PERIOD_CYC32768 = $70;
  1060. // Enable
  1061. PITENbm = $01;
  1062. // Periodic Interrupt
  1063. PIbm = $01;
  1064. // CTRLA Synchronization Busy Flag
  1065. CTRLBUSYbm = $01;
  1066. // Comparator Synchronization Busy Flag
  1067. CMPBUSYbm = $08;
  1068. // Count Synchronization Busy Flag
  1069. CNTBUSYbm = $02;
  1070. // CTRLA Synchronization Busy Flag
  1071. CTRLABUSYbm = $01;
  1072. // Period Synchronization Busy Flag
  1073. PERBUSYbm = $04;
  1074. end;
  1075. TSIGROW = object //Signature row
  1076. DEVICEID0: byte; //Device ID Byte 0
  1077. DEVICEID1: byte; //Device ID Byte 1
  1078. DEVICEID2: byte; //Device ID Byte 2
  1079. SERNUM0: byte; //Serial Number Byte 0
  1080. SERNUM1: byte; //Serial Number Byte 1
  1081. SERNUM2: byte; //Serial Number Byte 2
  1082. SERNUM3: byte; //Serial Number Byte 3
  1083. SERNUM4: byte; //Serial Number Byte 4
  1084. SERNUM5: byte; //Serial Number Byte 5
  1085. SERNUM6: byte; //Serial Number Byte 6
  1086. SERNUM7: byte; //Serial Number Byte 7
  1087. SERNUM8: byte; //Serial Number Byte 8
  1088. SERNUM9: byte; //Serial Number Byte 9
  1089. Reserved13: byte;
  1090. Reserved14: byte;
  1091. Reserved15: byte;
  1092. Reserved16: byte;
  1093. Reserved17: byte;
  1094. Reserved18: byte;
  1095. Reserved19: byte;
  1096. OSCCAL32K: byte; //Oscillator Calibration for 32kHz ULP
  1097. Reserved21: byte;
  1098. Reserved22: byte;
  1099. Reserved23: byte;
  1100. OSCCAL16M0: byte; //Oscillator Calibration 16 MHz Byte 0
  1101. OSCCAL16M1: byte; //Oscillator Calibration 16 MHz Byte 1
  1102. OSCCAL20M0: byte; //Oscillator Calibration 20 MHz Byte 0
  1103. OSCCAL20M1: byte; //Oscillator Calibration 20 MHz Byte 1
  1104. Reserved28: byte;
  1105. Reserved29: byte;
  1106. Reserved30: byte;
  1107. Reserved31: byte;
  1108. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  1109. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  1110. OSC16ERR3V: byte; //OSC16 error at 3V
  1111. OSC16ERR5V: byte; //OSC16 error at 5V
  1112. OSC20ERR3V: byte; //OSC20 error at 3V
  1113. OSC20ERR5V: byte; //OSC20 error at 5V
  1114. Reserved38: byte;
  1115. Reserved39: byte;
  1116. Reserved40: byte;
  1117. Reserved41: byte;
  1118. Reserved42: byte;
  1119. Reserved43: byte;
  1120. Reserved44: byte;
  1121. Reserved45: byte;
  1122. Reserved46: byte;
  1123. CHECKSUM1: byte; //CRC Checksum Byte 1
  1124. end;
  1125. TSLPCTRL = object //Sleep Controller
  1126. CTRLA: byte; //Control
  1127. const
  1128. // Sleep enable
  1129. SENbm = $01;
  1130. // SLPCTRL_SMODE
  1131. SMODEmask = $06;
  1132. SMODE_IDLE = $00;
  1133. SMODE_STDBY = $02;
  1134. SMODE_PDOWN = $04;
  1135. end;
  1136. TSPI = object //Serial Peripheral Interface
  1137. CTRLA: byte; //Control A
  1138. CTRLB: byte; //Control B
  1139. INTCTRL: byte; //Interrupt Control
  1140. INTFLAGS: byte; //Interrupt Flags
  1141. DATA: byte; //Data
  1142. const
  1143. // Enable Double Speed
  1144. CLK2Xbm = $10;
  1145. // Data Order Setting
  1146. DORDbm = $40;
  1147. // Enable Module
  1148. ENABLEbm = $01;
  1149. // Master Operation Enable
  1150. MASTERbm = $20;
  1151. // SPI_PRESC
  1152. PRESCmask = $06;
  1153. PRESC_DIV4 = $00;
  1154. PRESC_DIV16 = $02;
  1155. PRESC_DIV64 = $04;
  1156. PRESC_DIV128 = $06;
  1157. // Buffer Mode Enable
  1158. BUFENbm = $80;
  1159. // Buffer Write Mode
  1160. BUFWRbm = $40;
  1161. // SPI_MODE
  1162. MODEmask = $03;
  1163. MODE_0 = $00;
  1164. MODE_1 = $01;
  1165. MODE_2 = $02;
  1166. MODE_3 = $03;
  1167. // Slave Select Disable
  1168. SSDbm = $04;
  1169. // Data Register Empty Interrupt Enable
  1170. DREIEbm = $20;
  1171. // Interrupt Enable
  1172. IEbm = $01;
  1173. // Receive Complete Interrupt Enable
  1174. RXCIEbm = $80;
  1175. // Slave Select Trigger Interrupt Enable
  1176. SSIEbm = $10;
  1177. // Transfer Complete Interrupt Enable
  1178. TXCIEbm = $40;
  1179. // Buffer Overflow
  1180. BUFOVFbm = $01;
  1181. // Data Register Empty Interrupt Flag
  1182. DREIFbm = $20;
  1183. // Receive Complete Interrupt Flag
  1184. RXCIFbm = $80;
  1185. // Slave Select Trigger Interrupt Flag
  1186. SSIFbm = $10;
  1187. // Transfer Complete Interrupt Flag
  1188. TXCIFbm = $40;
  1189. // Interrupt Flag
  1190. IFbm = $80;
  1191. // Write Collision
  1192. WRCOLbm = $40;
  1193. end;
  1194. TSYSCFG = object //System Configuration Registers
  1195. Reserved0: byte;
  1196. REVID: byte; //Revision ID
  1197. EXTBRK: byte; //External Break
  1198. Reserved3: byte;
  1199. Reserved4: byte;
  1200. Reserved5: byte;
  1201. Reserved6: byte;
  1202. Reserved7: byte;
  1203. Reserved8: byte;
  1204. Reserved9: byte;
  1205. Reserved10: byte;
  1206. Reserved11: byte;
  1207. Reserved12: byte;
  1208. Reserved13: byte;
  1209. Reserved14: byte;
  1210. Reserved15: byte;
  1211. Reserved16: byte;
  1212. Reserved17: byte;
  1213. Reserved18: byte;
  1214. Reserved19: byte;
  1215. Reserved20: byte;
  1216. Reserved21: byte;
  1217. Reserved22: byte;
  1218. Reserved23: byte;
  1219. OCDM: byte; //OCD Message Register
  1220. OCDMS: byte; //OCD Message Status
  1221. const
  1222. // External break enable
  1223. ENEXTBRKbm = $01;
  1224. // OCD Message Read
  1225. OCDMRbm = $01;
  1226. end;
  1227. TTCA_SINGLE = object //16-bit Timer/Counter Type A - Single Mode
  1228. CTRLA: byte; //Control A
  1229. CTRLB: byte; //Control B
  1230. CTRLC: byte; //Control C
  1231. CTRLD: byte; //Control D
  1232. CTRLECLR: byte; //Control E Clear
  1233. CTRLESET: byte; //Control E Set
  1234. CTRLFCLR: byte; //Control F Clear
  1235. CTRLFSET: byte; //Control F Set
  1236. Reserved8: byte;
  1237. EVCTRL: byte; //Event Control
  1238. INTCTRL: byte; //Interrupt Control
  1239. INTFLAGS: byte; //Interrupt Flags
  1240. Reserved12: byte;
  1241. Reserved13: byte;
  1242. DBGCTRL: byte; //Degbug Control
  1243. TEMP: byte; //Temporary data for 16-bit Access
  1244. Reserved16: byte;
  1245. Reserved17: byte;
  1246. Reserved18: byte;
  1247. Reserved19: byte;
  1248. Reserved20: byte;
  1249. Reserved21: byte;
  1250. Reserved22: byte;
  1251. Reserved23: byte;
  1252. Reserved24: byte;
  1253. Reserved25: byte;
  1254. Reserved26: byte;
  1255. Reserved27: byte;
  1256. Reserved28: byte;
  1257. Reserved29: byte;
  1258. Reserved30: byte;
  1259. Reserved31: byte;
  1260. CNT: word; //Count
  1261. Reserved34: byte;
  1262. Reserved35: byte;
  1263. Reserved36: byte;
  1264. Reserved37: byte;
  1265. PER: word; //Period
  1266. CMP0: word; //Compare 0
  1267. CMP1: word; //Compare 1
  1268. CMP2: word; //Compare 2
  1269. Reserved46: byte;
  1270. Reserved47: byte;
  1271. Reserved48: byte;
  1272. Reserved49: byte;
  1273. Reserved50: byte;
  1274. Reserved51: byte;
  1275. Reserved52: byte;
  1276. Reserved53: byte;
  1277. PERBUF: word; //Period Buffer
  1278. CMP0BUF: word; //Compare 0 Buffer
  1279. CMP1BUF: word; //Compare 1 Buffer
  1280. CMP2BUF: word; //Compare 2 Buffer
  1281. const
  1282. // TCA_SINGLE_CLKSEL
  1283. SINGLE_CLKSELmask = $0E;
  1284. SINGLE_CLKSEL_DIV1 = $00;
  1285. SINGLE_CLKSEL_DIV2 = $02;
  1286. SINGLE_CLKSEL_DIV4 = $04;
  1287. SINGLE_CLKSEL_DIV8 = $06;
  1288. SINGLE_CLKSEL_DIV16 = $08;
  1289. SINGLE_CLKSEL_DIV64 = $0A;
  1290. SINGLE_CLKSEL_DIV256 = $0C;
  1291. SINGLE_CLKSEL_DIV1024 = $0E;
  1292. // Module Enable
  1293. ENABLEbm = $01;
  1294. // Auto Lock Update
  1295. ALUPDbm = $08;
  1296. // Compare 0 Enable
  1297. CMP0ENbm = $10;
  1298. // Compare 1 Enable
  1299. CMP1ENbm = $20;
  1300. // Compare 2 Enable
  1301. CMP2ENbm = $40;
  1302. // TCA_SINGLE_WGMODE
  1303. SINGLE_WGMODEmask = $07;
  1304. SINGLE_WGMODE_NORMAL = $00;
  1305. SINGLE_WGMODE_FRQ = $01;
  1306. SINGLE_WGMODE_SINGLESLOPE = $03;
  1307. SINGLE_WGMODE_DSTOP = $05;
  1308. SINGLE_WGMODE_DSBOTH = $06;
  1309. SINGLE_WGMODE_DSBOTTOM = $07;
  1310. // Compare 0 Waveform Output Value
  1311. CMP0OVbm = $01;
  1312. // Compare 1 Waveform Output Value
  1313. CMP1OVbm = $02;
  1314. // Compare 2 Waveform Output Value
  1315. CMP2OVbm = $04;
  1316. // Split Mode Enable
  1317. SPLITMbm = $01;
  1318. // TCA_SINGLE_CMD
  1319. SINGLE_CMDmask = $0C;
  1320. SINGLE_CMD_NONE = $00;
  1321. SINGLE_CMD_UPDATE = $04;
  1322. SINGLE_CMD_RESTART = $08;
  1323. SINGLE_CMD_RESET = $0C;
  1324. // Direction
  1325. DIRbm = $01;
  1326. // Lock Update
  1327. LUPDbm = $02;
  1328. // Compare 0 Buffer Valid
  1329. CMP0BVbm = $02;
  1330. // Compare 1 Buffer Valid
  1331. CMP1BVbm = $04;
  1332. // Compare 2 Buffer Valid
  1333. CMP2BVbm = $08;
  1334. // Period Buffer Valid
  1335. PERBVbm = $01;
  1336. // Debug Run
  1337. DBGRUNbm = $01;
  1338. // Count on Event Input
  1339. CNTEIbm = $01;
  1340. // TCA_SINGLE_EVACT
  1341. SINGLE_EVACTmask = $06;
  1342. SINGLE_EVACT_POSEDGE = $00;
  1343. SINGLE_EVACT_ANYEDGE = $02;
  1344. SINGLE_EVACT_HIGHLVL = $04;
  1345. SINGLE_EVACT_UPDOWN = $06;
  1346. // Compare 0 Interrupt
  1347. CMP0bm = $10;
  1348. // Compare 1 Interrupt
  1349. CMP1bm = $20;
  1350. // Compare 2 Interrupt
  1351. CMP2bm = $40;
  1352. // Overflow Interrupt
  1353. OVFbm = $01;
  1354. end;
  1355. TTCA_SPLIT = object //16-bit Timer/Counter Type A - Split Mode
  1356. CTRLA: byte; //Control A
  1357. CTRLB: byte; //Control B
  1358. CTRLC: byte; //Control C
  1359. CTRLD: byte; //Control D
  1360. CTRLECLR: byte; //Control E Clear
  1361. CTRLESET: byte; //Control E Set
  1362. Reserved6: byte;
  1363. Reserved7: byte;
  1364. Reserved8: byte;
  1365. Reserved9: byte;
  1366. INTCTRL: byte; //Interrupt Control
  1367. INTFLAGS: byte; //Interrupt Flags
  1368. Reserved12: byte;
  1369. Reserved13: byte;
  1370. DBGCTRL: byte; //Degbug Control
  1371. Reserved15: byte;
  1372. Reserved16: byte;
  1373. Reserved17: byte;
  1374. Reserved18: byte;
  1375. Reserved19: byte;
  1376. Reserved20: byte;
  1377. Reserved21: byte;
  1378. Reserved22: byte;
  1379. Reserved23: byte;
  1380. Reserved24: byte;
  1381. Reserved25: byte;
  1382. Reserved26: byte;
  1383. Reserved27: byte;
  1384. Reserved28: byte;
  1385. Reserved29: byte;
  1386. Reserved30: byte;
  1387. Reserved31: byte;
  1388. LCNT: byte; //Low Count
  1389. HCNT: byte; //High Count
  1390. Reserved34: byte;
  1391. Reserved35: byte;
  1392. Reserved36: byte;
  1393. Reserved37: byte;
  1394. LPER: byte; //Low Period
  1395. HPER: byte; //High Period
  1396. LCMP0: byte; //Low Compare
  1397. HCMP0: byte; //High Compare
  1398. LCMP1: byte; //Low Compare
  1399. HCMP1: byte; //High Compare
  1400. LCMP2: byte; //Low Compare
  1401. HCMP2: byte; //High Compare
  1402. const
  1403. // TCA_SPLIT_CLKSEL
  1404. SPLIT_CLKSELmask = $0E;
  1405. SPLIT_CLKSEL_DIV1 = $00;
  1406. SPLIT_CLKSEL_DIV2 = $02;
  1407. SPLIT_CLKSEL_DIV4 = $04;
  1408. SPLIT_CLKSEL_DIV8 = $06;
  1409. SPLIT_CLKSEL_DIV16 = $08;
  1410. SPLIT_CLKSEL_DIV64 = $0A;
  1411. SPLIT_CLKSEL_DIV256 = $0C;
  1412. SPLIT_CLKSEL_DIV1024 = $0E;
  1413. // Module Enable
  1414. ENABLEbm = $01;
  1415. // High Compare 0 Enable
  1416. HCMP0ENbm = $10;
  1417. // High Compare 1 Enable
  1418. HCMP1ENbm = $20;
  1419. // High Compare 2 Enable
  1420. HCMP2ENbm = $40;
  1421. // Low Compare 0 Enable
  1422. LCMP0ENbm = $01;
  1423. // Low Compare 1 Enable
  1424. LCMP1ENbm = $02;
  1425. // Low Compare 2 Enable
  1426. LCMP2ENbm = $04;
  1427. // High Compare 0 Output Value
  1428. HCMP0OVbm = $10;
  1429. // High Compare 1 Output Value
  1430. HCMP1OVbm = $20;
  1431. // High Compare 2 Output Value
  1432. HCMP2OVbm = $40;
  1433. // Low Compare 0 Output Value
  1434. LCMP0OVbm = $01;
  1435. // Low Compare 1 Output Value
  1436. LCMP1OVbm = $02;
  1437. // Low Compare 2 Output Value
  1438. LCMP2OVbm = $04;
  1439. // Split Mode Enable
  1440. SPLITMbm = $01;
  1441. // TCA_SPLIT_CMD
  1442. SPLIT_CMDmask = $0C;
  1443. SPLIT_CMD_NONE = $00;
  1444. SPLIT_CMD_UPDATE = $04;
  1445. SPLIT_CMD_RESTART = $08;
  1446. SPLIT_CMD_RESET = $0C;
  1447. // Debug Run
  1448. DBGRUNbm = $01;
  1449. // High Underflow Interrupt Enable
  1450. HUNFbm = $02;
  1451. // Low Compare 0 Interrupt Enable
  1452. LCMP0bm = $10;
  1453. // Low Compare 1 Interrupt Enable
  1454. LCMP1bm = $20;
  1455. // Low Compare 2 Interrupt Enable
  1456. LCMP2bm = $40;
  1457. // Low Underflow Interrupt Enable
  1458. LUNFbm = $01;
  1459. end;
  1460. TTCA = record //16-bit Timer/Counter Type A
  1461. case byte of
  1462. 0: (SINGLE: TTCA_SINGLE);
  1463. 1: (SPLIT: TTCA_SPLIT);
  1464. end;
  1465. TTCB = object //16-bit Timer Type B
  1466. CTRLA: byte; //Control A
  1467. CTRLB: byte; //Control Register B
  1468. Reserved2: byte;
  1469. Reserved3: byte;
  1470. EVCTRL: byte; //Event Control
  1471. INTCTRL: byte; //Interrupt Control
  1472. INTFLAGS: byte; //Interrupt Flags
  1473. STATUS: byte; //Status
  1474. DBGCTRL: byte; //Debug Control
  1475. TEMP: byte; //Temporary Value
  1476. CNT: word; //Count
  1477. CCMP: word; //Compare or Capture
  1478. const
  1479. // TCB_CLKSEL
  1480. CLKSELmask = $06;
  1481. CLKSEL_CLKDIV1 = $00;
  1482. CLKSEL_CLKDIV2 = $02;
  1483. CLKSEL_CLKTCA = $04;
  1484. // Enable
  1485. ENABLEbm = $01;
  1486. // Run Standby
  1487. RUNSTDBYbm = $40;
  1488. // Synchronize Update
  1489. SYNCUPDbm = $10;
  1490. // Asynchronous Enable
  1491. ASYNCbm = $40;
  1492. // Pin Output Enable
  1493. CCMPENbm = $10;
  1494. // Pin Initial State
  1495. CCMPINITbm = $20;
  1496. // TCB_CNTMODE
  1497. CNTMODEmask = $07;
  1498. CNTMODE_INT = $00;
  1499. CNTMODE_TIMEOUT = $01;
  1500. CNTMODE_CAPT = $02;
  1501. CNTMODE_FRQ = $03;
  1502. CNTMODE_PW = $04;
  1503. CNTMODE_FRQPW = $05;
  1504. CNTMODE_SINGLE = $06;
  1505. CNTMODE_PWM8 = $07;
  1506. // Debug Run
  1507. DBGRUNbm = $01;
  1508. // Event Input Enable
  1509. CAPTEIbm = $01;
  1510. // Event Edge
  1511. EDGEbm = $10;
  1512. // Input Capture Noise Cancellation Filter
  1513. FILTERbm = $40;
  1514. // Capture or Timeout
  1515. CAPTbm = $01;
  1516. // Run
  1517. RUNbm = $01;
  1518. end;
  1519. TTWI = object //Two-Wire Interface
  1520. CTRLA: byte; //Control A
  1521. DUALCTRL: byte; //Dual Control
  1522. DBGCTRL: byte; //Debug Control Register
  1523. MCTRLA: byte; //Master Control A
  1524. MCTRLB: byte; //Master Control B
  1525. MSTATUS: byte; //Master Status
  1526. MBAUD: byte; //Master Baurd Rate Control
  1527. MADDR: byte; //Master Address
  1528. MDATA: byte; //Master Data
  1529. SCTRLA: byte; //Slave Control A
  1530. SCTRLB: byte; //Slave Control B
  1531. SSTATUS: byte; //Slave Status
  1532. SADDR: byte; //Slave Address
  1533. SDATA: byte; //Slave Data
  1534. SADDRMASK: byte; //Slave Address Mask
  1535. const
  1536. // FM Plus Enable
  1537. FMPENbm = $02;
  1538. // TWI_DEFAULT_SDAHOLD
  1539. DEFAULT_SDAHOLDmask = $0C;
  1540. DEFAULT_SDAHOLD_OFF = $00;
  1541. DEFAULT_SDAHOLD_50NS = $04;
  1542. DEFAULT_SDAHOLD_300NS = $08;
  1543. DEFAULT_SDAHOLD_500NS = $0C;
  1544. // TWI_DEFAULT_SDASETUP
  1545. DEFAULT_SDASETUPmask = $10;
  1546. DEFAULT_SDASETUP_4CYC = $00;
  1547. DEFAULT_SDASETUP_8CYC = $10;
  1548. // Debug Run
  1549. DBGRUNbm = $01;
  1550. // Dual Control Enable
  1551. ENABLEbm = $01;
  1552. // Quick Command Enable
  1553. QCENbm = $10;
  1554. // Read Interrupt Enable
  1555. RIENbm = $80;
  1556. // Smart Mode Enable
  1557. SMENbm = $02;
  1558. // TWI_TIMEOUT
  1559. TIMEOUTmask = $0C;
  1560. TIMEOUT_DISABLED = $00;
  1561. TIMEOUT_50US = $04;
  1562. TIMEOUT_100US = $08;
  1563. TIMEOUT_200US = $0C;
  1564. // Write Interrupt Enable
  1565. WIENbm = $40;
  1566. // TWI_ACKACT
  1567. ACKACTmask = $04;
  1568. ACKACT_ACK = $00;
  1569. ACKACT_NACK = $04;
  1570. // Flush
  1571. FLUSHbm = $08;
  1572. // TWI_MCMD
  1573. MCMDmask = $03;
  1574. MCMD_NOACT = $00;
  1575. MCMD_REPSTART = $01;
  1576. MCMD_RECVTRANS = $02;
  1577. MCMD_STOP = $03;
  1578. // Arbitration Lost
  1579. ARBLOSTbm = $08;
  1580. // Bus Error
  1581. BUSERRbm = $04;
  1582. // TWI_BUSSTATE
  1583. BUSSTATEmask = $03;
  1584. BUSSTATE_UNKNOWN = $00;
  1585. BUSSTATE_IDLE = $01;
  1586. BUSSTATE_OWNER = $02;
  1587. BUSSTATE_BUSY = $03;
  1588. // Clock Hold
  1589. CLKHOLDbm = $20;
  1590. // Read Interrupt Flag
  1591. RIFbm = $80;
  1592. // Received Acknowledge
  1593. RXACKbm = $10;
  1594. // Write Interrupt Flag
  1595. WIFbm = $40;
  1596. // Address Enable
  1597. ADDRENbm = $01;
  1598. // Address Mask
  1599. ADDRMASK0bm = $02;
  1600. ADDRMASK1bm = $04;
  1601. ADDRMASK2bm = $08;
  1602. ADDRMASK3bm = $10;
  1603. ADDRMASK4bm = $20;
  1604. ADDRMASK5bm = $40;
  1605. ADDRMASK6bm = $80;
  1606. // Address/Stop Interrupt Enable
  1607. APIENbm = $40;
  1608. // Data Interrupt Enable
  1609. DIENbm = $80;
  1610. // Stop Interrupt Enable
  1611. PIENbm = $20;
  1612. // Promiscuous Mode Enable
  1613. PMENbm = $04;
  1614. // TWI_SCMD
  1615. SCMDmask = $03;
  1616. SCMD_NOACT = $00;
  1617. SCMD_COMPTRANS = $02;
  1618. SCMD_RESPONSE = $03;
  1619. // TWI_AP
  1620. APmask = $01;
  1621. AP_STOP = $00;
  1622. AP_ADR = $01;
  1623. // Address/Stop Interrupt Flag
  1624. APIFbm = $40;
  1625. // Collision
  1626. COLLbm = $08;
  1627. // Data Interrupt Flag
  1628. DIFbm = $80;
  1629. // Read/Write Direction
  1630. DIRbm = $02;
  1631. end;
  1632. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1633. RXDATAL: byte; //Receive Data Low Byte
  1634. RXDATAH: byte; //Receive Data High Byte
  1635. TXDATAL: byte; //Transmit Data Low Byte
  1636. TXDATAH: byte; //Transmit Data High Byte
  1637. STATUS: byte; //Status
  1638. CTRLA: byte; //Control A
  1639. CTRLB: byte; //Control B
  1640. CTRLC: byte; //Control C
  1641. BAUD: word; //Baud Rate
  1642. CTRLD: byte; //Control D
  1643. DBGCTRL: byte; //Debug Control
  1644. EVCTRL: byte; //Event Control
  1645. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1646. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1647. const
  1648. // Auto-baud Error Interrupt Enable
  1649. ABEIEbm = $04;
  1650. // Data Register Empty Interrupt Enable
  1651. DREIEbm = $20;
  1652. // Loop-back Mode Enable
  1653. LBMEbm = $08;
  1654. // USART_RS485
  1655. RS485mask = $03;
  1656. RS485_OFF = $00;
  1657. RS485_EXT = $01;
  1658. RS485_INT = $02;
  1659. // Receive Complete Interrupt Enable
  1660. RXCIEbm = $80;
  1661. // Receiver Start Frame Interrupt Enable
  1662. RXSIEbm = $10;
  1663. // Transmit Complete Interrupt Enable
  1664. TXCIEbm = $40;
  1665. // Multi-processor Communication Mode
  1666. MPCMbm = $01;
  1667. // Open Drain Mode Enable
  1668. ODMEbm = $08;
  1669. // Reciever enable
  1670. RXENbm = $80;
  1671. // USART_RXMODE
  1672. RXMODEmask = $06;
  1673. RXMODE_NORMAL = $00;
  1674. RXMODE_CLK2X = $02;
  1675. RXMODE_GENAUTO = $04;
  1676. RXMODE_LINAUTO = $06;
  1677. // Start Frame Detection Enable
  1678. SFDENbm = $10;
  1679. // Transmitter Enable
  1680. TXENbm = $40;
  1681. // USART_MSPI_CMODE
  1682. MSPI_CMODEmask = $C0;
  1683. MSPI_CMODE_ASYNCHRONOUS = $00;
  1684. MSPI_CMODE_SYNCHRONOUS = $40;
  1685. MSPI_CMODE_IRCOM = $80;
  1686. MSPI_CMODE_MSPI = $C0;
  1687. // SPI Master Mode, Clock Phase
  1688. UCPHAbm = $02;
  1689. // SPI Master Mode, Data Order
  1690. UDORDbm = $04;
  1691. // USART_NORMAL_CHSIZE
  1692. NORMAL_CHSIZEmask = $07;
  1693. NORMAL_CHSIZE_5BIT = $00;
  1694. NORMAL_CHSIZE_6BIT = $01;
  1695. NORMAL_CHSIZE_7BIT = $02;
  1696. NORMAL_CHSIZE_8BIT = $03;
  1697. NORMAL_CHSIZE_9BITL = $06;
  1698. NORMAL_CHSIZE_9BITH = $07;
  1699. // USART_NORMAL_CMODE
  1700. NORMAL_CMODEmask = $C0;
  1701. NORMAL_CMODE_ASYNCHRONOUS = $00;
  1702. NORMAL_CMODE_SYNCHRONOUS = $40;
  1703. NORMAL_CMODE_IRCOM = $80;
  1704. NORMAL_CMODE_MSPI = $C0;
  1705. // USART_NORMAL_PMODE
  1706. NORMAL_PMODEmask = $30;
  1707. NORMAL_PMODE_DISABLED = $00;
  1708. NORMAL_PMODE_EVEN = $20;
  1709. NORMAL_PMODE_ODD = $30;
  1710. // USART_NORMAL_SBMODE
  1711. NORMAL_SBMODEmask = $08;
  1712. NORMAL_SBMODE_1BIT = $00;
  1713. NORMAL_SBMODE_2BIT = $08;
  1714. // USART_ABW
  1715. ABWmask = $C0;
  1716. ABW_WDW0 = $00;
  1717. ABW_WDW1 = $40;
  1718. ABW_WDW2 = $80;
  1719. ABW_WDW3 = $C0;
  1720. // Autobaud majority voter bypass
  1721. ABMBPbm = $80;
  1722. // Debug Run
  1723. DBGRUNbm = $01;
  1724. // IrDA Event Input Enable
  1725. IREIbm = $01;
  1726. // Buffer Overflow
  1727. BUFOVFbm = $40;
  1728. // Receiver Data Register
  1729. DATA8bm = $01;
  1730. // Frame Error
  1731. FERRbm = $04;
  1732. // Parity Error
  1733. PERRbm = $02;
  1734. // Receive Complete Interrupt Flag
  1735. RXCIFbm = $80;
  1736. // RX Data
  1737. DATA0bm = $01;
  1738. DATA1bm = $02;
  1739. DATA2bm = $04;
  1740. DATA3bm = $08;
  1741. DATA4bm = $10;
  1742. DATA5bm = $20;
  1743. DATA6bm = $40;
  1744. DATA7bm = $80;
  1745. // Receiver Pulse Lenght
  1746. RXPL0bm = $01;
  1747. RXPL1bm = $02;
  1748. RXPL2bm = $04;
  1749. RXPL3bm = $08;
  1750. RXPL4bm = $10;
  1751. RXPL5bm = $20;
  1752. RXPL6bm = $40;
  1753. // Break Detected Flag
  1754. BDFbm = $02;
  1755. // Data Register Empty Flag
  1756. DREIFbm = $20;
  1757. // Inconsistent Sync Field Interrupt Flag
  1758. ISFIFbm = $08;
  1759. // Receive Start Interrupt
  1760. RXSIFbm = $10;
  1761. // Transmit Interrupt Flag
  1762. TXCIFbm = $40;
  1763. // Wait For Break
  1764. WFBbm = $01;
  1765. // Transmit pulse length
  1766. TXPL0bm = $01;
  1767. TXPL1bm = $02;
  1768. TXPL2bm = $04;
  1769. TXPL3bm = $08;
  1770. TXPL4bm = $10;
  1771. TXPL5bm = $20;
  1772. TXPL6bm = $40;
  1773. TXPL7bm = $80;
  1774. end;
  1775. TUSERROW = object //User Row
  1776. USERROW0: byte; //User Row Byte 0
  1777. USERROW1: byte; //User Row Byte 1
  1778. USERROW2: byte; //User Row Byte 2
  1779. USERROW3: byte; //User Row Byte 3
  1780. USERROW4: byte; //User Row Byte 4
  1781. USERROW5: byte; //User Row Byte 5
  1782. USERROW6: byte; //User Row Byte 6
  1783. USERROW7: byte; //User Row Byte 7
  1784. USERROW8: byte; //User Row Byte 8
  1785. USERROW9: byte; //User Row Byte 9
  1786. USERROW10: byte; //User Row Byte 10
  1787. USERROW11: byte; //User Row Byte 11
  1788. USERROW12: byte; //User Row Byte 12
  1789. USERROW13: byte; //User Row Byte 13
  1790. USERROW14: byte; //User Row Byte 14
  1791. USERROW15: byte; //User Row Byte 15
  1792. USERROW16: byte; //User Row Byte 16
  1793. USERROW17: byte; //User Row Byte 17
  1794. USERROW18: byte; //User Row Byte 18
  1795. USERROW19: byte; //User Row Byte 19
  1796. USERROW20: byte; //User Row Byte 20
  1797. USERROW21: byte; //User Row Byte 21
  1798. USERROW22: byte; //User Row Byte 22
  1799. USERROW23: byte; //User Row Byte 23
  1800. USERROW24: byte; //User Row Byte 24
  1801. USERROW25: byte; //User Row Byte 25
  1802. USERROW26: byte; //User Row Byte 26
  1803. USERROW27: byte; //User Row Byte 27
  1804. USERROW28: byte; //User Row Byte 28
  1805. USERROW29: byte; //User Row Byte 29
  1806. USERROW30: byte; //User Row Byte 30
  1807. USERROW31: byte; //User Row Byte 31
  1808. USERROW32: byte; //User Row Byte 32
  1809. USERROW33: byte; //User Row Byte 33
  1810. USERROW34: byte; //User Row Byte 34
  1811. USERROW35: byte; //User Row Byte 35
  1812. USERROW36: byte; //User Row Byte 36
  1813. USERROW37: byte; //User Row Byte 37
  1814. USERROW38: byte; //User Row Byte 38
  1815. USERROW39: byte; //User Row Byte 39
  1816. USERROW40: byte; //User Row Byte 40
  1817. USERROW41: byte; //User Row Byte 41
  1818. USERROW42: byte; //User Row Byte 42
  1819. USERROW43: byte; //User Row Byte 43
  1820. USERROW44: byte; //User Row Byte 44
  1821. USERROW45: byte; //User Row Byte 45
  1822. USERROW46: byte; //User Row Byte 46
  1823. USERROW47: byte; //User Row Byte 47
  1824. USERROW48: byte; //User Row Byte 48
  1825. USERROW49: byte; //User Row Byte 49
  1826. USERROW50: byte; //User Row Byte 50
  1827. USERROW51: byte; //User Row Byte 51
  1828. USERROW52: byte; //User Row Byte 52
  1829. USERROW53: byte; //User Row Byte 53
  1830. USERROW54: byte; //User Row Byte 54
  1831. USERROW55: byte; //User Row Byte 55
  1832. USERROW56: byte; //User Row Byte 56
  1833. USERROW57: byte; //User Row Byte 57
  1834. USERROW58: byte; //User Row Byte 58
  1835. USERROW59: byte; //User Row Byte 59
  1836. USERROW60: byte; //User Row Byte 60
  1837. USERROW61: byte; //User Row Byte 61
  1838. USERROW62: byte; //User Row Byte 62
  1839. USERROW63: byte; //User Row Byte 63
  1840. end;
  1841. TVPORT = object //Virtual Ports
  1842. DIR: byte; //Data Direction
  1843. OUT_: byte; //Output Value
  1844. IN_: byte; //Input Value
  1845. INTFLAGS: byte; //Interrupt Flags
  1846. const
  1847. // Pin Interrupt
  1848. INT0bm = $01;
  1849. INT1bm = $02;
  1850. INT2bm = $04;
  1851. INT3bm = $08;
  1852. INT4bm = $10;
  1853. INT5bm = $20;
  1854. INT6bm = $40;
  1855. INT7bm = $80;
  1856. end;
  1857. TVREF = object //Voltage reference
  1858. CTRLA: byte; //Control A
  1859. CTRLB: byte; //Control B
  1860. const
  1861. // VREF_AC0REFSEL
  1862. AC0REFSELmask = $07;
  1863. AC0REFSEL_0V55 = $00;
  1864. AC0REFSEL_1V1 = $01;
  1865. AC0REFSEL_2V5 = $02;
  1866. AC0REFSEL_4V34 = $03;
  1867. AC0REFSEL_1V5 = $04;
  1868. AC0REFSEL_AVDD = $07;
  1869. // VREF_ADC0REFSEL
  1870. ADC0REFSELmask = $70;
  1871. ADC0REFSEL_0V55 = $00;
  1872. ADC0REFSEL_1V1 = $10;
  1873. ADC0REFSEL_2V5 = $20;
  1874. ADC0REFSEL_4V34 = $30;
  1875. ADC0REFSEL_1V5 = $40;
  1876. // AC0 DACREF reference enable
  1877. AC0REFENbm = $01;
  1878. // ADC0 reference enable
  1879. ADC0REFENbm = $02;
  1880. end;
  1881. TWDT = object //Watch-Dog Timer
  1882. CTRLA: byte; //Control A
  1883. STATUS: byte; //Status
  1884. const
  1885. // WDT_PERIOD
  1886. PERIODmask = $0F;
  1887. PERIOD_OFF = $00;
  1888. PERIOD_8CLK = $01;
  1889. PERIOD_16CLK = $02;
  1890. PERIOD_32CLK = $03;
  1891. PERIOD_64CLK = $04;
  1892. PERIOD_128CLK = $05;
  1893. PERIOD_256CLK = $06;
  1894. PERIOD_512CLK = $07;
  1895. PERIOD_1KCLK = $08;
  1896. PERIOD_2KCLK = $09;
  1897. PERIOD_4KCLK = $0A;
  1898. PERIOD_8KCLK = $0B;
  1899. // WDT_WINDOW
  1900. WINDOWmask = $F0;
  1901. WINDOW_OFF = $00;
  1902. WINDOW_8CLK = $10;
  1903. WINDOW_16CLK = $20;
  1904. WINDOW_32CLK = $30;
  1905. WINDOW_64CLK = $40;
  1906. WINDOW_128CLK = $50;
  1907. WINDOW_256CLK = $60;
  1908. WINDOW_512CLK = $70;
  1909. WINDOW_1KCLK = $80;
  1910. WINDOW_2KCLK = $90;
  1911. WINDOW_4KCLK = $A0;
  1912. WINDOW_8KCLK = $B0;
  1913. // Lock enable
  1914. LOCKbm = $80;
  1915. // Syncronization busy
  1916. SYNCBUSYbm = $01;
  1917. end;
  1918. const
  1919. Pin0idx = 0; Pin0bm = 1;
  1920. Pin1idx = 1; Pin1bm = 2;
  1921. Pin2idx = 2; Pin2bm = 4;
  1922. Pin3idx = 3; Pin3bm = 8;
  1923. Pin4idx = 4; Pin4bm = 16;
  1924. Pin5idx = 5; Pin5bm = 32;
  1925. Pin6idx = 6; Pin6bm = 64;
  1926. Pin7idx = 7; Pin7bm = 128;
  1927. var
  1928. VPORTA: TVPORT absolute $0000;
  1929. VPORTB: TVPORT absolute $0004;
  1930. VPORTC: TVPORT absolute $0008;
  1931. VPORTD: TVPORT absolute $000C;
  1932. VPORTE: TVPORT absolute $0010;
  1933. VPORTF: TVPORT absolute $0014;
  1934. GPIO: TGPIO absolute $001C;
  1935. CPU: TCPU absolute $0030;
  1936. RSTCTRL: TRSTCTRL absolute $0040;
  1937. SLPCTRL: TSLPCTRL absolute $0050;
  1938. CLKCTRL: TCLKCTRL absolute $0060;
  1939. BOD: TBOD absolute $0080;
  1940. VREF: TVREF absolute $00A0;
  1941. WDT: TWDT absolute $0100;
  1942. CPUINT: TCPUINT absolute $0110;
  1943. CRCSCAN: TCRCSCAN absolute $0120;
  1944. RTC: TRTC absolute $0140;
  1945. EVSYS: TEVSYS absolute $0180;
  1946. CCL: TCCL absolute $01C0;
  1947. PORTA: TPORT absolute $0400;
  1948. PORTB: TPORT absolute $0420;
  1949. PORTC: TPORT absolute $0440;
  1950. PORTD: TPORT absolute $0460;
  1951. PORTE: TPORT absolute $0480;
  1952. PORTF: TPORT absolute $04A0;
  1953. PORTMUX: TPORTMUX absolute $05E0;
  1954. ADC0: TADC absolute $0600;
  1955. AC0: TAC absolute $0680;
  1956. USART0: TUSART absolute $0800;
  1957. USART1: TUSART absolute $0820;
  1958. USART2: TUSART absolute $0840;
  1959. USART3: TUSART absolute $0860;
  1960. TWI0: TTWI absolute $08A0;
  1961. SPI0: TSPI absolute $08C0;
  1962. TCA0: TTCA absolute $0A00;
  1963. TCB0: TTCB absolute $0A80;
  1964. TCB1: TTCB absolute $0A90;
  1965. TCB2: TTCB absolute $0AA0;
  1966. TCB3: TTCB absolute $0AB0;
  1967. SYSCFG: TSYSCFG absolute $0F00;
  1968. NVMCTRL: TNVMCTRL absolute $1000;
  1969. SIGROW: TSIGROW absolute $1100;
  1970. FUSE: TFUSE absolute $1280;
  1971. LOCKBIT: TLOCKBIT absolute $128A;
  1972. USERROW: TUSERROW absolute $1300;
  1973. implementation
  1974. {$define RELBRANCHES}
  1975. {$i avrcommon.inc}
  1976. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  1977. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  1978. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 3
  1979. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 4
  1980. procedure CCL_CCL_ISR; external name 'CCL_CCL_ISR'; // Interrupt 5
  1981. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 6
  1982. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 7
  1983. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 7
  1984. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 8
  1985. procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 9
  1986. //procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 9
  1987. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 10
  1988. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 10
  1989. procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 11
  1990. //procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 11
  1991. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 12
  1992. procedure TCB1_INT_ISR; external name 'TCB1_INT_ISR'; // Interrupt 13
  1993. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 14
  1994. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 15
  1995. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 16
  1996. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 17
  1997. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 18
  1998. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 19
  1999. procedure PORTD_PORT_ISR; external name 'PORTD_PORT_ISR'; // Interrupt 20
  2000. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 21
  2001. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 22
  2002. procedure ADC0_WCOMP_ISR; external name 'ADC0_WCOMP_ISR'; // Interrupt 23
  2003. procedure PORTC_PORT_ISR; external name 'PORTC_PORT_ISR'; // Interrupt 24
  2004. procedure TCB2_INT_ISR; external name 'TCB2_INT_ISR'; // Interrupt 25
  2005. procedure USART1_RXC_ISR; external name 'USART1_RXC_ISR'; // Interrupt 26
  2006. procedure USART1_DRE_ISR; external name 'USART1_DRE_ISR'; // Interrupt 27
  2007. procedure USART1_TXC_ISR; external name 'USART1_TXC_ISR'; // Interrupt 28
  2008. procedure PORTF_PORT_ISR; external name 'PORTF_PORT_ISR'; // Interrupt 29
  2009. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 30
  2010. procedure USART2_RXC_ISR; external name 'USART2_RXC_ISR'; // Interrupt 31
  2011. procedure USART2_DRE_ISR; external name 'USART2_DRE_ISR'; // Interrupt 32
  2012. procedure USART2_TXC_ISR; external name 'USART2_TXC_ISR'; // Interrupt 33
  2013. procedure PORTB_PORT_ISR; external name 'PORTB_PORT_ISR'; // Interrupt 34
  2014. procedure PORTE_PORT_ISR; external name 'PORTE_PORT_ISR'; // Interrupt 35
  2015. procedure TCB3_INT_ISR; external name 'TCB3_INT_ISR'; // Interrupt 36
  2016. procedure USART3_RXC_ISR; external name 'USART3_RXC_ISR'; // Interrupt 37
  2017. procedure USART3_DRE_ISR; external name 'USART3_DRE_ISR'; // Interrupt 38
  2018. procedure USART3_TXC_ISR; external name 'USART3_TXC_ISR'; // Interrupt 39
  2019. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  2020. asm
  2021. rjmp __dtors_end
  2022. rjmp CRCSCAN_NMI_ISR
  2023. rjmp BOD_VLM_ISR
  2024. rjmp RTC_CNT_ISR
  2025. rjmp RTC_PIT_ISR
  2026. rjmp CCL_CCL_ISR
  2027. rjmp PORTA_PORT_ISR
  2028. rjmp TCA0_LUNF_ISR
  2029. // rjmp TCA0_OVF_ISR
  2030. rjmp TCA0_HUNF_ISR
  2031. rjmp TCA0_LCMP0_ISR
  2032. // rjmp TCA0_CMP0_ISR
  2033. rjmp TCA0_CMP1_ISR
  2034. // rjmp TCA0_LCMP1_ISR
  2035. rjmp TCA0_LCMP2_ISR
  2036. // rjmp TCA0_CMP2_ISR
  2037. rjmp TCB0_INT_ISR
  2038. rjmp TCB1_INT_ISR
  2039. rjmp TWI0_TWIS_ISR
  2040. rjmp TWI0_TWIM_ISR
  2041. rjmp SPI0_INT_ISR
  2042. rjmp USART0_RXC_ISR
  2043. rjmp USART0_DRE_ISR
  2044. rjmp USART0_TXC_ISR
  2045. rjmp PORTD_PORT_ISR
  2046. rjmp AC0_AC_ISR
  2047. rjmp ADC0_RESRDY_ISR
  2048. rjmp ADC0_WCOMP_ISR
  2049. rjmp PORTC_PORT_ISR
  2050. rjmp TCB2_INT_ISR
  2051. rjmp USART1_RXC_ISR
  2052. rjmp USART1_DRE_ISR
  2053. rjmp USART1_TXC_ISR
  2054. rjmp PORTF_PORT_ISR
  2055. rjmp NVMCTRL_EE_ISR
  2056. rjmp USART2_RXC_ISR
  2057. rjmp USART2_DRE_ISR
  2058. rjmp USART2_TXC_ISR
  2059. rjmp PORTB_PORT_ISR
  2060. rjmp PORTE_PORT_ISR
  2061. rjmp TCB3_INT_ISR
  2062. rjmp USART3_RXC_ISR
  2063. rjmp USART3_DRE_ISR
  2064. rjmp USART3_TXC_ISR
  2065. .weak CRCSCAN_NMI_ISR
  2066. .weak BOD_VLM_ISR
  2067. .weak RTC_CNT_ISR
  2068. .weak RTC_PIT_ISR
  2069. .weak CCL_CCL_ISR
  2070. .weak PORTA_PORT_ISR
  2071. .weak TCA0_LUNF_ISR
  2072. // .weak TCA0_OVF_ISR
  2073. .weak TCA0_HUNF_ISR
  2074. .weak TCA0_LCMP0_ISR
  2075. // .weak TCA0_CMP0_ISR
  2076. .weak TCA0_CMP1_ISR
  2077. // .weak TCA0_LCMP1_ISR
  2078. .weak TCA0_LCMP2_ISR
  2079. // .weak TCA0_CMP2_ISR
  2080. .weak TCB0_INT_ISR
  2081. .weak TCB1_INT_ISR
  2082. .weak TWI0_TWIS_ISR
  2083. .weak TWI0_TWIM_ISR
  2084. .weak SPI0_INT_ISR
  2085. .weak USART0_RXC_ISR
  2086. .weak USART0_DRE_ISR
  2087. .weak USART0_TXC_ISR
  2088. .weak PORTD_PORT_ISR
  2089. .weak AC0_AC_ISR
  2090. .weak ADC0_RESRDY_ISR
  2091. .weak ADC0_WCOMP_ISR
  2092. .weak PORTC_PORT_ISR
  2093. .weak TCB2_INT_ISR
  2094. .weak USART1_RXC_ISR
  2095. .weak USART1_DRE_ISR
  2096. .weak USART1_TXC_ISR
  2097. .weak PORTF_PORT_ISR
  2098. .weak NVMCTRL_EE_ISR
  2099. .weak USART2_RXC_ISR
  2100. .weak USART2_DRE_ISR
  2101. .weak USART2_TXC_ISR
  2102. .weak PORTB_PORT_ISR
  2103. .weak PORTE_PORT_ISR
  2104. .weak TCB3_INT_ISR
  2105. .weak USART3_RXC_ISR
  2106. .weak USART3_DRE_ISR
  2107. .weak USART3_TXC_ISR
  2108. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  2109. .set BOD_VLM_ISR, Default_IRQ_handler
  2110. .set RTC_CNT_ISR, Default_IRQ_handler
  2111. .set RTC_PIT_ISR, Default_IRQ_handler
  2112. .set CCL_CCL_ISR, Default_IRQ_handler
  2113. .set PORTA_PORT_ISR, Default_IRQ_handler
  2114. .set TCA0_LUNF_ISR, Default_IRQ_handler
  2115. // .set TCA0_OVF_ISR, Default_IRQ_handler
  2116. .set TCA0_HUNF_ISR, Default_IRQ_handler
  2117. .set TCA0_LCMP0_ISR, Default_IRQ_handler
  2118. // .set TCA0_CMP0_ISR, Default_IRQ_handler
  2119. .set TCA0_CMP1_ISR, Default_IRQ_handler
  2120. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  2121. .set TCA0_LCMP2_ISR, Default_IRQ_handler
  2122. // .set TCA0_CMP2_ISR, Default_IRQ_handler
  2123. .set TCB0_INT_ISR, Default_IRQ_handler
  2124. .set TCB1_INT_ISR, Default_IRQ_handler
  2125. .set TWI0_TWIS_ISR, Default_IRQ_handler
  2126. .set TWI0_TWIM_ISR, Default_IRQ_handler
  2127. .set SPI0_INT_ISR, Default_IRQ_handler
  2128. .set USART0_RXC_ISR, Default_IRQ_handler
  2129. .set USART0_DRE_ISR, Default_IRQ_handler
  2130. .set USART0_TXC_ISR, Default_IRQ_handler
  2131. .set PORTD_PORT_ISR, Default_IRQ_handler
  2132. .set AC0_AC_ISR, Default_IRQ_handler
  2133. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  2134. .set ADC0_WCOMP_ISR, Default_IRQ_handler
  2135. .set PORTC_PORT_ISR, Default_IRQ_handler
  2136. .set TCB2_INT_ISR, Default_IRQ_handler
  2137. .set USART1_RXC_ISR, Default_IRQ_handler
  2138. .set USART1_DRE_ISR, Default_IRQ_handler
  2139. .set USART1_TXC_ISR, Default_IRQ_handler
  2140. .set PORTF_PORT_ISR, Default_IRQ_handler
  2141. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  2142. .set USART2_RXC_ISR, Default_IRQ_handler
  2143. .set USART2_DRE_ISR, Default_IRQ_handler
  2144. .set USART2_TXC_ISR, Default_IRQ_handler
  2145. .set PORTB_PORT_ISR, Default_IRQ_handler
  2146. .set PORTE_PORT_ISR, Default_IRQ_handler
  2147. .set TCB3_INT_ISR, Default_IRQ_handler
  2148. .set USART3_RXC_ISR, Default_IRQ_handler
  2149. .set USART3_DRE_ISR, Default_IRQ_handler
  2150. .set USART3_TXC_ISR, Default_IRQ_handler
  2151. end;
  2152. end.