attiny12.pp 3.8 KB

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  1. unit ATtiny12;
  2. interface
  3. var
  4. ACSR: byte absolute $08; // Analog Comparator Control And Status Register
  5. PINB: byte absolute $16; // Input Pins, Port B
  6. DDRB: byte absolute $17; // Data Direction Register, Port B
  7. PORTB: byte absolute $18; // Data Register, Port B
  8. EECR: byte absolute $1C; // EEPROM Control Register
  9. EEDR: byte absolute $1D; // EEPROM Data Register
  10. EEAR: byte absolute $1E; // EEPROM Read/Write Access
  11. WDTCR: byte absolute $21; // Watchdog Timer Control Register
  12. OSCCAL: byte absolute $31; // Status Register
  13. TCNT0: byte absolute $32; // Timer Counter 0
  14. TCCR0: byte absolute $33; // Timer/Counter0 Control Register
  15. MCUSR: byte absolute $34; // MCU Status register
  16. MCUCR: byte absolute $35; // MCU Control Register
  17. TIFR: byte absolute $38; // Timer/Counter Interrupt Flag register
  18. TIMSK: byte absolute $39; // Timer/Counter Interrupt Mask Register
  19. GIFR: byte absolute $3A; // General Interrupt Flag register
  20. GIMSK: byte absolute $3B; // General Interrupt Mask Register
  21. SREG: byte absolute $3F; // Status Register
  22. const
  23. // Analog Comparator Control And Status Register
  24. ACIS0 = $00; // Analog Comparator Interrupt Mode Select bits
  25. ACIS1 = $01; // Analog Comparator Interrupt Mode Select bits
  26. ACIE = $03;
  27. ACI = $04;
  28. ACO = $05;
  29. AINBG = $06;
  30. ACD = $07;
  31. // Data Register, Port B
  32. PB0 = $00;
  33. PB1 = $01;
  34. PB2 = $02;
  35. PB3 = $03;
  36. PB4 = $04;
  37. // EEPROM Control Register
  38. EERE = $00;
  39. EEWE = $01;
  40. EEMWE = $02;
  41. EERIE = $03;
  42. // Watchdog Timer Control Register
  43. WDP0 = $00; // Watch Dog Timer Prescaler bits
  44. WDP1 = $01; // Watch Dog Timer Prescaler bits
  45. WDP2 = $02; // Watch Dog Timer Prescaler bits
  46. WDE = $03;
  47. WDTOE = $04;
  48. // Status Register
  49. OSCCAL0 = $00; // Oscillator Calibration
  50. OSCCAL1 = $01; // Oscillator Calibration
  51. OSCCAL2 = $02; // Oscillator Calibration
  52. OSCCAL3 = $03; // Oscillator Calibration
  53. OSCCAL4 = $04; // Oscillator Calibration
  54. OSCCAL5 = $05; // Oscillator Calibration
  55. OSCCAL6 = $06; // Oscillator Calibration
  56. OSCCAL7 = $07; // Oscillator Calibration
  57. // Timer/Counter0 Control Register
  58. CS00 = $00;
  59. CS01 = $01;
  60. CS02 = $02;
  61. // MCU Status register
  62. PORF = $00;
  63. EXTRF = $01;
  64. BORF = $02;
  65. WDRF = $03;
  66. // MCU Control Register
  67. ISC00 = $00; // Interrupt Sense Control 0 bits
  68. ISC01 = $01; // Interrupt Sense Control 0 bits
  69. SM = $04;
  70. SE = $05;
  71. PUD = $06;
  72. // Timer/Counter Interrupt Flag register
  73. TOV0 = $01;
  74. // Timer/Counter Interrupt Mask Register
  75. TOIE0 = $01;
  76. // General Interrupt Flag register
  77. PCIF = $05;
  78. INTF0 = $06;
  79. // General Interrupt Mask Register
  80. PCIE = $05;
  81. INT0 = $06;
  82. // Status Register
  83. C = $00;
  84. Z = $01;
  85. N = $02;
  86. V = $03;
  87. S = $04;
  88. H = $05;
  89. T = $06;
  90. I = $07;
  91. implementation
  92. {$define RELBRANCHES}
  93. {$i avrcommon.inc}
  94. procedure INT0_ISR; external name 'INT0_ISR'; // Interrupt 1 External Interrupt 0
  95. procedure IO_PINS_ISR; external name 'IO_PINS_ISR'; // Interrupt 2 External Interrupt Request 0
  96. procedure TIMER0_OVF_ISR; external name 'TIMER0_OVF_ISR'; // Interrupt 3 Timer/Counter0 Overflow
  97. procedure EE_RDY_ISR; external name 'EE_RDY_ISR'; // Interrupt 4 EEPROM Ready
  98. procedure ANA_COMP_ISR; external name 'ANA_COMP_ISR'; // Interrupt 5 Analog Comparator
  99. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  100. asm
  101. rjmp __dtors_end
  102. rjmp INT0_ISR
  103. rjmp IO_PINS_ISR
  104. rjmp TIMER0_OVF_ISR
  105. rjmp EE_RDY_ISR
  106. rjmp ANA_COMP_ISR
  107. .weak INT0_ISR
  108. .weak IO_PINS_ISR
  109. .weak TIMER0_OVF_ISR
  110. .weak EE_RDY_ISR
  111. .weak ANA_COMP_ISR
  112. .set INT0_ISR, Default_IRQ_handler
  113. .set IO_PINS_ISR, Default_IRQ_handler
  114. .set TIMER0_OVF_ISR, Default_IRQ_handler
  115. .set EE_RDY_ISR, Default_IRQ_handler
  116. .set ANA_COMP_ISR, Default_IRQ_handler
  117. end;
  118. end.