attiny202.pp 51 KB

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  1. unit ATtiny202;
  2. interface
  3. type
  4. TAC = object //Analog Comparator
  5. CTRLA: byte; //Control A
  6. Reserved1: byte;
  7. MUXCTRLA: byte; //Mux Control A
  8. Reserved3: byte;
  9. Reserved4: byte;
  10. Reserved5: byte;
  11. INTCTRL: byte; //Interrupt Control
  12. STATUS: byte; //Status
  13. const
  14. // Enable
  15. ENABLEbm = $01;
  16. // AC_HYSMODE
  17. HYSMODEmask = $06;
  18. HYSMODE_OFF = $00;
  19. HYSMODE_10mV = $02;
  20. HYSMODE_25mV = $04;
  21. HYSMODE_50mV = $06;
  22. // AC_INTMODE
  23. INTMODEmask = $30;
  24. INTMODE_BOTHEDGE = $00;
  25. INTMODE_NEGEDGE = $20;
  26. INTMODE_POSEDGE = $30;
  27. // Output Buffer Enable
  28. OUTENbm = $40;
  29. // Run in Standby Mode
  30. RUNSTDBYbm = $80;
  31. // Analog Comparator 0 Interrupt Enable
  32. CMPbm = $01;
  33. // Invert AC Output
  34. INVERTbm = $80;
  35. // AC_MUXNEG
  36. MUXNEGmask = $03;
  37. MUXNEG_PIN0 = $00;
  38. MUXNEG_VREF = $02;
  39. // AC_MUXPOS
  40. MUXPOSmask = $18;
  41. MUXPOS_PIN0 = $00;
  42. // Analog Comparator State
  43. STATEbm = $10;
  44. end;
  45. TADC = object //Analog to Digital Converter
  46. CTRLA: byte; //Control A
  47. CTRLB: byte; //Control B
  48. CTRLC: byte; //Control C
  49. CTRLD: byte; //Control D
  50. CTRLE: byte; //Control E
  51. SAMPCTRL: byte; //Sample Control
  52. MUXPOS: byte; //Positive mux input
  53. Reserved7: byte;
  54. COMMAND: byte; //Command
  55. EVCTRL: byte; //Event Control
  56. INTCTRL: byte; //Interrupt Control
  57. INTFLAGS: byte; //Interrupt Flags
  58. DBGCTRL: byte; //Debug Control
  59. TEMP: byte; //Temporary Data
  60. Reserved14: byte;
  61. Reserved15: byte;
  62. RES: word; //ADC Accumulator Result
  63. WINLT: word; //Window comparator low threshold
  64. WINHT: word; //Window comparator high threshold
  65. CALIB: byte; //Calibration
  66. const
  67. // ADC_DUTYCYC
  68. DUTYCYCmask = $01;
  69. DUTYCYC_DUTY50 = $00;
  70. DUTYCYC_DUTY25 = $01;
  71. // Start Conversion Operation
  72. STCONVbm = $01;
  73. // ADC Enable
  74. ENABLEbm = $01;
  75. // ADC Freerun mode
  76. FREERUNbm = $02;
  77. // ADC_RESSEL
  78. RESSELmask = $04;
  79. RESSEL_10BIT = $00;
  80. RESSEL_8BIT = $04;
  81. // Run standby mode
  82. RUNSTBYbm = $80;
  83. // ADC_SAMPNUM
  84. SAMPNUMmask = $07;
  85. SAMPNUM_ACC1 = $00;
  86. SAMPNUM_ACC2 = $01;
  87. SAMPNUM_ACC4 = $02;
  88. SAMPNUM_ACC8 = $03;
  89. SAMPNUM_ACC16 = $04;
  90. SAMPNUM_ACC32 = $05;
  91. SAMPNUM_ACC64 = $06;
  92. // ADC_PRESC
  93. PRESCmask = $07;
  94. PRESC_DIV2 = $00;
  95. PRESC_DIV4 = $01;
  96. PRESC_DIV8 = $02;
  97. PRESC_DIV16 = $03;
  98. PRESC_DIV32 = $04;
  99. PRESC_DIV64 = $05;
  100. PRESC_DIV128 = $06;
  101. PRESC_DIV256 = $07;
  102. // ADC_REFSEL
  103. REFSELmask = $30;
  104. REFSEL_INTREF = $00;
  105. REFSEL_VDDREF = $10;
  106. // Sample Capacitance Selection
  107. SAMPCAPbm = $40;
  108. // ADC_ASDV
  109. ASDVmask = $10;
  110. ASDV_ASVOFF = $00;
  111. ASDV_ASVON = $10;
  112. // ADC_INITDLY
  113. INITDLYmask = $E0;
  114. INITDLY_DLY0 = $00;
  115. INITDLY_DLY16 = $20;
  116. INITDLY_DLY32 = $40;
  117. INITDLY_DLY64 = $60;
  118. INITDLY_DLY128 = $80;
  119. INITDLY_DLY256 = $A0;
  120. // Sampling Delay Selection
  121. SAMPDLY0bm = $01;
  122. SAMPDLY1bm = $02;
  123. SAMPDLY2bm = $04;
  124. SAMPDLY3bm = $08;
  125. // ADC_WINCM
  126. WINCMmask = $07;
  127. WINCM_NONE = $00;
  128. WINCM_BELOW = $01;
  129. WINCM_ABOVE = $02;
  130. WINCM_INSIDE = $03;
  131. WINCM_OUTSIDE = $04;
  132. // Debug run
  133. DBGRUNbm = $01;
  134. // Start Event Input Enable
  135. STARTEIbm = $01;
  136. // Result Ready Interrupt Enable
  137. RESRDYbm = $01;
  138. // Window Comparator Interrupt Enable
  139. WCMPbm = $02;
  140. // ADC_MUXPOS
  141. MUXPOSmask = $1F;
  142. MUXPOS_AIN0 = $00;
  143. MUXPOS_AIN1 = $01;
  144. MUXPOS_AIN2 = $02;
  145. MUXPOS_AIN3 = $03;
  146. MUXPOS_AIN4 = $04;
  147. MUXPOS_AIN5 = $05;
  148. MUXPOS_AIN6 = $06;
  149. MUXPOS_AIN7 = $07;
  150. MUXPOS_AIN8 = $08;
  151. MUXPOS_AIN9 = $09;
  152. MUXPOS_AIN10 = $0A;
  153. MUXPOS_AIN11 = $0B;
  154. MUXPOS_DAC0 = $1C;
  155. MUXPOS_INTREF = $1D;
  156. MUXPOS_TEMPSENSE = $1E;
  157. MUXPOS_GND = $1F;
  158. // Sample lenght
  159. SAMPLEN0bm = $01;
  160. SAMPLEN1bm = $02;
  161. SAMPLEN2bm = $04;
  162. SAMPLEN3bm = $08;
  163. SAMPLEN4bm = $10;
  164. // Temporary
  165. TEMP0bm = $01;
  166. TEMP1bm = $02;
  167. TEMP2bm = $04;
  168. TEMP3bm = $08;
  169. TEMP4bm = $10;
  170. TEMP5bm = $20;
  171. TEMP6bm = $40;
  172. TEMP7bm = $80;
  173. end;
  174. TBOD = object //Bod interface
  175. CTRLA: byte; //Control A
  176. CTRLB: byte; //Control B
  177. Reserved2: byte;
  178. Reserved3: byte;
  179. Reserved4: byte;
  180. Reserved5: byte;
  181. Reserved6: byte;
  182. Reserved7: byte;
  183. VLMCTRLA: byte; //Voltage level monitor Control
  184. INTCTRL: byte; //Voltage level monitor interrupt Control
  185. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  186. STATUS: byte; //Voltage level monitor status
  187. const
  188. // BOD_ACTIVE
  189. ACTIVEmask = $0C;
  190. ACTIVE_DIS = $00;
  191. ACTIVE_ENABLED = $04;
  192. ACTIVE_SAMPLED = $08;
  193. ACTIVE_ENWAKE = $0C;
  194. // BOD_SAMPFREQ
  195. SAMPFREQmask = $10;
  196. SAMPFREQ_1KHZ = $00;
  197. SAMPFREQ_125Hz = $10;
  198. // BOD_SLEEP
  199. SLEEPmask = $03;
  200. SLEEP_DIS = $00;
  201. SLEEP_ENABLED = $01;
  202. SLEEP_SAMPLED = $02;
  203. // BOD_LVL
  204. LVLmask = $07;
  205. LVL_BODLEVEL0 = $00;
  206. LVL_BODLEVEL1 = $01;
  207. LVL_BODLEVEL2 = $02;
  208. LVL_BODLEVEL3 = $03;
  209. LVL_BODLEVEL4 = $04;
  210. LVL_BODLEVEL5 = $05;
  211. LVL_BODLEVEL6 = $06;
  212. LVL_BODLEVEL7 = $07;
  213. // BOD_VLMCFG
  214. VLMCFGmask = $06;
  215. VLMCFG_BELOW = $00;
  216. VLMCFG_ABOVE = $02;
  217. VLMCFG_CROSS = $04;
  218. // voltage level monitor interrrupt enable
  219. VLMIEbm = $01;
  220. // Voltage level monitor interrupt flag
  221. VLMIFbm = $01;
  222. // Voltage level monitor status
  223. VLMSbm = $01;
  224. // BOD_VLMLVL
  225. VLMLVLmask = $03;
  226. VLMLVL_5ABOVE = $00;
  227. VLMLVL_15ABOVE = $01;
  228. VLMLVL_25ABOVE = $02;
  229. end;
  230. TCCL = object //Configurable Custom Logic
  231. CTRLA: byte; //Control Register A
  232. SEQCTRL0: byte; //Sequential Control 0
  233. Reserved2: byte;
  234. Reserved3: byte;
  235. Reserved4: byte;
  236. LUT0CTRLA: byte; //LUT Control 0 A
  237. LUT0CTRLB: byte; //LUT Control 0 B
  238. LUT0CTRLC: byte; //LUT Control 0 C
  239. TRUTH0: byte; //Truth 0
  240. LUT1CTRLA: byte; //LUT Control 1 A
  241. LUT1CTRLB: byte; //LUT Control 1 B
  242. LUT1CTRLC: byte; //LUT Control 1 C
  243. TRUTH1: byte; //Truth 1
  244. const
  245. // Enable
  246. ENABLEbm = $01;
  247. // Run in Standby
  248. RUNSTDBYbm = $40;
  249. // Clock Source Selection
  250. CLKSRCbm = $40;
  251. // CCL_EDGEDET
  252. EDGEDETmask = $80;
  253. EDGEDET_DIS = $00;
  254. EDGEDET_EN = $80;
  255. // CCL_FILTSEL
  256. FILTSELmask = $30;
  257. FILTSEL_DISABLE = $00;
  258. FILTSEL_SYNCH = $10;
  259. FILTSEL_FILTER = $20;
  260. // Output Enable
  261. OUTENbm = $08;
  262. // CCL_INSEL0
  263. INSEL0mask = $0F;
  264. INSEL0_MASK = $00;
  265. INSEL0_FEEDBACK = $01;
  266. INSEL0_LINK = $02;
  267. INSEL0_EVENT0 = $03;
  268. INSEL0_EVENT1 = $04;
  269. INSEL0_IO = $05;
  270. INSEL0_AC0 = $06;
  271. INSEL0_TCB0 = $07;
  272. INSEL0_TCA0 = $08;
  273. INSEL0_TCD0 = $09;
  274. INSEL0_USART0 = $0A;
  275. INSEL0_SPI0 = $0B;
  276. // CCL_INSEL1
  277. INSEL1mask = $F0;
  278. INSEL1_MASK = $00;
  279. INSEL1_FEEDBACK = $10;
  280. INSEL1_LINK = $20;
  281. INSEL1_EVENT0 = $30;
  282. INSEL1_EVENT1 = $40;
  283. INSEL1_IO = $50;
  284. INSEL1_AC0 = $60;
  285. INSEL1_TCB0 = $70;
  286. INSEL1_TCA0 = $80;
  287. INSEL1_TCD0 = $90;
  288. INSEL1_USART0 = $A0;
  289. INSEL1_SPI0 = $B0;
  290. // CCL_INSEL2
  291. INSEL2mask = $0F;
  292. INSEL2_MASK = $00;
  293. INSEL2_FEEDBACK = $01;
  294. INSEL2_LINK = $02;
  295. INSEL2_EVENT0 = $03;
  296. INSEL2_EVENT1 = $04;
  297. INSEL2_IO = $05;
  298. INSEL2_AC0 = $06;
  299. INSEL2_TCB0 = $07;
  300. INSEL2_TCA0 = $08;
  301. INSEL2_TCD0 = $09;
  302. INSEL2_SPI0 = $0B;
  303. // CCL_SEQSEL
  304. SEQSELmask = $07;
  305. SEQSEL_DISABLE = $00;
  306. SEQSEL_DFF = $01;
  307. SEQSEL_JK = $02;
  308. SEQSEL_LATCH = $03;
  309. SEQSEL_RS = $04;
  310. end;
  311. TCLKCTRL = object //Clock controller
  312. MCLKCTRLA: byte; //MCLK Control A
  313. MCLKCTRLB: byte; //MCLK Control B
  314. MCLKLOCK: byte; //MCLK Lock
  315. MCLKSTATUS: byte; //MCLK Status
  316. Reserved4: byte;
  317. Reserved5: byte;
  318. Reserved6: byte;
  319. Reserved7: byte;
  320. Reserved8: byte;
  321. Reserved9: byte;
  322. Reserved10: byte;
  323. Reserved11: byte;
  324. Reserved12: byte;
  325. Reserved13: byte;
  326. Reserved14: byte;
  327. Reserved15: byte;
  328. OSC20MCTRLA: byte; //OSC20M Control A
  329. OSC20MCALIBA: byte; //OSC20M Calibration A
  330. OSC20MCALIBB: byte; //OSC20M Calibration B
  331. Reserved19: byte;
  332. Reserved20: byte;
  333. Reserved21: byte;
  334. Reserved22: byte;
  335. Reserved23: byte;
  336. OSC32KCTRLA: byte; //OSC32K Control A
  337. const
  338. // System clock out
  339. CLKOUTbm = $80;
  340. // CLKCTRL_CLKSEL
  341. CLKSELmask = $03;
  342. CLKSEL_OSC20M = $00;
  343. CLKSEL_OSCULP32K = $01;
  344. CLKSEL_XOSC32K = $02;
  345. CLKSEL_EXTCLK = $03;
  346. // CLKCTRL_PDIV
  347. PDIVmask = $1E;
  348. PDIV_2X = $00;
  349. PDIV_4X = $02;
  350. PDIV_8X = $04;
  351. PDIV_16X = $06;
  352. PDIV_32X = $08;
  353. PDIV_64X = $0A;
  354. PDIV_6X = $10;
  355. PDIV_10X = $12;
  356. PDIV_12X = $14;
  357. PDIV_24X = $16;
  358. PDIV_48X = $18;
  359. // Prescaler enable
  360. PENbm = $01;
  361. // lock ebable
  362. LOCKENbm = $01;
  363. // External Clock status
  364. EXTSbm = $80;
  365. // 20MHz oscillator status
  366. OSC20MSbm = $10;
  367. // 32KHz oscillator status
  368. OSC32KSbm = $20;
  369. // System Oscillator changing
  370. SOSCbm = $01;
  371. // 32.768 kHz Crystal Oscillator status
  372. XOSC32KSbm = $40;
  373. // Calibration
  374. CAL20M0bm = $01;
  375. CAL20M1bm = $02;
  376. CAL20M2bm = $04;
  377. CAL20M3bm = $08;
  378. CAL20M4bm = $10;
  379. CAL20M5bm = $20;
  380. // Lock
  381. LOCKbm = $80;
  382. // Oscillator temperature coefficient
  383. TEMPCAL20M0bm = $01;
  384. TEMPCAL20M1bm = $02;
  385. TEMPCAL20M2bm = $04;
  386. TEMPCAL20M3bm = $08;
  387. // Run standby
  388. RUNSTDBYbm = $02;
  389. end;
  390. TCPU = object //CPU
  391. Reserved0: byte;
  392. Reserved1: byte;
  393. Reserved2: byte;
  394. Reserved3: byte;
  395. CCP: byte; //Configuration Change Protection
  396. Reserved5: byte;
  397. Reserved6: byte;
  398. Reserved7: byte;
  399. Reserved8: byte;
  400. Reserved9: byte;
  401. Reserved10: byte;
  402. Reserved11: byte;
  403. Reserved12: byte;
  404. SPL: byte; //Stack Pointer Low
  405. SPH: byte; //Stack Pointer High
  406. SREG: byte; //Status Register
  407. const
  408. // CPU_CCP
  409. CCPmask = $FF;
  410. CCP_SPM = $9D;
  411. CCP_IOREG = $D8;
  412. // Carry Flag
  413. Cbm = $01;
  414. // Half Carry Flag
  415. Hbm = $20;
  416. // Global Interrupt Enable Flag
  417. Ibm = $80;
  418. // Negative Flag
  419. Nbm = $04;
  420. // N Exclusive Or V Flag
  421. Sbm = $10;
  422. // Transfer Bit
  423. Tbm = $40;
  424. // Two's Complement Overflow Flag
  425. Vbm = $08;
  426. // Zero Flag
  427. Zbm = $02;
  428. end;
  429. TCPUINT = object //Interrupt Controller
  430. CTRLA: byte; //Control A
  431. STATUS: byte; //Status
  432. LVL0PRI: byte; //Interrupt Level 0 Priority
  433. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  434. const
  435. // Compact Vector Table
  436. CVTbm = $20;
  437. // Interrupt Vector Select
  438. IVSELbm = $40;
  439. // Round-robin Scheduling Enable
  440. LVL0RRbm = $01;
  441. // Interrupt Level Priority
  442. LVL0PRI0bm = $01;
  443. LVL0PRI1bm = $02;
  444. LVL0PRI2bm = $04;
  445. LVL0PRI3bm = $08;
  446. LVL0PRI4bm = $10;
  447. LVL0PRI5bm = $20;
  448. LVL0PRI6bm = $40;
  449. LVL0PRI7bm = $80;
  450. // Interrupt Vector with High Priority
  451. LVL1VEC0bm = $01;
  452. LVL1VEC1bm = $02;
  453. LVL1VEC2bm = $04;
  454. LVL1VEC3bm = $08;
  455. LVL1VEC4bm = $10;
  456. LVL1VEC5bm = $20;
  457. LVL1VEC6bm = $40;
  458. LVL1VEC7bm = $80;
  459. // Level 0 Interrupt Executing
  460. LVL0EXbm = $01;
  461. // Level 1 Interrupt Executing
  462. LVL1EXbm = $02;
  463. // Non-maskable Interrupt Executing
  464. NMIEXbm = $80;
  465. end;
  466. TCRCSCAN = object //CRCSCAN
  467. CTRLA: byte; //Control A
  468. CTRLB: byte; //Control B
  469. STATUS: byte; //Status
  470. const
  471. // Enable CRC scan
  472. ENABLEbm = $01;
  473. // Enable NMI Trigger
  474. NMIENbm = $02;
  475. // Reset CRC scan
  476. RESETbm = $80;
  477. // CRCSCAN_MODE
  478. MODEmask = $30;
  479. MODE_PRIORITY = $00;
  480. MODE_RESERVED = $10;
  481. MODE_BACKGROUND = $20;
  482. MODE_CONTINUOUS = $30;
  483. // CRCSCAN_SRC
  484. SRCmask = $03;
  485. SRC_FLASH = $00;
  486. SRC_APPLICATION = $01;
  487. SRC_BOOT = $02;
  488. // CRC Busy
  489. BUSYbm = $01;
  490. // CRC Ok
  491. OKbm = $02;
  492. end;
  493. TEVSYS = object //Event System
  494. ASYNCSTROBE: byte; //Asynchronous Channel Strobe
  495. SYNCSTROBE: byte; //Synchronous Channel Strobe
  496. ASYNCCH0: byte; //Asynchronous Channel 0 Generator Selection
  497. ASYNCCH1: byte; //Asynchronous Channel 1 Generator Selection
  498. Reserved4: byte;
  499. Reserved5: byte;
  500. Reserved6: byte;
  501. Reserved7: byte;
  502. Reserved8: byte;
  503. Reserved9: byte;
  504. SYNCCH0: byte; //Synchronous Channel 0 Generator Selection
  505. SYNCCH1: byte; //Synchronous Channel 1 Generator Selection
  506. Reserved12: byte;
  507. Reserved13: byte;
  508. Reserved14: byte;
  509. Reserved15: byte;
  510. Reserved16: byte;
  511. Reserved17: byte;
  512. ASYNCUSER0: byte; //Asynchronous User Ch 0 Input Selection - TCB0
  513. ASYNCUSER1: byte; //Asynchronous User Ch 1 Input Selection - ADC0
  514. ASYNCUSER2: byte; //Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  515. ASYNCUSER3: byte; //Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  516. ASYNCUSER4: byte; //Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  517. ASYNCUSER5: byte; //Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  518. ASYNCUSER6: byte; //Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  519. ASYNCUSER7: byte; //Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  520. ASYNCUSER8: byte; //Asynchronous User Ch 8 Input Selection - Event Out 0
  521. ASYNCUSER9: byte; //Asynchronous User Ch 9 Input Selection - Event Out 1
  522. ASYNCUSER10: byte; //Asynchronous User Ch 10 Input Selection - Event Out 2
  523. Reserved29: byte;
  524. Reserved30: byte;
  525. Reserved31: byte;
  526. Reserved32: byte;
  527. Reserved33: byte;
  528. SYNCUSER0: byte; //Synchronous User Ch 0 Input Selection - TCA0
  529. const
  530. // EVSYS_ASYNCCH0
  531. ASYNCCH0mask = $FF;
  532. ASYNCCH0_OFF = $00;
  533. ASYNCCH0_CCL_LUT0 = $01;
  534. ASYNCCH0_CCL_LUT1 = $02;
  535. ASYNCCH0_AC0_OUT = $03;
  536. ASYNCCH0_TCD0_CMPBCLR = $04;
  537. ASYNCCH0_TCD0_CMPASET = $05;
  538. ASYNCCH0_TCD0_CMPBSET = $06;
  539. ASYNCCH0_TCD0_PROGEV = $07;
  540. ASYNCCH0_RTC_OVF = $08;
  541. ASYNCCH0_RTC_CMP = $09;
  542. ASYNCCH0_PORTA_PIN0 = $0A;
  543. ASYNCCH0_PORTA_PIN1 = $0B;
  544. ASYNCCH0_PORTA_PIN2 = $0C;
  545. ASYNCCH0_PORTA_PIN3 = $0D;
  546. ASYNCCH0_PORTA_PIN4 = $0E;
  547. ASYNCCH0_PORTA_PIN5 = $0F;
  548. ASYNCCH0_PORTA_PIN6 = $10;
  549. ASYNCCH0_PORTA_PIN7 = $11;
  550. ASYNCCH0_UPDI = $12;
  551. // EVSYS_ASYNCCH1
  552. ASYNCCH1mask = $FF;
  553. ASYNCCH1_OFF = $00;
  554. ASYNCCH1_CCL_LUT0 = $01;
  555. ASYNCCH1_CCL_LUT1 = $02;
  556. ASYNCCH1_AC0_OUT = $03;
  557. ASYNCCH1_TCD0_CMPBCLR = $04;
  558. ASYNCCH1_TCD0_CMPASET = $05;
  559. ASYNCCH1_TCD0_CMPBSET = $06;
  560. ASYNCCH1_TCD0_PROGEV = $07;
  561. ASYNCCH1_RTC_OVF = $08;
  562. ASYNCCH1_RTC_CMP = $09;
  563. ASYNCCH1_PORTB_PIN0 = $0A;
  564. ASYNCCH1_PORTB_PIN1 = $0B;
  565. ASYNCCH1_PORTB_PIN2 = $0C;
  566. ASYNCCH1_PORTB_PIN3 = $0D;
  567. ASYNCCH1_PORTB_PIN4 = $0E;
  568. ASYNCCH1_PORTB_PIN5 = $0F;
  569. ASYNCCH1_PORTB_PIN6 = $10;
  570. ASYNCCH1_PORTB_PIN7 = $11;
  571. // EVSYS_ASYNCUSER0
  572. ASYNCUSER0mask = $FF;
  573. ASYNCUSER0_OFF = $00;
  574. ASYNCUSER0_SYNCCH0 = $01;
  575. ASYNCUSER0_ASYNCCH0 = $03;
  576. ASYNCUSER0_ASYNCCH1 = $04;
  577. // EVSYS_ASYNCUSER1
  578. ASYNCUSER1mask = $FF;
  579. ASYNCUSER1_OFF = $00;
  580. ASYNCUSER1_SYNCCH0 = $01;
  581. ASYNCUSER1_ASYNCCH0 = $03;
  582. ASYNCUSER1_ASYNCCH1 = $04;
  583. // EVSYS_ASYNCUSER2
  584. ASYNCUSER2mask = $FF;
  585. ASYNCUSER2_OFF = $00;
  586. ASYNCUSER2_SYNCCH0 = $01;
  587. ASYNCUSER2_ASYNCCH0 = $03;
  588. ASYNCUSER2_ASYNCCH1 = $04;
  589. // EVSYS_ASYNCUSER3
  590. ASYNCUSER3mask = $FF;
  591. ASYNCUSER3_OFF = $00;
  592. ASYNCUSER3_SYNCCH0 = $01;
  593. ASYNCUSER3_ASYNCCH0 = $03;
  594. ASYNCUSER3_ASYNCCH1 = $04;
  595. // EVSYS_ASYNCUSER4
  596. ASYNCUSER4mask = $FF;
  597. ASYNCUSER4_OFF = $00;
  598. ASYNCUSER4_SYNCCH0 = $01;
  599. ASYNCUSER4_ASYNCCH0 = $03;
  600. ASYNCUSER4_ASYNCCH1 = $04;
  601. // EVSYS_ASYNCUSER5
  602. ASYNCUSER5mask = $FF;
  603. ASYNCUSER5_OFF = $00;
  604. ASYNCUSER5_SYNCCH0 = $01;
  605. ASYNCUSER5_ASYNCCH0 = $03;
  606. ASYNCUSER5_ASYNCCH1 = $04;
  607. // EVSYS_ASYNCUSER6
  608. ASYNCUSER6mask = $FF;
  609. ASYNCUSER6_OFF = $00;
  610. ASYNCUSER6_SYNCCH0 = $01;
  611. ASYNCUSER6_ASYNCCH0 = $03;
  612. ASYNCUSER6_ASYNCCH1 = $04;
  613. // EVSYS_ASYNCUSER7
  614. ASYNCUSER7mask = $FF;
  615. ASYNCUSER7_OFF = $00;
  616. ASYNCUSER7_SYNCCH0 = $01;
  617. ASYNCUSER7_ASYNCCH0 = $03;
  618. ASYNCUSER7_ASYNCCH1 = $04;
  619. // EVSYS_ASYNCUSER8
  620. ASYNCUSER8mask = $FF;
  621. ASYNCUSER8_OFF = $00;
  622. ASYNCUSER8_SYNCCH0 = $01;
  623. ASYNCUSER8_ASYNCCH0 = $03;
  624. ASYNCUSER8_ASYNCCH1 = $04;
  625. // EVSYS_ASYNCUSER9
  626. ASYNCUSER9mask = $FF;
  627. ASYNCUSER9_OFF = $00;
  628. ASYNCUSER9_SYNCCH0 = $01;
  629. ASYNCUSER9_ASYNCCH0 = $03;
  630. ASYNCUSER9_ASYNCCH1 = $04;
  631. // EVSYS_ASYNCUSER10
  632. ASYNCUSER10mask = $FF;
  633. ASYNCUSER10_OFF = $00;
  634. ASYNCUSER10_SYNCCH0 = $01;
  635. ASYNCUSER10_ASYNCCH0 = $03;
  636. ASYNCUSER10_ASYNCCH1 = $04;
  637. // EVSYS_SYNCCH0
  638. SYNCCH0mask = $FF;
  639. SYNCCH0_OFF = $00;
  640. SYNCCH0_TCB0 = $01;
  641. SYNCCH0_TCA0_OVF_LUNF = $02;
  642. SYNCCH0_TCA0_HUNF = $03;
  643. SYNCCH0_TCA0_CMP0 = $04;
  644. SYNCCH0_TCA0_CMP1 = $05;
  645. SYNCCH0_TCA0_CMP2 = $06;
  646. SYNCCH0_PORTC_PIN0 = $07;
  647. SYNCCH0_PORTC_PIN1 = $08;
  648. SYNCCH0_PORTC_PIN2 = $09;
  649. SYNCCH0_PORTC_PIN3 = $0A;
  650. SYNCCH0_PORTC_PIN4 = $0B;
  651. SYNCCH0_PORTC_PIN5 = $0C;
  652. SYNCCH0_PORTA_PIN0 = $0D;
  653. SYNCCH0_PORTA_PIN1 = $0E;
  654. SYNCCH0_PORTA_PIN2 = $0F;
  655. SYNCCH0_PORTA_PIN3 = $10;
  656. SYNCCH0_PORTA_PIN4 = $11;
  657. SYNCCH0_PORTA_PIN5 = $12;
  658. SYNCCH0_PORTA_PIN6 = $13;
  659. SYNCCH0_PORTA_PIN7 = $14;
  660. // EVSYS_SYNCCH1
  661. SYNCCH1mask = $FF;
  662. SYNCCH1_OFF = $00;
  663. SYNCCH1_TCB0 = $01;
  664. SYNCCH1_TCA0_OVF_LUNF = $02;
  665. SYNCCH1_TCA0_HUNF = $03;
  666. SYNCCH1_TCA0_CMP0 = $04;
  667. SYNCCH1_TCA0_CMP1 = $05;
  668. SYNCCH1_TCA0_CMP2 = $06;
  669. SYNCCH1_PORTB_PIN0 = $08;
  670. SYNCCH1_PORTB_PIN1 = $09;
  671. SYNCCH1_PORTB_PIN2 = $0A;
  672. SYNCCH1_PORTB_PIN3 = $0B;
  673. SYNCCH1_PORTB_PIN4 = $0C;
  674. SYNCCH1_PORTB_PIN5 = $0D;
  675. SYNCCH1_PORTB_PIN6 = $0E;
  676. SYNCCH1_PORTB_PIN7 = $0F;
  677. // EVSYS_SYNCUSER0
  678. SYNCUSER0mask = $FF;
  679. SYNCUSER0_OFF = $00;
  680. SYNCUSER0_SYNCCH0 = $01;
  681. end;
  682. TFUSE = object //Fuses
  683. WDTCFG: byte; //Watchdog Configuration
  684. BODCFG: byte; //BOD Configuration
  685. OSCCFG: byte; //Oscillator Configuration
  686. Reserved3: byte;
  687. TCD0CFG: byte; //TCD0 Configuration
  688. SYSCFG0: byte; //System Configuration 0
  689. SYSCFG1: byte; //System Configuration 1
  690. APPEND: byte; //Application Code Section End
  691. BOOTEND: byte; //Boot Section End
  692. const
  693. // FUSE_ACTIVE
  694. ACTIVEmask = $0C;
  695. ACTIVE_DIS = $00;
  696. ACTIVE_ENABLED = $04;
  697. ACTIVE_SAMPLED = $08;
  698. ACTIVE_ENWAKE = $0C;
  699. // FUSE_LVL
  700. LVLmask = $E0;
  701. LVL_BODLEVEL0 = $00;
  702. LVL_BODLEVEL1 = $20;
  703. LVL_BODLEVEL2 = $40;
  704. LVL_BODLEVEL3 = $60;
  705. LVL_BODLEVEL4 = $80;
  706. LVL_BODLEVEL5 = $A0;
  707. LVL_BODLEVEL6 = $C0;
  708. LVL_BODLEVEL7 = $E0;
  709. // FUSE_SAMPFREQ
  710. SAMPFREQmask = $10;
  711. SAMPFREQ_1KHz = $00;
  712. SAMPFREQ_125Hz = $10;
  713. // FUSE_SLEEP
  714. SLEEPmask = $03;
  715. SLEEP_DIS = $00;
  716. SLEEP_ENABLED = $01;
  717. SLEEP_SAMPLED = $02;
  718. // FUSE_FREQSEL
  719. FREQSELmask = $03;
  720. FREQSEL_16MHZ = $01;
  721. FREQSEL_20MHZ = $02;
  722. // Oscillator Lock
  723. OSCLOCKbm = $80;
  724. // FUSE_CRCSRC
  725. CRCSRCmask = $C0;
  726. CRCSRC_FLASH = $00;
  727. CRCSRC_BOOT = $40;
  728. CRCSRC_BOOTAPP = $80;
  729. CRCSRC_NOCRC = $C0;
  730. // EEPROM Save
  731. EESAVEbm = $01;
  732. // FUSE_RSTPINCFG
  733. RSTPINCFGmask = $0C;
  734. RSTPINCFG_GPIO = $00;
  735. RSTPINCFG_UPDI = $04;
  736. RSTPINCFG_RST = $08;
  737. // FUSE_SUT
  738. SUTmask = $07;
  739. SUT_0MS = $00;
  740. SUT_1MS = $01;
  741. SUT_2MS = $02;
  742. SUT_4MS = $03;
  743. SUT_8MS = $04;
  744. SUT_16MS = $05;
  745. SUT_32MS = $06;
  746. SUT_64MS = $07;
  747. // Compare A Default Output Value
  748. CMPAbm = $01;
  749. // Compare A Output Enable
  750. CMPAENbm = $10;
  751. // Compare B Default Output Value
  752. CMPBbm = $02;
  753. // Compare B Output Enable
  754. CMPBENbm = $20;
  755. // Compare C Default Output Value
  756. CMPCbm = $04;
  757. // Compare C Output Enable
  758. CMPCENbm = $40;
  759. // Compare D Default Output Value
  760. CMPDbm = $08;
  761. // Compare D Output Enable
  762. CMPDENbm = $80;
  763. // FUSE_PERIOD
  764. PERIODmask = $0F;
  765. PERIOD_OFF = $00;
  766. PERIOD_8CLK = $01;
  767. PERIOD_16CLK = $02;
  768. PERIOD_32CLK = $03;
  769. PERIOD_64CLK = $04;
  770. PERIOD_128CLK = $05;
  771. PERIOD_256CLK = $06;
  772. PERIOD_512CLK = $07;
  773. PERIOD_1KCLK = $08;
  774. PERIOD_2KCLK = $09;
  775. PERIOD_4KCLK = $0A;
  776. PERIOD_8KCLK = $0B;
  777. // FUSE_WINDOW
  778. WINDOWmask = $F0;
  779. WINDOW_OFF = $00;
  780. WINDOW_8CLK = $10;
  781. WINDOW_16CLK = $20;
  782. WINDOW_32CLK = $30;
  783. WINDOW_64CLK = $40;
  784. WINDOW_128CLK = $50;
  785. WINDOW_256CLK = $60;
  786. WINDOW_512CLK = $70;
  787. WINDOW_1KCLK = $80;
  788. WINDOW_2KCLK = $90;
  789. WINDOW_4KCLK = $A0;
  790. WINDOW_8KCLK = $B0;
  791. end;
  792. TGPIO = object //General Purpose IO
  793. GPIOR0: byte; //General Purpose IO Register 0
  794. GPIOR1: byte; //General Purpose IO Register 1
  795. GPIOR2: byte; //General Purpose IO Register 2
  796. GPIOR3: byte; //General Purpose IO Register 3
  797. end;
  798. TLOCKBIT = object //Lockbit
  799. LOCKBIT: byte; //Lock bits
  800. const
  801. // LOCKBIT_LB
  802. LBmask = $FF;
  803. LB_RWLOCK = $3A;
  804. LB_NOLOCK = $C5;
  805. end;
  806. TNVMCTRL = object //Non-volatile Memory Controller
  807. CTRLA: byte; //Control A
  808. CTRLB: byte; //Control B
  809. STATUS: byte; //Status
  810. INTCTRL: byte; //Interrupt Control
  811. INTFLAGS: byte; //Interrupt Flags
  812. Reserved5: byte;
  813. DATA: word; //Data
  814. ADDR: word; //Address
  815. const
  816. // NVMCTRL_CMD
  817. CMDmask = $07;
  818. CMD_NONE = $00;
  819. CMD_PAGEWRITE = $01;
  820. CMD_PAGEERASE = $02;
  821. CMD_PAGEERASEWRITE = $03;
  822. CMD_PAGEBUFCLR = $04;
  823. CMD_CHIPERASE = $05;
  824. CMD_EEERASE = $06;
  825. CMD_FUSEWRITE = $07;
  826. // Application code write protect
  827. APCWPbm = $01;
  828. // Boot Lock
  829. BOOTLOCKbm = $02;
  830. // EEPROM Ready
  831. EEREADYbm = $01;
  832. // EEPROM busy
  833. EEBUSYbm = $02;
  834. // Flash busy
  835. FBUSYbm = $01;
  836. // Write error
  837. WRERRORbm = $04;
  838. end;
  839. TPORT = object //I/O Ports
  840. DIR: byte; //Data Direction
  841. DIRSET: byte; //Data Direction Set
  842. DIRCLR: byte; //Data Direction Clear
  843. DIRTGL: byte; //Data Direction Toggle
  844. OUT_: byte; //Output Value
  845. OUTSET: byte; //Output Value Set
  846. OUTCLR: byte; //Output Value Clear
  847. OUTTGL: byte; //Output Value Toggle
  848. IN_: byte; //Input Value
  849. INTFLAGS: byte; //Interrupt Flags
  850. Reserved10: byte;
  851. Reserved11: byte;
  852. Reserved12: byte;
  853. Reserved13: byte;
  854. Reserved14: byte;
  855. Reserved15: byte;
  856. PIN0CTRL: byte; //Pin 0 Control
  857. PIN1CTRL: byte; //Pin 1 Control
  858. PIN2CTRL: byte; //Pin 2 Control
  859. PIN3CTRL: byte; //Pin 3 Control
  860. PIN4CTRL: byte; //Pin 4 Control
  861. PIN5CTRL: byte; //Pin 5 Control
  862. PIN6CTRL: byte; //Pin 6 Control
  863. PIN7CTRL: byte; //Pin 7 Control
  864. const
  865. // Pin Interrupt
  866. INT0bm = $01;
  867. INT1bm = $02;
  868. INT2bm = $04;
  869. INT3bm = $08;
  870. INT4bm = $10;
  871. INT5bm = $20;
  872. INT6bm = $40;
  873. INT7bm = $80;
  874. // Inverted I/O Enable
  875. INVENbm = $80;
  876. // PORT_ISC
  877. ISCmask = $07;
  878. ISC_INTDISABLE = $00;
  879. ISC_BOTHEDGES = $01;
  880. ISC_RISING = $02;
  881. ISC_FALLING = $03;
  882. ISC_INPUT_DISABLE = $04;
  883. ISC_LEVEL = $05;
  884. // Pullup enable
  885. PULLUPENbm = $08;
  886. end;
  887. TPORTMUX = object //Port Multiplexer
  888. CTRLA: byte; //Port Multiplexer Control A
  889. CTRLB: byte; //Port Multiplexer Control B
  890. CTRLC: byte; //Port Multiplexer Control C
  891. CTRLD: byte; //Port Multiplexer Control D
  892. const
  893. // Event Output 0
  894. EVOUT0bm = $01;
  895. // Event Output 1
  896. EVOUT1bm = $02;
  897. // Event Output 2
  898. EVOUT2bm = $04;
  899. // PORTMUX_LUT0
  900. LUT0mask = $10;
  901. LUT0_DEFAULT = $00;
  902. LUT0_ALTERNATE = $10;
  903. // PORTMUX_LUT1
  904. LUT1mask = $20;
  905. LUT1_DEFAULT = $00;
  906. LUT1_ALTERNATE = $20;
  907. // PORTMUX_SPI0
  908. SPI0mask = $04;
  909. SPI0_DEFAULT = $00;
  910. SPI0_ALTERNATE = $04;
  911. // PORTMUX_USART0
  912. USART0mask = $01;
  913. USART0_DEFAULT = $00;
  914. USART0_ALTERNATE = $01;
  915. // PORTMUX_TCA00
  916. TCA00mask = $01;
  917. TCA00_DEFAULT = $00;
  918. TCA00_ALTERNATE = $01;
  919. // PORTMUX_TCA01
  920. TCA01mask = $02;
  921. TCA01_DEFAULT = $00;
  922. TCA01_ALTERNATE = $02;
  923. // PORTMUX_TCA02
  924. TCA02mask = $04;
  925. TCA02_DEFAULT = $00;
  926. TCA02_ALTERNATE = $04;
  927. // PORTMUX_TCA03
  928. TCA03mask = $08;
  929. TCA03_DEFAULT = $00;
  930. TCA03_ALTERNATE = $08;
  931. // PORTMUX_TCB0
  932. TCB0mask = $01;
  933. TCB0_DEFAULT = $00;
  934. TCB0_ALTERNATE = $01;
  935. end;
  936. TRSTCTRL = object //Reset controller
  937. RSTFR: byte; //Reset Flags
  938. SWRR: byte; //Software Reset
  939. const
  940. // Brown out detector Reset flag
  941. BORFbm = $02;
  942. // External Reset flag
  943. EXTRFbm = $04;
  944. // Power on Reset flag
  945. PORFbm = $01;
  946. // Software Reset flag
  947. SWRFbm = $10;
  948. // UPDI Reset flag
  949. UPDIRFbm = $20;
  950. // Watch dog Reset flag
  951. WDRFbm = $08;
  952. // Software reset enable
  953. SWREbm = $01;
  954. end;
  955. TRTC = object //Real-Time Counter
  956. CTRLA: byte; //Control A
  957. STATUS: byte; //Status
  958. INTCTRL: byte; //Interrupt Control
  959. INTFLAGS: byte; //Interrupt Flags
  960. TEMP: byte; //Temporary
  961. DBGCTRL: byte; //Debug control
  962. Reserved6: byte;
  963. CLKSEL: byte; //Clock Select
  964. CNT: word; //Counter
  965. PER: word; //Period
  966. CMP: word; //Compare
  967. Reserved14: byte;
  968. Reserved15: byte;
  969. PITCTRLA: byte; //PIT Control A
  970. PITSTATUS: byte; //PIT Status
  971. PITINTCTRL: byte; //PIT Interrupt Control
  972. PITINTFLAGS: byte; //PIT Interrupt Flags
  973. Reserved20: byte;
  974. PITDBGCTRL: byte; //PIT Debug control
  975. const
  976. // RTC_CLKSEL
  977. CLKSELmask = $03;
  978. CLKSEL_INT32K = $00;
  979. CLKSEL_INT1K = $01;
  980. CLKSEL_TOSC32K = $02;
  981. CLKSEL_EXTCLK = $03;
  982. // RTC_PRESCALER
  983. PRESCALERmask = $78;
  984. PRESCALER_DIV1 = $00;
  985. PRESCALER_DIV2 = $08;
  986. PRESCALER_DIV4 = $10;
  987. PRESCALER_DIV8 = $18;
  988. PRESCALER_DIV16 = $20;
  989. PRESCALER_DIV32 = $28;
  990. PRESCALER_DIV64 = $30;
  991. PRESCALER_DIV128 = $38;
  992. PRESCALER_DIV256 = $40;
  993. PRESCALER_DIV512 = $48;
  994. PRESCALER_DIV1024 = $50;
  995. PRESCALER_DIV2048 = $58;
  996. PRESCALER_DIV4096 = $60;
  997. PRESCALER_DIV8192 = $68;
  998. PRESCALER_DIV16384 = $70;
  999. PRESCALER_DIV32768 = $78;
  1000. // Enable
  1001. RTCENbm = $01;
  1002. // Run In Standby
  1003. RUNSTDBYbm = $80;
  1004. // Run in debug
  1005. DBGRUNbm = $01;
  1006. // Compare Match Interrupt enable
  1007. CMPbm = $02;
  1008. // Overflow Interrupt enable
  1009. OVFbm = $01;
  1010. // RTC_PERIOD
  1011. PERIODmask = $78;
  1012. PERIOD_OFF = $00;
  1013. PERIOD_CYC4 = $08;
  1014. PERIOD_CYC8 = $10;
  1015. PERIOD_CYC16 = $18;
  1016. PERIOD_CYC32 = $20;
  1017. PERIOD_CYC64 = $28;
  1018. PERIOD_CYC128 = $30;
  1019. PERIOD_CYC256 = $38;
  1020. PERIOD_CYC512 = $40;
  1021. PERIOD_CYC1024 = $48;
  1022. PERIOD_CYC2048 = $50;
  1023. PERIOD_CYC4096 = $58;
  1024. PERIOD_CYC8192 = $60;
  1025. PERIOD_CYC16384 = $68;
  1026. PERIOD_CYC32768 = $70;
  1027. // Enable
  1028. PITENbm = $01;
  1029. // Periodic Interrupt
  1030. PIbm = $01;
  1031. // CTRLA Synchronization Busy Flag
  1032. CTRLBUSYbm = $01;
  1033. // Comparator Synchronization Busy Flag
  1034. CMPBUSYbm = $08;
  1035. // Count Synchronization Busy Flag
  1036. CNTBUSYbm = $02;
  1037. // CTRLA Synchronization Busy Flag
  1038. CTRLABUSYbm = $01;
  1039. // Period Synchronization Busy Flag
  1040. PERBUSYbm = $04;
  1041. end;
  1042. TSIGROW = object //Signature row
  1043. DEVICEID0: byte; //Device ID Byte 0
  1044. DEVICEID1: byte; //Device ID Byte 1
  1045. DEVICEID2: byte; //Device ID Byte 2
  1046. SERNUM0: byte; //Serial Number Byte 0
  1047. SERNUM1: byte; //Serial Number Byte 1
  1048. SERNUM2: byte; //Serial Number Byte 2
  1049. SERNUM3: byte; //Serial Number Byte 3
  1050. SERNUM4: byte; //Serial Number Byte 4
  1051. SERNUM5: byte; //Serial Number Byte 5
  1052. SERNUM6: byte; //Serial Number Byte 6
  1053. SERNUM7: byte; //Serial Number Byte 7
  1054. SERNUM8: byte; //Serial Number Byte 8
  1055. SERNUM9: byte; //Serial Number Byte 9
  1056. Reserved13: byte;
  1057. Reserved14: byte;
  1058. Reserved15: byte;
  1059. Reserved16: byte;
  1060. Reserved17: byte;
  1061. Reserved18: byte;
  1062. Reserved19: byte;
  1063. Reserved20: byte;
  1064. Reserved21: byte;
  1065. Reserved22: byte;
  1066. Reserved23: byte;
  1067. Reserved24: byte;
  1068. Reserved25: byte;
  1069. Reserved26: byte;
  1070. Reserved27: byte;
  1071. Reserved28: byte;
  1072. Reserved29: byte;
  1073. Reserved30: byte;
  1074. Reserved31: byte;
  1075. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  1076. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  1077. OSC16ERR3V: byte; //OSC16 error at 3V
  1078. OSC16ERR5V: byte; //OSC16 error at 5V
  1079. OSC20ERR3V: byte; //OSC20 error at 3V
  1080. OSC20ERR5V: byte; //OSC20 error at 5V
  1081. end;
  1082. TSLPCTRL = object //Sleep Controller
  1083. CTRLA: byte; //Control
  1084. const
  1085. // Sleep enable
  1086. SENbm = $01;
  1087. // SLPCTRL_SMODE
  1088. SMODEmask = $06;
  1089. SMODE_IDLE = $00;
  1090. SMODE_STDBY = $02;
  1091. SMODE_PDOWN = $04;
  1092. end;
  1093. TSPI = object //Serial Peripheral Interface
  1094. CTRLA: byte; //Control A
  1095. CTRLB: byte; //Control B
  1096. INTCTRL: byte; //Interrupt Control
  1097. INTFLAGS: byte; //Interrupt Flags
  1098. DATA: byte; //Data
  1099. const
  1100. // Enable Double Speed
  1101. CLK2Xbm = $10;
  1102. // Data Order Setting
  1103. DORDbm = $40;
  1104. // Enable Module
  1105. ENABLEbm = $01;
  1106. // Master Operation Enable
  1107. MASTERbm = $20;
  1108. // SPI_PRESC
  1109. PRESCmask = $06;
  1110. PRESC_DIV4 = $00;
  1111. PRESC_DIV16 = $02;
  1112. PRESC_DIV64 = $04;
  1113. PRESC_DIV128 = $06;
  1114. // Buffer Mode Enable
  1115. BUFENbm = $80;
  1116. // Buffer Write Mode
  1117. BUFWRbm = $40;
  1118. // SPI_MODE
  1119. MODEmask = $03;
  1120. MODE_0 = $00;
  1121. MODE_1 = $01;
  1122. MODE_2 = $02;
  1123. MODE_3 = $03;
  1124. // Slave Select Disable
  1125. SSDbm = $04;
  1126. // Data Register Empty Interrupt Enable
  1127. DREIEbm = $20;
  1128. // Interrupt Enable
  1129. IEbm = $01;
  1130. // Receive Complete Interrupt Enable
  1131. RXCIEbm = $80;
  1132. // Slave Select Trigger Interrupt Enable
  1133. SSIEbm = $10;
  1134. // Transfer Complete Interrupt Enable
  1135. TXCIEbm = $40;
  1136. // Buffer Overflow
  1137. BUFOVFbm = $01;
  1138. // Data Register Empty Interrupt Flag
  1139. DREIFbm = $20;
  1140. // Receive Complete Interrupt Flag
  1141. RXCIFbm = $80;
  1142. // Slave Select Trigger Interrupt Flag
  1143. SSIFbm = $10;
  1144. // Transfer Complete Interrupt Flag
  1145. TXCIFbm = $40;
  1146. // Interrupt Flag
  1147. IFbm = $80;
  1148. // Write Collision
  1149. WRCOLbm = $40;
  1150. end;
  1151. TSYSCFG = object //System Configuration Registers
  1152. Reserved0: byte;
  1153. REVID: byte; //Revision ID
  1154. EXTBRK: byte; //External Break
  1155. const
  1156. // External break enable
  1157. ENEXTBRKbm = $01;
  1158. end;
  1159. TTCA_SINGLE = object //16-bit Timer/Counter Type A - Single Mode
  1160. CTRLA: byte; //Control A
  1161. CTRLB: byte; //Control B
  1162. CTRLC: byte; //Control C
  1163. CTRLD: byte; //Control D
  1164. CTRLECLR: byte; //Control E Clear
  1165. CTRLESET: byte; //Control E Set
  1166. CTRLFCLR: byte; //Control F Clear
  1167. CTRLFSET: byte; //Control F Set
  1168. Reserved8: byte;
  1169. EVCTRL: byte; //Event Control
  1170. INTCTRL: byte; //Interrupt Control
  1171. INTFLAGS: byte; //Interrupt Flags
  1172. Reserved12: byte;
  1173. Reserved13: byte;
  1174. DBGCTRL: byte; //Degbug Control
  1175. TEMP: byte; //Temporary data for 16-bit Access
  1176. Reserved16: byte;
  1177. Reserved17: byte;
  1178. Reserved18: byte;
  1179. Reserved19: byte;
  1180. Reserved20: byte;
  1181. Reserved21: byte;
  1182. Reserved22: byte;
  1183. Reserved23: byte;
  1184. Reserved24: byte;
  1185. Reserved25: byte;
  1186. Reserved26: byte;
  1187. Reserved27: byte;
  1188. Reserved28: byte;
  1189. Reserved29: byte;
  1190. Reserved30: byte;
  1191. Reserved31: byte;
  1192. CNT: word; //Count
  1193. Reserved34: byte;
  1194. Reserved35: byte;
  1195. Reserved36: byte;
  1196. Reserved37: byte;
  1197. PER: word; //Period
  1198. CMP0: word; //Compare 0
  1199. CMP1: word; //Compare 1
  1200. CMP2: word; //Compare 2
  1201. Reserved46: byte;
  1202. Reserved47: byte;
  1203. Reserved48: byte;
  1204. Reserved49: byte;
  1205. Reserved50: byte;
  1206. Reserved51: byte;
  1207. Reserved52: byte;
  1208. Reserved53: byte;
  1209. PERBUF: word; //Period Buffer
  1210. CMP0BUF: word; //Compare 0 Buffer
  1211. CMP1BUF: word; //Compare 1 Buffer
  1212. CMP2BUF: word; //Compare 2 Buffer
  1213. const
  1214. // TCA_SINGLE_CLKSEL
  1215. SINGLE_CLKSELmask = $0E;
  1216. SINGLE_CLKSEL_DIV1 = $00;
  1217. SINGLE_CLKSEL_DIV2 = $02;
  1218. SINGLE_CLKSEL_DIV4 = $04;
  1219. SINGLE_CLKSEL_DIV8 = $06;
  1220. SINGLE_CLKSEL_DIV16 = $08;
  1221. SINGLE_CLKSEL_DIV64 = $0A;
  1222. SINGLE_CLKSEL_DIV256 = $0C;
  1223. SINGLE_CLKSEL_DIV1024 = $0E;
  1224. // Module Enable
  1225. ENABLEbm = $01;
  1226. // Auto Lock Update
  1227. ALUPDbm = $08;
  1228. // Compare 0 Enable
  1229. CMP0ENbm = $10;
  1230. // Compare 1 Enable
  1231. CMP1ENbm = $20;
  1232. // Compare 2 Enable
  1233. CMP2ENbm = $40;
  1234. // TCA_SINGLE_WGMODE
  1235. SINGLE_WGMODEmask = $07;
  1236. SINGLE_WGMODE_NORMAL = $00;
  1237. SINGLE_WGMODE_FRQ = $01;
  1238. SINGLE_WGMODE_SINGLESLOPE = $03;
  1239. SINGLE_WGMODE_DSTOP = $05;
  1240. SINGLE_WGMODE_DSBOTH = $06;
  1241. SINGLE_WGMODE_DSBOTTOM = $07;
  1242. // Compare 0 Waveform Output Value
  1243. CMP0OVbm = $01;
  1244. // Compare 1 Waveform Output Value
  1245. CMP1OVbm = $02;
  1246. // Compare 2 Waveform Output Value
  1247. CMP2OVbm = $04;
  1248. // Split Mode Enable
  1249. SPLITMbm = $01;
  1250. // TCA_SINGLE_CMD
  1251. SINGLE_CMDmask = $0C;
  1252. SINGLE_CMD_NONE = $00;
  1253. SINGLE_CMD_UPDATE = $04;
  1254. SINGLE_CMD_RESTART = $08;
  1255. SINGLE_CMD_RESET = $0C;
  1256. // Direction
  1257. DIRbm = $01;
  1258. // Lock Update
  1259. LUPDbm = $02;
  1260. // Compare 0 Buffer Valid
  1261. CMP0BVbm = $02;
  1262. // Compare 1 Buffer Valid
  1263. CMP1BVbm = $04;
  1264. // Compare 2 Buffer Valid
  1265. CMP2BVbm = $08;
  1266. // Period Buffer Valid
  1267. PERBVbm = $01;
  1268. // Debug Run
  1269. DBGRUNbm = $01;
  1270. // Count on Event Input
  1271. CNTEIbm = $01;
  1272. // TCA_SINGLE_EVACT
  1273. SINGLE_EVACTmask = $06;
  1274. SINGLE_EVACT_POSEDGE = $00;
  1275. SINGLE_EVACT_ANYEDGE = $02;
  1276. SINGLE_EVACT_HIGHLVL = $04;
  1277. SINGLE_EVACT_UPDOWN = $06;
  1278. // Compare 0 Interrupt
  1279. CMP0bm = $10;
  1280. // Compare 1 Interrupt
  1281. CMP1bm = $20;
  1282. // Compare 2 Interrupt
  1283. CMP2bm = $40;
  1284. // Overflow Interrupt
  1285. OVFbm = $01;
  1286. end;
  1287. TTCA_SPLIT = object //16-bit Timer/Counter Type A - Split Mode
  1288. CTRLA: byte; //Control A
  1289. CTRLB: byte; //Control B
  1290. CTRLC: byte; //Control C
  1291. CTRLD: byte; //Control D
  1292. CTRLECLR: byte; //Control E Clear
  1293. CTRLESET: byte; //Control E Set
  1294. Reserved6: byte;
  1295. Reserved7: byte;
  1296. Reserved8: byte;
  1297. Reserved9: byte;
  1298. INTCTRL: byte; //Interrupt Control
  1299. INTFLAGS: byte; //Interrupt Flags
  1300. Reserved12: byte;
  1301. Reserved13: byte;
  1302. DBGCTRL: byte; //Degbug Control
  1303. Reserved15: byte;
  1304. Reserved16: byte;
  1305. Reserved17: byte;
  1306. Reserved18: byte;
  1307. Reserved19: byte;
  1308. Reserved20: byte;
  1309. Reserved21: byte;
  1310. Reserved22: byte;
  1311. Reserved23: byte;
  1312. Reserved24: byte;
  1313. Reserved25: byte;
  1314. Reserved26: byte;
  1315. Reserved27: byte;
  1316. Reserved28: byte;
  1317. Reserved29: byte;
  1318. Reserved30: byte;
  1319. Reserved31: byte;
  1320. LCNT: byte; //Low Count
  1321. HCNT: byte; //High Count
  1322. Reserved34: byte;
  1323. Reserved35: byte;
  1324. Reserved36: byte;
  1325. Reserved37: byte;
  1326. LPER: byte; //Low Period
  1327. HPER: byte; //High Period
  1328. LCMP0: byte; //Low Compare
  1329. HCMP0: byte; //High Compare
  1330. LCMP1: byte; //Low Compare
  1331. HCMP1: byte; //High Compare
  1332. LCMP2: byte; //Low Compare
  1333. HCMP2: byte; //High Compare
  1334. const
  1335. // TCA_SPLIT_CLKSEL
  1336. SPLIT_CLKSELmask = $0E;
  1337. SPLIT_CLKSEL_DIV1 = $00;
  1338. SPLIT_CLKSEL_DIV2 = $02;
  1339. SPLIT_CLKSEL_DIV4 = $04;
  1340. SPLIT_CLKSEL_DIV8 = $06;
  1341. SPLIT_CLKSEL_DIV16 = $08;
  1342. SPLIT_CLKSEL_DIV64 = $0A;
  1343. SPLIT_CLKSEL_DIV256 = $0C;
  1344. SPLIT_CLKSEL_DIV1024 = $0E;
  1345. // Module Enable
  1346. ENABLEbm = $01;
  1347. // High Compare 0 Enable
  1348. HCMP0ENbm = $10;
  1349. // High Compare 1 Enable
  1350. HCMP1ENbm = $20;
  1351. // High Compare 2 Enable
  1352. HCMP2ENbm = $40;
  1353. // Low Compare 0 Enable
  1354. LCMP0ENbm = $01;
  1355. // Low Compare 1 Enable
  1356. LCMP1ENbm = $02;
  1357. // Low Compare 2 Enable
  1358. LCMP2ENbm = $04;
  1359. // High Compare 0 Output Value
  1360. HCMP0OVbm = $10;
  1361. // High Compare 1 Output Value
  1362. HCMP1OVbm = $20;
  1363. // High Compare 2 Output Value
  1364. HCMP2OVbm = $40;
  1365. // Low Compare 0 Output Value
  1366. LCMP0OVbm = $01;
  1367. // Low Compare 1 Output Value
  1368. LCMP1OVbm = $02;
  1369. // Low Compare 2 Output Value
  1370. LCMP2OVbm = $04;
  1371. // Split Mode Enable
  1372. SPLITMbm = $01;
  1373. // TCA_SPLIT_CMD
  1374. SPLIT_CMDmask = $0C;
  1375. SPLIT_CMD_NONE = $00;
  1376. SPLIT_CMD_UPDATE = $04;
  1377. SPLIT_CMD_RESTART = $08;
  1378. SPLIT_CMD_RESET = $0C;
  1379. // Debug Run
  1380. DBGRUNbm = $01;
  1381. // High Underflow Interrupt Enable
  1382. HUNFbm = $02;
  1383. // Low Compare 0 Interrupt Enable
  1384. LCMP0bm = $10;
  1385. // Low Compare 1 Interrupt Enable
  1386. LCMP1bm = $20;
  1387. // Low Compare 2 Interrupt Enable
  1388. LCMP2bm = $40;
  1389. // Low Underflow Interrupt Enable
  1390. LUNFbm = $01;
  1391. end;
  1392. TTCA = record //16-bit Timer/Counter Type A
  1393. case byte of
  1394. 0: (SINGLE: TTCA_SINGLE);
  1395. 1: (SPLIT: TTCA_SPLIT);
  1396. end;
  1397. TTCB = object //16-bit Timer Type B
  1398. CTRLA: byte; //Control A
  1399. CTRLB: byte; //Control Register B
  1400. Reserved2: byte;
  1401. Reserved3: byte;
  1402. EVCTRL: byte; //Event Control
  1403. INTCTRL: byte; //Interrupt Control
  1404. INTFLAGS: byte; //Interrupt Flags
  1405. STATUS: byte; //Status
  1406. DBGCTRL: byte; //Debug Control
  1407. TEMP: byte; //Temporary Value
  1408. CNT: word; //Count
  1409. CCMP: word; //Compare or Capture
  1410. const
  1411. // TCB_CLKSEL
  1412. CLKSELmask = $06;
  1413. CLKSEL_CLKDIV1 = $00;
  1414. CLKSEL_CLKDIV2 = $02;
  1415. CLKSEL_CLKTCA = $04;
  1416. // Enable
  1417. ENABLEbm = $01;
  1418. // Run Standby
  1419. RUNSTDBYbm = $40;
  1420. // Synchronize Update
  1421. SYNCUPDbm = $10;
  1422. // Asynchronous Enable
  1423. ASYNCbm = $40;
  1424. // Pin Output Enable
  1425. CCMPENbm = $10;
  1426. // Pin Initial State
  1427. CCMPINITbm = $20;
  1428. // TCB_CNTMODE
  1429. CNTMODEmask = $07;
  1430. CNTMODE_INT = $00;
  1431. CNTMODE_TIMEOUT = $01;
  1432. CNTMODE_CAPT = $02;
  1433. CNTMODE_FRQ = $03;
  1434. CNTMODE_PW = $04;
  1435. CNTMODE_FRQPW = $05;
  1436. CNTMODE_SINGLE = $06;
  1437. CNTMODE_PWM8 = $07;
  1438. // Debug Run
  1439. DBGRUNbm = $01;
  1440. // Event Input Enable
  1441. CAPTEIbm = $01;
  1442. // Event Edge
  1443. EDGEbm = $10;
  1444. // Input Capture Noise Cancellation Filter
  1445. FILTERbm = $40;
  1446. // Capture or Timeout
  1447. CAPTbm = $01;
  1448. // Run
  1449. RUNbm = $01;
  1450. end;
  1451. TTWI = object //Two-Wire Interface
  1452. CTRLA: byte; //Control A
  1453. Reserved1: byte;
  1454. DBGCTRL: byte; //Debug Control Register
  1455. MCTRLA: byte; //Master Control A
  1456. MCTRLB: byte; //Master Control B
  1457. MSTATUS: byte; //Master Status
  1458. MBAUD: byte; //Master Baurd Rate Control
  1459. MADDR: byte; //Master Address
  1460. MDATA: byte; //Master Data
  1461. SCTRLA: byte; //Slave Control A
  1462. SCTRLB: byte; //Slave Control B
  1463. SSTATUS: byte; //Slave Status
  1464. SADDR: byte; //Slave Address
  1465. SDATA: byte; //Slave Data
  1466. SADDRMASK: byte; //Slave Address Mask
  1467. const
  1468. // FM Plus Enable
  1469. FMPENbm = $02;
  1470. // TWI_SDAHOLD
  1471. SDAHOLDmask = $0C;
  1472. SDAHOLD_OFF = $00;
  1473. SDAHOLD_50NS = $04;
  1474. SDAHOLD_300NS = $08;
  1475. SDAHOLD_500NS = $0C;
  1476. // TWI_SDASETUP
  1477. SDASETUPmask = $10;
  1478. SDASETUP_4CYC = $00;
  1479. SDASETUP_8CYC = $10;
  1480. // Debug Run
  1481. DBGRUNbm = $01;
  1482. // Enable TWI Master
  1483. ENABLEbm = $01;
  1484. // Quick Command Enable
  1485. QCENbm = $10;
  1486. // Read Interrupt Enable
  1487. RIENbm = $80;
  1488. // Smart Mode Enable
  1489. SMENbm = $02;
  1490. // TWI_TIMEOUT
  1491. TIMEOUTmask = $0C;
  1492. TIMEOUT_DISABLED = $00;
  1493. TIMEOUT_50US = $04;
  1494. TIMEOUT_100US = $08;
  1495. TIMEOUT_200US = $0C;
  1496. // Write Interrupt Enable
  1497. WIENbm = $40;
  1498. // TWI_ACKACT
  1499. ACKACTmask = $04;
  1500. ACKACT_ACK = $00;
  1501. ACKACT_NACK = $04;
  1502. // Flush
  1503. FLUSHbm = $08;
  1504. // TWI_MCMD
  1505. MCMDmask = $03;
  1506. MCMD_NOACT = $00;
  1507. MCMD_REPSTART = $01;
  1508. MCMD_RECVTRANS = $02;
  1509. MCMD_STOP = $03;
  1510. // Arbitration Lost
  1511. ARBLOSTbm = $08;
  1512. // Bus Error
  1513. BUSERRbm = $04;
  1514. // TWI_BUSSTATE
  1515. BUSSTATEmask = $03;
  1516. BUSSTATE_UNKNOWN = $00;
  1517. BUSSTATE_IDLE = $01;
  1518. BUSSTATE_OWNER = $02;
  1519. BUSSTATE_BUSY = $03;
  1520. // Clock Hold
  1521. CLKHOLDbm = $20;
  1522. // Read Interrupt Flag
  1523. RIFbm = $80;
  1524. // Received Acknowledge
  1525. RXACKbm = $10;
  1526. // Write Interrupt Flag
  1527. WIFbm = $40;
  1528. // Address Enable
  1529. ADDRENbm = $01;
  1530. // Address Mask
  1531. ADDRMASK0bm = $02;
  1532. ADDRMASK1bm = $04;
  1533. ADDRMASK2bm = $08;
  1534. ADDRMASK3bm = $10;
  1535. ADDRMASK4bm = $20;
  1536. ADDRMASK5bm = $40;
  1537. ADDRMASK6bm = $80;
  1538. // Address/Stop Interrupt Enable
  1539. APIENbm = $40;
  1540. // Data Interrupt Enable
  1541. DIENbm = $80;
  1542. // Stop Interrupt Enable
  1543. PIENbm = $20;
  1544. // Promiscuous Mode Enable
  1545. PMENbm = $04;
  1546. // TWI_SCMD
  1547. SCMDmask = $03;
  1548. SCMD_NOACT = $00;
  1549. SCMD_COMPTRANS = $02;
  1550. SCMD_RESPONSE = $03;
  1551. // TWI_AP
  1552. APmask = $01;
  1553. AP_STOP = $00;
  1554. AP_ADR = $01;
  1555. // Address/Stop Interrupt Flag
  1556. APIFbm = $40;
  1557. // Collision
  1558. COLLbm = $08;
  1559. // Data Interrupt Flag
  1560. DIFbm = $80;
  1561. // Read/Write Direction
  1562. DIRbm = $02;
  1563. end;
  1564. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1565. RXDATAL: byte; //Receive Data Low Byte
  1566. RXDATAH: byte; //Receive Data High Byte
  1567. TXDATAL: byte; //Transmit Data Low Byte
  1568. TXDATAH: byte; //Transmit Data High Byte
  1569. STATUS: byte; //Status
  1570. CTRLA: byte; //Control A
  1571. CTRLB: byte; //Control B
  1572. CTRLC: byte; //Control C
  1573. BAUD: word; //Baud Rate
  1574. Reserved10: byte;
  1575. DBGCTRL: byte; //Debug Control
  1576. EVCTRL: byte; //Event Control
  1577. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1578. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1579. const
  1580. // Auto-baud Error Interrupt Enable
  1581. ABEIEbm = $04;
  1582. // Data Register Empty Interrupt Enable
  1583. DREIEbm = $20;
  1584. // Loop-back Mode Enable
  1585. LBMEbm = $08;
  1586. // USART_RS485
  1587. RS485mask = $03;
  1588. RS485_OFF = $00;
  1589. RS485_EXT = $01;
  1590. RS485_INT = $02;
  1591. // Receive Complete Interrupt Enable
  1592. RXCIEbm = $80;
  1593. // Receiver Start Frame Interrupt Enable
  1594. RXSIEbm = $10;
  1595. // Transmit Complete Interrupt Enable
  1596. TXCIEbm = $40;
  1597. // Multi-processor Communication Mode
  1598. MPCMbm = $01;
  1599. // Open Drain Mode Enable
  1600. ODMEbm = $08;
  1601. // Reciever enable
  1602. RXENbm = $80;
  1603. // USART_RXMODE
  1604. RXMODEmask = $06;
  1605. RXMODE_NORMAL = $00;
  1606. RXMODE_CLK2X = $02;
  1607. RXMODE_GENAUTO = $04;
  1608. RXMODE_LINAUTO = $06;
  1609. // Start Frame Detection Enable
  1610. SFDENbm = $10;
  1611. // Transmitter Enable
  1612. TXENbm = $40;
  1613. // USART_MSPI_CMODE
  1614. MSPI_CMODEmask = $C0;
  1615. MSPI_CMODE_ASYNCHRONOUS = $00;
  1616. MSPI_CMODE_SYNCHRONOUS = $40;
  1617. MSPI_CMODE_IRCOM = $80;
  1618. MSPI_CMODE_MSPI = $C0;
  1619. // SPI Master Mode, Clock Phase
  1620. UCPHAbm = $02;
  1621. // SPI Master Mode, Data Order
  1622. UDORDbm = $04;
  1623. // USART_NORMAL_CHSIZE
  1624. NORMAL_CHSIZEmask = $07;
  1625. NORMAL_CHSIZE_5BIT = $00;
  1626. NORMAL_CHSIZE_6BIT = $01;
  1627. NORMAL_CHSIZE_7BIT = $02;
  1628. NORMAL_CHSIZE_8BIT = $03;
  1629. NORMAL_CHSIZE_9BITL = $06;
  1630. NORMAL_CHSIZE_9BITH = $07;
  1631. // USART_NORMAL_CMODE
  1632. NORMAL_CMODEmask = $C0;
  1633. NORMAL_CMODE_ASYNCHRONOUS = $00;
  1634. NORMAL_CMODE_SYNCHRONOUS = $40;
  1635. NORMAL_CMODE_IRCOM = $80;
  1636. NORMAL_CMODE_MSPI = $C0;
  1637. // USART_NORMAL_PMODE
  1638. NORMAL_PMODEmask = $30;
  1639. NORMAL_PMODE_DISABLED = $00;
  1640. NORMAL_PMODE_EVEN = $20;
  1641. NORMAL_PMODE_ODD = $30;
  1642. // USART_NORMAL_SBMODE
  1643. NORMAL_SBMODEmask = $08;
  1644. NORMAL_SBMODE_1BIT = $00;
  1645. NORMAL_SBMODE_2BIT = $08;
  1646. // Autobaud majority voter bypass
  1647. ABMBPbm = $80;
  1648. // Debug Run
  1649. DBGRUNbm = $01;
  1650. // IrDA Event Input Enable
  1651. IREIbm = $01;
  1652. // Buffer Overflow
  1653. BUFOVFbm = $40;
  1654. // Receiver Data Register
  1655. DATA8bm = $01;
  1656. // Frame Error
  1657. FERRbm = $04;
  1658. // Parity Error
  1659. PERRbm = $02;
  1660. // Receive Complete Interrupt Flag
  1661. RXCIFbm = $80;
  1662. // RX Data
  1663. DATA0bm = $01;
  1664. DATA1bm = $02;
  1665. DATA2bm = $04;
  1666. DATA3bm = $08;
  1667. DATA4bm = $10;
  1668. DATA5bm = $20;
  1669. DATA6bm = $40;
  1670. DATA7bm = $80;
  1671. // Receiver Pulse Lenght
  1672. RXPL0bm = $01;
  1673. RXPL1bm = $02;
  1674. RXPL2bm = $04;
  1675. RXPL3bm = $08;
  1676. RXPL4bm = $10;
  1677. RXPL5bm = $20;
  1678. RXPL6bm = $40;
  1679. // Break Detected Flag
  1680. BDFbm = $02;
  1681. // Data Register Empty Flag
  1682. DREIFbm = $20;
  1683. // Inconsistent Sync Field Interrupt Flag
  1684. ISFIFbm = $08;
  1685. // Receive Start Interrupt
  1686. RXSIFbm = $10;
  1687. // Transmit Interrupt Flag
  1688. TXCIFbm = $40;
  1689. // Wait For Break
  1690. WFBbm = $01;
  1691. // Transmit pulse length
  1692. TXPL0bm = $01;
  1693. TXPL1bm = $02;
  1694. TXPL2bm = $04;
  1695. TXPL3bm = $08;
  1696. TXPL4bm = $10;
  1697. TXPL5bm = $20;
  1698. TXPL6bm = $40;
  1699. TXPL7bm = $80;
  1700. end;
  1701. TUSERROW = object //User Row
  1702. USERROW0: byte; //User Row Byte 0
  1703. USERROW1: byte; //User Row Byte 1
  1704. USERROW2: byte; //User Row Byte 2
  1705. USERROW3: byte; //User Row Byte 3
  1706. USERROW4: byte; //User Row Byte 4
  1707. USERROW5: byte; //User Row Byte 5
  1708. USERROW6: byte; //User Row Byte 6
  1709. USERROW7: byte; //User Row Byte 7
  1710. USERROW8: byte; //User Row Byte 8
  1711. USERROW9: byte; //User Row Byte 9
  1712. USERROW10: byte; //User Row Byte 10
  1713. USERROW11: byte; //User Row Byte 11
  1714. USERROW12: byte; //User Row Byte 12
  1715. USERROW13: byte; //User Row Byte 13
  1716. USERROW14: byte; //User Row Byte 14
  1717. USERROW15: byte; //User Row Byte 15
  1718. USERROW16: byte; //User Row Byte 16
  1719. USERROW17: byte; //User Row Byte 17
  1720. USERROW18: byte; //User Row Byte 18
  1721. USERROW19: byte; //User Row Byte 19
  1722. USERROW20: byte; //User Row Byte 20
  1723. USERROW21: byte; //User Row Byte 21
  1724. USERROW22: byte; //User Row Byte 22
  1725. USERROW23: byte; //User Row Byte 23
  1726. USERROW24: byte; //User Row Byte 24
  1727. USERROW25: byte; //User Row Byte 25
  1728. USERROW26: byte; //User Row Byte 26
  1729. USERROW27: byte; //User Row Byte 27
  1730. USERROW28: byte; //User Row Byte 28
  1731. USERROW29: byte; //User Row Byte 29
  1732. USERROW30: byte; //User Row Byte 30
  1733. USERROW31: byte; //User Row Byte 31
  1734. end;
  1735. TVPORT = object //Virtual Ports
  1736. DIR: byte; //Data Direction
  1737. OUT_: byte; //Output Value
  1738. IN_: byte; //Input Value
  1739. INTFLAGS: byte; //Interrupt Flags
  1740. const
  1741. // Pin Interrupt
  1742. INT0bm = $01;
  1743. INT1bm = $02;
  1744. INT2bm = $04;
  1745. INT3bm = $08;
  1746. INT4bm = $10;
  1747. INT5bm = $20;
  1748. INT6bm = $40;
  1749. INT7bm = $80;
  1750. end;
  1751. TVREF = object //Voltage reference
  1752. CTRLA: byte; //Control A
  1753. CTRLB: byte; //Control B
  1754. const
  1755. // VREF_ADC0REFSEL
  1756. ADC0REFSELmask = $70;
  1757. ADC0REFSEL_0V55 = $00;
  1758. ADC0REFSEL_1V1 = $10;
  1759. ADC0REFSEL_2V5 = $20;
  1760. ADC0REFSEL_4V34 = $30;
  1761. ADC0REFSEL_1V5 = $40;
  1762. // VREF_DAC0REFSEL
  1763. DAC0REFSELmask = $07;
  1764. DAC0REFSEL_0V55 = $00;
  1765. DAC0REFSEL_1V1 = $01;
  1766. DAC0REFSEL_2V5 = $02;
  1767. DAC0REFSEL_4V34 = $03;
  1768. DAC0REFSEL_1V5 = $04;
  1769. // ADC0 reference enable
  1770. ADC0REFENbm = $02;
  1771. // DAC0/AC0 reference enable
  1772. DAC0REFENbm = $01;
  1773. end;
  1774. TWDT = object //Watch-Dog Timer
  1775. CTRLA: byte; //Control A
  1776. STATUS: byte; //Status
  1777. const
  1778. // WDT_PERIOD
  1779. PERIODmask = $0F;
  1780. PERIOD_OFF = $00;
  1781. PERIOD_8CLK = $01;
  1782. PERIOD_16CLK = $02;
  1783. PERIOD_32CLK = $03;
  1784. PERIOD_64CLK = $04;
  1785. PERIOD_128CLK = $05;
  1786. PERIOD_256CLK = $06;
  1787. PERIOD_512CLK = $07;
  1788. PERIOD_1KCLK = $08;
  1789. PERIOD_2KCLK = $09;
  1790. PERIOD_4KCLK = $0A;
  1791. PERIOD_8KCLK = $0B;
  1792. // WDT_WINDOW
  1793. WINDOWmask = $F0;
  1794. WINDOW_OFF = $00;
  1795. WINDOW_8CLK = $10;
  1796. WINDOW_16CLK = $20;
  1797. WINDOW_32CLK = $30;
  1798. WINDOW_64CLK = $40;
  1799. WINDOW_128CLK = $50;
  1800. WINDOW_256CLK = $60;
  1801. WINDOW_512CLK = $70;
  1802. WINDOW_1KCLK = $80;
  1803. WINDOW_2KCLK = $90;
  1804. WINDOW_4KCLK = $A0;
  1805. WINDOW_8KCLK = $B0;
  1806. // Lock enable
  1807. LOCKbm = $80;
  1808. // Syncronization busy
  1809. SYNCBUSYbm = $01;
  1810. end;
  1811. const
  1812. Pin0idx = 0; Pin0bm = 1;
  1813. Pin1idx = 1; Pin1bm = 2;
  1814. Pin2idx = 2; Pin2bm = 4;
  1815. Pin3idx = 3; Pin3bm = 8;
  1816. Pin4idx = 4; Pin4bm = 16;
  1817. Pin5idx = 5; Pin5bm = 32;
  1818. Pin6idx = 6; Pin6bm = 64;
  1819. Pin7idx = 7; Pin7bm = 128;
  1820. var
  1821. VPORTA: TVPORT absolute $0000;
  1822. VPORTB: TVPORT absolute $0004;
  1823. VPORTC: TVPORT absolute $0008;
  1824. GPIO: TGPIO absolute $001C;
  1825. CPU: TCPU absolute $0030;
  1826. RSTCTRL: TRSTCTRL absolute $0040;
  1827. SLPCTRL: TSLPCTRL absolute $0050;
  1828. CLKCTRL: TCLKCTRL absolute $0060;
  1829. BOD: TBOD absolute $0080;
  1830. VREF: TVREF absolute $00A0;
  1831. WDT: TWDT absolute $0100;
  1832. CPUINT: TCPUINT absolute $0110;
  1833. CRCSCAN: TCRCSCAN absolute $0120;
  1834. RTC: TRTC absolute $0140;
  1835. EVSYS: TEVSYS absolute $0180;
  1836. CCL: TCCL absolute $01C0;
  1837. PORTMUX: TPORTMUX absolute $0200;
  1838. PORTA: TPORT absolute $0400;
  1839. ADC0: TADC absolute $0600;
  1840. AC0: TAC absolute $0670;
  1841. USART0: TUSART absolute $0800;
  1842. TWI0: TTWI absolute $0810;
  1843. SPI0: TSPI absolute $0820;
  1844. TCA0: TTCA absolute $0A00;
  1845. TCB0: TTCB absolute $0A40;
  1846. SYSCFG: TSYSCFG absolute $0F00;
  1847. NVMCTRL: TNVMCTRL absolute $1000;
  1848. SIGROW: TSIGROW absolute $1100;
  1849. FUSE: TFUSE absolute $1280;
  1850. LOCKBIT: TLOCKBIT absolute $128A;
  1851. USERROW: TUSERROW absolute $1300;
  1852. implementation
  1853. {$define RELBRANCHES}
  1854. {$i avrcommon.inc}
  1855. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  1856. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  1857. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 3
  1858. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 6
  1859. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 7
  1860. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 8
  1861. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 8
  1862. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 9
  1863. procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 10
  1864. //procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 10
  1865. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 11
  1866. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 11
  1867. procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 12
  1868. //procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 12
  1869. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 13
  1870. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 16
  1871. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 17
  1872. procedure ADC0_WCOMP_ISR; external name 'ADC0_WCOMP_ISR'; // Interrupt 18
  1873. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 19
  1874. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 20
  1875. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 21
  1876. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 22
  1877. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 23
  1878. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 24
  1879. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 25
  1880. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  1881. asm
  1882. rjmp __dtors_end
  1883. rjmp CRCSCAN_NMI_ISR
  1884. rjmp BOD_VLM_ISR
  1885. rjmp PORTA_PORT_ISR
  1886. rjmp RTC_CNT_ISR
  1887. rjmp RTC_PIT_ISR
  1888. rjmp TCA0_LUNF_ISR
  1889. // rjmp TCA0_OVF_ISR
  1890. rjmp TCA0_HUNF_ISR
  1891. rjmp TCA0_LCMP0_ISR
  1892. // rjmp TCA0_CMP0_ISR
  1893. rjmp TCA0_CMP1_ISR
  1894. // rjmp TCA0_LCMP1_ISR
  1895. rjmp TCA0_CMP2_ISR
  1896. // rjmp TCA0_LCMP2_ISR
  1897. rjmp TCB0_INT_ISR
  1898. rjmp AC0_AC_ISR
  1899. rjmp ADC0_RESRDY_ISR
  1900. rjmp ADC0_WCOMP_ISR
  1901. rjmp TWI0_TWIS_ISR
  1902. rjmp TWI0_TWIM_ISR
  1903. rjmp SPI0_INT_ISR
  1904. rjmp USART0_RXC_ISR
  1905. rjmp USART0_DRE_ISR
  1906. rjmp USART0_TXC_ISR
  1907. rjmp NVMCTRL_EE_ISR
  1908. .weak CRCSCAN_NMI_ISR
  1909. .weak BOD_VLM_ISR
  1910. .weak PORTA_PORT_ISR
  1911. .weak RTC_CNT_ISR
  1912. .weak RTC_PIT_ISR
  1913. .weak TCA0_LUNF_ISR
  1914. // .weak TCA0_OVF_ISR
  1915. .weak TCA0_HUNF_ISR
  1916. .weak TCA0_LCMP0_ISR
  1917. // .weak TCA0_CMP0_ISR
  1918. .weak TCA0_CMP1_ISR
  1919. // .weak TCA0_LCMP1_ISR
  1920. .weak TCA0_CMP2_ISR
  1921. // .weak TCA0_LCMP2_ISR
  1922. .weak TCB0_INT_ISR
  1923. .weak AC0_AC_ISR
  1924. .weak ADC0_RESRDY_ISR
  1925. .weak ADC0_WCOMP_ISR
  1926. .weak TWI0_TWIS_ISR
  1927. .weak TWI0_TWIM_ISR
  1928. .weak SPI0_INT_ISR
  1929. .weak USART0_RXC_ISR
  1930. .weak USART0_DRE_ISR
  1931. .weak USART0_TXC_ISR
  1932. .weak NVMCTRL_EE_ISR
  1933. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  1934. .set BOD_VLM_ISR, Default_IRQ_handler
  1935. .set PORTA_PORT_ISR, Default_IRQ_handler
  1936. .set RTC_CNT_ISR, Default_IRQ_handler
  1937. .set RTC_PIT_ISR, Default_IRQ_handler
  1938. .set TCA0_LUNF_ISR, Default_IRQ_handler
  1939. // .set TCA0_OVF_ISR, Default_IRQ_handler
  1940. .set TCA0_HUNF_ISR, Default_IRQ_handler
  1941. .set TCA0_LCMP0_ISR, Default_IRQ_handler
  1942. // .set TCA0_CMP0_ISR, Default_IRQ_handler
  1943. .set TCA0_CMP1_ISR, Default_IRQ_handler
  1944. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  1945. .set TCA0_CMP2_ISR, Default_IRQ_handler
  1946. // .set TCA0_LCMP2_ISR, Default_IRQ_handler
  1947. .set TCB0_INT_ISR, Default_IRQ_handler
  1948. .set AC0_AC_ISR, Default_IRQ_handler
  1949. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  1950. .set ADC0_WCOMP_ISR, Default_IRQ_handler
  1951. .set TWI0_TWIS_ISR, Default_IRQ_handler
  1952. .set TWI0_TWIM_ISR, Default_IRQ_handler
  1953. .set SPI0_INT_ISR, Default_IRQ_handler
  1954. .set USART0_RXC_ISR, Default_IRQ_handler
  1955. .set USART0_DRE_ISR, Default_IRQ_handler
  1956. .set USART0_TXC_ISR, Default_IRQ_handler
  1957. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  1958. end;
  1959. end.