attiny204.pp 53 KB

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  1. unit ATtiny204;
  2. interface
  3. type
  4. TAC = object //Analog Comparator
  5. CTRLA: byte; //Control A
  6. Reserved1: byte;
  7. MUXCTRLA: byte; //Mux Control A
  8. Reserved3: byte;
  9. Reserved4: byte;
  10. Reserved5: byte;
  11. INTCTRL: byte; //Interrupt Control
  12. STATUS: byte; //Status
  13. const
  14. // Enable
  15. ENABLEbm = $01;
  16. // AC_HYSMODE
  17. HYSMODEmask = $06;
  18. HYSMODE_OFF = $00;
  19. HYSMODE_10mV = $02;
  20. HYSMODE_25mV = $04;
  21. HYSMODE_50mV = $06;
  22. // AC_INTMODE
  23. INTMODEmask = $30;
  24. INTMODE_BOTHEDGE = $00;
  25. INTMODE_NEGEDGE = $20;
  26. INTMODE_POSEDGE = $30;
  27. // Output Buffer Enable
  28. OUTENbm = $40;
  29. // Run in Standby Mode
  30. RUNSTDBYbm = $80;
  31. // Analog Comparator 0 Interrupt Enable
  32. CMPbm = $01;
  33. // Invert AC Output
  34. INVERTbm = $80;
  35. // AC_MUXNEG
  36. MUXNEGmask = $03;
  37. MUXNEG_PIN0 = $00;
  38. MUXNEG_VREF = $02;
  39. // AC_MUXPOS
  40. MUXPOSmask = $18;
  41. MUXPOS_PIN0 = $00;
  42. // Analog Comparator State
  43. STATEbm = $10;
  44. end;
  45. TADC = object //Analog to Digital Converter
  46. CTRLA: byte; //Control A
  47. CTRLB: byte; //Control B
  48. CTRLC: byte; //Control C
  49. CTRLD: byte; //Control D
  50. CTRLE: byte; //Control E
  51. SAMPCTRL: byte; //Sample Control
  52. MUXPOS: byte; //Positive mux input
  53. Reserved7: byte;
  54. COMMAND: byte; //Command
  55. EVCTRL: byte; //Event Control
  56. INTCTRL: byte; //Interrupt Control
  57. INTFLAGS: byte; //Interrupt Flags
  58. DBGCTRL: byte; //Debug Control
  59. TEMP: byte; //Temporary Data
  60. Reserved14: byte;
  61. Reserved15: byte;
  62. RES: word; //ADC Accumulator Result
  63. WINLT: word; //Window comparator low threshold
  64. WINHT: word; //Window comparator high threshold
  65. CALIB: byte; //Calibration
  66. const
  67. // ADC_DUTYCYC
  68. DUTYCYCmask = $01;
  69. DUTYCYC_DUTY50 = $00;
  70. DUTYCYC_DUTY25 = $01;
  71. // Start Conversion Operation
  72. STCONVbm = $01;
  73. // ADC Enable
  74. ENABLEbm = $01;
  75. // ADC Freerun mode
  76. FREERUNbm = $02;
  77. // ADC_RESSEL
  78. RESSELmask = $04;
  79. RESSEL_10BIT = $00;
  80. RESSEL_8BIT = $04;
  81. // Run standby mode
  82. RUNSTBYbm = $80;
  83. // ADC_SAMPNUM
  84. SAMPNUMmask = $07;
  85. SAMPNUM_ACC1 = $00;
  86. SAMPNUM_ACC2 = $01;
  87. SAMPNUM_ACC4 = $02;
  88. SAMPNUM_ACC8 = $03;
  89. SAMPNUM_ACC16 = $04;
  90. SAMPNUM_ACC32 = $05;
  91. SAMPNUM_ACC64 = $06;
  92. // ADC_PRESC
  93. PRESCmask = $07;
  94. PRESC_DIV2 = $00;
  95. PRESC_DIV4 = $01;
  96. PRESC_DIV8 = $02;
  97. PRESC_DIV16 = $03;
  98. PRESC_DIV32 = $04;
  99. PRESC_DIV64 = $05;
  100. PRESC_DIV128 = $06;
  101. PRESC_DIV256 = $07;
  102. // ADC_REFSEL
  103. REFSELmask = $30;
  104. REFSEL_INTREF = $00;
  105. REFSEL_VDDREF = $10;
  106. // Sample Capacitance Selection
  107. SAMPCAPbm = $40;
  108. // ADC_ASDV
  109. ASDVmask = $10;
  110. ASDV_ASVOFF = $00;
  111. ASDV_ASVON = $10;
  112. // ADC_INITDLY
  113. INITDLYmask = $E0;
  114. INITDLY_DLY0 = $00;
  115. INITDLY_DLY16 = $20;
  116. INITDLY_DLY32 = $40;
  117. INITDLY_DLY64 = $60;
  118. INITDLY_DLY128 = $80;
  119. INITDLY_DLY256 = $A0;
  120. // Sampling Delay Selection
  121. SAMPDLY0bm = $01;
  122. SAMPDLY1bm = $02;
  123. SAMPDLY2bm = $04;
  124. SAMPDLY3bm = $08;
  125. // ADC_WINCM
  126. WINCMmask = $07;
  127. WINCM_NONE = $00;
  128. WINCM_BELOW = $01;
  129. WINCM_ABOVE = $02;
  130. WINCM_INSIDE = $03;
  131. WINCM_OUTSIDE = $04;
  132. // Debug run
  133. DBGRUNbm = $01;
  134. // Start Event Input Enable
  135. STARTEIbm = $01;
  136. // Result Ready Interrupt Enable
  137. RESRDYbm = $01;
  138. // Window Comparator Interrupt Enable
  139. WCMPbm = $02;
  140. // ADC_MUXPOS
  141. MUXPOSmask = $1F;
  142. MUXPOS_AIN0 = $00;
  143. MUXPOS_AIN1 = $01;
  144. MUXPOS_AIN2 = $02;
  145. MUXPOS_AIN3 = $03;
  146. MUXPOS_AIN4 = $04;
  147. MUXPOS_AIN5 = $05;
  148. MUXPOS_AIN6 = $06;
  149. MUXPOS_AIN7 = $07;
  150. MUXPOS_AIN8 = $08;
  151. MUXPOS_AIN9 = $09;
  152. MUXPOS_AIN10 = $0A;
  153. MUXPOS_AIN11 = $0B;
  154. MUXPOS_DAC0 = $1C;
  155. MUXPOS_INTREF = $1D;
  156. MUXPOS_TEMPSENSE = $1E;
  157. MUXPOS_GND = $1F;
  158. // Sample lenght
  159. SAMPLEN0bm = $01;
  160. SAMPLEN1bm = $02;
  161. SAMPLEN2bm = $04;
  162. SAMPLEN3bm = $08;
  163. SAMPLEN4bm = $10;
  164. // Temporary
  165. TEMP0bm = $01;
  166. TEMP1bm = $02;
  167. TEMP2bm = $04;
  168. TEMP3bm = $08;
  169. TEMP4bm = $10;
  170. TEMP5bm = $20;
  171. TEMP6bm = $40;
  172. TEMP7bm = $80;
  173. end;
  174. TBOD = object //Bod interface
  175. CTRLA: byte; //Control A
  176. CTRLB: byte; //Control B
  177. Reserved2: byte;
  178. Reserved3: byte;
  179. Reserved4: byte;
  180. Reserved5: byte;
  181. Reserved6: byte;
  182. Reserved7: byte;
  183. VLMCTRLA: byte; //Voltage level monitor Control
  184. INTCTRL: byte; //Voltage level monitor interrupt Control
  185. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  186. STATUS: byte; //Voltage level monitor status
  187. const
  188. // BOD_ACTIVE
  189. ACTIVEmask = $0C;
  190. ACTIVE_DIS = $00;
  191. ACTIVE_ENABLED = $04;
  192. ACTIVE_SAMPLED = $08;
  193. ACTIVE_ENWAKE = $0C;
  194. // BOD_SAMPFREQ
  195. SAMPFREQmask = $10;
  196. SAMPFREQ_1KHZ = $00;
  197. SAMPFREQ_125Hz = $10;
  198. // BOD_SLEEP
  199. SLEEPmask = $03;
  200. SLEEP_DIS = $00;
  201. SLEEP_ENABLED = $01;
  202. SLEEP_SAMPLED = $02;
  203. // BOD_LVL
  204. LVLmask = $07;
  205. LVL_BODLEVEL0 = $00;
  206. LVL_BODLEVEL1 = $01;
  207. LVL_BODLEVEL2 = $02;
  208. LVL_BODLEVEL3 = $03;
  209. LVL_BODLEVEL4 = $04;
  210. LVL_BODLEVEL5 = $05;
  211. LVL_BODLEVEL6 = $06;
  212. LVL_BODLEVEL7 = $07;
  213. // BOD_VLMCFG
  214. VLMCFGmask = $06;
  215. VLMCFG_BELOW = $00;
  216. VLMCFG_ABOVE = $02;
  217. VLMCFG_CROSS = $04;
  218. // voltage level monitor interrrupt enable
  219. VLMIEbm = $01;
  220. // Voltage level monitor interrupt flag
  221. VLMIFbm = $01;
  222. // Voltage level monitor status
  223. VLMSbm = $01;
  224. // BOD_VLMLVL
  225. VLMLVLmask = $03;
  226. VLMLVL_5ABOVE = $00;
  227. VLMLVL_15ABOVE = $01;
  228. VLMLVL_25ABOVE = $02;
  229. end;
  230. TCCL = object //Configurable Custom Logic
  231. CTRLA: byte; //Control Register A
  232. SEQCTRL0: byte; //Sequential Control 0
  233. Reserved2: byte;
  234. Reserved3: byte;
  235. Reserved4: byte;
  236. LUT0CTRLA: byte; //LUT Control 0 A
  237. LUT0CTRLB: byte; //LUT Control 0 B
  238. LUT0CTRLC: byte; //LUT Control 0 C
  239. TRUTH0: byte; //Truth 0
  240. LUT1CTRLA: byte; //LUT Control 1 A
  241. LUT1CTRLB: byte; //LUT Control 1 B
  242. LUT1CTRLC: byte; //LUT Control 1 C
  243. TRUTH1: byte; //Truth 1
  244. const
  245. // Enable
  246. ENABLEbm = $01;
  247. // Run in Standby
  248. RUNSTDBYbm = $40;
  249. // Clock Source Selection
  250. CLKSRCbm = $40;
  251. // CCL_EDGEDET
  252. EDGEDETmask = $80;
  253. EDGEDET_DIS = $00;
  254. EDGEDET_EN = $80;
  255. // CCL_FILTSEL
  256. FILTSELmask = $30;
  257. FILTSEL_DISABLE = $00;
  258. FILTSEL_SYNCH = $10;
  259. FILTSEL_FILTER = $20;
  260. // Output Enable
  261. OUTENbm = $08;
  262. // CCL_INSEL0
  263. INSEL0mask = $0F;
  264. INSEL0_MASK = $00;
  265. INSEL0_FEEDBACK = $01;
  266. INSEL0_LINK = $02;
  267. INSEL0_EVENT0 = $03;
  268. INSEL0_EVENT1 = $04;
  269. INSEL0_IO = $05;
  270. INSEL0_AC0 = $06;
  271. INSEL0_TCB0 = $07;
  272. INSEL0_TCA0 = $08;
  273. INSEL0_TCD0 = $09;
  274. INSEL0_USART0 = $0A;
  275. INSEL0_SPI0 = $0B;
  276. // CCL_INSEL1
  277. INSEL1mask = $F0;
  278. INSEL1_MASK = $00;
  279. INSEL1_FEEDBACK = $10;
  280. INSEL1_LINK = $20;
  281. INSEL1_EVENT0 = $30;
  282. INSEL1_EVENT1 = $40;
  283. INSEL1_IO = $50;
  284. INSEL1_AC0 = $60;
  285. INSEL1_TCB0 = $70;
  286. INSEL1_TCA0 = $80;
  287. INSEL1_TCD0 = $90;
  288. INSEL1_USART0 = $A0;
  289. INSEL1_SPI0 = $B0;
  290. // CCL_INSEL2
  291. INSEL2mask = $0F;
  292. INSEL2_MASK = $00;
  293. INSEL2_FEEDBACK = $01;
  294. INSEL2_LINK = $02;
  295. INSEL2_EVENT0 = $03;
  296. INSEL2_EVENT1 = $04;
  297. INSEL2_IO = $05;
  298. INSEL2_AC0 = $06;
  299. INSEL2_TCB0 = $07;
  300. INSEL2_TCA0 = $08;
  301. INSEL2_TCD0 = $09;
  302. INSEL2_SPI0 = $0B;
  303. // CCL_SEQSEL
  304. SEQSELmask = $07;
  305. SEQSEL_DISABLE = $00;
  306. SEQSEL_DFF = $01;
  307. SEQSEL_JK = $02;
  308. SEQSEL_LATCH = $03;
  309. SEQSEL_RS = $04;
  310. end;
  311. TCLKCTRL = object //Clock controller
  312. MCLKCTRLA: byte; //MCLK Control A
  313. MCLKCTRLB: byte; //MCLK Control B
  314. MCLKLOCK: byte; //MCLK Lock
  315. MCLKSTATUS: byte; //MCLK Status
  316. Reserved4: byte;
  317. Reserved5: byte;
  318. Reserved6: byte;
  319. Reserved7: byte;
  320. Reserved8: byte;
  321. Reserved9: byte;
  322. Reserved10: byte;
  323. Reserved11: byte;
  324. Reserved12: byte;
  325. Reserved13: byte;
  326. Reserved14: byte;
  327. Reserved15: byte;
  328. OSC20MCTRLA: byte; //OSC20M Control A
  329. OSC20MCALIBA: byte; //OSC20M Calibration A
  330. OSC20MCALIBB: byte; //OSC20M Calibration B
  331. Reserved19: byte;
  332. Reserved20: byte;
  333. Reserved21: byte;
  334. Reserved22: byte;
  335. Reserved23: byte;
  336. OSC32KCTRLA: byte; //OSC32K Control A
  337. const
  338. // System clock out
  339. CLKOUTbm = $80;
  340. // CLKCTRL_CLKSEL
  341. CLKSELmask = $03;
  342. CLKSEL_OSC20M = $00;
  343. CLKSEL_OSCULP32K = $01;
  344. CLKSEL_XOSC32K = $02;
  345. CLKSEL_EXTCLK = $03;
  346. // CLKCTRL_PDIV
  347. PDIVmask = $1E;
  348. PDIV_2X = $00;
  349. PDIV_4X = $02;
  350. PDIV_8X = $04;
  351. PDIV_16X = $06;
  352. PDIV_32X = $08;
  353. PDIV_64X = $0A;
  354. PDIV_6X = $10;
  355. PDIV_10X = $12;
  356. PDIV_12X = $14;
  357. PDIV_24X = $16;
  358. PDIV_48X = $18;
  359. // Prescaler enable
  360. PENbm = $01;
  361. // lock ebable
  362. LOCKENbm = $01;
  363. // External Clock status
  364. EXTSbm = $80;
  365. // 20MHz oscillator status
  366. OSC20MSbm = $10;
  367. // 32KHz oscillator status
  368. OSC32KSbm = $20;
  369. // System Oscillator changing
  370. SOSCbm = $01;
  371. // 32.768 kHz Crystal Oscillator status
  372. XOSC32KSbm = $40;
  373. // Calibration
  374. CAL20M0bm = $01;
  375. CAL20M1bm = $02;
  376. CAL20M2bm = $04;
  377. CAL20M3bm = $08;
  378. CAL20M4bm = $10;
  379. CAL20M5bm = $20;
  380. // Lock
  381. LOCKbm = $80;
  382. // Oscillator temperature coefficient
  383. TEMPCAL20M0bm = $01;
  384. TEMPCAL20M1bm = $02;
  385. TEMPCAL20M2bm = $04;
  386. TEMPCAL20M3bm = $08;
  387. // Run standby
  388. RUNSTDBYbm = $02;
  389. end;
  390. TCPU = object //CPU
  391. Reserved0: byte;
  392. Reserved1: byte;
  393. Reserved2: byte;
  394. Reserved3: byte;
  395. CCP: byte; //Configuration Change Protection
  396. Reserved5: byte;
  397. Reserved6: byte;
  398. Reserved7: byte;
  399. Reserved8: byte;
  400. Reserved9: byte;
  401. Reserved10: byte;
  402. Reserved11: byte;
  403. Reserved12: byte;
  404. SPL: byte; //Stack Pointer Low
  405. SPH: byte; //Stack Pointer High
  406. SREG: byte; //Status Register
  407. const
  408. // CPU_CCP
  409. CCPmask = $FF;
  410. CCP_SPM = $9D;
  411. CCP_IOREG = $D8;
  412. // Carry Flag
  413. Cbm = $01;
  414. // Half Carry Flag
  415. Hbm = $20;
  416. // Global Interrupt Enable Flag
  417. Ibm = $80;
  418. // Negative Flag
  419. Nbm = $04;
  420. // N Exclusive Or V Flag
  421. Sbm = $10;
  422. // Transfer Bit
  423. Tbm = $40;
  424. // Two's Complement Overflow Flag
  425. Vbm = $08;
  426. // Zero Flag
  427. Zbm = $02;
  428. end;
  429. TCPUINT = object //Interrupt Controller
  430. CTRLA: byte; //Control A
  431. STATUS: byte; //Status
  432. LVL0PRI: byte; //Interrupt Level 0 Priority
  433. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  434. const
  435. // Compact Vector Table
  436. CVTbm = $20;
  437. // Interrupt Vector Select
  438. IVSELbm = $40;
  439. // Round-robin Scheduling Enable
  440. LVL0RRbm = $01;
  441. // Interrupt Level Priority
  442. LVL0PRI0bm = $01;
  443. LVL0PRI1bm = $02;
  444. LVL0PRI2bm = $04;
  445. LVL0PRI3bm = $08;
  446. LVL0PRI4bm = $10;
  447. LVL0PRI5bm = $20;
  448. LVL0PRI6bm = $40;
  449. LVL0PRI7bm = $80;
  450. // Interrupt Vector with High Priority
  451. LVL1VEC0bm = $01;
  452. LVL1VEC1bm = $02;
  453. LVL1VEC2bm = $04;
  454. LVL1VEC3bm = $08;
  455. LVL1VEC4bm = $10;
  456. LVL1VEC5bm = $20;
  457. LVL1VEC6bm = $40;
  458. LVL1VEC7bm = $80;
  459. // Level 0 Interrupt Executing
  460. LVL0EXbm = $01;
  461. // Level 1 Interrupt Executing
  462. LVL1EXbm = $02;
  463. // Non-maskable Interrupt Executing
  464. NMIEXbm = $80;
  465. end;
  466. TCRCSCAN = object //CRCSCAN
  467. CTRLA: byte; //Control A
  468. CTRLB: byte; //Control B
  469. STATUS: byte; //Status
  470. const
  471. // Enable CRC scan
  472. ENABLEbm = $01;
  473. // Enable NMI Trigger
  474. NMIENbm = $02;
  475. // Reset CRC scan
  476. RESETbm = $80;
  477. // CRCSCAN_MODE
  478. MODEmask = $30;
  479. MODE_PRIORITY = $00;
  480. MODE_RESERVED = $10;
  481. MODE_BACKGROUND = $20;
  482. MODE_CONTINUOUS = $30;
  483. // CRCSCAN_SRC
  484. SRCmask = $03;
  485. SRC_FLASH = $00;
  486. SRC_APPLICATION = $01;
  487. SRC_BOOT = $02;
  488. // CRC Busy
  489. BUSYbm = $01;
  490. // CRC Ok
  491. OKbm = $02;
  492. end;
  493. TEVSYS = object //Event System
  494. ASYNCSTROBE: byte; //Asynchronous Channel Strobe
  495. SYNCSTROBE: byte; //Synchronous Channel Strobe
  496. ASYNCCH0: byte; //Asynchronous Channel 0 Generator Selection
  497. ASYNCCH1: byte; //Asynchronous Channel 1 Generator Selection
  498. Reserved4: byte;
  499. Reserved5: byte;
  500. Reserved6: byte;
  501. Reserved7: byte;
  502. Reserved8: byte;
  503. Reserved9: byte;
  504. SYNCCH0: byte; //Synchronous Channel 0 Generator Selection
  505. Reserved11: byte;
  506. Reserved12: byte;
  507. Reserved13: byte;
  508. Reserved14: byte;
  509. Reserved15: byte;
  510. Reserved16: byte;
  511. Reserved17: byte;
  512. ASYNCUSER0: byte; //Asynchronous User Ch 0 Input Selection - TCB0
  513. ASYNCUSER1: byte; //Asynchronous User Ch 1 Input Selection - ADC0
  514. ASYNCUSER2: byte; //Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  515. ASYNCUSER3: byte; //Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  516. ASYNCUSER4: byte; //Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  517. ASYNCUSER5: byte; //Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  518. ASYNCUSER6: byte; //Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  519. ASYNCUSER7: byte; //Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  520. ASYNCUSER8: byte; //Asynchronous User Ch 8 Input Selection - Event Out 0
  521. ASYNCUSER9: byte; //Asynchronous User Ch 9 Input Selection - Event Out 1
  522. ASYNCUSER10: byte; //Asynchronous User Ch 10 Input Selection - Event Out 2
  523. Reserved29: byte;
  524. Reserved30: byte;
  525. Reserved31: byte;
  526. Reserved32: byte;
  527. Reserved33: byte;
  528. SYNCUSER0: byte; //Synchronous User Ch 0 Input Selection - TCA0
  529. SYNCUSER1: byte; //Synchronous User Ch 1 Input Selection - USART0
  530. const
  531. // EVSYS_ASYNCCH0
  532. ASYNCCH0mask = $FF;
  533. ASYNCCH0_OFF = $00;
  534. ASYNCCH0_CCL_LUT0 = $01;
  535. ASYNCCH0_CCL_LUT1 = $02;
  536. ASYNCCH0_AC0_OUT = $03;
  537. ASYNCCH0_TCD0_CMPBCLR = $04;
  538. ASYNCCH0_TCD0_CMPASET = $05;
  539. ASYNCCH0_TCD0_CMPBSET = $06;
  540. ASYNCCH0_TCD0_PROGEV = $07;
  541. ASYNCCH0_RTC_OVF = $08;
  542. ASYNCCH0_RTC_CMP = $09;
  543. ASYNCCH0_PORTA_PIN0 = $0A;
  544. ASYNCCH0_PORTA_PIN1 = $0B;
  545. ASYNCCH0_PORTA_PIN2 = $0C;
  546. ASYNCCH0_PORTA_PIN3 = $0D;
  547. ASYNCCH0_PORTA_PIN4 = $0E;
  548. ASYNCCH0_PORTA_PIN5 = $0F;
  549. ASYNCCH0_PORTA_PIN6 = $10;
  550. ASYNCCH0_PORTA_PIN7 = $11;
  551. ASYNCCH0_UPDI = $12;
  552. // EVSYS_ASYNCCH1
  553. ASYNCCH1mask = $FF;
  554. ASYNCCH1_OFF = $00;
  555. ASYNCCH1_CCL_LUT0 = $01;
  556. ASYNCCH1_CCL_LUT1 = $02;
  557. ASYNCCH1_AC0_OUT = $03;
  558. ASYNCCH1_TCD0_CMPBCLR = $04;
  559. ASYNCCH1_TCD0_CMPASET = $05;
  560. ASYNCCH1_TCD0_CMPBSET = $06;
  561. ASYNCCH1_TCD0_PROGEV = $07;
  562. ASYNCCH1_RTC_OVF = $08;
  563. ASYNCCH1_RTC_CMP = $09;
  564. ASYNCCH1_PORTB_PIN0 = $0A;
  565. ASYNCCH1_PORTB_PIN1 = $0B;
  566. ASYNCCH1_PORTB_PIN2 = $0C;
  567. ASYNCCH1_PORTB_PIN3 = $0D;
  568. ASYNCCH1_PORTB_PIN4 = $0E;
  569. ASYNCCH1_PORTB_PIN5 = $0F;
  570. ASYNCCH1_PORTB_PIN6 = $10;
  571. ASYNCCH1_PORTB_PIN7 = $11;
  572. // EVSYS_ASYNCUSER0
  573. ASYNCUSER0mask = $FF;
  574. ASYNCUSER0_OFF = $00;
  575. ASYNCUSER0_SYNCCH0 = $01;
  576. ASYNCUSER0_SYNCCH1 = $02;
  577. ASYNCUSER0_ASYNCCH0 = $03;
  578. ASYNCUSER0_ASYNCCH1 = $04;
  579. ASYNCUSER0_ASYNCCH2 = $05;
  580. ASYNCUSER0_ASYNCCH3 = $06;
  581. // EVSYS_ASYNCUSER1
  582. ASYNCUSER1mask = $FF;
  583. ASYNCUSER1_OFF = $00;
  584. ASYNCUSER1_SYNCCH0 = $01;
  585. ASYNCUSER1_SYNCCH1 = $02;
  586. ASYNCUSER1_ASYNCCH0 = $03;
  587. ASYNCUSER1_ASYNCCH1 = $04;
  588. ASYNCUSER1_ASYNCCH2 = $05;
  589. ASYNCUSER1_ASYNCCH3 = $06;
  590. // EVSYS_ASYNCUSER2
  591. ASYNCUSER2mask = $FF;
  592. ASYNCUSER2_OFF = $00;
  593. ASYNCUSER2_SYNCCH0 = $01;
  594. ASYNCUSER2_SYNCCH1 = $02;
  595. ASYNCUSER2_ASYNCCH0 = $03;
  596. ASYNCUSER2_ASYNCCH1 = $04;
  597. ASYNCUSER2_ASYNCCH2 = $05;
  598. ASYNCUSER2_ASYNCCH3 = $06;
  599. // EVSYS_ASYNCUSER3
  600. ASYNCUSER3mask = $FF;
  601. ASYNCUSER3_OFF = $00;
  602. ASYNCUSER3_SYNCCH0 = $01;
  603. ASYNCUSER3_SYNCCH1 = $02;
  604. ASYNCUSER3_ASYNCCH0 = $03;
  605. ASYNCUSER3_ASYNCCH1 = $04;
  606. ASYNCUSER3_ASYNCCH2 = $05;
  607. ASYNCUSER3_ASYNCCH3 = $06;
  608. // EVSYS_ASYNCUSER4
  609. ASYNCUSER4mask = $FF;
  610. ASYNCUSER4_OFF = $00;
  611. ASYNCUSER4_SYNCCH0 = $01;
  612. ASYNCUSER4_SYNCCH1 = $02;
  613. ASYNCUSER4_ASYNCCH0 = $03;
  614. ASYNCUSER4_ASYNCCH1 = $04;
  615. ASYNCUSER4_ASYNCCH2 = $05;
  616. ASYNCUSER4_ASYNCCH3 = $06;
  617. // EVSYS_ASYNCUSER5
  618. ASYNCUSER5mask = $FF;
  619. ASYNCUSER5_OFF = $00;
  620. ASYNCUSER5_SYNCCH0 = $01;
  621. ASYNCUSER5_SYNCCH1 = $02;
  622. ASYNCUSER5_ASYNCCH0 = $03;
  623. ASYNCUSER5_ASYNCCH1 = $04;
  624. ASYNCUSER5_ASYNCCH2 = $05;
  625. ASYNCUSER5_ASYNCCH3 = $06;
  626. // EVSYS_ASYNCUSER6
  627. ASYNCUSER6mask = $FF;
  628. ASYNCUSER6_OFF = $00;
  629. ASYNCUSER6_SYNCCH0 = $01;
  630. ASYNCUSER6_SYNCCH1 = $02;
  631. ASYNCUSER6_ASYNCCH0 = $03;
  632. ASYNCUSER6_ASYNCCH1 = $04;
  633. ASYNCUSER6_ASYNCCH2 = $05;
  634. ASYNCUSER6_ASYNCCH3 = $06;
  635. // EVSYS_ASYNCUSER7
  636. ASYNCUSER7mask = $FF;
  637. ASYNCUSER7_OFF = $00;
  638. ASYNCUSER7_SYNCCH0 = $01;
  639. ASYNCUSER7_SYNCCH1 = $02;
  640. ASYNCUSER7_ASYNCCH0 = $03;
  641. ASYNCUSER7_ASYNCCH1 = $04;
  642. ASYNCUSER7_ASYNCCH2 = $05;
  643. ASYNCUSER7_ASYNCCH3 = $06;
  644. // EVSYS_ASYNCUSER8
  645. ASYNCUSER8mask = $FF;
  646. ASYNCUSER8_OFF = $00;
  647. ASYNCUSER8_SYNCCH0 = $01;
  648. ASYNCUSER8_SYNCCH1 = $02;
  649. ASYNCUSER8_ASYNCCH0 = $03;
  650. ASYNCUSER8_ASYNCCH1 = $04;
  651. ASYNCUSER8_ASYNCCH2 = $05;
  652. ASYNCUSER8_ASYNCCH3 = $06;
  653. // EVSYS_ASYNCUSER9
  654. ASYNCUSER9mask = $FF;
  655. ASYNCUSER9_OFF = $00;
  656. ASYNCUSER9_SYNCCH0 = $01;
  657. ASYNCUSER9_SYNCCH1 = $02;
  658. ASYNCUSER9_ASYNCCH0 = $03;
  659. ASYNCUSER9_ASYNCCH1 = $04;
  660. ASYNCUSER9_ASYNCCH2 = $05;
  661. ASYNCUSER9_ASYNCCH3 = $06;
  662. // EVSYS_ASYNCUSER10
  663. ASYNCUSER10mask = $FF;
  664. ASYNCUSER10_OFF = $00;
  665. ASYNCUSER10_SYNCCH0 = $01;
  666. ASYNCUSER10_SYNCCH1 = $02;
  667. ASYNCUSER10_ASYNCCH0 = $03;
  668. ASYNCUSER10_ASYNCCH1 = $04;
  669. ASYNCUSER10_ASYNCCH2 = $05;
  670. ASYNCUSER10_ASYNCCH3 = $06;
  671. // EVSYS_SYNCCH0
  672. SYNCCH0mask = $FF;
  673. SYNCCH0_OFF = $00;
  674. SYNCCH0_TCB0 = $01;
  675. SYNCCH0_TCA0_OVF_LUNF = $02;
  676. SYNCCH0_TCA0_HUNF = $03;
  677. SYNCCH0_TCA0_CMP0 = $04;
  678. SYNCCH0_TCA0_CMP1 = $05;
  679. SYNCCH0_TCA0_CMP2 = $06;
  680. SYNCCH0_PORTC_PIN0 = $07;
  681. SYNCCH0_PORTC_PIN1 = $08;
  682. SYNCCH0_PORTC_PIN2 = $09;
  683. SYNCCH0_PORTC_PIN3 = $0A;
  684. SYNCCH0_PORTC_PIN4 = $0B;
  685. SYNCCH0_PORTC_PIN5 = $0C;
  686. SYNCCH0_PORTA_PIN0 = $0D;
  687. SYNCCH0_PORTA_PIN1 = $0E;
  688. SYNCCH0_PORTA_PIN2 = $0F;
  689. SYNCCH0_PORTA_PIN3 = $10;
  690. SYNCCH0_PORTA_PIN4 = $11;
  691. SYNCCH0_PORTA_PIN5 = $12;
  692. SYNCCH0_PORTA_PIN6 = $13;
  693. SYNCCH0_PORTA_PIN7 = $14;
  694. // EVSYS_SYNCUSER0
  695. SYNCUSER0mask = $FF;
  696. SYNCUSER0_OFF = $00;
  697. SYNCUSER0_SYNCCH0 = $01;
  698. SYNCUSER0_SYNCCH1 = $02;
  699. // EVSYS_SYNCUSER1
  700. SYNCUSER1mask = $FF;
  701. SYNCUSER1_OFF = $00;
  702. SYNCUSER1_SYNCCH0 = $01;
  703. SYNCUSER1_SYNCCH1 = $02;
  704. end;
  705. TFUSE = object //Fuses
  706. WDTCFG: byte; //Watchdog Configuration
  707. BODCFG: byte; //BOD Configuration
  708. OSCCFG: byte; //Oscillator Configuration
  709. Reserved3: byte;
  710. TCD0CFG: byte; //TCD0 Configuration
  711. SYSCFG0: byte; //System Configuration 0
  712. SYSCFG1: byte; //System Configuration 1
  713. APPEND: byte; //Application Code Section End
  714. BOOTEND: byte; //Boot Section End
  715. const
  716. // FUSE_ACTIVE
  717. ACTIVEmask = $0C;
  718. ACTIVE_DIS = $00;
  719. ACTIVE_ENABLED = $04;
  720. ACTIVE_SAMPLED = $08;
  721. ACTIVE_ENWAKE = $0C;
  722. // FUSE_LVL
  723. LVLmask = $E0;
  724. LVL_BODLEVEL0 = $00;
  725. LVL_BODLEVEL1 = $20;
  726. LVL_BODLEVEL2 = $40;
  727. LVL_BODLEVEL3 = $60;
  728. LVL_BODLEVEL4 = $80;
  729. LVL_BODLEVEL5 = $A0;
  730. LVL_BODLEVEL6 = $C0;
  731. LVL_BODLEVEL7 = $E0;
  732. // FUSE_SAMPFREQ
  733. SAMPFREQmask = $10;
  734. SAMPFREQ_1KHz = $00;
  735. SAMPFREQ_125Hz = $10;
  736. // FUSE_SLEEP
  737. SLEEPmask = $03;
  738. SLEEP_DIS = $00;
  739. SLEEP_ENABLED = $01;
  740. SLEEP_SAMPLED = $02;
  741. // FUSE_FREQSEL
  742. FREQSELmask = $03;
  743. FREQSEL_16MHZ = $01;
  744. FREQSEL_20MHZ = $02;
  745. // Oscillator Lock
  746. OSCLOCKbm = $80;
  747. // FUSE_CRCSRC
  748. CRCSRCmask = $C0;
  749. CRCSRC_FLASH = $00;
  750. CRCSRC_BOOT = $40;
  751. CRCSRC_BOOTAPP = $80;
  752. CRCSRC_NOCRC = $C0;
  753. // EEPROM Save
  754. EESAVEbm = $01;
  755. // FUSE_RSTPINCFG
  756. RSTPINCFGmask = $0C;
  757. RSTPINCFG_GPIO = $00;
  758. RSTPINCFG_UPDI = $04;
  759. RSTPINCFG_RST = $08;
  760. // FUSE_SUT
  761. SUTmask = $07;
  762. SUT_0MS = $00;
  763. SUT_1MS = $01;
  764. SUT_2MS = $02;
  765. SUT_4MS = $03;
  766. SUT_8MS = $04;
  767. SUT_16MS = $05;
  768. SUT_32MS = $06;
  769. SUT_64MS = $07;
  770. // Compare A Default Output Value
  771. CMPAbm = $01;
  772. // Compare A Output Enable
  773. CMPAENbm = $10;
  774. // Compare B Default Output Value
  775. CMPBbm = $02;
  776. // Compare B Output Enable
  777. CMPBENbm = $20;
  778. // Compare C Default Output Value
  779. CMPCbm = $04;
  780. // Compare C Output Enable
  781. CMPCENbm = $40;
  782. // Compare D Default Output Value
  783. CMPDbm = $08;
  784. // Compare D Output Enable
  785. CMPDENbm = $80;
  786. // FUSE_PERIOD
  787. PERIODmask = $0F;
  788. PERIOD_OFF = $00;
  789. PERIOD_8CLK = $01;
  790. PERIOD_16CLK = $02;
  791. PERIOD_32CLK = $03;
  792. PERIOD_64CLK = $04;
  793. PERIOD_128CLK = $05;
  794. PERIOD_256CLK = $06;
  795. PERIOD_512CLK = $07;
  796. PERIOD_1KCLK = $08;
  797. PERIOD_2KCLK = $09;
  798. PERIOD_4KCLK = $0A;
  799. PERIOD_8KCLK = $0B;
  800. // FUSE_WINDOW
  801. WINDOWmask = $F0;
  802. WINDOW_OFF = $00;
  803. WINDOW_8CLK = $10;
  804. WINDOW_16CLK = $20;
  805. WINDOW_32CLK = $30;
  806. WINDOW_64CLK = $40;
  807. WINDOW_128CLK = $50;
  808. WINDOW_256CLK = $60;
  809. WINDOW_512CLK = $70;
  810. WINDOW_1KCLK = $80;
  811. WINDOW_2KCLK = $90;
  812. WINDOW_4KCLK = $A0;
  813. WINDOW_8KCLK = $B0;
  814. end;
  815. TGPIO = object //General Purpose IO
  816. GPIOR0: byte; //General Purpose IO Register 0
  817. GPIOR1: byte; //General Purpose IO Register 1
  818. GPIOR2: byte; //General Purpose IO Register 2
  819. GPIOR3: byte; //General Purpose IO Register 3
  820. end;
  821. TLOCKBIT = object //Lockbit
  822. LOCKBIT: byte; //Lock bits
  823. const
  824. // LOCKBIT_LB
  825. LBmask = $FF;
  826. LB_RWLOCK = $3A;
  827. LB_NOLOCK = $C5;
  828. end;
  829. TNVMCTRL = object //Non-volatile Memory Controller
  830. CTRLA: byte; //Control A
  831. CTRLB: byte; //Control B
  832. STATUS: byte; //Status
  833. INTCTRL: byte; //Interrupt Control
  834. INTFLAGS: byte; //Interrupt Flags
  835. Reserved5: byte;
  836. DATA: word; //Data
  837. ADDR: word; //Address
  838. const
  839. // NVMCTRL_CMD
  840. CMDmask = $07;
  841. CMD_NONE = $00;
  842. CMD_PAGEWRITE = $01;
  843. CMD_PAGEERASE = $02;
  844. CMD_PAGEERASEWRITE = $03;
  845. CMD_PAGEBUFCLR = $04;
  846. CMD_CHIPERASE = $05;
  847. CMD_EEERASE = $06;
  848. CMD_FUSEWRITE = $07;
  849. // Application code write protect
  850. APCWPbm = $01;
  851. // Boot Lock
  852. BOOTLOCKbm = $02;
  853. // EEPROM Ready
  854. EEREADYbm = $01;
  855. // EEPROM busy
  856. EEBUSYbm = $02;
  857. // Flash busy
  858. FBUSYbm = $01;
  859. // Write error
  860. WRERRORbm = $04;
  861. end;
  862. TPORT = object //I/O Ports
  863. DIR: byte; //Data Direction
  864. DIRSET: byte; //Data Direction Set
  865. DIRCLR: byte; //Data Direction Clear
  866. DIRTGL: byte; //Data Direction Toggle
  867. OUT_: byte; //Output Value
  868. OUTSET: byte; //Output Value Set
  869. OUTCLR: byte; //Output Value Clear
  870. OUTTGL: byte; //Output Value Toggle
  871. IN_: byte; //Input Value
  872. INTFLAGS: byte; //Interrupt Flags
  873. Reserved10: byte;
  874. Reserved11: byte;
  875. Reserved12: byte;
  876. Reserved13: byte;
  877. Reserved14: byte;
  878. Reserved15: byte;
  879. PIN0CTRL: byte; //Pin 0 Control
  880. PIN1CTRL: byte; //Pin 1 Control
  881. PIN2CTRL: byte; //Pin 2 Control
  882. PIN3CTRL: byte; //Pin 3 Control
  883. PIN4CTRL: byte; //Pin 4 Control
  884. PIN5CTRL: byte; //Pin 5 Control
  885. PIN6CTRL: byte; //Pin 6 Control
  886. PIN7CTRL: byte; //Pin 7 Control
  887. const
  888. // Pin Interrupt
  889. INT0bm = $01;
  890. INT1bm = $02;
  891. INT2bm = $04;
  892. INT3bm = $08;
  893. INT4bm = $10;
  894. INT5bm = $20;
  895. INT6bm = $40;
  896. INT7bm = $80;
  897. // Inverted I/O Enable
  898. INVENbm = $80;
  899. // PORT_ISC
  900. ISCmask = $07;
  901. ISC_INTDISABLE = $00;
  902. ISC_BOTHEDGES = $01;
  903. ISC_RISING = $02;
  904. ISC_FALLING = $03;
  905. ISC_INPUT_DISABLE = $04;
  906. ISC_LEVEL = $05;
  907. // Pullup enable
  908. PULLUPENbm = $08;
  909. end;
  910. TPORTMUX = object //Port Multiplexer
  911. CTRLA: byte; //Port Multiplexer Control A
  912. CTRLB: byte; //Port Multiplexer Control B
  913. CTRLC: byte; //Port Multiplexer Control C
  914. CTRLD: byte; //Port Multiplexer Control D
  915. const
  916. // Event Output 0
  917. EVOUT0bm = $01;
  918. // Event Output 1
  919. EVOUT1bm = $02;
  920. // Event Output 2
  921. EVOUT2bm = $04;
  922. // PORTMUX_LUT0
  923. LUT0mask = $10;
  924. LUT0_DEFAULT = $00;
  925. LUT0_ALTERNATE = $10;
  926. // PORTMUX_LUT1
  927. LUT1mask = $20;
  928. LUT1_DEFAULT = $00;
  929. LUT1_ALTERNATE = $20;
  930. // PORTMUX_SPI0
  931. SPI0mask = $04;
  932. SPI0_DEFAULT = $00;
  933. SPI0_ALTERNATE = $04;
  934. // PORTMUX_TWI0
  935. TWI0mask = $10;
  936. TWI0_DEFAULT = $00;
  937. TWI0_ALTERNATE = $10;
  938. // PORTMUX_USART0
  939. USART0mask = $01;
  940. USART0_DEFAULT = $00;
  941. USART0_ALTERNATE = $01;
  942. // PORTMUX_TCA00
  943. TCA00mask = $01;
  944. TCA00_DEFAULT = $00;
  945. TCA00_ALTERNATE = $01;
  946. // PORTMUX_TCA01
  947. TCA01mask = $02;
  948. TCA01_DEFAULT = $00;
  949. TCA01_ALTERNATE = $02;
  950. // PORTMUX_TCA02
  951. TCA02mask = $04;
  952. TCA02_DEFAULT = $00;
  953. TCA02_ALTERNATE = $04;
  954. // PORTMUX_TCA03
  955. TCA03mask = $08;
  956. TCA03_DEFAULT = $00;
  957. TCA03_ALTERNATE = $08;
  958. // PORTMUX_TCA04
  959. TCA04mask = $10;
  960. TCA04_DEFAULT = $00;
  961. TCA04_ALTERNATE = $10;
  962. // PORTMUX_TCA05
  963. TCA05mask = $20;
  964. TCA05_DEFAULT = $00;
  965. TCA05_ALTERNATE = $20;
  966. // PORTMUX_TCB0
  967. TCB0mask = $01;
  968. TCB0_DEFAULT = $00;
  969. TCB0_ALTERNATE = $01;
  970. end;
  971. TRSTCTRL = object //Reset controller
  972. RSTFR: byte; //Reset Flags
  973. SWRR: byte; //Software Reset
  974. const
  975. // Brown out detector Reset flag
  976. BORFbm = $02;
  977. // External Reset flag
  978. EXTRFbm = $04;
  979. // Power on Reset flag
  980. PORFbm = $01;
  981. // Software Reset flag
  982. SWRFbm = $10;
  983. // UPDI Reset flag
  984. UPDIRFbm = $20;
  985. // Watch dog Reset flag
  986. WDRFbm = $08;
  987. // Software reset enable
  988. SWREbm = $01;
  989. end;
  990. TRTC = object //Real-Time Counter
  991. CTRLA: byte; //Control A
  992. STATUS: byte; //Status
  993. INTCTRL: byte; //Interrupt Control
  994. INTFLAGS: byte; //Interrupt Flags
  995. TEMP: byte; //Temporary
  996. DBGCTRL: byte; //Debug control
  997. Reserved6: byte;
  998. CLKSEL: byte; //Clock Select
  999. CNT: word; //Counter
  1000. PER: word; //Period
  1001. CMP: word; //Compare
  1002. Reserved14: byte;
  1003. Reserved15: byte;
  1004. PITCTRLA: byte; //PIT Control A
  1005. PITSTATUS: byte; //PIT Status
  1006. PITINTCTRL: byte; //PIT Interrupt Control
  1007. PITINTFLAGS: byte; //PIT Interrupt Flags
  1008. Reserved20: byte;
  1009. PITDBGCTRL: byte; //PIT Debug control
  1010. const
  1011. // RTC_CLKSEL
  1012. CLKSELmask = $03;
  1013. CLKSEL_INT32K = $00;
  1014. CLKSEL_INT1K = $01;
  1015. CLKSEL_TOSC32K = $02;
  1016. CLKSEL_EXTCLK = $03;
  1017. // RTC_PRESCALER
  1018. PRESCALERmask = $78;
  1019. PRESCALER_DIV1 = $00;
  1020. PRESCALER_DIV2 = $08;
  1021. PRESCALER_DIV4 = $10;
  1022. PRESCALER_DIV8 = $18;
  1023. PRESCALER_DIV16 = $20;
  1024. PRESCALER_DIV32 = $28;
  1025. PRESCALER_DIV64 = $30;
  1026. PRESCALER_DIV128 = $38;
  1027. PRESCALER_DIV256 = $40;
  1028. PRESCALER_DIV512 = $48;
  1029. PRESCALER_DIV1024 = $50;
  1030. PRESCALER_DIV2048 = $58;
  1031. PRESCALER_DIV4096 = $60;
  1032. PRESCALER_DIV8192 = $68;
  1033. PRESCALER_DIV16384 = $70;
  1034. PRESCALER_DIV32768 = $78;
  1035. // Enable
  1036. RTCENbm = $01;
  1037. // Run In Standby
  1038. RUNSTDBYbm = $80;
  1039. // Run in debug
  1040. DBGRUNbm = $01;
  1041. // Compare Match Interrupt enable
  1042. CMPbm = $02;
  1043. // Overflow Interrupt enable
  1044. OVFbm = $01;
  1045. // RTC_PERIOD
  1046. PERIODmask = $78;
  1047. PERIOD_OFF = $00;
  1048. PERIOD_CYC4 = $08;
  1049. PERIOD_CYC8 = $10;
  1050. PERIOD_CYC16 = $18;
  1051. PERIOD_CYC32 = $20;
  1052. PERIOD_CYC64 = $28;
  1053. PERIOD_CYC128 = $30;
  1054. PERIOD_CYC256 = $38;
  1055. PERIOD_CYC512 = $40;
  1056. PERIOD_CYC1024 = $48;
  1057. PERIOD_CYC2048 = $50;
  1058. PERIOD_CYC4096 = $58;
  1059. PERIOD_CYC8192 = $60;
  1060. PERIOD_CYC16384 = $68;
  1061. PERIOD_CYC32768 = $70;
  1062. // Enable
  1063. PITENbm = $01;
  1064. // Periodic Interrupt
  1065. PIbm = $01;
  1066. // CTRLA Synchronization Busy Flag
  1067. CTRLBUSYbm = $01;
  1068. // Comparator Synchronization Busy Flag
  1069. CMPBUSYbm = $08;
  1070. // Count Synchronization Busy Flag
  1071. CNTBUSYbm = $02;
  1072. // CTRLA Synchronization Busy Flag
  1073. CTRLABUSYbm = $01;
  1074. // Period Synchronization Busy Flag
  1075. PERBUSYbm = $04;
  1076. end;
  1077. TSIGROW = object //Signature row
  1078. DEVICEID0: byte; //Device ID Byte 0
  1079. DEVICEID1: byte; //Device ID Byte 1
  1080. DEVICEID2: byte; //Device ID Byte 2
  1081. SERNUM0: byte; //Serial Number Byte 0
  1082. SERNUM1: byte; //Serial Number Byte 1
  1083. SERNUM2: byte; //Serial Number Byte 2
  1084. SERNUM3: byte; //Serial Number Byte 3
  1085. SERNUM4: byte; //Serial Number Byte 4
  1086. SERNUM5: byte; //Serial Number Byte 5
  1087. SERNUM6: byte; //Serial Number Byte 6
  1088. SERNUM7: byte; //Serial Number Byte 7
  1089. SERNUM8: byte; //Serial Number Byte 8
  1090. SERNUM9: byte; //Serial Number Byte 9
  1091. Reserved13: byte;
  1092. Reserved14: byte;
  1093. Reserved15: byte;
  1094. Reserved16: byte;
  1095. Reserved17: byte;
  1096. Reserved18: byte;
  1097. Reserved19: byte;
  1098. Reserved20: byte;
  1099. Reserved21: byte;
  1100. Reserved22: byte;
  1101. Reserved23: byte;
  1102. Reserved24: byte;
  1103. Reserved25: byte;
  1104. Reserved26: byte;
  1105. Reserved27: byte;
  1106. Reserved28: byte;
  1107. Reserved29: byte;
  1108. Reserved30: byte;
  1109. Reserved31: byte;
  1110. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  1111. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  1112. OSC16ERR3V: byte; //OSC16 error at 3V
  1113. OSC16ERR5V: byte; //OSC16 error at 5V
  1114. OSC20ERR3V: byte; //OSC20 error at 3V
  1115. OSC20ERR5V: byte; //OSC20 error at 5V
  1116. end;
  1117. TSLPCTRL = object //Sleep Controller
  1118. CTRLA: byte; //Control
  1119. const
  1120. // Sleep enable
  1121. SENbm = $01;
  1122. // SLPCTRL_SMODE
  1123. SMODEmask = $06;
  1124. SMODE_IDLE = $00;
  1125. SMODE_STDBY = $02;
  1126. SMODE_PDOWN = $04;
  1127. end;
  1128. TSPI = object //Serial Peripheral Interface
  1129. CTRLA: byte; //Control A
  1130. CTRLB: byte; //Control B
  1131. INTCTRL: byte; //Interrupt Control
  1132. INTFLAGS: byte; //Interrupt Flags
  1133. DATA: byte; //Data
  1134. const
  1135. // Enable Double Speed
  1136. CLK2Xbm = $10;
  1137. // Data Order Setting
  1138. DORDbm = $40;
  1139. // Enable Module
  1140. ENABLEbm = $01;
  1141. // Master Operation Enable
  1142. MASTERbm = $20;
  1143. // SPI_PRESC
  1144. PRESCmask = $06;
  1145. PRESC_DIV4 = $00;
  1146. PRESC_DIV16 = $02;
  1147. PRESC_DIV64 = $04;
  1148. PRESC_DIV128 = $06;
  1149. // Buffer Mode Enable
  1150. BUFENbm = $80;
  1151. // Buffer Write Mode
  1152. BUFWRbm = $40;
  1153. // SPI_MODE
  1154. MODEmask = $03;
  1155. MODE_0 = $00;
  1156. MODE_1 = $01;
  1157. MODE_2 = $02;
  1158. MODE_3 = $03;
  1159. // Slave Select Disable
  1160. SSDbm = $04;
  1161. // Data Register Empty Interrupt Enable
  1162. DREIEbm = $20;
  1163. // Interrupt Enable
  1164. IEbm = $01;
  1165. // Receive Complete Interrupt Enable
  1166. RXCIEbm = $80;
  1167. // Slave Select Trigger Interrupt Enable
  1168. SSIEbm = $10;
  1169. // Transfer Complete Interrupt Enable
  1170. TXCIEbm = $40;
  1171. // Buffer Overflow
  1172. BUFOVFbm = $01;
  1173. // Data Register Empty Interrupt Flag
  1174. DREIFbm = $20;
  1175. // Receive Complete Interrupt Flag
  1176. RXCIFbm = $80;
  1177. // Slave Select Trigger Interrupt Flag
  1178. SSIFbm = $10;
  1179. // Transfer Complete Interrupt Flag
  1180. TXCIFbm = $40;
  1181. // Interrupt Flag
  1182. IFbm = $80;
  1183. // Write Collision
  1184. WRCOLbm = $40;
  1185. end;
  1186. TSYSCFG = object //System Configuration Registers
  1187. Reserved0: byte;
  1188. REVID: byte; //Revision ID
  1189. EXTBRK: byte; //External Break
  1190. const
  1191. // External break enable
  1192. ENEXTBRKbm = $01;
  1193. end;
  1194. TTCA_SINGLE = object //16-bit Timer/Counter Type A - Single Mode
  1195. CTRLA: byte; //Control A
  1196. CTRLB: byte; //Control B
  1197. CTRLC: byte; //Control C
  1198. CTRLD: byte; //Control D
  1199. CTRLECLR: byte; //Control E Clear
  1200. CTRLESET: byte; //Control E Set
  1201. CTRLFCLR: byte; //Control F Clear
  1202. CTRLFSET: byte; //Control F Set
  1203. Reserved8: byte;
  1204. EVCTRL: byte; //Event Control
  1205. INTCTRL: byte; //Interrupt Control
  1206. INTFLAGS: byte; //Interrupt Flags
  1207. Reserved12: byte;
  1208. Reserved13: byte;
  1209. DBGCTRL: byte; //Degbug Control
  1210. TEMP: byte; //Temporary data for 16-bit Access
  1211. Reserved16: byte;
  1212. Reserved17: byte;
  1213. Reserved18: byte;
  1214. Reserved19: byte;
  1215. Reserved20: byte;
  1216. Reserved21: byte;
  1217. Reserved22: byte;
  1218. Reserved23: byte;
  1219. Reserved24: byte;
  1220. Reserved25: byte;
  1221. Reserved26: byte;
  1222. Reserved27: byte;
  1223. Reserved28: byte;
  1224. Reserved29: byte;
  1225. Reserved30: byte;
  1226. Reserved31: byte;
  1227. CNT: word; //Count
  1228. Reserved34: byte;
  1229. Reserved35: byte;
  1230. Reserved36: byte;
  1231. Reserved37: byte;
  1232. PER: word; //Period
  1233. CMP0: word; //Compare 0
  1234. CMP1: word; //Compare 1
  1235. CMP2: word; //Compare 2
  1236. Reserved46: byte;
  1237. Reserved47: byte;
  1238. Reserved48: byte;
  1239. Reserved49: byte;
  1240. Reserved50: byte;
  1241. Reserved51: byte;
  1242. Reserved52: byte;
  1243. Reserved53: byte;
  1244. PERBUF: word; //Period Buffer
  1245. CMP0BUF: word; //Compare 0 Buffer
  1246. CMP1BUF: word; //Compare 1 Buffer
  1247. CMP2BUF: word; //Compare 2 Buffer
  1248. const
  1249. // TCA_SINGLE_CLKSEL
  1250. SINGLE_CLKSELmask = $0E;
  1251. SINGLE_CLKSEL_DIV1 = $00;
  1252. SINGLE_CLKSEL_DIV2 = $02;
  1253. SINGLE_CLKSEL_DIV4 = $04;
  1254. SINGLE_CLKSEL_DIV8 = $06;
  1255. SINGLE_CLKSEL_DIV16 = $08;
  1256. SINGLE_CLKSEL_DIV64 = $0A;
  1257. SINGLE_CLKSEL_DIV256 = $0C;
  1258. SINGLE_CLKSEL_DIV1024 = $0E;
  1259. // Module Enable
  1260. ENABLEbm = $01;
  1261. // Auto Lock Update
  1262. ALUPDbm = $08;
  1263. // Compare 0 Enable
  1264. CMP0ENbm = $10;
  1265. // Compare 1 Enable
  1266. CMP1ENbm = $20;
  1267. // Compare 2 Enable
  1268. CMP2ENbm = $40;
  1269. // TCA_SINGLE_WGMODE
  1270. SINGLE_WGMODEmask = $07;
  1271. SINGLE_WGMODE_NORMAL = $00;
  1272. SINGLE_WGMODE_FRQ = $01;
  1273. SINGLE_WGMODE_SINGLESLOPE = $03;
  1274. SINGLE_WGMODE_DSTOP = $05;
  1275. SINGLE_WGMODE_DSBOTH = $06;
  1276. SINGLE_WGMODE_DSBOTTOM = $07;
  1277. // Compare 0 Waveform Output Value
  1278. CMP0OVbm = $01;
  1279. // Compare 1 Waveform Output Value
  1280. CMP1OVbm = $02;
  1281. // Compare 2 Waveform Output Value
  1282. CMP2OVbm = $04;
  1283. // Split Mode Enable
  1284. SPLITMbm = $01;
  1285. // TCA_SINGLE_CMD
  1286. SINGLE_CMDmask = $0C;
  1287. SINGLE_CMD_NONE = $00;
  1288. SINGLE_CMD_UPDATE = $04;
  1289. SINGLE_CMD_RESTART = $08;
  1290. SINGLE_CMD_RESET = $0C;
  1291. // Direction
  1292. DIRbm = $01;
  1293. // Lock Update
  1294. LUPDbm = $02;
  1295. // Compare 0 Buffer Valid
  1296. CMP0BVbm = $02;
  1297. // Compare 1 Buffer Valid
  1298. CMP1BVbm = $04;
  1299. // Compare 2 Buffer Valid
  1300. CMP2BVbm = $08;
  1301. // Period Buffer Valid
  1302. PERBVbm = $01;
  1303. // Debug Run
  1304. DBGRUNbm = $01;
  1305. // Count on Event Input
  1306. CNTEIbm = $01;
  1307. // TCA_SINGLE_EVACT
  1308. SINGLE_EVACTmask = $06;
  1309. SINGLE_EVACT_POSEDGE = $00;
  1310. SINGLE_EVACT_ANYEDGE = $02;
  1311. SINGLE_EVACT_HIGHLVL = $04;
  1312. SINGLE_EVACT_UPDOWN = $06;
  1313. // Compare 0 Interrupt
  1314. CMP0bm = $10;
  1315. // Compare 1 Interrupt
  1316. CMP1bm = $20;
  1317. // Compare 2 Interrupt
  1318. CMP2bm = $40;
  1319. // Overflow Interrupt
  1320. OVFbm = $01;
  1321. end;
  1322. TTCA_SPLIT = object //16-bit Timer/Counter Type A - Split Mode
  1323. CTRLA: byte; //Control A
  1324. CTRLB: byte; //Control B
  1325. CTRLC: byte; //Control C
  1326. CTRLD: byte; //Control D
  1327. CTRLECLR: byte; //Control E Clear
  1328. CTRLESET: byte; //Control E Set
  1329. Reserved6: byte;
  1330. Reserved7: byte;
  1331. Reserved8: byte;
  1332. Reserved9: byte;
  1333. INTCTRL: byte; //Interrupt Control
  1334. INTFLAGS: byte; //Interrupt Flags
  1335. Reserved12: byte;
  1336. Reserved13: byte;
  1337. DBGCTRL: byte; //Degbug Control
  1338. Reserved15: byte;
  1339. Reserved16: byte;
  1340. Reserved17: byte;
  1341. Reserved18: byte;
  1342. Reserved19: byte;
  1343. Reserved20: byte;
  1344. Reserved21: byte;
  1345. Reserved22: byte;
  1346. Reserved23: byte;
  1347. Reserved24: byte;
  1348. Reserved25: byte;
  1349. Reserved26: byte;
  1350. Reserved27: byte;
  1351. Reserved28: byte;
  1352. Reserved29: byte;
  1353. Reserved30: byte;
  1354. Reserved31: byte;
  1355. LCNT: byte; //Low Count
  1356. HCNT: byte; //High Count
  1357. Reserved34: byte;
  1358. Reserved35: byte;
  1359. Reserved36: byte;
  1360. Reserved37: byte;
  1361. LPER: byte; //Low Period
  1362. HPER: byte; //High Period
  1363. LCMP0: byte; //Low Compare
  1364. HCMP0: byte; //High Compare
  1365. LCMP1: byte; //Low Compare
  1366. HCMP1: byte; //High Compare
  1367. LCMP2: byte; //Low Compare
  1368. HCMP2: byte; //High Compare
  1369. const
  1370. // TCA_SPLIT_CLKSEL
  1371. SPLIT_CLKSELmask = $0E;
  1372. SPLIT_CLKSEL_DIV1 = $00;
  1373. SPLIT_CLKSEL_DIV2 = $02;
  1374. SPLIT_CLKSEL_DIV4 = $04;
  1375. SPLIT_CLKSEL_DIV8 = $06;
  1376. SPLIT_CLKSEL_DIV16 = $08;
  1377. SPLIT_CLKSEL_DIV64 = $0A;
  1378. SPLIT_CLKSEL_DIV256 = $0C;
  1379. SPLIT_CLKSEL_DIV1024 = $0E;
  1380. // Module Enable
  1381. ENABLEbm = $01;
  1382. // High Compare 0 Enable
  1383. HCMP0ENbm = $10;
  1384. // High Compare 1 Enable
  1385. HCMP1ENbm = $20;
  1386. // High Compare 2 Enable
  1387. HCMP2ENbm = $40;
  1388. // Low Compare 0 Enable
  1389. LCMP0ENbm = $01;
  1390. // Low Compare 1 Enable
  1391. LCMP1ENbm = $02;
  1392. // Low Compare 2 Enable
  1393. LCMP2ENbm = $04;
  1394. // High Compare 0 Output Value
  1395. HCMP0OVbm = $10;
  1396. // High Compare 1 Output Value
  1397. HCMP1OVbm = $20;
  1398. // High Compare 2 Output Value
  1399. HCMP2OVbm = $40;
  1400. // Low Compare 0 Output Value
  1401. LCMP0OVbm = $01;
  1402. // Low Compare 1 Output Value
  1403. LCMP1OVbm = $02;
  1404. // Low Compare 2 Output Value
  1405. LCMP2OVbm = $04;
  1406. // Split Mode Enable
  1407. SPLITMbm = $01;
  1408. // TCA_SPLIT_CMD
  1409. SPLIT_CMDmask = $0C;
  1410. SPLIT_CMD_NONE = $00;
  1411. SPLIT_CMD_UPDATE = $04;
  1412. SPLIT_CMD_RESTART = $08;
  1413. SPLIT_CMD_RESET = $0C;
  1414. // Debug Run
  1415. DBGRUNbm = $01;
  1416. // High Underflow Interrupt Enable
  1417. HUNFbm = $02;
  1418. // Low Compare 0 Interrupt Enable
  1419. LCMP0bm = $10;
  1420. // Low Compare 1 Interrupt Enable
  1421. LCMP1bm = $20;
  1422. // Low Compare 2 Interrupt Enable
  1423. LCMP2bm = $40;
  1424. // Low Underflow Interrupt Enable
  1425. LUNFbm = $01;
  1426. end;
  1427. TTCA = record //16-bit Timer/Counter Type A
  1428. case byte of
  1429. 0: (SINGLE: TTCA_SINGLE);
  1430. 1: (SPLIT: TTCA_SPLIT);
  1431. end;
  1432. TTCB = object //16-bit Timer Type B
  1433. CTRLA: byte; //Control A
  1434. CTRLB: byte; //Control Register B
  1435. Reserved2: byte;
  1436. Reserved3: byte;
  1437. EVCTRL: byte; //Event Control
  1438. INTCTRL: byte; //Interrupt Control
  1439. INTFLAGS: byte; //Interrupt Flags
  1440. STATUS: byte; //Status
  1441. DBGCTRL: byte; //Debug Control
  1442. TEMP: byte; //Temporary Value
  1443. CNT: word; //Count
  1444. CCMP: word; //Compare or Capture
  1445. const
  1446. // TCB_CLKSEL
  1447. CLKSELmask = $06;
  1448. CLKSEL_CLKDIV1 = $00;
  1449. CLKSEL_CLKDIV2 = $02;
  1450. CLKSEL_CLKTCA = $04;
  1451. // Enable
  1452. ENABLEbm = $01;
  1453. // Run Standby
  1454. RUNSTDBYbm = $40;
  1455. // Synchronize Update
  1456. SYNCUPDbm = $10;
  1457. // Asynchronous Enable
  1458. ASYNCbm = $40;
  1459. // Pin Output Enable
  1460. CCMPENbm = $10;
  1461. // Pin Initial State
  1462. CCMPINITbm = $20;
  1463. // TCB_CNTMODE
  1464. CNTMODEmask = $07;
  1465. CNTMODE_INT = $00;
  1466. CNTMODE_TIMEOUT = $01;
  1467. CNTMODE_CAPT = $02;
  1468. CNTMODE_FRQ = $03;
  1469. CNTMODE_PW = $04;
  1470. CNTMODE_FRQPW = $05;
  1471. CNTMODE_SINGLE = $06;
  1472. CNTMODE_PWM8 = $07;
  1473. // Debug Run
  1474. DBGRUNbm = $01;
  1475. // Event Input Enable
  1476. CAPTEIbm = $01;
  1477. // Event Edge
  1478. EDGEbm = $10;
  1479. // Input Capture Noise Cancellation Filter
  1480. FILTERbm = $40;
  1481. // Capture or Timeout
  1482. CAPTbm = $01;
  1483. // Run
  1484. RUNbm = $01;
  1485. end;
  1486. TTWI = object //Two-Wire Interface
  1487. CTRLA: byte; //Control A
  1488. Reserved1: byte;
  1489. DBGCTRL: byte; //Debug Control Register
  1490. MCTRLA: byte; //Master Control A
  1491. MCTRLB: byte; //Master Control B
  1492. MSTATUS: byte; //Master Status
  1493. MBAUD: byte; //Master Baurd Rate Control
  1494. MADDR: byte; //Master Address
  1495. MDATA: byte; //Master Data
  1496. SCTRLA: byte; //Slave Control A
  1497. SCTRLB: byte; //Slave Control B
  1498. SSTATUS: byte; //Slave Status
  1499. SADDR: byte; //Slave Address
  1500. SDATA: byte; //Slave Data
  1501. SADDRMASK: byte; //Slave Address Mask
  1502. const
  1503. // FM Plus Enable
  1504. FMPENbm = $02;
  1505. // TWI_SDAHOLD
  1506. SDAHOLDmask = $0C;
  1507. SDAHOLD_OFF = $00;
  1508. SDAHOLD_50NS = $04;
  1509. SDAHOLD_300NS = $08;
  1510. SDAHOLD_500NS = $0C;
  1511. // TWI_SDASETUP
  1512. SDASETUPmask = $10;
  1513. SDASETUP_4CYC = $00;
  1514. SDASETUP_8CYC = $10;
  1515. // Debug Run
  1516. DBGRUNbm = $01;
  1517. // Enable TWI Master
  1518. ENABLEbm = $01;
  1519. // Quick Command Enable
  1520. QCENbm = $10;
  1521. // Read Interrupt Enable
  1522. RIENbm = $80;
  1523. // Smart Mode Enable
  1524. SMENbm = $02;
  1525. // TWI_TIMEOUT
  1526. TIMEOUTmask = $0C;
  1527. TIMEOUT_DISABLED = $00;
  1528. TIMEOUT_50US = $04;
  1529. TIMEOUT_100US = $08;
  1530. TIMEOUT_200US = $0C;
  1531. // Write Interrupt Enable
  1532. WIENbm = $40;
  1533. // TWI_ACKACT
  1534. ACKACTmask = $04;
  1535. ACKACT_ACK = $00;
  1536. ACKACT_NACK = $04;
  1537. // Flush
  1538. FLUSHbm = $08;
  1539. // TWI_MCMD
  1540. MCMDmask = $03;
  1541. MCMD_NOACT = $00;
  1542. MCMD_REPSTART = $01;
  1543. MCMD_RECVTRANS = $02;
  1544. MCMD_STOP = $03;
  1545. // Arbitration Lost
  1546. ARBLOSTbm = $08;
  1547. // Bus Error
  1548. BUSERRbm = $04;
  1549. // TWI_BUSSTATE
  1550. BUSSTATEmask = $03;
  1551. BUSSTATE_UNKNOWN = $00;
  1552. BUSSTATE_IDLE = $01;
  1553. BUSSTATE_OWNER = $02;
  1554. BUSSTATE_BUSY = $03;
  1555. // Clock Hold
  1556. CLKHOLDbm = $20;
  1557. // Read Interrupt Flag
  1558. RIFbm = $80;
  1559. // Received Acknowledge
  1560. RXACKbm = $10;
  1561. // Write Interrupt Flag
  1562. WIFbm = $40;
  1563. // Address Enable
  1564. ADDRENbm = $01;
  1565. // Address Mask
  1566. ADDRMASK0bm = $02;
  1567. ADDRMASK1bm = $04;
  1568. ADDRMASK2bm = $08;
  1569. ADDRMASK3bm = $10;
  1570. ADDRMASK4bm = $20;
  1571. ADDRMASK5bm = $40;
  1572. ADDRMASK6bm = $80;
  1573. // Address/Stop Interrupt Enable
  1574. APIENbm = $40;
  1575. // Data Interrupt Enable
  1576. DIENbm = $80;
  1577. // Stop Interrupt Enable
  1578. PIENbm = $20;
  1579. // Promiscuous Mode Enable
  1580. PMENbm = $04;
  1581. // TWI_SCMD
  1582. SCMDmask = $03;
  1583. SCMD_NOACT = $00;
  1584. SCMD_COMPTRANS = $02;
  1585. SCMD_RESPONSE = $03;
  1586. // TWI_AP
  1587. APmask = $01;
  1588. AP_STOP = $00;
  1589. AP_ADR = $01;
  1590. // Address/Stop Interrupt Flag
  1591. APIFbm = $40;
  1592. // Collision
  1593. COLLbm = $08;
  1594. // Data Interrupt Flag
  1595. DIFbm = $80;
  1596. // Read/Write Direction
  1597. DIRbm = $02;
  1598. end;
  1599. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1600. RXDATAL: byte; //Receive Data Low Byte
  1601. RXDATAH: byte; //Receive Data High Byte
  1602. TXDATAL: byte; //Transmit Data Low Byte
  1603. TXDATAH: byte; //Transmit Data High Byte
  1604. STATUS: byte; //Status
  1605. CTRLA: byte; //Control A
  1606. CTRLB: byte; //Control B
  1607. CTRLC: byte; //Control C
  1608. BAUD: word; //Baud Rate
  1609. Reserved10: byte;
  1610. DBGCTRL: byte; //Debug Control
  1611. EVCTRL: byte; //Event Control
  1612. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1613. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1614. const
  1615. // Auto-baud Error Interrupt Enable
  1616. ABEIEbm = $04;
  1617. // Data Register Empty Interrupt Enable
  1618. DREIEbm = $20;
  1619. // Loop-back Mode Enable
  1620. LBMEbm = $08;
  1621. // USART_RS485
  1622. RS485mask = $03;
  1623. RS485_OFF = $00;
  1624. RS485_EXT = $01;
  1625. RS485_INT = $02;
  1626. // Receive Complete Interrupt Enable
  1627. RXCIEbm = $80;
  1628. // Receiver Start Frame Interrupt Enable
  1629. RXSIEbm = $10;
  1630. // Transmit Complete Interrupt Enable
  1631. TXCIEbm = $40;
  1632. // Multi-processor Communication Mode
  1633. MPCMbm = $01;
  1634. // Open Drain Mode Enable
  1635. ODMEbm = $08;
  1636. // Reciever enable
  1637. RXENbm = $80;
  1638. // USART_RXMODE
  1639. RXMODEmask = $06;
  1640. RXMODE_NORMAL = $00;
  1641. RXMODE_CLK2X = $02;
  1642. RXMODE_GENAUTO = $04;
  1643. RXMODE_LINAUTO = $06;
  1644. // Start Frame Detection Enable
  1645. SFDENbm = $10;
  1646. // Transmitter Enable
  1647. TXENbm = $40;
  1648. // USART_MSPI_CMODE
  1649. MSPI_CMODEmask = $C0;
  1650. MSPI_CMODE_ASYNCHRONOUS = $00;
  1651. MSPI_CMODE_SYNCHRONOUS = $40;
  1652. MSPI_CMODE_IRCOM = $80;
  1653. MSPI_CMODE_MSPI = $C0;
  1654. // SPI Master Mode, Clock Phase
  1655. UCPHAbm = $02;
  1656. // SPI Master Mode, Data Order
  1657. UDORDbm = $04;
  1658. // USART_NORMAL_CHSIZE
  1659. NORMAL_CHSIZEmask = $07;
  1660. NORMAL_CHSIZE_5BIT = $00;
  1661. NORMAL_CHSIZE_6BIT = $01;
  1662. NORMAL_CHSIZE_7BIT = $02;
  1663. NORMAL_CHSIZE_8BIT = $03;
  1664. NORMAL_CHSIZE_9BITL = $06;
  1665. NORMAL_CHSIZE_9BITH = $07;
  1666. // USART_NORMAL_CMODE
  1667. NORMAL_CMODEmask = $C0;
  1668. NORMAL_CMODE_ASYNCHRONOUS = $00;
  1669. NORMAL_CMODE_SYNCHRONOUS = $40;
  1670. NORMAL_CMODE_IRCOM = $80;
  1671. NORMAL_CMODE_MSPI = $C0;
  1672. // USART_NORMAL_PMODE
  1673. NORMAL_PMODEmask = $30;
  1674. NORMAL_PMODE_DISABLED = $00;
  1675. NORMAL_PMODE_EVEN = $20;
  1676. NORMAL_PMODE_ODD = $30;
  1677. // USART_NORMAL_SBMODE
  1678. NORMAL_SBMODEmask = $08;
  1679. NORMAL_SBMODE_1BIT = $00;
  1680. NORMAL_SBMODE_2BIT = $08;
  1681. // Autobaud majority voter bypass
  1682. ABMBPbm = $80;
  1683. // Debug Run
  1684. DBGRUNbm = $01;
  1685. // IrDA Event Input Enable
  1686. IREIbm = $01;
  1687. // Buffer Overflow
  1688. BUFOVFbm = $40;
  1689. // Receiver Data Register
  1690. DATA8bm = $01;
  1691. // Frame Error
  1692. FERRbm = $04;
  1693. // Parity Error
  1694. PERRbm = $02;
  1695. // Receive Complete Interrupt Flag
  1696. RXCIFbm = $80;
  1697. // RX Data
  1698. DATA0bm = $01;
  1699. DATA1bm = $02;
  1700. DATA2bm = $04;
  1701. DATA3bm = $08;
  1702. DATA4bm = $10;
  1703. DATA5bm = $20;
  1704. DATA6bm = $40;
  1705. DATA7bm = $80;
  1706. // Receiver Pulse Lenght
  1707. RXPL0bm = $01;
  1708. RXPL1bm = $02;
  1709. RXPL2bm = $04;
  1710. RXPL3bm = $08;
  1711. RXPL4bm = $10;
  1712. RXPL5bm = $20;
  1713. RXPL6bm = $40;
  1714. // Break Detected Flag
  1715. BDFbm = $02;
  1716. // Data Register Empty Flag
  1717. DREIFbm = $20;
  1718. // Inconsistent Sync Field Interrupt Flag
  1719. ISFIFbm = $08;
  1720. // Receive Start Interrupt
  1721. RXSIFbm = $10;
  1722. // Transmit Interrupt Flag
  1723. TXCIFbm = $40;
  1724. // Wait For Break
  1725. WFBbm = $01;
  1726. // Transmit pulse length
  1727. TXPL0bm = $01;
  1728. TXPL1bm = $02;
  1729. TXPL2bm = $04;
  1730. TXPL3bm = $08;
  1731. TXPL4bm = $10;
  1732. TXPL5bm = $20;
  1733. TXPL6bm = $40;
  1734. TXPL7bm = $80;
  1735. end;
  1736. TUSERROW = object //User Row
  1737. USERROW0: byte; //User Row Byte 0
  1738. USERROW1: byte; //User Row Byte 1
  1739. USERROW2: byte; //User Row Byte 2
  1740. USERROW3: byte; //User Row Byte 3
  1741. USERROW4: byte; //User Row Byte 4
  1742. USERROW5: byte; //User Row Byte 5
  1743. USERROW6: byte; //User Row Byte 6
  1744. USERROW7: byte; //User Row Byte 7
  1745. USERROW8: byte; //User Row Byte 8
  1746. USERROW9: byte; //User Row Byte 9
  1747. USERROW10: byte; //User Row Byte 10
  1748. USERROW11: byte; //User Row Byte 11
  1749. USERROW12: byte; //User Row Byte 12
  1750. USERROW13: byte; //User Row Byte 13
  1751. USERROW14: byte; //User Row Byte 14
  1752. USERROW15: byte; //User Row Byte 15
  1753. USERROW16: byte; //User Row Byte 16
  1754. USERROW17: byte; //User Row Byte 17
  1755. USERROW18: byte; //User Row Byte 18
  1756. USERROW19: byte; //User Row Byte 19
  1757. USERROW20: byte; //User Row Byte 20
  1758. USERROW21: byte; //User Row Byte 21
  1759. USERROW22: byte; //User Row Byte 22
  1760. USERROW23: byte; //User Row Byte 23
  1761. USERROW24: byte; //User Row Byte 24
  1762. USERROW25: byte; //User Row Byte 25
  1763. USERROW26: byte; //User Row Byte 26
  1764. USERROW27: byte; //User Row Byte 27
  1765. USERROW28: byte; //User Row Byte 28
  1766. USERROW29: byte; //User Row Byte 29
  1767. USERROW30: byte; //User Row Byte 30
  1768. USERROW31: byte; //User Row Byte 31
  1769. end;
  1770. TVPORT = object //Virtual Ports
  1771. DIR: byte; //Data Direction
  1772. OUT_: byte; //Output Value
  1773. IN_: byte; //Input Value
  1774. INTFLAGS: byte; //Interrupt Flags
  1775. const
  1776. // Pin Interrupt
  1777. INT0bm = $01;
  1778. INT1bm = $02;
  1779. INT2bm = $04;
  1780. INT3bm = $08;
  1781. INT4bm = $10;
  1782. INT5bm = $20;
  1783. INT6bm = $40;
  1784. INT7bm = $80;
  1785. end;
  1786. TVREF = object //Voltage reference
  1787. CTRLA: byte; //Control A
  1788. CTRLB: byte; //Control B
  1789. const
  1790. // VREF_ADC0REFSEL
  1791. ADC0REFSELmask = $70;
  1792. ADC0REFSEL_0V55 = $00;
  1793. ADC0REFSEL_1V1 = $10;
  1794. ADC0REFSEL_2V5 = $20;
  1795. ADC0REFSEL_4V34 = $30;
  1796. ADC0REFSEL_1V5 = $40;
  1797. // VREF_DAC0REFSEL
  1798. DAC0REFSELmask = $07;
  1799. DAC0REFSEL_0V55 = $00;
  1800. DAC0REFSEL_1V1 = $01;
  1801. DAC0REFSEL_2V5 = $02;
  1802. DAC0REFSEL_4V34 = $03;
  1803. DAC0REFSEL_1V5 = $04;
  1804. // ADC0 reference enable
  1805. ADC0REFENbm = $02;
  1806. // DAC0/AC0 reference enable
  1807. DAC0REFENbm = $01;
  1808. end;
  1809. TWDT = object //Watch-Dog Timer
  1810. CTRLA: byte; //Control A
  1811. STATUS: byte; //Status
  1812. const
  1813. // WDT_PERIOD
  1814. PERIODmask = $0F;
  1815. PERIOD_OFF = $00;
  1816. PERIOD_8CLK = $01;
  1817. PERIOD_16CLK = $02;
  1818. PERIOD_32CLK = $03;
  1819. PERIOD_64CLK = $04;
  1820. PERIOD_128CLK = $05;
  1821. PERIOD_256CLK = $06;
  1822. PERIOD_512CLK = $07;
  1823. PERIOD_1KCLK = $08;
  1824. PERIOD_2KCLK = $09;
  1825. PERIOD_4KCLK = $0A;
  1826. PERIOD_8KCLK = $0B;
  1827. // WDT_WINDOW
  1828. WINDOWmask = $F0;
  1829. WINDOW_OFF = $00;
  1830. WINDOW_8CLK = $10;
  1831. WINDOW_16CLK = $20;
  1832. WINDOW_32CLK = $30;
  1833. WINDOW_64CLK = $40;
  1834. WINDOW_128CLK = $50;
  1835. WINDOW_256CLK = $60;
  1836. WINDOW_512CLK = $70;
  1837. WINDOW_1KCLK = $80;
  1838. WINDOW_2KCLK = $90;
  1839. WINDOW_4KCLK = $A0;
  1840. WINDOW_8KCLK = $B0;
  1841. // Lock enable
  1842. LOCKbm = $80;
  1843. // Syncronization busy
  1844. SYNCBUSYbm = $01;
  1845. end;
  1846. const
  1847. Pin0idx = 0; Pin0bm = 1;
  1848. Pin1idx = 1; Pin1bm = 2;
  1849. Pin2idx = 2; Pin2bm = 4;
  1850. Pin3idx = 3; Pin3bm = 8;
  1851. Pin4idx = 4; Pin4bm = 16;
  1852. Pin5idx = 5; Pin5bm = 32;
  1853. Pin6idx = 6; Pin6bm = 64;
  1854. Pin7idx = 7; Pin7bm = 128;
  1855. var
  1856. VPORTA: TVPORT absolute $0000;
  1857. VPORTB: TVPORT absolute $0004;
  1858. VPORTC: TVPORT absolute $0008;
  1859. GPIO: TGPIO absolute $001C;
  1860. CPU: TCPU absolute $0030;
  1861. RSTCTRL: TRSTCTRL absolute $0040;
  1862. SLPCTRL: TSLPCTRL absolute $0050;
  1863. CLKCTRL: TCLKCTRL absolute $0060;
  1864. BOD: TBOD absolute $0080;
  1865. VREF: TVREF absolute $00A0;
  1866. WDT: TWDT absolute $0100;
  1867. CPUINT: TCPUINT absolute $0110;
  1868. CRCSCAN: TCRCSCAN absolute $0120;
  1869. RTC: TRTC absolute $0140;
  1870. EVSYS: TEVSYS absolute $0180;
  1871. CCL: TCCL absolute $01C0;
  1872. PORTMUX: TPORTMUX absolute $0200;
  1873. PORTA: TPORT absolute $0400;
  1874. PORTB: TPORT absolute $0420;
  1875. ADC0: TADC absolute $0600;
  1876. AC0: TAC absolute $0670;
  1877. USART0: TUSART absolute $0800;
  1878. TWI0: TTWI absolute $0810;
  1879. SPI0: TSPI absolute $0820;
  1880. TCA0: TTCA absolute $0A00;
  1881. TCB0: TTCB absolute $0A40;
  1882. SYSCFG: TSYSCFG absolute $0F00;
  1883. NVMCTRL: TNVMCTRL absolute $1000;
  1884. SIGROW: TSIGROW absolute $1100;
  1885. FUSE: TFUSE absolute $1280;
  1886. LOCKBIT: TLOCKBIT absolute $128A;
  1887. USERROW: TUSERROW absolute $1300;
  1888. implementation
  1889. {$define RELBRANCHES}
  1890. {$i avrcommon.inc}
  1891. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  1892. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  1893. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 3
  1894. procedure PORTB_PORT_ISR; external name 'PORTB_PORT_ISR'; // Interrupt 4
  1895. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 6
  1896. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 7
  1897. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 8
  1898. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 8
  1899. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 9
  1900. procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 10
  1901. //procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 10
  1902. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 11
  1903. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 11
  1904. procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 12
  1905. //procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 12
  1906. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 13
  1907. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 16
  1908. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 17
  1909. procedure ADC0_WCOMP_ISR; external name 'ADC0_WCOMP_ISR'; // Interrupt 18
  1910. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 19
  1911. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 20
  1912. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 21
  1913. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 22
  1914. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 23
  1915. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 24
  1916. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 25
  1917. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  1918. asm
  1919. rjmp __dtors_end
  1920. rjmp CRCSCAN_NMI_ISR
  1921. rjmp BOD_VLM_ISR
  1922. rjmp PORTA_PORT_ISR
  1923. rjmp PORTB_PORT_ISR
  1924. rjmp RTC_CNT_ISR
  1925. rjmp RTC_PIT_ISR
  1926. rjmp TCA0_LUNF_ISR
  1927. // rjmp TCA0_OVF_ISR
  1928. rjmp TCA0_HUNF_ISR
  1929. rjmp TCA0_LCMP0_ISR
  1930. // rjmp TCA0_CMP0_ISR
  1931. rjmp TCA0_CMP1_ISR
  1932. // rjmp TCA0_LCMP1_ISR
  1933. rjmp TCA0_CMP2_ISR
  1934. // rjmp TCA0_LCMP2_ISR
  1935. rjmp TCB0_INT_ISR
  1936. rjmp AC0_AC_ISR
  1937. rjmp ADC0_RESRDY_ISR
  1938. rjmp ADC0_WCOMP_ISR
  1939. rjmp TWI0_TWIS_ISR
  1940. rjmp TWI0_TWIM_ISR
  1941. rjmp SPI0_INT_ISR
  1942. rjmp USART0_RXC_ISR
  1943. rjmp USART0_DRE_ISR
  1944. rjmp USART0_TXC_ISR
  1945. rjmp NVMCTRL_EE_ISR
  1946. .weak CRCSCAN_NMI_ISR
  1947. .weak BOD_VLM_ISR
  1948. .weak PORTA_PORT_ISR
  1949. .weak PORTB_PORT_ISR
  1950. .weak RTC_CNT_ISR
  1951. .weak RTC_PIT_ISR
  1952. .weak TCA0_LUNF_ISR
  1953. // .weak TCA0_OVF_ISR
  1954. .weak TCA0_HUNF_ISR
  1955. .weak TCA0_LCMP0_ISR
  1956. // .weak TCA0_CMP0_ISR
  1957. .weak TCA0_CMP1_ISR
  1958. // .weak TCA0_LCMP1_ISR
  1959. .weak TCA0_CMP2_ISR
  1960. // .weak TCA0_LCMP2_ISR
  1961. .weak TCB0_INT_ISR
  1962. .weak AC0_AC_ISR
  1963. .weak ADC0_RESRDY_ISR
  1964. .weak ADC0_WCOMP_ISR
  1965. .weak TWI0_TWIS_ISR
  1966. .weak TWI0_TWIM_ISR
  1967. .weak SPI0_INT_ISR
  1968. .weak USART0_RXC_ISR
  1969. .weak USART0_DRE_ISR
  1970. .weak USART0_TXC_ISR
  1971. .weak NVMCTRL_EE_ISR
  1972. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  1973. .set BOD_VLM_ISR, Default_IRQ_handler
  1974. .set PORTA_PORT_ISR, Default_IRQ_handler
  1975. .set PORTB_PORT_ISR, Default_IRQ_handler
  1976. .set RTC_CNT_ISR, Default_IRQ_handler
  1977. .set RTC_PIT_ISR, Default_IRQ_handler
  1978. .set TCA0_LUNF_ISR, Default_IRQ_handler
  1979. // .set TCA0_OVF_ISR, Default_IRQ_handler
  1980. .set TCA0_HUNF_ISR, Default_IRQ_handler
  1981. .set TCA0_LCMP0_ISR, Default_IRQ_handler
  1982. // .set TCA0_CMP0_ISR, Default_IRQ_handler
  1983. .set TCA0_CMP1_ISR, Default_IRQ_handler
  1984. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  1985. .set TCA0_CMP2_ISR, Default_IRQ_handler
  1986. // .set TCA0_LCMP2_ISR, Default_IRQ_handler
  1987. .set TCB0_INT_ISR, Default_IRQ_handler
  1988. .set AC0_AC_ISR, Default_IRQ_handler
  1989. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  1990. .set ADC0_WCOMP_ISR, Default_IRQ_handler
  1991. .set TWI0_TWIS_ISR, Default_IRQ_handler
  1992. .set TWI0_TWIM_ISR, Default_IRQ_handler
  1993. .set SPI0_INT_ISR, Default_IRQ_handler
  1994. .set USART0_RXC_ISR, Default_IRQ_handler
  1995. .set USART0_DRE_ISR, Default_IRQ_handler
  1996. .set USART0_TXC_ISR, Default_IRQ_handler
  1997. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  1998. end;
  1999. end.