attiny3214.pp 68 KB

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  1. unit ATtiny3214;
  2. interface
  3. type
  4. TAC = object //Analog Comparator
  5. CTRLA: byte; //Control A
  6. Reserved1: byte;
  7. MUXCTRLA: byte; //Mux Control A
  8. Reserved3: byte;
  9. Reserved4: byte;
  10. Reserved5: byte;
  11. INTCTRL: byte; //Interrupt Control
  12. STATUS: byte; //Status
  13. const
  14. ENABLEidx = $00; ENABLEbm = $01; // Enable
  15. HYSMODE0idx = $01; // Hysteresis Mode
  16. HYSMODE1idx = $02; // Hysteresis Mode
  17. INTMODE0idx = $04; // Interrupt Mode
  18. INTMODE1idx = $05; // Interrupt Mode
  19. LPMODEidx = $03; LPMODEbm = $08; // Low Power Mode
  20. OUTENidx = $06; OUTENbm = $40; // Output Buffer Enable
  21. RUNSTDBYidx = $07; RUNSTDBYbm = $80; // Run in Standby Mode
  22. CMPidx = $00; CMPbm = $01; // Analog Comparator 0 Interrupt Enable
  23. INVERTidx = $07; INVERTbm = $80; // Invert AC Output
  24. MUXNEG0idx = $00; // Negative Input MUX Selection
  25. MUXNEG1idx = $01; // Negative Input MUX Selection
  26. MUXPOS0idx = $03; // Positive Input MUX Selection
  27. MUXPOS1idx = $04; // Positive Input MUX Selection
  28. STATEidx = $04; STATEbm = $10; // Analog Comparator State
  29. end;
  30. TADC = object //Analog to Digital Converter
  31. CTRLA: byte; //Control A
  32. CTRLB: byte; //Control B
  33. CTRLC: byte; //Control C
  34. CTRLD: byte; //Control D
  35. CTRLE: byte; //Control E
  36. SAMPCTRL: byte; //Sample Control
  37. MUXPOS: byte; //Positive mux input
  38. Reserved7: byte;
  39. COMMAND: byte; //Command
  40. EVCTRL: byte; //Event Control
  41. INTCTRL: byte; //Interrupt Control
  42. INTFLAGS: byte; //Interrupt Flags
  43. DBGCTRL: byte; //Debug Control
  44. TEMP: byte; //Temporary Data
  45. Reserved14: byte;
  46. Reserved15: byte;
  47. RES: word; //ADC Accumulator Result
  48. WINLT: word; //Window comparator low threshold
  49. WINHT: word; //Window comparator high threshold
  50. CALIB: byte; //Calibration
  51. const
  52. DUTYCYCidx = $00; DUTYCYCbm = $01; // Duty Cycle
  53. STCONVidx = $00; STCONVbm = $01; // Start Conversion Operation
  54. ENABLEidx = $00; ENABLEbm = $01; // ADC Enable
  55. FREERUNidx = $01; FREERUNbm = $02; // ADC Freerun mode
  56. RESSELidx = $02; RESSELbm = $04; // ADC Resolution
  57. RUNSTBYidx = $07; RUNSTBYbm = $80; // Run standby mode
  58. SAMPNUM0idx = $00; // Accumulation Samples
  59. SAMPNUM1idx = $01; // Accumulation Samples
  60. SAMPNUM2idx = $02; // Accumulation Samples
  61. PRESC0idx = $00; // Clock Pre-scaler
  62. PRESC1idx = $01; // Clock Pre-scaler
  63. PRESC2idx = $02; // Clock Pre-scaler
  64. REFSEL0idx = $04; // Reference Selection
  65. REFSEL1idx = $05; // Reference Selection
  66. SAMPCAPidx = $06; SAMPCAPbm = $40; // Sample Capacitance Selection
  67. ASDVidx = $04; ASDVbm = $10; // Automatic Sampling Delay Variation
  68. INITDLY0idx = $05; // Initial Delay Selection
  69. INITDLY1idx = $06; // Initial Delay Selection
  70. INITDLY2idx = $07; // Initial Delay Selection
  71. SAMPDLY0idx = $00; // Sampling Delay Selection
  72. SAMPDLY1idx = $01; // Sampling Delay Selection
  73. SAMPDLY2idx = $02; // Sampling Delay Selection
  74. SAMPDLY3idx = $03; // Sampling Delay Selection
  75. WINCM0idx = $00; // Window Comparator Mode
  76. WINCM1idx = $01; // Window Comparator Mode
  77. WINCM2idx = $02; // Window Comparator Mode
  78. DBGRUNidx = $00; DBGRUNbm = $01; // Debug run
  79. STARTEIidx = $00; STARTEIbm = $01; // Start Event Input Enable
  80. RESRDYidx = $00; RESRDYbm = $01; // Result Ready Interrupt Enable
  81. WCMPidx = $01; WCMPbm = $02; // Window Comparator Interrupt Enable
  82. MUXPOS0idx = $00; // Analog Channel Selection Bits
  83. MUXPOS1idx = $01; // Analog Channel Selection Bits
  84. MUXPOS2idx = $02; // Analog Channel Selection Bits
  85. MUXPOS3idx = $03; // Analog Channel Selection Bits
  86. MUXPOS4idx = $04; // Analog Channel Selection Bits
  87. SAMPLEN0idx = $00; // Sample lenght
  88. SAMPLEN1idx = $01; // Sample lenght
  89. SAMPLEN2idx = $02; // Sample lenght
  90. SAMPLEN3idx = $03; // Sample lenght
  91. SAMPLEN4idx = $04; // Sample lenght
  92. TEMP0idx = $00; // Temporary
  93. TEMP1idx = $01; // Temporary
  94. TEMP2idx = $02; // Temporary
  95. TEMP3idx = $03; // Temporary
  96. TEMP4idx = $04; // Temporary
  97. TEMP5idx = $05; // Temporary
  98. TEMP6idx = $06; // Temporary
  99. TEMP7idx = $07; // Temporary
  100. end;
  101. TBOD = object //Bod interface
  102. CTRLA: byte; //Control A
  103. CTRLB: byte; //Control B
  104. Reserved2: byte;
  105. Reserved3: byte;
  106. Reserved4: byte;
  107. Reserved5: byte;
  108. Reserved6: byte;
  109. Reserved7: byte;
  110. VLMCTRLA: byte; //Voltage level monitor Control
  111. INTCTRL: byte; //Voltage level monitor interrupt Control
  112. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  113. STATUS: byte; //Voltage level monitor status
  114. const
  115. ACTIVE0idx = $02; // Operation in active mode
  116. ACTIVE1idx = $03; // Operation in active mode
  117. SAMPFREQidx = $04; SAMPFREQbm = $10; // Sample frequency
  118. SLEEP0idx = $00; // Operation in sleep mode
  119. SLEEP1idx = $01; // Operation in sleep mode
  120. LVL0idx = $00; // Bod level
  121. LVL1idx = $01; // Bod level
  122. LVL2idx = $02; // Bod level
  123. VLMCFG0idx = $01; // Configuration
  124. VLMCFG1idx = $02; // Configuration
  125. VLMIEidx = $00; VLMIEbm = $01; // voltage level monitor interrrupt enable
  126. VLMIFidx = $00; VLMIFbm = $01; // Voltage level monitor interrupt flag
  127. VLMSidx = $00; VLMSbm = $01; // Voltage level monitor status
  128. VLMLVL0idx = $00; // voltage level monitor level
  129. VLMLVL1idx = $01; // voltage level monitor level
  130. end;
  131. TCCL = object //Configurable Custom Logic
  132. CTRLA: byte; //Control Register A
  133. SEQCTRL0: byte; //Sequential Control 0
  134. Reserved2: byte;
  135. Reserved3: byte;
  136. Reserved4: byte;
  137. LUT0CTRLA: byte; //LUT Control 0 A
  138. LUT0CTRLB: byte; //LUT Control 0 B
  139. LUT0CTRLC: byte; //LUT Control 0 C
  140. TRUTH0: byte; //Truth 0
  141. LUT1CTRLA: byte; //LUT Control 1 A
  142. LUT1CTRLB: byte; //LUT Control 1 B
  143. LUT1CTRLC: byte; //LUT Control 1 C
  144. TRUTH1: byte; //Truth 1
  145. const
  146. ENABLEidx = $00; ENABLEbm = $01; // Enable
  147. RUNSTDBYidx = $06; RUNSTDBYbm = $40; // Run in Standby
  148. CLKSRCidx = $06; CLKSRCbm = $40; // Clock Source Selection
  149. EDGEDETidx = $07; EDGEDETbm = $80; // Edge Detection Enable
  150. FILTSEL0idx = $04; // Filter Selection
  151. FILTSEL1idx = $05; // Filter Selection
  152. OUTENidx = $03; OUTENbm = $08; // Output Enable
  153. INSEL00idx = $00; // LUT Input 0 Source Selection
  154. INSEL01idx = $01; // LUT Input 0 Source Selection
  155. INSEL02idx = $02; // LUT Input 0 Source Selection
  156. INSEL03idx = $03; // LUT Input 0 Source Selection
  157. INSEL10idx = $04; // LUT Input 1 Source Selection
  158. INSEL11idx = $05; // LUT Input 1 Source Selection
  159. INSEL12idx = $06; // LUT Input 1 Source Selection
  160. INSEL13idx = $07; // LUT Input 1 Source Selection
  161. INSEL20idx = $00; // LUT Input 2 Source Selection
  162. INSEL21idx = $01; // LUT Input 2 Source Selection
  163. INSEL22idx = $02; // LUT Input 2 Source Selection
  164. INSEL23idx = $03; // LUT Input 2 Source Selection
  165. SEQSEL0idx = $00; // Sequential Selection
  166. SEQSEL1idx = $01; // Sequential Selection
  167. SEQSEL2idx = $02; // Sequential Selection
  168. end;
  169. TCLKCTRL = object //Clock controller
  170. MCLKCTRLA: byte; //MCLK Control A
  171. MCLKCTRLB: byte; //MCLK Control B
  172. MCLKLOCK: byte; //MCLK Lock
  173. MCLKSTATUS: byte; //MCLK Status
  174. Reserved4: byte;
  175. Reserved5: byte;
  176. Reserved6: byte;
  177. Reserved7: byte;
  178. Reserved8: byte;
  179. Reserved9: byte;
  180. Reserved10: byte;
  181. Reserved11: byte;
  182. Reserved12: byte;
  183. Reserved13: byte;
  184. Reserved14: byte;
  185. Reserved15: byte;
  186. OSC20MCTRLA: byte; //OSC20M Control A
  187. OSC20MCALIBA: byte; //OSC20M Calibration A
  188. OSC20MCALIBB: byte; //OSC20M Calibration B
  189. Reserved19: byte;
  190. Reserved20: byte;
  191. Reserved21: byte;
  192. Reserved22: byte;
  193. Reserved23: byte;
  194. OSC32KCTRLA: byte; //OSC32K Control A
  195. Reserved25: byte;
  196. Reserved26: byte;
  197. Reserved27: byte;
  198. XOSC32KCTRLA: byte; //XOSC32K Control A
  199. const
  200. CLKOUTidx = $07; CLKOUTbm = $80; // System clock out
  201. CLKSEL0idx = $00; // clock select
  202. CLKSEL1idx = $01; // clock select
  203. PDIV0idx = $01; // Prescaler division
  204. PDIV1idx = $02; // Prescaler division
  205. PDIV2idx = $03; // Prescaler division
  206. PDIV3idx = $04; // Prescaler division
  207. PENidx = $00; PENbm = $01; // Prescaler enable
  208. LOCKENidx = $00; LOCKENbm = $01; // lock ebable
  209. EXTSidx = $07; EXTSbm = $80; // External Clock status
  210. OSC20MSidx = $04; OSC20MSbm = $10; // 20MHz oscillator status
  211. OSC32KSidx = $05; OSC32KSbm = $20; // 32KHz oscillator status
  212. SOSCidx = $00; SOSCbm = $01; // System Oscillator changing
  213. XOSC32KSidx = $06; XOSC32KSbm = $40; // 32.768 kHz Crystal Oscillator status
  214. CAL20M0idx = $00; // Calibration
  215. CAL20M1idx = $01; // Calibration
  216. CAL20M2idx = $02; // Calibration
  217. CAL20M3idx = $03; // Calibration
  218. CAL20M4idx = $04; // Calibration
  219. CAL20M5idx = $05; // Calibration
  220. LOCKidx = $07; LOCKbm = $80; // Lock
  221. TEMPCAL20M0idx = $00; // Oscillator temperature coefficient
  222. TEMPCAL20M1idx = $01; // Oscillator temperature coefficient
  223. TEMPCAL20M2idx = $02; // Oscillator temperature coefficient
  224. TEMPCAL20M3idx = $03; // Oscillator temperature coefficient
  225. RUNSTDBYidx = $01; RUNSTDBYbm = $02; // Run standby
  226. CSUT0idx = $04; // Crystal startup time
  227. CSUT1idx = $05; // Crystal startup time
  228. ENABLEidx = $00; ENABLEbm = $01; // Enable
  229. SELidx = $02; SELbm = $04; // Select
  230. end;
  231. TCPU = object //CPU
  232. Reserved0: byte;
  233. Reserved1: byte;
  234. Reserved2: byte;
  235. Reserved3: byte;
  236. CCP: byte; //Configuration Change Protection
  237. Reserved5: byte;
  238. Reserved6: byte;
  239. Reserved7: byte;
  240. Reserved8: byte;
  241. Reserved9: byte;
  242. Reserved10: byte;
  243. Reserved11: byte;
  244. Reserved12: byte;
  245. SPL: byte; //Stack Pointer Low
  246. SPH: byte; //Stack Pointer High
  247. SREG: byte; //Status Register
  248. const
  249. CCP0idx = $00; // CCP signature
  250. CCP1idx = $01; // CCP signature
  251. CCP2idx = $02; // CCP signature
  252. CCP3idx = $03; // CCP signature
  253. CCP4idx = $04; // CCP signature
  254. CCP5idx = $05; // CCP signature
  255. CCP6idx = $06; // CCP signature
  256. CCP7idx = $07; // CCP signature
  257. Cidx = $00; Cbm = $01; // Carry Flag
  258. Hidx = $05; Hbm = $20; // Half Carry Flag
  259. Iidx = $07; Ibm = $80; // Global Interrupt Enable Flag
  260. Nidx = $02; Nbm = $04; // Negative Flag
  261. Sidx = $04; Sbm = $10; // N Exclusive Or V Flag
  262. Tidx = $06; Tbm = $40; // Transfer Bit
  263. Vidx = $03; Vbm = $08; // Two's Complement Overflow Flag
  264. Zidx = $01; Zbm = $02; // Zero Flag
  265. end;
  266. TCPUINT = object //Interrupt Controller
  267. CTRLA: byte; //Control A
  268. STATUS: byte; //Status
  269. LVL0PRI: byte; //Interrupt Level 0 Priority
  270. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  271. const
  272. CVTidx = $05; CVTbm = $20; // Compact Vector Table
  273. IVSELidx = $06; IVSELbm = $40; // Interrupt Vector Select
  274. LVL0RRidx = $00; LVL0RRbm = $01; // Round-robin Scheduling Enable
  275. LVL0PRI0idx = $00; // Interrupt Level Priority
  276. LVL0PRI1idx = $01; // Interrupt Level Priority
  277. LVL0PRI2idx = $02; // Interrupt Level Priority
  278. LVL0PRI3idx = $03; // Interrupt Level Priority
  279. LVL0PRI4idx = $04; // Interrupt Level Priority
  280. LVL0PRI5idx = $05; // Interrupt Level Priority
  281. LVL0PRI6idx = $06; // Interrupt Level Priority
  282. LVL0PRI7idx = $07; // Interrupt Level Priority
  283. LVL1VEC0idx = $00; // Interrupt Vector with High Priority
  284. LVL1VEC1idx = $01; // Interrupt Vector with High Priority
  285. LVL1VEC2idx = $02; // Interrupt Vector with High Priority
  286. LVL1VEC3idx = $03; // Interrupt Vector with High Priority
  287. LVL1VEC4idx = $04; // Interrupt Vector with High Priority
  288. LVL1VEC5idx = $05; // Interrupt Vector with High Priority
  289. LVL1VEC6idx = $06; // Interrupt Vector with High Priority
  290. LVL1VEC7idx = $07; // Interrupt Vector with High Priority
  291. LVL0EXidx = $00; LVL0EXbm = $01; // Level 0 Interrupt Executing
  292. LVL1EXidx = $01; LVL1EXbm = $02; // Level 1 Interrupt Executing
  293. NMIEXidx = $07; NMIEXbm = $80; // Non-maskable Interrupt Executing
  294. end;
  295. TCRCSCAN = object //CRCSCAN
  296. CTRLA: byte; //Control A
  297. CTRLB: byte; //Control B
  298. STATUS: byte; //Status
  299. const
  300. ENABLEidx = $00; ENABLEbm = $01; // Enable CRC scan
  301. NMIENidx = $01; NMIENbm = $02; // Enable NMI Trigger
  302. RESETidx = $07; RESETbm = $80; // Reset CRC scan
  303. MODE0idx = $04; // CRC Flash Access Mode
  304. MODE1idx = $05; // CRC Flash Access Mode
  305. SRC0idx = $00; // CRC Source
  306. SRC1idx = $01; // CRC Source
  307. BUSYidx = $00; BUSYbm = $01; // CRC Busy
  308. OKidx = $01; OKbm = $02; // CRC Ok
  309. end;
  310. TDAC = object //Digital to Analog Converter
  311. CTRLA: byte; //Control Register A
  312. DATA: byte; //DATA Register
  313. const
  314. ENABLEidx = $00; ENABLEbm = $01; // DAC Enable
  315. OUTENidx = $06; OUTENbm = $40; // Output Buffer Enable
  316. RUNSTDBYidx = $07; RUNSTDBYbm = $80; // Run in Standby Mode
  317. end;
  318. TEVSYS = object //Event System
  319. ASYNCSTROBE: byte; //Asynchronous Channel Strobe
  320. SYNCSTROBE: byte; //Synchronous Channel Strobe
  321. ASYNCCH0: byte; //Asynchronous Channel 0 Generator Selection
  322. ASYNCCH1: byte; //Asynchronous Channel 1 Generator Selection
  323. ASYNCCH2: byte; //Asynchronous Channel 2 Generator Selection
  324. ASYNCCH3: byte; //Asynchronous Channel 3 Generator Selection
  325. Reserved6: byte;
  326. Reserved7: byte;
  327. Reserved8: byte;
  328. Reserved9: byte;
  329. SYNCCH0: byte; //Synchronous Channel 0 Generator Selection
  330. SYNCCH1: byte; //Synchronous Channel 1 Generator Selection
  331. Reserved12: byte;
  332. Reserved13: byte;
  333. Reserved14: byte;
  334. Reserved15: byte;
  335. Reserved16: byte;
  336. Reserved17: byte;
  337. ASYNCUSER0: byte; //Asynchronous User Ch 0 Input Selection - TCB0
  338. ASYNCUSER1: byte; //Asynchronous User Ch 1 Input Selection - ADC0
  339. ASYNCUSER2: byte; //Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  340. ASYNCUSER3: byte; //Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  341. ASYNCUSER4: byte; //Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  342. ASYNCUSER5: byte; //Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  343. ASYNCUSER6: byte; //Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  344. ASYNCUSER7: byte; //Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  345. ASYNCUSER8: byte; //Asynchronous User Ch 8 Input Selection - Event Out 0
  346. ASYNCUSER9: byte; //Asynchronous User Ch 9 Input Selection - Event Out 1
  347. ASYNCUSER10: byte; //Asynchronous User Ch 10 Input Selection - Event Out 2
  348. ASYNCUSER11: byte; //Asynchronous User Ch 11 Input Selection - TCB1
  349. ASYNCUSER12: byte; //Asynchronous User Ch 12 Input Selection - ADC1
  350. Reserved31: byte;
  351. Reserved32: byte;
  352. Reserved33: byte;
  353. SYNCUSER0: byte; //Synchronous User Ch 0 - TCA0
  354. SYNCUSER1: byte; //Synchronous User Ch 1 - USART0
  355. const
  356. ASYNCCH00idx = $00; // Asynchronous Channel 0 Generator Selection
  357. ASYNCCH01idx = $01; // Asynchronous Channel 0 Generator Selection
  358. ASYNCCH02idx = $02; // Asynchronous Channel 0 Generator Selection
  359. ASYNCCH03idx = $03; // Asynchronous Channel 0 Generator Selection
  360. ASYNCCH04idx = $04; // Asynchronous Channel 0 Generator Selection
  361. ASYNCCH05idx = $05; // Asynchronous Channel 0 Generator Selection
  362. ASYNCCH06idx = $06; // Asynchronous Channel 0 Generator Selection
  363. ASYNCCH07idx = $07; // Asynchronous Channel 0 Generator Selection
  364. ASYNCCH10idx = $00; // Asynchronous Channel 1 Generator Selection
  365. ASYNCCH11idx = $01; // Asynchronous Channel 1 Generator Selection
  366. ASYNCCH12idx = $02; // Asynchronous Channel 1 Generator Selection
  367. ASYNCCH13idx = $03; // Asynchronous Channel 1 Generator Selection
  368. ASYNCCH14idx = $04; // Asynchronous Channel 1 Generator Selection
  369. ASYNCCH15idx = $05; // Asynchronous Channel 1 Generator Selection
  370. ASYNCCH16idx = $06; // Asynchronous Channel 1 Generator Selection
  371. ASYNCCH17idx = $07; // Asynchronous Channel 1 Generator Selection
  372. ASYNCCH20idx = $00; // Asynchronous Channel 2 Generator Selection
  373. ASYNCCH21idx = $01; // Asynchronous Channel 2 Generator Selection
  374. ASYNCCH22idx = $02; // Asynchronous Channel 2 Generator Selection
  375. ASYNCCH23idx = $03; // Asynchronous Channel 2 Generator Selection
  376. ASYNCCH24idx = $04; // Asynchronous Channel 2 Generator Selection
  377. ASYNCCH25idx = $05; // Asynchronous Channel 2 Generator Selection
  378. ASYNCCH26idx = $06; // Asynchronous Channel 2 Generator Selection
  379. ASYNCCH27idx = $07; // Asynchronous Channel 2 Generator Selection
  380. ASYNCCH30idx = $00; // Asynchronous Channel 3 Generator Selection
  381. ASYNCCH31idx = $01; // Asynchronous Channel 3 Generator Selection
  382. ASYNCCH32idx = $02; // Asynchronous Channel 3 Generator Selection
  383. ASYNCCH33idx = $03; // Asynchronous Channel 3 Generator Selection
  384. ASYNCCH34idx = $04; // Asynchronous Channel 3 Generator Selection
  385. ASYNCCH35idx = $05; // Asynchronous Channel 3 Generator Selection
  386. ASYNCCH36idx = $06; // Asynchronous Channel 3 Generator Selection
  387. ASYNCCH37idx = $07; // Asynchronous Channel 3 Generator Selection
  388. ASYNCUSER00idx = $00; // Asynchronous User Ch 0 Input Selection - TCB0
  389. ASYNCUSER01idx = $01; // Asynchronous User Ch 0 Input Selection - TCB0
  390. ASYNCUSER02idx = $02; // Asynchronous User Ch 0 Input Selection - TCB0
  391. ASYNCUSER03idx = $03; // Asynchronous User Ch 0 Input Selection - TCB0
  392. ASYNCUSER04idx = $04; // Asynchronous User Ch 0 Input Selection - TCB0
  393. ASYNCUSER05idx = $05; // Asynchronous User Ch 0 Input Selection - TCB0
  394. ASYNCUSER06idx = $06; // Asynchronous User Ch 0 Input Selection - TCB0
  395. ASYNCUSER07idx = $07; // Asynchronous User Ch 0 Input Selection - TCB0
  396. ASYNCUSER10idx = $00; // Asynchronous User Ch 1 Input Selection - ADC0
  397. ASYNCUSER11idx = $01; // Asynchronous User Ch 1 Input Selection - ADC0
  398. ASYNCUSER12idx = $02; // Asynchronous User Ch 1 Input Selection - ADC0
  399. ASYNCUSER13idx = $03; // Asynchronous User Ch 1 Input Selection - ADC0
  400. ASYNCUSER14idx = $04; // Asynchronous User Ch 1 Input Selection - ADC0
  401. ASYNCUSER15idx = $05; // Asynchronous User Ch 1 Input Selection - ADC0
  402. ASYNCUSER16idx = $06; // Asynchronous User Ch 1 Input Selection - ADC0
  403. ASYNCUSER17idx = $07; // Asynchronous User Ch 1 Input Selection - ADC0
  404. ASYNCUSER20idx = $00; // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  405. ASYNCUSER21idx = $01; // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  406. ASYNCUSER22idx = $02; // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  407. ASYNCUSER23idx = $03; // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  408. ASYNCUSER24idx = $04; // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  409. ASYNCUSER25idx = $05; // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  410. ASYNCUSER26idx = $06; // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  411. ASYNCUSER27idx = $07; // Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  412. ASYNCUSER30idx = $00; // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  413. ASYNCUSER31idx = $01; // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  414. ASYNCUSER32idx = $02; // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  415. ASYNCUSER33idx = $03; // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  416. ASYNCUSER34idx = $04; // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  417. ASYNCUSER35idx = $05; // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  418. ASYNCUSER36idx = $06; // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  419. ASYNCUSER37idx = $07; // Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  420. ASYNCUSER40idx = $00; // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  421. ASYNCUSER41idx = $01; // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  422. ASYNCUSER42idx = $02; // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  423. ASYNCUSER43idx = $03; // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  424. ASYNCUSER44idx = $04; // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  425. ASYNCUSER45idx = $05; // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  426. ASYNCUSER46idx = $06; // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  427. ASYNCUSER47idx = $07; // Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  428. ASYNCUSER50idx = $00; // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  429. ASYNCUSER51idx = $01; // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  430. ASYNCUSER52idx = $02; // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  431. ASYNCUSER53idx = $03; // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  432. ASYNCUSER54idx = $04; // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  433. ASYNCUSER55idx = $05; // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  434. ASYNCUSER56idx = $06; // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  435. ASYNCUSER57idx = $07; // Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  436. ASYNCUSER60idx = $00; // Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  437. ASYNCUSER61idx = $01; // Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  438. ASYNCUSER62idx = $02; // Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  439. ASYNCUSER63idx = $03; // Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  440. ASYNCUSER64idx = $04; // Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  441. ASYNCUSER65idx = $05; // Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  442. ASYNCUSER66idx = $06; // Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  443. ASYNCUSER67idx = $07; // Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  444. ASYNCUSER70idx = $00; // Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  445. ASYNCUSER71idx = $01; // Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  446. ASYNCUSER72idx = $02; // Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  447. ASYNCUSER73idx = $03; // Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  448. ASYNCUSER74idx = $04; // Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  449. ASYNCUSER75idx = $05; // Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  450. ASYNCUSER76idx = $06; // Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  451. ASYNCUSER77idx = $07; // Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  452. ASYNCUSER80idx = $00; // Asynchronous User Ch 8 Input Selection - Event Out 0
  453. ASYNCUSER81idx = $01; // Asynchronous User Ch 8 Input Selection - Event Out 0
  454. ASYNCUSER82idx = $02; // Asynchronous User Ch 8 Input Selection - Event Out 0
  455. ASYNCUSER83idx = $03; // Asynchronous User Ch 8 Input Selection - Event Out 0
  456. ASYNCUSER84idx = $04; // Asynchronous User Ch 8 Input Selection - Event Out 0
  457. ASYNCUSER85idx = $05; // Asynchronous User Ch 8 Input Selection - Event Out 0
  458. ASYNCUSER86idx = $06; // Asynchronous User Ch 8 Input Selection - Event Out 0
  459. ASYNCUSER87idx = $07; // Asynchronous User Ch 8 Input Selection - Event Out 0
  460. ASYNCUSER90idx = $00; // Asynchronous User Ch 9 Input Selection - Event Out 1
  461. ASYNCUSER91idx = $01; // Asynchronous User Ch 9 Input Selection - Event Out 1
  462. ASYNCUSER92idx = $02; // Asynchronous User Ch 9 Input Selection - Event Out 1
  463. ASYNCUSER93idx = $03; // Asynchronous User Ch 9 Input Selection - Event Out 1
  464. ASYNCUSER94idx = $04; // Asynchronous User Ch 9 Input Selection - Event Out 1
  465. ASYNCUSER95idx = $05; // Asynchronous User Ch 9 Input Selection - Event Out 1
  466. ASYNCUSER96idx = $06; // Asynchronous User Ch 9 Input Selection - Event Out 1
  467. ASYNCUSER97idx = $07; // Asynchronous User Ch 9 Input Selection - Event Out 1
  468. ASYNCUSER100idx = $00; // Asynchronous User Ch 10 Input Selection - Event Out 2
  469. ASYNCUSER101idx = $01; // Asynchronous User Ch 10 Input Selection - Event Out 2
  470. ASYNCUSER102idx = $02; // Asynchronous User Ch 10 Input Selection - Event Out 2
  471. ASYNCUSER103idx = $03; // Asynchronous User Ch 10 Input Selection - Event Out 2
  472. ASYNCUSER104idx = $04; // Asynchronous User Ch 10 Input Selection - Event Out 2
  473. ASYNCUSER105idx = $05; // Asynchronous User Ch 10 Input Selection - Event Out 2
  474. ASYNCUSER106idx = $06; // Asynchronous User Ch 10 Input Selection - Event Out 2
  475. ASYNCUSER107idx = $07; // Asynchronous User Ch 10 Input Selection - Event Out 2
  476. ASYNCUSER110idx = $00; // Asynchronous User Ch 11 Input Selection - TCB1
  477. ASYNCUSER111idx = $01; // Asynchronous User Ch 11 Input Selection - TCB1
  478. ASYNCUSER112idx = $02; // Asynchronous User Ch 11 Input Selection - TCB1
  479. ASYNCUSER113idx = $03; // Asynchronous User Ch 11 Input Selection - TCB1
  480. ASYNCUSER114idx = $04; // Asynchronous User Ch 11 Input Selection - TCB1
  481. ASYNCUSER115idx = $05; // Asynchronous User Ch 11 Input Selection - TCB1
  482. ASYNCUSER116idx = $06; // Asynchronous User Ch 11 Input Selection - TCB1
  483. ASYNCUSER117idx = $07; // Asynchronous User Ch 11 Input Selection - TCB1
  484. ASYNCUSER120idx = $00; // Asynchronous User Ch 12 Input Selection - ADC0
  485. ASYNCUSER121idx = $01; // Asynchronous User Ch 12 Input Selection - ADC0
  486. ASYNCUSER122idx = $02; // Asynchronous User Ch 12 Input Selection - ADC0
  487. ASYNCUSER123idx = $03; // Asynchronous User Ch 12 Input Selection - ADC0
  488. ASYNCUSER124idx = $04; // Asynchronous User Ch 12 Input Selection - ADC0
  489. ASYNCUSER125idx = $05; // Asynchronous User Ch 12 Input Selection - ADC0
  490. ASYNCUSER126idx = $06; // Asynchronous User Ch 12 Input Selection - ADC0
  491. ASYNCUSER127idx = $07; // Asynchronous User Ch 12 Input Selection - ADC0
  492. SYNCCH00idx = $00; // Synchronous Channel 0 Generator Selection
  493. SYNCCH01idx = $01; // Synchronous Channel 0 Generator Selection
  494. SYNCCH02idx = $02; // Synchronous Channel 0 Generator Selection
  495. SYNCCH03idx = $03; // Synchronous Channel 0 Generator Selection
  496. SYNCCH04idx = $04; // Synchronous Channel 0 Generator Selection
  497. SYNCCH05idx = $05; // Synchronous Channel 0 Generator Selection
  498. SYNCCH06idx = $06; // Synchronous Channel 0 Generator Selection
  499. SYNCCH07idx = $07; // Synchronous Channel 0 Generator Selection
  500. SYNCCH10idx = $00; // Synchronous Channel 1 Generator Selection
  501. SYNCCH11idx = $01; // Synchronous Channel 1 Generator Selection
  502. SYNCCH12idx = $02; // Synchronous Channel 1 Generator Selection
  503. SYNCCH13idx = $03; // Synchronous Channel 1 Generator Selection
  504. SYNCCH14idx = $04; // Synchronous Channel 1 Generator Selection
  505. SYNCCH15idx = $05; // Synchronous Channel 1 Generator Selection
  506. SYNCCH16idx = $06; // Synchronous Channel 1 Generator Selection
  507. SYNCCH17idx = $07; // Synchronous Channel 1 Generator Selection
  508. SYNCUSER00idx = $00; // Synchronous User Ch 0 - TCA0
  509. SYNCUSER01idx = $01; // Synchronous User Ch 0 - TCA0
  510. SYNCUSER02idx = $02; // Synchronous User Ch 0 - TCA0
  511. SYNCUSER03idx = $03; // Synchronous User Ch 0 - TCA0
  512. SYNCUSER04idx = $04; // Synchronous User Ch 0 - TCA0
  513. SYNCUSER05idx = $05; // Synchronous User Ch 0 - TCA0
  514. SYNCUSER06idx = $06; // Synchronous User Ch 0 - TCA0
  515. SYNCUSER07idx = $07; // Synchronous User Ch 0 - TCA0
  516. SYNCUSER10idx = $00; // Synchronous User Ch 1 - USART0
  517. SYNCUSER11idx = $01; // Synchronous User Ch 1 - USART0
  518. SYNCUSER12idx = $02; // Synchronous User Ch 1 - USART0
  519. SYNCUSER13idx = $03; // Synchronous User Ch 1 - USART0
  520. SYNCUSER14idx = $04; // Synchronous User Ch 1 - USART0
  521. SYNCUSER15idx = $05; // Synchronous User Ch 1 - USART0
  522. SYNCUSER16idx = $06; // Synchronous User Ch 1 - USART0
  523. SYNCUSER17idx = $07; // Synchronous User Ch 1 - USART0
  524. end;
  525. TFUSE = object //Fuses
  526. WDTCFG: byte; //Watchdog Configuration
  527. BODCFG: byte; //BOD Configuration
  528. OSCCFG: byte; //Oscillator Configuration
  529. Reserved3: byte;
  530. TCD0CFG: byte; //TCD0 Configuration
  531. SYSCFG0: byte; //System Configuration 0
  532. SYSCFG1: byte; //System Configuration 1
  533. APPEND: byte; //Application Code Section End
  534. BOOTEND: byte; //Boot Section End
  535. const
  536. ACTIVE0idx = $02; // BOD Operation in Active Mode
  537. ACTIVE1idx = $03; // BOD Operation in Active Mode
  538. LVL0idx = $05; // BOD Level
  539. LVL1idx = $06; // BOD Level
  540. LVL2idx = $07; // BOD Level
  541. SAMPFREQidx = $04; SAMPFREQbm = $10; // BOD Sample Frequency
  542. SLEEP0idx = $00; // BOD Operation in Sleep Mode
  543. SLEEP1idx = $01; // BOD Operation in Sleep Mode
  544. FREQSEL0idx = $00; // Frequency Select
  545. FREQSEL1idx = $01; // Frequency Select
  546. OSCLOCKidx = $07; OSCLOCKbm = $80; // Oscillator Lock
  547. CRCSRC0idx = $06; // CRC Source
  548. CRCSRC1idx = $07; // CRC Source
  549. EESAVEidx = $00; EESAVEbm = $01; // EEPROM Save
  550. RSTPINCFG0idx = $02; // Reset Pin Configuration
  551. RSTPINCFG1idx = $03; // Reset Pin Configuration
  552. SUT0idx = $00; // Startup Time
  553. SUT1idx = $01; // Startup Time
  554. SUT2idx = $02; // Startup Time
  555. CMPAidx = $00; CMPAbm = $01; // Compare A Default Output Value
  556. CMPAENidx = $04; CMPAENbm = $10; // Compare A Output Enable
  557. CMPBidx = $01; CMPBbm = $02; // Compare B Default Output Value
  558. CMPBENidx = $05; CMPBENbm = $20; // Compare B Output Enable
  559. CMPCidx = $02; CMPCbm = $04; // Compare C Default Output Value
  560. CMPCENidx = $06; CMPCENbm = $40; // Compare C Output Enable
  561. CMPDidx = $03; CMPDbm = $08; // Compare D Default Output Value
  562. CMPDENidx = $07; CMPDENbm = $80; // Compare D Output Enable
  563. PERIOD0idx = $00; // Watchdog Timeout Period
  564. PERIOD1idx = $01; // Watchdog Timeout Period
  565. PERIOD2idx = $02; // Watchdog Timeout Period
  566. PERIOD3idx = $03; // Watchdog Timeout Period
  567. WINDOW0idx = $04; // Watchdog Window Timeout Period
  568. WINDOW1idx = $05; // Watchdog Window Timeout Period
  569. WINDOW2idx = $06; // Watchdog Window Timeout Period
  570. WINDOW3idx = $07; // Watchdog Window Timeout Period
  571. end;
  572. TGPIO = object //General Purpose IO
  573. GPIOR0: byte; //General Purpose IO Register 0
  574. GPIOR1: byte; //General Purpose IO Register 1
  575. GPIOR2: byte; //General Purpose IO Register 2
  576. GPIOR3: byte; //General Purpose IO Register 3
  577. end;
  578. TLOCKBIT = object //Lockbit
  579. LOCKBIT: byte; //Lock bits
  580. const
  581. LB0idx = $00; // Lock Bits
  582. LB1idx = $01; // Lock Bits
  583. LB2idx = $02; // Lock Bits
  584. LB3idx = $03; // Lock Bits
  585. LB4idx = $04; // Lock Bits
  586. LB5idx = $05; // Lock Bits
  587. LB6idx = $06; // Lock Bits
  588. LB7idx = $07; // Lock Bits
  589. end;
  590. TNVMCTRL = object //Non-volatile Memory Controller
  591. CTRLA: byte; //Control A
  592. CTRLB: byte; //Control B
  593. STATUS: byte; //Status
  594. INTCTRL: byte; //Interrupt Control
  595. INTFLAGS: byte; //Interrupt Flags
  596. Reserved5: byte;
  597. DATA: word; //Data
  598. ADDR: word; //Address
  599. const
  600. CMD0idx = $00; // Command
  601. CMD1idx = $01; // Command
  602. CMD2idx = $02; // Command
  603. APCWPidx = $00; APCWPbm = $01; // Application code write protect
  604. BOOTLOCKidx = $01; BOOTLOCKbm = $02; // Boot Lock
  605. EEREADYidx = $00; EEREADYbm = $01; // EEPROM Ready
  606. EEBUSYidx = $01; EEBUSYbm = $02; // EEPROM busy
  607. FBUSYidx = $00; FBUSYbm = $01; // Flash busy
  608. WRERRORidx = $02; WRERRORbm = $04; // Write error
  609. end;
  610. TPORT = object //I/O Ports
  611. DIR: byte; //Data Direction
  612. DIRSET: byte; //Data Direction Set
  613. DIRCLR: byte; //Data Direction Clear
  614. DIRTGL: byte; //Data Direction Toggle
  615. OUT_: byte; //Output Value
  616. OUTSET: byte; //Output Value Set
  617. OUTCLR: byte; //Output Value Clear
  618. OUTTGL: byte; //Output Value Toggle
  619. IN_: byte; //Input Value
  620. INTFLAGS: byte; //Interrupt Flags
  621. Reserved10: byte;
  622. Reserved11: byte;
  623. Reserved12: byte;
  624. Reserved13: byte;
  625. Reserved14: byte;
  626. Reserved15: byte;
  627. PIN0CTRL: byte; //Pin 0 Control
  628. PIN1CTRL: byte; //Pin 1 Control
  629. PIN2CTRL: byte; //Pin 2 Control
  630. PIN3CTRL: byte; //Pin 3 Control
  631. PIN4CTRL: byte; //Pin 4 Control
  632. PIN5CTRL: byte; //Pin 5 Control
  633. PIN6CTRL: byte; //Pin 6 Control
  634. PIN7CTRL: byte; //Pin 7 Control
  635. const
  636. INT0idx = $00; // Pin Interrupt
  637. INT1idx = $01; // Pin Interrupt
  638. INT2idx = $02; // Pin Interrupt
  639. INT3idx = $03; // Pin Interrupt
  640. INT4idx = $04; // Pin Interrupt
  641. INT5idx = $05; // Pin Interrupt
  642. INT6idx = $06; // Pin Interrupt
  643. INT7idx = $07; // Pin Interrupt
  644. INVENidx = $07; INVENbm = $80; // Inverted I/O Enable
  645. ISC0idx = $00; // Input/Sense Configuration
  646. ISC1idx = $01; // Input/Sense Configuration
  647. ISC2idx = $02; // Input/Sense Configuration
  648. PULLUPENidx = $03; PULLUPENbm = $08; // Pullup enable
  649. end;
  650. TPORTMUX = object //Port Multiplexer
  651. CTRLA: byte; //Port Multiplexer Control A
  652. CTRLB: byte; //Port Multiplexer Control B
  653. CTRLC: byte; //Port Multiplexer Control C
  654. CTRLD: byte; //Port Multiplexer Control D
  655. const
  656. EVOUT0idx = $00; EVOUT0bm = $01; // Event Output 0
  657. EVOUT1idx = $01; EVOUT1bm = $02; // Event Output 1
  658. EVOUT2idx = $02; EVOUT2bm = $04; // Event Output 2
  659. LUT0idx = $04; LUT0bm = $10; // Configurable Custom Logic LUT0
  660. LUT1idx = $05; LUT1bm = $20; // Configurable Custom Logic LUT1
  661. SPI0idx = $02; SPI0bm = $04; // Port Multiplexer SPI0
  662. TWI0idx = $04; TWI0bm = $10; // Port Multiplexer TWI0
  663. USART0idx = $00; USART0bm = $01; // Port Multiplexer USART0
  664. TCA00idx = $00; TCA00bm = $01; // Port Multiplexer TCA0 Output 0
  665. TCA01idx = $01; TCA01bm = $02; // Port Multiplexer TCA0 Output 1
  666. TCA02idx = $02; TCA02bm = $04; // Port Multiplexer TCA0 Output 2
  667. TCA03idx = $03; TCA03bm = $08; // Port Multiplexer TCA0 Output 3
  668. TCA04idx = $04; TCA04bm = $10; // Port Multiplexer TCA0 Output 4
  669. TCA05idx = $05; TCA05bm = $20; // Port Multiplexer TCA0 Output 5
  670. TCB0idx = $00; TCB0bm = $01; // Port Multiplexer TCB
  671. end;
  672. TRSTCTRL = object //Reset controller
  673. RSTFR: byte; //Reset Flags
  674. SWRR: byte; //Software Reset
  675. const
  676. BORFidx = $01; BORFbm = $02; // Brown out detector Reset flag
  677. EXTRFidx = $02; EXTRFbm = $04; // External Reset flag
  678. PORFidx = $00; PORFbm = $01; // Power on Reset flag
  679. SWRFidx = $04; SWRFbm = $10; // Software Reset flag
  680. UPDIRFidx = $05; UPDIRFbm = $20; // UPDI Reset flag
  681. WDRFidx = $03; WDRFbm = $08; // Watch dog Reset flag
  682. SWREidx = $00; SWREbm = $01; // Software reset enable
  683. end;
  684. TRTC = object //Real-Time Counter
  685. CTRLA: byte; //Control A
  686. STATUS: byte; //Status
  687. INTCTRL: byte; //Interrupt Control
  688. INTFLAGS: byte; //Interrupt Flags
  689. TEMP: byte; //Temporary
  690. DBGCTRL: byte; //Debug control
  691. Reserved6: byte;
  692. CLKSEL: byte; //Clock Select
  693. CNT: word; //Counter
  694. PER: word; //Period
  695. CMP: word; //Compare
  696. Reserved14: byte;
  697. Reserved15: byte;
  698. PITCTRLA: byte; //PIT Control A
  699. PITSTATUS: byte; //PIT Status
  700. PITINTCTRL: byte; //PIT Interrupt Control
  701. PITINTFLAGS: byte; //PIT Interrupt Flags
  702. Reserved20: byte;
  703. PITDBGCTRL: byte; //PIT Debug control
  704. const
  705. CLKSEL0idx = $00; // Clock Select
  706. CLKSEL1idx = $01; // Clock Select
  707. PRESCALER0idx = $03; // Prescaling Factor
  708. PRESCALER1idx = $04; // Prescaling Factor
  709. PRESCALER2idx = $05; // Prescaling Factor
  710. PRESCALER3idx = $06; // Prescaling Factor
  711. RTCENidx = $00; RTCENbm = $01; // Enable
  712. RUNSTDBYidx = $07; RUNSTDBYbm = $80; // Run In Standby
  713. DBGRUNidx = $00; DBGRUNbm = $01; // Run in debug
  714. CMPidx = $01; CMPbm = $02; // Compare Match Interrupt enable
  715. OVFidx = $00; OVFbm = $01; // Overflow Interrupt enable
  716. PERIOD0idx = $03; // Period
  717. PERIOD1idx = $04; // Period
  718. PERIOD2idx = $05; // Period
  719. PERIOD3idx = $06; // Period
  720. PITENidx = $00; PITENbm = $01; // Enable
  721. PIidx = $00; PIbm = $01; // Periodic Interrupt
  722. CTRLBUSYidx = $00; CTRLBUSYbm = $01; // CTRLA Synchronization Busy Flag
  723. CMPBUSYidx = $03; CMPBUSYbm = $08; // Comparator Synchronization Busy Flag
  724. CNTBUSYidx = $01; CNTBUSYbm = $02; // Count Synchronization Busy Flag
  725. CTRLABUSYidx = $00; CTRLABUSYbm = $01; // CTRLA Synchronization Busy Flag
  726. PERBUSYidx = $02; PERBUSYbm = $04; // Period Synchronization Busy Flag
  727. end;
  728. TSIGROW = object //Signature row
  729. DEVICEID0: byte; //Device ID Byte 0
  730. DEVICEID1: byte; //Device ID Byte 1
  731. DEVICEID2: byte; //Device ID Byte 2
  732. SERNUM0: byte; //Serial Number Byte 0
  733. SERNUM1: byte; //Serial Number Byte 1
  734. SERNUM2: byte; //Serial Number Byte 2
  735. SERNUM3: byte; //Serial Number Byte 3
  736. SERNUM4: byte; //Serial Number Byte 4
  737. SERNUM5: byte; //Serial Number Byte 5
  738. SERNUM6: byte; //Serial Number Byte 6
  739. SERNUM7: byte; //Serial Number Byte 7
  740. SERNUM8: byte; //Serial Number Byte 8
  741. SERNUM9: byte; //Serial Number Byte 9
  742. Reserved13: byte;
  743. Reserved14: byte;
  744. Reserved15: byte;
  745. Reserved16: byte;
  746. Reserved17: byte;
  747. Reserved18: byte;
  748. Reserved19: byte;
  749. Reserved20: byte;
  750. Reserved21: byte;
  751. Reserved22: byte;
  752. Reserved23: byte;
  753. Reserved24: byte;
  754. Reserved25: byte;
  755. Reserved26: byte;
  756. Reserved27: byte;
  757. Reserved28: byte;
  758. Reserved29: byte;
  759. Reserved30: byte;
  760. Reserved31: byte;
  761. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  762. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  763. OSC16ERR3V: byte; //OSC16 error at 3V
  764. OSC16ERR5V: byte; //OSC16 error at 5V
  765. OSC20ERR3V: byte; //OSC20 error at 3V
  766. OSC20ERR5V: byte; //OSC20 error at 5V
  767. end;
  768. TSLPCTRL = object //Sleep Controller
  769. CTRLA: byte; //Control
  770. const
  771. SENidx = $00; SENbm = $01; // Sleep enable
  772. SMODE0idx = $01; // Sleep mode
  773. SMODE1idx = $02; // Sleep mode
  774. end;
  775. TSPI = object //Serial Peripheral Interface
  776. CTRLA: byte; //Control A
  777. CTRLB: byte; //Control B
  778. INTCTRL: byte; //Interrupt Control
  779. INTFLAGS: byte; //Interrupt Flags
  780. DATA: byte; //Data
  781. const
  782. CLK2Xidx = $04; CLK2Xbm = $10; // Enable Double Speed
  783. DORDidx = $06; DORDbm = $40; // Data Order Setting
  784. ENABLEidx = $00; ENABLEbm = $01; // Enable Module
  785. MASTERidx = $05; MASTERbm = $20; // Master Operation Enable
  786. PRESC0idx = $01; // Prescaler
  787. PRESC1idx = $02; // Prescaler
  788. BUFENidx = $07; BUFENbm = $80; // Buffer Mode Enable
  789. BUFWRidx = $06; BUFWRbm = $40; // Buffer Write Mode
  790. MODE0idx = $00; // SPI Mode
  791. MODE1idx = $01; // SPI Mode
  792. SSDidx = $02; SSDbm = $04; // Slave Select Disable
  793. DREIEidx = $05; DREIEbm = $20; // Data Register Empty Interrupt Enable
  794. IEidx = $00; IEbm = $01; // Interrupt Enable
  795. RXCIEidx = $07; RXCIEbm = $80; // Receive Complete Interrupt Enable
  796. SSIEidx = $04; SSIEbm = $10; // Slave Select Trigger Interrupt Enable
  797. TXCIEidx = $06; TXCIEbm = $40; // Transfer Complete Interrupt Enable
  798. end;
  799. TSYSCFG = object //System Configuration Registers
  800. Reserved0: byte;
  801. REVID: byte; //Revision ID
  802. EXTBRK: byte; //External Break
  803. const
  804. ENEXTBRKidx = $00; ENEXTBRKbm = $01; // External break enable
  805. end;
  806. TTCA_SINGLE = object //16-bit Timer/Counter Type A - Single Mode
  807. CTRLA: byte; //Control A
  808. CTRLB: byte; //Control B
  809. CTRLC: byte; //Control C
  810. CTRLD: byte; //Control D
  811. CTRLECLR: byte; //Control E Clear
  812. CTRLESET: byte; //Control E Set
  813. CTRLFCLR: byte; //Control F Clear
  814. CTRLFSET: byte; //Control F Set
  815. Reserved8: byte;
  816. EVCTRL: byte; //Event Control
  817. INTCTRL: byte; //Interrupt Control
  818. INTFLAGS: byte; //Interrupt Flags
  819. Reserved12: byte;
  820. Reserved13: byte;
  821. DBGCTRL: byte; //Degbug Control
  822. TEMP: byte; //Temporary data for 16-bit Access
  823. Reserved16: byte;
  824. Reserved17: byte;
  825. Reserved18: byte;
  826. Reserved19: byte;
  827. Reserved20: byte;
  828. Reserved21: byte;
  829. Reserved22: byte;
  830. Reserved23: byte;
  831. Reserved24: byte;
  832. Reserved25: byte;
  833. Reserved26: byte;
  834. Reserved27: byte;
  835. Reserved28: byte;
  836. Reserved29: byte;
  837. Reserved30: byte;
  838. Reserved31: byte;
  839. CNT: word; //Count
  840. Reserved34: byte;
  841. Reserved35: byte;
  842. Reserved36: byte;
  843. Reserved37: byte;
  844. PER: word; //Period
  845. CMP0: word; //Compare 0
  846. CMP1: word; //Compare 1
  847. CMP2: word; //Compare 2
  848. Reserved46: byte;
  849. Reserved47: byte;
  850. Reserved48: byte;
  851. Reserved49: byte;
  852. Reserved50: byte;
  853. Reserved51: byte;
  854. Reserved52: byte;
  855. Reserved53: byte;
  856. PERBUF: word; //Period Buffer
  857. CMP0BUF: word; //Compare 0 Buffer
  858. CMP1BUF: word; //Compare 1 Buffer
  859. CMP2BUF: word; //Compare 2 Buffer
  860. const
  861. CLKSEL0idx = $01; // Clock Selection
  862. CLKSEL1idx = $02; // Clock Selection
  863. CLKSEL2idx = $03; // Clock Selection
  864. ENABLEidx = $00; ENABLEbm = $01; // Module Enable
  865. ALUPDidx = $03; ALUPDbm = $08; // Auto Lock Update
  866. CMP0ENidx = $04; CMP0ENbm = $10; // Compare 0 Enable
  867. CMP1ENidx = $05; CMP1ENbm = $20; // Compare 1 Enable
  868. CMP2ENidx = $06; CMP2ENbm = $40; // Compare 2 Enable
  869. WGMODE0idx = $00; // Waveform generation mode
  870. WGMODE1idx = $01; // Waveform generation mode
  871. WGMODE2idx = $02; // Waveform generation mode
  872. CMP0OVidx = $00; CMP0OVbm = $01; // Compare 0 Waveform Output Value
  873. CMP1OVidx = $01; CMP1OVbm = $02; // Compare 1 Waveform Output Value
  874. CMP2OVidx = $02; CMP2OVbm = $04; // Compare 2 Waveform Output Value
  875. SPLITMidx = $00; SPLITMbm = $01; // Split Mode Enable
  876. CMD0idx = $02; // Command
  877. CMD1idx = $03; // Command
  878. DIRidx = $00; DIRbm = $01; // Direction
  879. LUPDidx = $01; LUPDbm = $02; // Lock Update
  880. CMP0BVidx = $01; CMP0BVbm = $02; // Compare 0 Buffer Valid
  881. CMP1BVidx = $02; CMP1BVbm = $04; // Compare 1 Buffer Valid
  882. CMP2BVidx = $03; CMP2BVbm = $08; // Compare 2 Buffer Valid
  883. PERBVidx = $00; PERBVbm = $01; // Period Buffer Valid
  884. DBGRUNidx = $00; DBGRUNbm = $01; // Debug Run
  885. CNTEIidx = $00; CNTEIbm = $01; // Count on Event Input
  886. EVACT0idx = $01; // Event Action
  887. EVACT1idx = $02; // Event Action
  888. CMP0idx = $04; CMP0bm = $10; // Compare 0 Interrupt
  889. CMP1idx = $05; CMP1bm = $20; // Compare 1 Interrupt
  890. CMP2idx = $06; CMP2bm = $40; // Compare 2 Interrupt
  891. OVFidx = $00; OVFbm = $01; // Overflow Interrupt
  892. end;
  893. TTCA_SPLIT = object //16-bit Timer/Counter Type A - Split Mode
  894. CTRLA: byte; //Control A
  895. CTRLB: byte; //Control B
  896. CTRLC: byte; //Control C
  897. CTRLD: byte; //Control D
  898. CTRLECLR: byte; //Control E Clear
  899. CTRLESET: byte; //Control E Set
  900. Reserved6: byte;
  901. Reserved7: byte;
  902. Reserved8: byte;
  903. Reserved9: byte;
  904. INTCTRL: byte; //Interrupt Control
  905. INTFLAGS: byte; //Interrupt Flags
  906. Reserved12: byte;
  907. Reserved13: byte;
  908. DBGCTRL: byte; //Degbug Control
  909. Reserved15: byte;
  910. Reserved16: byte;
  911. Reserved17: byte;
  912. Reserved18: byte;
  913. Reserved19: byte;
  914. Reserved20: byte;
  915. Reserved21: byte;
  916. Reserved22: byte;
  917. Reserved23: byte;
  918. Reserved24: byte;
  919. Reserved25: byte;
  920. Reserved26: byte;
  921. Reserved27: byte;
  922. Reserved28: byte;
  923. Reserved29: byte;
  924. Reserved30: byte;
  925. Reserved31: byte;
  926. LCNT: byte; //Low Count
  927. HCNT: byte; //High Count
  928. Reserved34: byte;
  929. Reserved35: byte;
  930. Reserved36: byte;
  931. Reserved37: byte;
  932. LPER: byte; //Low Period
  933. HPER: byte; //High Period
  934. LCMP0: byte; //Low Compare
  935. HCMP0: byte; //High Compare
  936. LCMP1: byte; //Low Compare
  937. HCMP1: byte; //High Compare
  938. LCMP2: byte; //Low Compare
  939. HCMP2: byte; //High Compare
  940. const
  941. CLKSEL0idx = $01; // Clock Selection
  942. CLKSEL1idx = $02; // Clock Selection
  943. CLKSEL2idx = $03; // Clock Selection
  944. ENABLEidx = $00; ENABLEbm = $01; // Module Enable
  945. HCMP0ENidx = $04; HCMP0ENbm = $10; // High Compare 0 Enable
  946. HCMP1ENidx = $05; HCMP1ENbm = $20; // High Compare 1 Enable
  947. HCMP2ENidx = $06; HCMP2ENbm = $40; // High Compare 2 Enable
  948. LCMP0ENidx = $00; LCMP0ENbm = $01; // Low Compare 0 Enable
  949. LCMP1ENidx = $01; LCMP1ENbm = $02; // Low Compare 1 Enable
  950. LCMP2ENidx = $02; LCMP2ENbm = $04; // Low Compare 2 Enable
  951. HCMP0OVidx = $04; HCMP0OVbm = $10; // High Compare 0 Output Value
  952. HCMP1OVidx = $05; HCMP1OVbm = $20; // High Compare 1 Output Value
  953. HCMP2OVidx = $06; HCMP2OVbm = $40; // High Compare 2 Output Value
  954. LCMP0OVidx = $00; LCMP0OVbm = $01; // Low Compare 0 Output Value
  955. LCMP1OVidx = $01; LCMP1OVbm = $02; // Low Compare 1 Output Value
  956. LCMP2OVidx = $02; LCMP2OVbm = $04; // Low Compare 2 Output Value
  957. SPLITMidx = $00; SPLITMbm = $01; // Split Mode Enable
  958. CMD0idx = $02; // Command
  959. CMD1idx = $03; // Command
  960. DBGRUNidx = $00; DBGRUNbm = $01; // Debug Run
  961. HUNFidx = $01; HUNFbm = $02; // High Underflow Interrupt Enable
  962. LCMP0idx = $04; LCMP0bm = $10; // Low Compare 0 Interrupt Enable
  963. LCMP1idx = $05; LCMP1bm = $20; // Low Compare 1 Interrupt Enable
  964. LCMP2idx = $06; LCMP2bm = $40; // Low Compare 2 Interrupt Enable
  965. LUNFidx = $00; LUNFbm = $01; // Low Underflow Interrupt Enable
  966. end;
  967. TTCA = record //16-bit Timer/Counter Type A
  968. case byte of
  969. 0: (SINGLE: TTCA_SINGLE);
  970. 1: (SPLIT: TTCA_SPLIT);
  971. end;
  972. TTCB = object //16-bit Timer Type B
  973. CTRLA: byte; //Control A
  974. CTRLB: byte; //Control Register B
  975. Reserved2: byte;
  976. Reserved3: byte;
  977. EVCTRL: byte; //Event Control
  978. INTCTRL: byte; //Interrupt Control
  979. INTFLAGS: byte; //Interrupt Flags
  980. STATUS: byte; //Status
  981. DBGCTRL: byte; //Debug Control
  982. TEMP: byte; //Temporary Value
  983. CNT: word; //Count
  984. CCMP: word; //Compare or Capture
  985. const
  986. CLKSEL0idx = $01; // Clock Select
  987. CLKSEL1idx = $02; // Clock Select
  988. ENABLEidx = $00; ENABLEbm = $01; // Enable
  989. RUNSTDBYidx = $06; RUNSTDBYbm = $40; // Run Standby
  990. SYNCUPDidx = $04; SYNCUPDbm = $10; // Synchronize Update
  991. ASYNCidx = $06; ASYNCbm = $40; // Asynchronous Enable
  992. CCMPENidx = $04; CCMPENbm = $10; // Pin Output Enable
  993. CCMPINITidx = $05; CCMPINITbm = $20; // Pin Initial State
  994. CNTMODE0idx = $00; // Timer Mode
  995. CNTMODE1idx = $01; // Timer Mode
  996. CNTMODE2idx = $02; // Timer Mode
  997. DBGRUNidx = $00; DBGRUNbm = $01; // Debug Run
  998. CAPTEIidx = $00; CAPTEIbm = $01; // Event Input Enable
  999. EDGEidx = $04; EDGEbm = $10; // Event Edge
  1000. FILTERidx = $06; FILTERbm = $40; // Input Capture Noise Cancellation Filter
  1001. CAPTidx = $00; CAPTbm = $01; // Capture or Timeout
  1002. RUNidx = $00; RUNbm = $01; // Run
  1003. end;
  1004. TTCD = object //Timer Counter D
  1005. CTRLA: byte; //Control A
  1006. CTRLB: byte; //Control B
  1007. CTRLC: byte; //Control C
  1008. CTRLD: byte; //Control D
  1009. CTRLE: byte; //Control E
  1010. Reserved5: byte;
  1011. Reserved6: byte;
  1012. Reserved7: byte;
  1013. EVCTRLA: byte; //EVCTRLA
  1014. EVCTRLB: byte; //EVCTRLB
  1015. Reserved10: byte;
  1016. Reserved11: byte;
  1017. INTCTRL: byte; //Interrupt Control
  1018. INTFLAGS: byte; //Interrupt Flags
  1019. STATUS: byte; //Status
  1020. Reserved15: byte;
  1021. INPUTCTRLA: byte; //Input Control A
  1022. INPUTCTRLB: byte; //Input Control B
  1023. FAULTCTRL: byte; //Fault Control
  1024. Reserved19: byte;
  1025. DLYCTRL: byte; //Delay Control
  1026. DLYVAL: byte; //Delay value
  1027. Reserved22: byte;
  1028. Reserved23: byte;
  1029. DITCTRL: byte; //Dither Control A
  1030. DITVAL: byte; //Dither value
  1031. Reserved26: byte;
  1032. Reserved27: byte;
  1033. Reserved28: byte;
  1034. Reserved29: byte;
  1035. DBGCTRL: byte; //Debug Control
  1036. Reserved31: byte;
  1037. Reserved32: byte;
  1038. Reserved33: byte;
  1039. CAPTUREA: word; //Capture A
  1040. CAPTUREB: word; //Capture B
  1041. Reserved38: byte;
  1042. Reserved39: byte;
  1043. CMPASET: word; //Compare A Set
  1044. CMPACLR: word; //Compare A Clear
  1045. CMPBSET: word; //Compare B Set
  1046. CMPBCLR: word; //Compare B Clear
  1047. const
  1048. CLKSEL0idx = $05; // clock select
  1049. CLKSEL1idx = $06; // clock select
  1050. CNTPRES0idx = $03; // counter prescaler
  1051. CNTPRES1idx = $04; // counter prescaler
  1052. ENABLEidx = $00; ENABLEbm = $01; // Enable
  1053. SYNCPRES0idx = $01; // Syncronization prescaler
  1054. SYNCPRES1idx = $02; // Syncronization prescaler
  1055. WGMODE0idx = $00; // Waveform generation mode
  1056. WGMODE1idx = $01; // Waveform generation mode
  1057. AUPDATEidx = $01; AUPDATEbm = $02; // Auto update
  1058. CMPCSELidx = $06; CMPCSELbm = $40; // Compare C output select
  1059. CMPDSELidx = $07; CMPDSELbm = $80; // Compare D output select
  1060. CMPOVRidx = $00; CMPOVRbm = $01; // Compare output value override
  1061. FIFTYidx = $03; FIFTYbm = $08; // Fifty percent waveform
  1062. CMPAVAL0idx = $00; // Compare A value
  1063. CMPAVAL1idx = $01; // Compare A value
  1064. CMPAVAL2idx = $02; // Compare A value
  1065. CMPAVAL3idx = $03; // Compare A value
  1066. CMPBVAL0idx = $04; // Compare B value
  1067. CMPBVAL1idx = $05; // Compare B value
  1068. CMPBVAL2idx = $06; // Compare B value
  1069. CMPBVAL3idx = $07; // Compare B value
  1070. DISEOCidx = $07; DISEOCbm = $80; // Disable at end of cycle
  1071. RESTARTidx = $02; RESTARTbm = $04; // Restart strobe
  1072. SCAPTUREAidx = $03; SCAPTUREAbm = $08; // Software Capture A Strobe
  1073. SCAPTUREBidx = $04; SCAPTUREBbm = $10; // Software Capture B Strobe
  1074. SYNCidx = $01; SYNCbm = $02; // synchronize strobe
  1075. SYNCEOCidx = $00; SYNCEOCbm = $01; // synchronize end of cycle strobe
  1076. DBGRUNidx = $00; DBGRUNbm = $01; // Debug run
  1077. FAULTDETidx = $02; FAULTDETbm = $04; // Fault detection
  1078. DITHERSEL0idx = $00; // dither select
  1079. DITHERSEL1idx = $01; // dither select
  1080. DITHER0idx = $00; // Dither value
  1081. DITHER1idx = $01; // Dither value
  1082. DITHER2idx = $02; // Dither value
  1083. DITHER3idx = $03; // Dither value
  1084. DLYPRESC0idx = $04; // Delay prescaler
  1085. DLYPRESC1idx = $05; // Delay prescaler
  1086. DLYSEL0idx = $00; // Delay select
  1087. DLYSEL1idx = $01; // Delay select
  1088. DLYTRIG0idx = $02; // Delay trigger
  1089. DLYTRIG1idx = $03; // Delay trigger
  1090. DLYVAL0idx = $00; // Delay value
  1091. DLYVAL1idx = $01; // Delay value
  1092. DLYVAL2idx = $02; // Delay value
  1093. DLYVAL3idx = $03; // Delay value
  1094. DLYVAL4idx = $04; // Delay value
  1095. DLYVAL5idx = $05; // Delay value
  1096. DLYVAL6idx = $06; // Delay value
  1097. DLYVAL7idx = $07; // Delay value
  1098. ACTIONidx = $02; ACTIONbm = $04; // event action
  1099. CFG0idx = $06; // event config
  1100. CFG1idx = $07; // event config
  1101. EDGEidx = $04; EDGEbm = $10; // edge select
  1102. TRIGEIidx = $00; TRIGEIbm = $01; // Trigger event enable
  1103. CMPAidx = $00; CMPAbm = $01; // Compare A value
  1104. CMPAENidx = $04; CMPAENbm = $10; // Compare A enable
  1105. CMPBidx = $01; CMPBbm = $02; // Compare B value
  1106. CMPBENidx = $05; CMPBENbm = $20; // Compare B enable
  1107. CMPCidx = $02; CMPCbm = $04; // Compare C value
  1108. CMPCENidx = $06; CMPCENbm = $40; // Compare C enable
  1109. CMPDidx = $03; CMPDbm = $08; // Compare D vaule
  1110. CMPDENidx = $07; CMPDENbm = $80; // Compare D enable
  1111. INPUTMODE0idx = $00; // Input mode
  1112. INPUTMODE1idx = $01; // Input mode
  1113. INPUTMODE2idx = $02; // Input mode
  1114. INPUTMODE3idx = $03; // Input mode
  1115. OVFidx = $00; OVFbm = $01; // Overflow interrupt enable
  1116. TRIGAidx = $02; TRIGAbm = $04; // Trigger A interrupt enable
  1117. TRIGBidx = $03; TRIGBbm = $08; // Trigger B interrupt enable
  1118. CMDRDYidx = $01; CMDRDYbm = $02; // Command ready
  1119. ENRDYidx = $00; ENRDYbm = $01; // Enable ready
  1120. PWMACTAidx = $06; PWMACTAbm = $40; // PWM activity on A
  1121. PWMACTBidx = $07; PWMACTBbm = $80; // PWM activity on B
  1122. end;
  1123. TTWI = object //Two-Wire Interface
  1124. CTRLA: byte; //Control A
  1125. Reserved1: byte;
  1126. DBGCTRL: byte; //Debug Control Register
  1127. MCTRLA: byte; //Master Control A
  1128. MCTRLB: byte; //Master Control B
  1129. MSTATUS: byte; //Master Status
  1130. MBAUD: byte; //Master Baurd Rate Control
  1131. MADDR: byte; //Master Address
  1132. MDATA: byte; //Master Data
  1133. SCTRLA: byte; //Slave Control A
  1134. SCTRLB: byte; //Slave Control B
  1135. SSTATUS: byte; //Slave Status
  1136. SADDR: byte; //Slave Address
  1137. SDATA: byte; //Slave Data
  1138. SADDRMASK: byte; //Slave Address Mask
  1139. const
  1140. ENABLEidx = $00; ENABLEbm = $01; // Enable TWI Master
  1141. QCENidx = $04; QCENbm = $10; // Quick Command Enable
  1142. RIENidx = $07; RIENbm = $80; // Read Interrupt Enable
  1143. SMENidx = $01; SMENbm = $02; // Smart Mode Enable
  1144. TIMEOUT0idx = $02; // Inactive Bus Timeout
  1145. TIMEOUT1idx = $03; // Inactive Bus Timeout
  1146. WIENidx = $06; WIENbm = $40; // Write Interrupt Enable
  1147. ACKACTidx = $02; ACKACTbm = $04; // Acknowledge Action
  1148. FLUSHidx = $03; FLUSHbm = $08; // Flush
  1149. MCMD0idx = $00; // Command
  1150. MCMD1idx = $01; // Command
  1151. ARBLOSTidx = $03; ARBLOSTbm = $08; // Arbitration Lost
  1152. BUSERRidx = $02; BUSERRbm = $04; // Bus Error
  1153. BUSSTATE0idx = $00; // Bus State
  1154. BUSSTATE1idx = $01; // Bus State
  1155. CLKHOLDidx = $05; CLKHOLDbm = $20; // Clock Hold
  1156. RIFidx = $07; RIFbm = $80; // Read Interrupt Flag
  1157. RXACKidx = $04; RXACKbm = $10; // Received Acknowledge
  1158. WIFidx = $06; WIFbm = $40; // Write Interrupt Flag
  1159. ADDRENidx = $00; ADDRENbm = $01; // Address Enable
  1160. ADDRMASK0idx = $01; // Address Mask
  1161. ADDRMASK1idx = $02; // Address Mask
  1162. ADDRMASK2idx = $03; // Address Mask
  1163. ADDRMASK3idx = $04; // Address Mask
  1164. ADDRMASK4idx = $05; // Address Mask
  1165. ADDRMASK5idx = $06; // Address Mask
  1166. ADDRMASK6idx = $07; // Address Mask
  1167. APIENidx = $06; APIENbm = $40; // Address/Stop Interrupt Enable
  1168. DIENidx = $07; DIENbm = $80; // Data Interrupt Enable
  1169. PIENidx = $05; PIENbm = $20; // Stop Interrupt Enable
  1170. PMENidx = $02; PMENbm = $04; // Promiscuous Mode Enable
  1171. SCMD0idx = $00; // Command
  1172. SCMD1idx = $01; // Command
  1173. APidx = $00; APbm = $01; // Slave Address or Stop
  1174. APIFidx = $06; APIFbm = $40; // Address/Stop Interrupt Flag
  1175. COLLidx = $03; COLLbm = $08; // Collision
  1176. DIFidx = $07; DIFbm = $80; // Data Interrupt Flag
  1177. DIRidx = $01; DIRbm = $02; // Read/Write Direction
  1178. end;
  1179. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1180. RXDATAL: byte; //Receive Data Low Byte
  1181. RXDATAH: byte; //Receive Data High Byte
  1182. TXDATAL: byte; //Transmit Data Low Byte
  1183. TXDATAH: byte; //Transmit Data High Byte
  1184. STATUS: byte; //Status
  1185. CTRLA: byte; //Control A
  1186. CTRLB: byte; //Control B
  1187. CTRLC: byte; //Control C
  1188. BAUD: word; //Baud Rate
  1189. Reserved10: byte;
  1190. DBGCTRL: byte; //Debug Control
  1191. EVCTRL: byte; //Event Control
  1192. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1193. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1194. const
  1195. ABEIEidx = $02; ABEIEbm = $04; // Auto-baud Error Interrupt Enable
  1196. DREIEidx = $05; DREIEbm = $20; // Data Register Empty Interrupt Enable
  1197. LBMEidx = $03; LBMEbm = $08; // Loop-back Mode Enable
  1198. RS4850idx = $00; // RS485 Mode internal transmitter
  1199. RS4851idx = $01; // RS485 Mode internal transmitter
  1200. RXCIEidx = $07; RXCIEbm = $80; // Receive Complete Interrupt Enable
  1201. RXSIEidx = $04; RXSIEbm = $10; // Receiver Start Frame Interrupt Enable
  1202. TXCIEidx = $06; TXCIEbm = $40; // Transmit Complete Interrupt Enable
  1203. MPCMidx = $00; MPCMbm = $01; // Multi-processor Communication Mode
  1204. ODMEidx = $03; ODMEbm = $08; // Open Drain Mode Enable
  1205. RXENidx = $07; RXENbm = $80; // Reciever enable
  1206. RXMODE0idx = $01; // Receiver Mode
  1207. RXMODE1idx = $02; // Receiver Mode
  1208. SFDENidx = $04; SFDENbm = $10; // Start Frame Detection Enable
  1209. TXENidx = $06; TXENbm = $40; // Transmitter Enable
  1210. ABMBPidx = $07; ABMBPbm = $80; // Autobaud majority voter bypass
  1211. DBGRUNidx = $00; DBGRUNbm = $01; // Debug Run
  1212. IREIidx = $00; IREIbm = $01; // IrDA Event Input Enable
  1213. BUFOVFidx = $06; BUFOVFbm = $40; // Buffer Overflow
  1214. DATA8idx = $00; DATA8bm = $01; // Receiver Data Register
  1215. FERRidx = $02; FERRbm = $04; // Frame Error
  1216. PERRidx = $01; PERRbm = $02; // Parity Error
  1217. RXCIFidx = $07; RXCIFbm = $80; // Receive Complete Interrupt Flag
  1218. DATA0idx = $00; // RX Data
  1219. DATA1idx = $01; // RX Data
  1220. DATA2idx = $02; // RX Data
  1221. DATA3idx = $03; // RX Data
  1222. DATA4idx = $04; // RX Data
  1223. DATA5idx = $05; // RX Data
  1224. DATA6idx = $06; // RX Data
  1225. DATA7idx = $07; // RX Data
  1226. RXPL0idx = $00; // Receiver Pulse Lenght
  1227. RXPL1idx = $01; // Receiver Pulse Lenght
  1228. RXPL2idx = $02; // Receiver Pulse Lenght
  1229. RXPL3idx = $03; // Receiver Pulse Lenght
  1230. RXPL4idx = $04; // Receiver Pulse Lenght
  1231. RXPL5idx = $05; // Receiver Pulse Lenght
  1232. RXPL6idx = $06; // Receiver Pulse Lenght
  1233. BDFidx = $01; BDFbm = $02; // Break Detected Flag
  1234. DREIFidx = $05; DREIFbm = $20; // Data Register Empty Flag
  1235. ISFIFidx = $03; ISFIFbm = $08; // Inconsistent Sync Field Interrupt Flag
  1236. RXSIFidx = $04; RXSIFbm = $10; // Receive Start Interrupt
  1237. TXCIFidx = $06; TXCIFbm = $40; // Transmit Interrupt Flag
  1238. WFBidx = $00; WFBbm = $01; // Wait For Break
  1239. TXPL0idx = $00; // Transmit pulse length
  1240. TXPL1idx = $01; // Transmit pulse length
  1241. TXPL2idx = $02; // Transmit pulse length
  1242. TXPL3idx = $03; // Transmit pulse length
  1243. TXPL4idx = $04; // Transmit pulse length
  1244. TXPL5idx = $05; // Transmit pulse length
  1245. TXPL6idx = $06; // Transmit pulse length
  1246. TXPL7idx = $07; // Transmit pulse length
  1247. end;
  1248. TUSERROW = object //User Row
  1249. USERROW0: byte; //User Row Byte 0
  1250. USERROW1: byte; //User Row Byte 1
  1251. USERROW2: byte; //User Row Byte 2
  1252. USERROW3: byte; //User Row Byte 3
  1253. USERROW4: byte; //User Row Byte 4
  1254. USERROW5: byte; //User Row Byte 5
  1255. USERROW6: byte; //User Row Byte 6
  1256. USERROW7: byte; //User Row Byte 7
  1257. USERROW8: byte; //User Row Byte 8
  1258. USERROW9: byte; //User Row Byte 9
  1259. USERROW10: byte; //User Row Byte 10
  1260. USERROW11: byte; //User Row Byte 11
  1261. USERROW12: byte; //User Row Byte 12
  1262. USERROW13: byte; //User Row Byte 13
  1263. USERROW14: byte; //User Row Byte 14
  1264. USERROW15: byte; //User Row Byte 15
  1265. USERROW16: byte; //User Row Byte 16
  1266. USERROW17: byte; //User Row Byte 17
  1267. USERROW18: byte; //User Row Byte 18
  1268. USERROW19: byte; //User Row Byte 19
  1269. USERROW20: byte; //User Row Byte 20
  1270. USERROW21: byte; //User Row Byte 21
  1271. USERROW22: byte; //User Row Byte 22
  1272. USERROW23: byte; //User Row Byte 23
  1273. USERROW24: byte; //User Row Byte 24
  1274. USERROW25: byte; //User Row Byte 25
  1275. USERROW26: byte; //User Row Byte 26
  1276. USERROW27: byte; //User Row Byte 27
  1277. USERROW28: byte; //User Row Byte 28
  1278. USERROW29: byte; //User Row Byte 29
  1279. USERROW30: byte; //User Row Byte 30
  1280. USERROW31: byte; //User Row Byte 31
  1281. USERROW32: byte; //User Row Byte 32
  1282. USERROW33: byte; //User Row Byte 33
  1283. USERROW34: byte; //User Row Byte 34
  1284. USERROW35: byte; //User Row Byte 35
  1285. USERROW36: byte; //User Row Byte 36
  1286. USERROW37: byte; //User Row Byte 37
  1287. USERROW38: byte; //User Row Byte 38
  1288. USERROW39: byte; //User Row Byte 39
  1289. USERROW40: byte; //User Row Byte 40
  1290. USERROW41: byte; //User Row Byte 41
  1291. USERROW42: byte; //User Row Byte 42
  1292. USERROW43: byte; //User Row Byte 43
  1293. USERROW44: byte; //User Row Byte 44
  1294. USERROW45: byte; //User Row Byte 45
  1295. USERROW46: byte; //User Row Byte 46
  1296. USERROW47: byte; //User Row Byte 47
  1297. USERROW48: byte; //User Row Byte 48
  1298. USERROW49: byte; //User Row Byte 49
  1299. USERROW50: byte; //User Row Byte 50
  1300. USERROW51: byte; //User Row Byte 51
  1301. USERROW52: byte; //User Row Byte 52
  1302. USERROW53: byte; //User Row Byte 53
  1303. USERROW54: byte; //User Row Byte 54
  1304. USERROW55: byte; //User Row Byte 55
  1305. USERROW56: byte; //User Row Byte 56
  1306. USERROW57: byte; //User Row Byte 57
  1307. USERROW58: byte; //User Row Byte 58
  1308. USERROW59: byte; //User Row Byte 59
  1309. USERROW60: byte; //User Row Byte 60
  1310. USERROW61: byte; //User Row Byte 61
  1311. USERROW62: byte; //User Row Byte 62
  1312. USERROW63: byte; //User Row Byte 63
  1313. end;
  1314. TVPORT = object //Virtual Ports
  1315. DIR: byte; //Data Direction
  1316. OUT_: byte; //Output Value
  1317. IN_: byte; //Input Value
  1318. INTFLAGS: byte; //Interrupt Flags
  1319. const
  1320. INT0idx = $00; // Pin Interrupt
  1321. INT1idx = $01; // Pin Interrupt
  1322. INT2idx = $02; // Pin Interrupt
  1323. INT3idx = $03; // Pin Interrupt
  1324. INT4idx = $04; // Pin Interrupt
  1325. INT5idx = $05; // Pin Interrupt
  1326. INT6idx = $06; // Pin Interrupt
  1327. INT7idx = $07; // Pin Interrupt
  1328. end;
  1329. TVREF = object //Voltage reference
  1330. CTRLA: byte; //Control A
  1331. CTRLB: byte; //Control B
  1332. CTRLC: byte; //Control C
  1333. CTRLD: byte; //Control D
  1334. const
  1335. ADC0REFSEL0idx = $04; // ADC0 reference select
  1336. ADC0REFSEL1idx = $05; // ADC0 reference select
  1337. ADC0REFSEL2idx = $06; // ADC0 reference select
  1338. DAC0REFSEL0idx = $00; // DAC0/AC0 reference select
  1339. DAC0REFSEL1idx = $01; // DAC0/AC0 reference select
  1340. DAC0REFSEL2idx = $02; // DAC0/AC0 reference select
  1341. ADC0REFENidx = $01; ADC0REFENbm = $02; // ADC0 reference enable
  1342. ADC1REFENidx = $04; ADC1REFENbm = $10; // ADC1 reference enable
  1343. DAC0REFENidx = $00; DAC0REFENbm = $01; // DAC0/AC0 reference enable
  1344. DAC1REFENidx = $03; DAC1REFENbm = $08; // DAC1/AC1 reference enable
  1345. DAC2REFENidx = $05; DAC2REFENbm = $20; // DAC2/AC2 reference enable
  1346. ADC1REFSEL0idx = $04; // ADC1 reference select
  1347. ADC1REFSEL1idx = $05; // ADC1 reference select
  1348. ADC1REFSEL2idx = $06; // ADC1 reference select
  1349. DAC1REFSEL0idx = $00; // DAC1/AC1 reference select
  1350. DAC1REFSEL1idx = $01; // DAC1/AC1 reference select
  1351. DAC1REFSEL2idx = $02; // DAC1/AC1 reference select
  1352. DAC2REFSEL0idx = $00; // DAC2/AC2 reference select
  1353. DAC2REFSEL1idx = $01; // DAC2/AC2 reference select
  1354. DAC2REFSEL2idx = $02; // DAC2/AC2 reference select
  1355. end;
  1356. TWDT = object //Watch-Dog Timer
  1357. CTRLA: byte; //Control A
  1358. STATUS: byte; //Status
  1359. const
  1360. PERIOD0idx = $00; // Period
  1361. PERIOD1idx = $01; // Period
  1362. PERIOD2idx = $02; // Period
  1363. PERIOD3idx = $03; // Period
  1364. WINDOW0idx = $04; // Window
  1365. WINDOW1idx = $05; // Window
  1366. WINDOW2idx = $06; // Window
  1367. WINDOW3idx = $07; // Window
  1368. LOCKidx = $07; LOCKbm = $80; // Lock enable
  1369. SYNCBUSYidx = $00; SYNCBUSYbm = $01; // Syncronization busy
  1370. end;
  1371. const
  1372. Pin0idx = 0; Pin0bm = 1;
  1373. Pin1idx = 1; Pin1bm = 2;
  1374. Pin2idx = 2; Pin2bm = 4;
  1375. Pin3idx = 3; Pin3bm = 8;
  1376. Pin4idx = 4; Pin4bm = 16;
  1377. Pin5idx = 5; Pin5bm = 32;
  1378. Pin6idx = 6; Pin6bm = 64;
  1379. Pin7idx = 7; Pin7bm = 128;
  1380. var
  1381. VPORTA: TVPORT absolute $0000;
  1382. VPORTB: TVPORT absolute $0004;
  1383. VPORTC: TVPORT absolute $0008;
  1384. GPIO: TGPIO absolute $001C;
  1385. CPU: TCPU absolute $0030;
  1386. RSTCTRL: TRSTCTRL absolute $0040;
  1387. SLPCTRL: TSLPCTRL absolute $0050;
  1388. CLKCTRL: TCLKCTRL absolute $0060;
  1389. BOD: TBOD absolute $0080;
  1390. VREF: TVREF absolute $00A0;
  1391. WDT: TWDT absolute $0100;
  1392. CPUINT: TCPUINT absolute $0110;
  1393. CRCSCAN: TCRCSCAN absolute $0120;
  1394. RTC: TRTC absolute $0140;
  1395. EVSYS: TEVSYS absolute $0180;
  1396. CCL: TCCL absolute $01C0;
  1397. PORTMUX: TPORTMUX absolute $0200;
  1398. PORTA: TPORT absolute $0400;
  1399. PORTB: TPORT absolute $0420;
  1400. PORTC: TPORT absolute $0440;
  1401. ADC0: TADC absolute $0600;
  1402. ADC1: TADC absolute $0640;
  1403. AC0: TAC absolute $0680;
  1404. AC1: TAC absolute $0688;
  1405. AC2: TAC absolute $0690;
  1406. DAC0: TDAC absolute $06A0;
  1407. DAC1: TDAC absolute $06A8;
  1408. DAC2: TDAC absolute $06B0;
  1409. USART0: TUSART absolute $0800;
  1410. TWI0: TTWI absolute $0810;
  1411. SPI0: TSPI absolute $0820;
  1412. TCA0: TTCA absolute $0A00;
  1413. TCB0: TTCB absolute $0A40;
  1414. TCB1: TTCB absolute $0A50;
  1415. TCD0: TTCD absolute $0A80;
  1416. SYSCFG: TSYSCFG absolute $0F00;
  1417. NVMCTRL: TNVMCTRL absolute $1000;
  1418. SIGROW: TSIGROW absolute $1100;
  1419. FUSE: TFUSE absolute $1280;
  1420. LOCKBIT: TLOCKBIT absolute $128A;
  1421. USERROW: TUSERROW absolute $1300;
  1422. implementation
  1423. {$i avrcommon.inc}
  1424. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  1425. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  1426. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 3
  1427. procedure PORTB_PORT_ISR; external name 'PORTB_PORT_ISR'; // Interrupt 4
  1428. procedure PORTC_PORT_ISR; external name 'PORTC_PORT_ISR'; // Interrupt 5
  1429. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 6
  1430. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 7
  1431. procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 8
  1432. //procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 8
  1433. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 9
  1434. procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 10
  1435. //procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 10
  1436. procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 11
  1437. //procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 11
  1438. procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 12
  1439. //procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 12
  1440. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 13
  1441. procedure TCB1_INT_ISR; external name 'TCB1_INT_ISR'; // Interrupt 14
  1442. procedure TCD0_OVF_ISR; external name 'TCD0_OVF_ISR'; // Interrupt 15
  1443. procedure TCD0_TRIG_ISR; external name 'TCD0_TRIG_ISR'; // Interrupt 16
  1444. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 17
  1445. procedure AC1_AC_ISR; external name 'AC1_AC_ISR'; // Interrupt 18
  1446. procedure AC2_AC_ISR; external name 'AC2_AC_ISR'; // Interrupt 19
  1447. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 20
  1448. procedure ADC0_WCOMP_ISR; external name 'ADC0_WCOMP_ISR'; // Interrupt 21
  1449. procedure ADC1_RESRDY_ISR; external name 'ADC1_RESRDY_ISR'; // Interrupt 22
  1450. procedure ADC1_WCOMP_ISR; external name 'ADC1_WCOMP_ISR'; // Interrupt 23
  1451. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 24
  1452. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 25
  1453. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 26
  1454. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 27
  1455. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 28
  1456. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 29
  1457. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 30
  1458. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  1459. asm
  1460. jmp __dtors_end
  1461. jmp CRCSCAN_NMI_ISR
  1462. jmp BOD_VLM_ISR
  1463. jmp PORTA_PORT_ISR
  1464. jmp PORTB_PORT_ISR
  1465. jmp PORTC_PORT_ISR
  1466. jmp RTC_CNT_ISR
  1467. jmp RTC_PIT_ISR
  1468. jmp TCA0_OVF_ISR
  1469. // jmp TCA0_LUNF_ISR
  1470. jmp TCA0_HUNF_ISR
  1471. jmp TCA0_CMP0_ISR
  1472. // jmp TCA0_LCMP0_ISR
  1473. jmp TCA0_LCMP1_ISR
  1474. // jmp TCA0_CMP1_ISR
  1475. jmp TCA0_CMP2_ISR
  1476. // jmp TCA0_LCMP2_ISR
  1477. jmp TCB0_INT_ISR
  1478. jmp TCB1_INT_ISR
  1479. jmp TCD0_OVF_ISR
  1480. jmp TCD0_TRIG_ISR
  1481. jmp AC0_AC_ISR
  1482. jmp AC1_AC_ISR
  1483. jmp AC2_AC_ISR
  1484. jmp ADC0_RESRDY_ISR
  1485. jmp ADC0_WCOMP_ISR
  1486. jmp ADC1_RESRDY_ISR
  1487. jmp ADC1_WCOMP_ISR
  1488. jmp TWI0_TWIS_ISR
  1489. jmp TWI0_TWIM_ISR
  1490. jmp SPI0_INT_ISR
  1491. jmp USART0_RXC_ISR
  1492. jmp USART0_DRE_ISR
  1493. jmp USART0_TXC_ISR
  1494. jmp NVMCTRL_EE_ISR
  1495. .weak CRCSCAN_NMI_ISR
  1496. .weak BOD_VLM_ISR
  1497. .weak PORTA_PORT_ISR
  1498. .weak PORTB_PORT_ISR
  1499. .weak PORTC_PORT_ISR
  1500. .weak RTC_CNT_ISR
  1501. .weak RTC_PIT_ISR
  1502. .weak TCA0_OVF_ISR
  1503. // .weak TCA0_LUNF_ISR
  1504. .weak TCA0_HUNF_ISR
  1505. .weak TCA0_CMP0_ISR
  1506. // .weak TCA0_LCMP0_ISR
  1507. .weak TCA0_LCMP1_ISR
  1508. // .weak TCA0_CMP1_ISR
  1509. .weak TCA0_CMP2_ISR
  1510. // .weak TCA0_LCMP2_ISR
  1511. .weak TCB0_INT_ISR
  1512. .weak TCB1_INT_ISR
  1513. .weak TCD0_OVF_ISR
  1514. .weak TCD0_TRIG_ISR
  1515. .weak AC0_AC_ISR
  1516. .weak AC1_AC_ISR
  1517. .weak AC2_AC_ISR
  1518. .weak ADC0_RESRDY_ISR
  1519. .weak ADC0_WCOMP_ISR
  1520. .weak ADC1_RESRDY_ISR
  1521. .weak ADC1_WCOMP_ISR
  1522. .weak TWI0_TWIS_ISR
  1523. .weak TWI0_TWIM_ISR
  1524. .weak SPI0_INT_ISR
  1525. .weak USART0_RXC_ISR
  1526. .weak USART0_DRE_ISR
  1527. .weak USART0_TXC_ISR
  1528. .weak NVMCTRL_EE_ISR
  1529. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  1530. .set BOD_VLM_ISR, Default_IRQ_handler
  1531. .set PORTA_PORT_ISR, Default_IRQ_handler
  1532. .set PORTB_PORT_ISR, Default_IRQ_handler
  1533. .set PORTC_PORT_ISR, Default_IRQ_handler
  1534. .set RTC_CNT_ISR, Default_IRQ_handler
  1535. .set RTC_PIT_ISR, Default_IRQ_handler
  1536. .set TCA0_OVF_ISR, Default_IRQ_handler
  1537. // .set TCA0_LUNF_ISR, Default_IRQ_handler
  1538. .set TCA0_HUNF_ISR, Default_IRQ_handler
  1539. .set TCA0_CMP0_ISR, Default_IRQ_handler
  1540. // .set TCA0_LCMP0_ISR, Default_IRQ_handler
  1541. .set TCA0_LCMP1_ISR, Default_IRQ_handler
  1542. // .set TCA0_CMP1_ISR, Default_IRQ_handler
  1543. .set TCA0_CMP2_ISR, Default_IRQ_handler
  1544. // .set TCA0_LCMP2_ISR, Default_IRQ_handler
  1545. .set TCB0_INT_ISR, Default_IRQ_handler
  1546. .set TCB1_INT_ISR, Default_IRQ_handler
  1547. .set TCD0_OVF_ISR, Default_IRQ_handler
  1548. .set TCD0_TRIG_ISR, Default_IRQ_handler
  1549. .set AC0_AC_ISR, Default_IRQ_handler
  1550. .set AC1_AC_ISR, Default_IRQ_handler
  1551. .set AC2_AC_ISR, Default_IRQ_handler
  1552. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  1553. .set ADC0_WCOMP_ISR, Default_IRQ_handler
  1554. .set ADC1_RESRDY_ISR, Default_IRQ_handler
  1555. .set ADC1_WCOMP_ISR, Default_IRQ_handler
  1556. .set TWI0_TWIS_ISR, Default_IRQ_handler
  1557. .set TWI0_TWIM_ISR, Default_IRQ_handler
  1558. .set SPI0_INT_ISR, Default_IRQ_handler
  1559. .set USART0_RXC_ISR, Default_IRQ_handler
  1560. .set USART0_DRE_ISR, Default_IRQ_handler
  1561. .set USART0_TXC_ISR, Default_IRQ_handler
  1562. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  1563. end;
  1564. end.