attiny406.pp 52 KB

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  1. unit ATtiny406;
  2. interface
  3. type
  4. TAC = object //Analog Comparator
  5. CTRLA: byte; //Control A
  6. Reserved1: byte;
  7. MUXCTRLA: byte; //Mux Control A
  8. Reserved3: byte;
  9. Reserved4: byte;
  10. Reserved5: byte;
  11. INTCTRL: byte; //Interrupt Control
  12. STATUS: byte; //Status
  13. const
  14. // Enable
  15. ENABLEbm = $01;
  16. // AC_HYSMODE
  17. HYSMODEmask = $06;
  18. HYSMODE_OFF = $00;
  19. HYSMODE_10mV = $02;
  20. HYSMODE_25mV = $04;
  21. HYSMODE_50mV = $06;
  22. // AC_INTMODE
  23. INTMODEmask = $30;
  24. INTMODE_BOTHEDGE = $00;
  25. INTMODE_NEGEDGE = $20;
  26. INTMODE_POSEDGE = $30;
  27. // Output Buffer Enable
  28. OUTENbm = $40;
  29. // Run in Standby Mode
  30. RUNSTDBYbm = $80;
  31. // Analog Comparator 0 Interrupt Enable
  32. CMPbm = $01;
  33. // Invert AC Output
  34. INVERTbm = $80;
  35. // AC_MUXNEG
  36. MUXNEGmask = $03;
  37. MUXNEG_PIN0 = $00;
  38. MUXNEG_PIN1 = $01;
  39. MUXNEG_VREF = $02;
  40. // AC_MUXPOS
  41. MUXPOSmask = $18;
  42. MUXPOS_PIN0 = $00;
  43. MUXPOS_PIN1 = $08;
  44. // Analog Comparator State
  45. STATEbm = $10;
  46. end;
  47. TADC = object //Analog to Digital Converter
  48. CTRLA: byte; //Control A
  49. CTRLB: byte; //Control B
  50. CTRLC: byte; //Control C
  51. CTRLD: byte; //Control D
  52. CTRLE: byte; //Control E
  53. SAMPCTRL: byte; //Sample Control
  54. MUXPOS: byte; //Positive mux input
  55. Reserved7: byte;
  56. COMMAND: byte; //Command
  57. EVCTRL: byte; //Event Control
  58. INTCTRL: byte; //Interrupt Control
  59. INTFLAGS: byte; //Interrupt Flags
  60. DBGCTRL: byte; //Debug Control
  61. TEMP: byte; //Temporary Data
  62. Reserved14: byte;
  63. Reserved15: byte;
  64. RES: word; //ADC Accumulator Result
  65. WINLT: word; //Window comparator low threshold
  66. WINHT: word; //Window comparator high threshold
  67. CALIB: byte; //Calibration
  68. const
  69. // ADC_DUTYCYC
  70. DUTYCYCmask = $01;
  71. DUTYCYC_DUTY50 = $00;
  72. DUTYCYC_DUTY25 = $01;
  73. // Start Conversion Operation
  74. STCONVbm = $01;
  75. // ADC Enable
  76. ENABLEbm = $01;
  77. // ADC Freerun mode
  78. FREERUNbm = $02;
  79. // ADC_RESSEL
  80. RESSELmask = $04;
  81. RESSEL_10BIT = $00;
  82. RESSEL_8BIT = $04;
  83. // Run standby mode
  84. RUNSTBYbm = $80;
  85. // ADC_SAMPNUM
  86. SAMPNUMmask = $07;
  87. SAMPNUM_ACC1 = $00;
  88. SAMPNUM_ACC2 = $01;
  89. SAMPNUM_ACC4 = $02;
  90. SAMPNUM_ACC8 = $03;
  91. SAMPNUM_ACC16 = $04;
  92. SAMPNUM_ACC32 = $05;
  93. SAMPNUM_ACC64 = $06;
  94. // ADC_PRESC
  95. PRESCmask = $07;
  96. PRESC_DIV2 = $00;
  97. PRESC_DIV4 = $01;
  98. PRESC_DIV8 = $02;
  99. PRESC_DIV16 = $03;
  100. PRESC_DIV32 = $04;
  101. PRESC_DIV64 = $05;
  102. PRESC_DIV128 = $06;
  103. PRESC_DIV256 = $07;
  104. // ADC_REFSEL
  105. REFSELmask = $30;
  106. REFSEL_INTREF = $00;
  107. REFSEL_VDDREF = $10;
  108. // Sample Capacitance Selection
  109. SAMPCAPbm = $40;
  110. // ADC_ASDV
  111. ASDVmask = $10;
  112. ASDV_ASVOFF = $00;
  113. ASDV_ASVON = $10;
  114. // ADC_INITDLY
  115. INITDLYmask = $E0;
  116. INITDLY_DLY0 = $00;
  117. INITDLY_DLY16 = $20;
  118. INITDLY_DLY32 = $40;
  119. INITDLY_DLY64 = $60;
  120. INITDLY_DLY128 = $80;
  121. INITDLY_DLY256 = $A0;
  122. // Sampling Delay Selection
  123. SAMPDLY0bm = $01;
  124. SAMPDLY1bm = $02;
  125. SAMPDLY2bm = $04;
  126. SAMPDLY3bm = $08;
  127. // ADC_WINCM
  128. WINCMmask = $07;
  129. WINCM_NONE = $00;
  130. WINCM_BELOW = $01;
  131. WINCM_ABOVE = $02;
  132. WINCM_INSIDE = $03;
  133. WINCM_OUTSIDE = $04;
  134. // Debug run
  135. DBGRUNbm = $01;
  136. // Start Event Input Enable
  137. STARTEIbm = $01;
  138. // Result Ready Interrupt Enable
  139. RESRDYbm = $01;
  140. // Window Comparator Interrupt Enable
  141. WCMPbm = $02;
  142. // ADC_MUXPOS
  143. MUXPOSmask = $1F;
  144. MUXPOS_AIN0 = $00;
  145. MUXPOS_AIN1 = $01;
  146. MUXPOS_AIN2 = $02;
  147. MUXPOS_AIN3 = $03;
  148. MUXPOS_AIN4 = $04;
  149. MUXPOS_AIN5 = $05;
  150. MUXPOS_AIN6 = $06;
  151. MUXPOS_AIN7 = $07;
  152. MUXPOS_AIN8 = $08;
  153. MUXPOS_AIN9 = $09;
  154. MUXPOS_AIN10 = $0A;
  155. MUXPOS_AIN11 = $0B;
  156. MUXPOS_DAC0 = $1C;
  157. MUXPOS_INTREF = $1D;
  158. MUXPOS_TEMPSENSE = $1E;
  159. MUXPOS_GND = $1F;
  160. // Sample lenght
  161. SAMPLEN0bm = $01;
  162. SAMPLEN1bm = $02;
  163. SAMPLEN2bm = $04;
  164. SAMPLEN3bm = $08;
  165. SAMPLEN4bm = $10;
  166. // Temporary
  167. TEMP0bm = $01;
  168. TEMP1bm = $02;
  169. TEMP2bm = $04;
  170. TEMP3bm = $08;
  171. TEMP4bm = $10;
  172. TEMP5bm = $20;
  173. TEMP6bm = $40;
  174. TEMP7bm = $80;
  175. end;
  176. TBOD = object //Bod interface
  177. CTRLA: byte; //Control A
  178. CTRLB: byte; //Control B
  179. Reserved2: byte;
  180. Reserved3: byte;
  181. Reserved4: byte;
  182. Reserved5: byte;
  183. Reserved6: byte;
  184. Reserved7: byte;
  185. VLMCTRLA: byte; //Voltage level monitor Control
  186. INTCTRL: byte; //Voltage level monitor interrupt Control
  187. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  188. STATUS: byte; //Voltage level monitor status
  189. const
  190. // BOD_ACTIVE
  191. ACTIVEmask = $0C;
  192. ACTIVE_DIS = $00;
  193. ACTIVE_ENABLED = $04;
  194. ACTIVE_SAMPLED = $08;
  195. ACTIVE_ENWAKE = $0C;
  196. // BOD_SAMPFREQ
  197. SAMPFREQmask = $10;
  198. SAMPFREQ_1KHZ = $00;
  199. SAMPFREQ_125Hz = $10;
  200. // BOD_SLEEP
  201. SLEEPmask = $03;
  202. SLEEP_DIS = $00;
  203. SLEEP_ENABLED = $01;
  204. SLEEP_SAMPLED = $02;
  205. // BOD_LVL
  206. LVLmask = $07;
  207. LVL_BODLEVEL0 = $00;
  208. LVL_BODLEVEL1 = $01;
  209. LVL_BODLEVEL2 = $02;
  210. LVL_BODLEVEL3 = $03;
  211. LVL_BODLEVEL4 = $04;
  212. LVL_BODLEVEL5 = $05;
  213. LVL_BODLEVEL6 = $06;
  214. LVL_BODLEVEL7 = $07;
  215. // BOD_VLMCFG
  216. VLMCFGmask = $06;
  217. VLMCFG_BELOW = $00;
  218. VLMCFG_ABOVE = $02;
  219. VLMCFG_CROSS = $04;
  220. // voltage level monitor interrrupt enable
  221. VLMIEbm = $01;
  222. // Voltage level monitor interrupt flag
  223. VLMIFbm = $01;
  224. // Voltage level monitor status
  225. VLMSbm = $01;
  226. // BOD_VLMLVL
  227. VLMLVLmask = $03;
  228. VLMLVL_5ABOVE = $00;
  229. VLMLVL_15ABOVE = $01;
  230. VLMLVL_25ABOVE = $02;
  231. end;
  232. TCCL = object //Configurable Custom Logic
  233. CTRLA: byte; //Control Register A
  234. SEQCTRL0: byte; //Sequential Control 0
  235. Reserved2: byte;
  236. Reserved3: byte;
  237. Reserved4: byte;
  238. LUT0CTRLA: byte; //LUT Control 0 A
  239. LUT0CTRLB: byte; //LUT Control 0 B
  240. LUT0CTRLC: byte; //LUT Control 0 C
  241. TRUTH0: byte; //Truth 0
  242. LUT1CTRLA: byte; //LUT Control 1 A
  243. LUT1CTRLB: byte; //LUT Control 1 B
  244. LUT1CTRLC: byte; //LUT Control 1 C
  245. TRUTH1: byte; //Truth 1
  246. const
  247. // Enable
  248. ENABLEbm = $01;
  249. // Run in Standby
  250. RUNSTDBYbm = $40;
  251. // Clock Source Selection
  252. CLKSRCbm = $40;
  253. // CCL_EDGEDET
  254. EDGEDETmask = $80;
  255. EDGEDET_DIS = $00;
  256. EDGEDET_EN = $80;
  257. // CCL_FILTSEL
  258. FILTSELmask = $30;
  259. FILTSEL_DISABLE = $00;
  260. FILTSEL_SYNCH = $10;
  261. FILTSEL_FILTER = $20;
  262. // Output Enable
  263. OUTENbm = $08;
  264. // CCL_INSEL0
  265. INSEL0mask = $0F;
  266. INSEL0_MASK = $00;
  267. INSEL0_FEEDBACK = $01;
  268. INSEL0_LINK = $02;
  269. INSEL0_EVENT0 = $03;
  270. INSEL0_EVENT1 = $04;
  271. INSEL0_IO = $05;
  272. INSEL0_AC0 = $06;
  273. INSEL0_TCB0 = $07;
  274. INSEL0_TCA0 = $08;
  275. INSEL0_TCD0 = $09;
  276. INSEL0_USART0 = $0A;
  277. INSEL0_SPI0 = $0B;
  278. // CCL_INSEL1
  279. INSEL1mask = $F0;
  280. INSEL1_MASK = $00;
  281. INSEL1_FEEDBACK = $10;
  282. INSEL1_LINK = $20;
  283. INSEL1_EVENT0 = $30;
  284. INSEL1_EVENT1 = $40;
  285. INSEL1_IO = $50;
  286. INSEL1_AC0 = $60;
  287. INSEL1_TCB0 = $70;
  288. INSEL1_TCA0 = $80;
  289. INSEL1_TCD0 = $90;
  290. INSEL1_USART0 = $A0;
  291. INSEL1_SPI0 = $B0;
  292. // CCL_INSEL2
  293. INSEL2mask = $0F;
  294. INSEL2_MASK = $00;
  295. INSEL2_FEEDBACK = $01;
  296. INSEL2_LINK = $02;
  297. INSEL2_EVENT0 = $03;
  298. INSEL2_EVENT1 = $04;
  299. INSEL2_IO = $05;
  300. INSEL2_AC0 = $06;
  301. INSEL2_TCB0 = $07;
  302. INSEL2_TCA0 = $08;
  303. INSEL2_TCD0 = $09;
  304. INSEL2_SPI0 = $0B;
  305. // CCL_SEQSEL
  306. SEQSELmask = $07;
  307. SEQSEL_DISABLE = $00;
  308. SEQSEL_DFF = $01;
  309. SEQSEL_JK = $02;
  310. SEQSEL_LATCH = $03;
  311. SEQSEL_RS = $04;
  312. end;
  313. TCLKCTRL = object //Clock controller
  314. MCLKCTRLA: byte; //MCLK Control A
  315. MCLKCTRLB: byte; //MCLK Control B
  316. MCLKLOCK: byte; //MCLK Lock
  317. MCLKSTATUS: byte; //MCLK Status
  318. Reserved4: byte;
  319. Reserved5: byte;
  320. Reserved6: byte;
  321. Reserved7: byte;
  322. Reserved8: byte;
  323. Reserved9: byte;
  324. Reserved10: byte;
  325. Reserved11: byte;
  326. Reserved12: byte;
  327. Reserved13: byte;
  328. Reserved14: byte;
  329. Reserved15: byte;
  330. OSC20MCTRLA: byte; //OSC20M Control A
  331. OSC20MCALIBA: byte; //OSC20M Calibration A
  332. OSC20MCALIBB: byte; //OSC20M Calibration B
  333. Reserved19: byte;
  334. Reserved20: byte;
  335. Reserved21: byte;
  336. Reserved22: byte;
  337. Reserved23: byte;
  338. OSC32KCTRLA: byte; //OSC32K Control A
  339. const
  340. // System clock out
  341. CLKOUTbm = $80;
  342. // CLKCTRL_CLKSEL
  343. CLKSELmask = $03;
  344. CLKSEL_OSC20M = $00;
  345. CLKSEL_OSCULP32K = $01;
  346. CLKSEL_XOSC32K = $02;
  347. CLKSEL_EXTCLK = $03;
  348. // CLKCTRL_PDIV
  349. PDIVmask = $1E;
  350. PDIV_2X = $00;
  351. PDIV_4X = $02;
  352. PDIV_8X = $04;
  353. PDIV_16X = $06;
  354. PDIV_32X = $08;
  355. PDIV_64X = $0A;
  356. PDIV_6X = $10;
  357. PDIV_10X = $12;
  358. PDIV_12X = $14;
  359. PDIV_24X = $16;
  360. PDIV_48X = $18;
  361. // Prescaler enable
  362. PENbm = $01;
  363. // lock ebable
  364. LOCKENbm = $01;
  365. // External Clock status
  366. EXTSbm = $80;
  367. // 20MHz oscillator status
  368. OSC20MSbm = $10;
  369. // 32KHz oscillator status
  370. OSC32KSbm = $20;
  371. // System Oscillator changing
  372. SOSCbm = $01;
  373. // 32.768 kHz Crystal Oscillator status
  374. XOSC32KSbm = $40;
  375. // Calibration
  376. CAL20M0bm = $01;
  377. CAL20M1bm = $02;
  378. CAL20M2bm = $04;
  379. CAL20M3bm = $08;
  380. CAL20M4bm = $10;
  381. CAL20M5bm = $20;
  382. // Lock
  383. LOCKbm = $80;
  384. // Oscillator temperature coefficient
  385. TEMPCAL20M0bm = $01;
  386. TEMPCAL20M1bm = $02;
  387. TEMPCAL20M2bm = $04;
  388. TEMPCAL20M3bm = $08;
  389. // Run standby
  390. RUNSTDBYbm = $02;
  391. end;
  392. TCPU = object //CPU
  393. Reserved0: byte;
  394. Reserved1: byte;
  395. Reserved2: byte;
  396. Reserved3: byte;
  397. CCP: byte; //Configuration Change Protection
  398. Reserved5: byte;
  399. Reserved6: byte;
  400. Reserved7: byte;
  401. Reserved8: byte;
  402. Reserved9: byte;
  403. Reserved10: byte;
  404. Reserved11: byte;
  405. Reserved12: byte;
  406. SPL: byte; //Stack Pointer Low
  407. SPH: byte; //Stack Pointer High
  408. SREG: byte; //Status Register
  409. const
  410. // CPU_CCP
  411. CCPmask = $FF;
  412. CCP_SPM = $9D;
  413. CCP_IOREG = $D8;
  414. // Carry Flag
  415. Cbm = $01;
  416. // Half Carry Flag
  417. Hbm = $20;
  418. // Global Interrupt Enable Flag
  419. Ibm = $80;
  420. // Negative Flag
  421. Nbm = $04;
  422. // N Exclusive Or V Flag
  423. Sbm = $10;
  424. // Transfer Bit
  425. Tbm = $40;
  426. // Two's Complement Overflow Flag
  427. Vbm = $08;
  428. // Zero Flag
  429. Zbm = $02;
  430. end;
  431. TCPUINT = object //Interrupt Controller
  432. CTRLA: byte; //Control A
  433. STATUS: byte; //Status
  434. LVL0PRI: byte; //Interrupt Level 0 Priority
  435. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  436. const
  437. // Compact Vector Table
  438. CVTbm = $20;
  439. // Interrupt Vector Select
  440. IVSELbm = $40;
  441. // Round-robin Scheduling Enable
  442. LVL0RRbm = $01;
  443. // Interrupt Level Priority
  444. LVL0PRI0bm = $01;
  445. LVL0PRI1bm = $02;
  446. LVL0PRI2bm = $04;
  447. LVL0PRI3bm = $08;
  448. LVL0PRI4bm = $10;
  449. LVL0PRI5bm = $20;
  450. LVL0PRI6bm = $40;
  451. LVL0PRI7bm = $80;
  452. // Interrupt Vector with High Priority
  453. LVL1VEC0bm = $01;
  454. LVL1VEC1bm = $02;
  455. LVL1VEC2bm = $04;
  456. LVL1VEC3bm = $08;
  457. LVL1VEC4bm = $10;
  458. LVL1VEC5bm = $20;
  459. LVL1VEC6bm = $40;
  460. LVL1VEC7bm = $80;
  461. // Level 0 Interrupt Executing
  462. LVL0EXbm = $01;
  463. // Level 1 Interrupt Executing
  464. LVL1EXbm = $02;
  465. // Non-maskable Interrupt Executing
  466. NMIEXbm = $80;
  467. end;
  468. TCRCSCAN = object //CRCSCAN
  469. CTRLA: byte; //Control A
  470. CTRLB: byte; //Control B
  471. STATUS: byte; //Status
  472. const
  473. // Enable CRC scan
  474. ENABLEbm = $01;
  475. // Enable NMI Trigger
  476. NMIENbm = $02;
  477. // Reset CRC scan
  478. RESETbm = $80;
  479. // CRCSCAN_MODE
  480. MODEmask = $30;
  481. MODE_PRIORITY = $00;
  482. MODE_RESERVED = $10;
  483. MODE_BACKGROUND = $20;
  484. MODE_CONTINUOUS = $30;
  485. // CRCSCAN_SRC
  486. SRCmask = $03;
  487. SRC_FLASH = $00;
  488. SRC_APPLICATION = $01;
  489. SRC_BOOT = $02;
  490. // CRC Busy
  491. BUSYbm = $01;
  492. // CRC Ok
  493. OKbm = $02;
  494. end;
  495. TEVSYS = object //Event System
  496. ASYNCSTROBE: byte; //Asynchronous Channel Strobe
  497. SYNCSTROBE: byte; //Synchronous Channel Strobe
  498. ASYNCCH0: byte; //Asynchronous Channel 0 Generator Selection
  499. ASYNCCH1: byte; //Asynchronous Channel 1 Generator Selection
  500. Reserved4: byte;
  501. Reserved5: byte;
  502. Reserved6: byte;
  503. Reserved7: byte;
  504. Reserved8: byte;
  505. Reserved9: byte;
  506. SYNCCH0: byte; //Synchronous Channel 0 Generator Selection
  507. SYNCCH1: byte; //Synchronous Channel 1 Generator Selection
  508. Reserved12: byte;
  509. Reserved13: byte;
  510. Reserved14: byte;
  511. Reserved15: byte;
  512. Reserved16: byte;
  513. Reserved17: byte;
  514. ASYNCUSER0: byte; //Asynchronous User Ch 0 Input Selection - TCB0
  515. ASYNCUSER1: byte; //Asynchronous User Ch 1 Input Selection - ADC0
  516. ASYNCUSER2: byte; //Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  517. ASYNCUSER3: byte; //Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  518. ASYNCUSER4: byte; //Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  519. ASYNCUSER5: byte; //Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  520. ASYNCUSER6: byte; //Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  521. ASYNCUSER7: byte; //Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  522. ASYNCUSER8: byte; //Asynchronous User Ch 8 Input Selection - Event Out 0
  523. ASYNCUSER9: byte; //Asynchronous User Ch 9 Input Selection - Event Out 1
  524. ASYNCUSER10: byte; //Asynchronous User Ch 10 Input Selection - Event Out 2
  525. Reserved29: byte;
  526. Reserved30: byte;
  527. Reserved31: byte;
  528. Reserved32: byte;
  529. Reserved33: byte;
  530. SYNCUSER0: byte; //Synchronous User Ch 0 Input Selection - TCA0
  531. const
  532. // EVSYS_ASYNCCH0
  533. ASYNCCH0mask = $FF;
  534. ASYNCCH0_OFF = $00;
  535. ASYNCCH0_CCL_LUT0 = $01;
  536. ASYNCCH0_CCL_LUT1 = $02;
  537. ASYNCCH0_AC0_OUT = $03;
  538. ASYNCCH0_TCD0_CMPBCLR = $04;
  539. ASYNCCH0_TCD0_CMPASET = $05;
  540. ASYNCCH0_TCD0_CMPBSET = $06;
  541. ASYNCCH0_TCD0_PROGEV = $07;
  542. ASYNCCH0_RTC_OVF = $08;
  543. ASYNCCH0_RTC_CMP = $09;
  544. ASYNCCH0_PORTA_PIN0 = $0A;
  545. ASYNCCH0_PORTA_PIN1 = $0B;
  546. ASYNCCH0_PORTA_PIN2 = $0C;
  547. ASYNCCH0_PORTA_PIN3 = $0D;
  548. ASYNCCH0_PORTA_PIN4 = $0E;
  549. ASYNCCH0_PORTA_PIN5 = $0F;
  550. ASYNCCH0_PORTA_PIN6 = $10;
  551. ASYNCCH0_PORTA_PIN7 = $11;
  552. ASYNCCH0_UPDI = $12;
  553. // EVSYS_ASYNCCH1
  554. ASYNCCH1mask = $FF;
  555. ASYNCCH1_OFF = $00;
  556. ASYNCCH1_CCL_LUT0 = $01;
  557. ASYNCCH1_CCL_LUT1 = $02;
  558. ASYNCCH1_AC0_OUT = $03;
  559. ASYNCCH1_TCD0_CMPBCLR = $04;
  560. ASYNCCH1_TCD0_CMPASET = $05;
  561. ASYNCCH1_TCD0_CMPBSET = $06;
  562. ASYNCCH1_TCD0_PROGEV = $07;
  563. ASYNCCH1_RTC_OVF = $08;
  564. ASYNCCH1_RTC_CMP = $09;
  565. ASYNCCH1_PORTB_PIN0 = $0A;
  566. ASYNCCH1_PORTB_PIN1 = $0B;
  567. ASYNCCH1_PORTB_PIN2 = $0C;
  568. ASYNCCH1_PORTB_PIN3 = $0D;
  569. ASYNCCH1_PORTB_PIN4 = $0E;
  570. ASYNCCH1_PORTB_PIN5 = $0F;
  571. ASYNCCH1_PORTB_PIN6 = $10;
  572. ASYNCCH1_PORTB_PIN7 = $11;
  573. // EVSYS_ASYNCUSER0
  574. ASYNCUSER0mask = $FF;
  575. ASYNCUSER0_OFF = $00;
  576. ASYNCUSER0_SYNCCH0 = $01;
  577. ASYNCUSER0_ASYNCCH0 = $03;
  578. ASYNCUSER0_ASYNCCH1 = $04;
  579. // EVSYS_ASYNCUSER1
  580. ASYNCUSER1mask = $FF;
  581. ASYNCUSER1_OFF = $00;
  582. ASYNCUSER1_SYNCCH0 = $01;
  583. ASYNCUSER1_ASYNCCH0 = $03;
  584. ASYNCUSER1_ASYNCCH1 = $04;
  585. // EVSYS_ASYNCUSER2
  586. ASYNCUSER2mask = $FF;
  587. ASYNCUSER2_OFF = $00;
  588. ASYNCUSER2_SYNCCH0 = $01;
  589. ASYNCUSER2_ASYNCCH0 = $03;
  590. ASYNCUSER2_ASYNCCH1 = $04;
  591. // EVSYS_ASYNCUSER3
  592. ASYNCUSER3mask = $FF;
  593. ASYNCUSER3_OFF = $00;
  594. ASYNCUSER3_SYNCCH0 = $01;
  595. ASYNCUSER3_ASYNCCH0 = $03;
  596. ASYNCUSER3_ASYNCCH1 = $04;
  597. // EVSYS_ASYNCUSER4
  598. ASYNCUSER4mask = $FF;
  599. ASYNCUSER4_OFF = $00;
  600. ASYNCUSER4_SYNCCH0 = $01;
  601. ASYNCUSER4_ASYNCCH0 = $03;
  602. ASYNCUSER4_ASYNCCH1 = $04;
  603. // EVSYS_ASYNCUSER5
  604. ASYNCUSER5mask = $FF;
  605. ASYNCUSER5_OFF = $00;
  606. ASYNCUSER5_SYNCCH0 = $01;
  607. ASYNCUSER5_ASYNCCH0 = $03;
  608. ASYNCUSER5_ASYNCCH1 = $04;
  609. // EVSYS_ASYNCUSER6
  610. ASYNCUSER6mask = $FF;
  611. ASYNCUSER6_OFF = $00;
  612. ASYNCUSER6_SYNCCH0 = $01;
  613. ASYNCUSER6_ASYNCCH0 = $03;
  614. ASYNCUSER6_ASYNCCH1 = $04;
  615. // EVSYS_ASYNCUSER7
  616. ASYNCUSER7mask = $FF;
  617. ASYNCUSER7_OFF = $00;
  618. ASYNCUSER7_SYNCCH0 = $01;
  619. ASYNCUSER7_ASYNCCH0 = $03;
  620. ASYNCUSER7_ASYNCCH1 = $04;
  621. // EVSYS_ASYNCUSER8
  622. ASYNCUSER8mask = $FF;
  623. ASYNCUSER8_OFF = $00;
  624. ASYNCUSER8_SYNCCH0 = $01;
  625. ASYNCUSER8_ASYNCCH0 = $03;
  626. ASYNCUSER8_ASYNCCH1 = $04;
  627. // EVSYS_ASYNCUSER9
  628. ASYNCUSER9mask = $FF;
  629. ASYNCUSER9_OFF = $00;
  630. ASYNCUSER9_SYNCCH0 = $01;
  631. ASYNCUSER9_ASYNCCH0 = $03;
  632. ASYNCUSER9_ASYNCCH1 = $04;
  633. // EVSYS_ASYNCUSER10
  634. ASYNCUSER10mask = $FF;
  635. ASYNCUSER10_OFF = $00;
  636. ASYNCUSER10_SYNCCH0 = $01;
  637. ASYNCUSER10_ASYNCCH0 = $03;
  638. ASYNCUSER10_ASYNCCH1 = $04;
  639. // EVSYS_SYNCCH0
  640. SYNCCH0mask = $FF;
  641. SYNCCH0_OFF = $00;
  642. SYNCCH0_TCB0 = $01;
  643. SYNCCH0_TCA0_OVF_LUNF = $02;
  644. SYNCCH0_TCA0_HUNF = $03;
  645. SYNCCH0_TCA0_CMP0 = $04;
  646. SYNCCH0_TCA0_CMP1 = $05;
  647. SYNCCH0_TCA0_CMP2 = $06;
  648. SYNCCH0_PORTC_PIN0 = $07;
  649. SYNCCH0_PORTC_PIN1 = $08;
  650. SYNCCH0_PORTC_PIN2 = $09;
  651. SYNCCH0_PORTC_PIN3 = $0A;
  652. SYNCCH0_PORTC_PIN4 = $0B;
  653. SYNCCH0_PORTC_PIN5 = $0C;
  654. SYNCCH0_PORTA_PIN0 = $0D;
  655. SYNCCH0_PORTA_PIN1 = $0E;
  656. SYNCCH0_PORTA_PIN2 = $0F;
  657. SYNCCH0_PORTA_PIN3 = $10;
  658. SYNCCH0_PORTA_PIN4 = $11;
  659. SYNCCH0_PORTA_PIN5 = $12;
  660. SYNCCH0_PORTA_PIN6 = $13;
  661. SYNCCH0_PORTA_PIN7 = $14;
  662. // EVSYS_SYNCCH1
  663. SYNCCH1mask = $FF;
  664. SYNCCH1_OFF = $00;
  665. SYNCCH1_TCB0 = $01;
  666. SYNCCH1_TCA0_OVF_LUNF = $02;
  667. SYNCCH1_TCA0_HUNF = $03;
  668. SYNCCH1_TCA0_CMP0 = $04;
  669. SYNCCH1_TCA0_CMP1 = $05;
  670. SYNCCH1_TCA0_CMP2 = $06;
  671. SYNCCH1_PORTB_PIN0 = $08;
  672. SYNCCH1_PORTB_PIN1 = $09;
  673. SYNCCH1_PORTB_PIN2 = $0A;
  674. SYNCCH1_PORTB_PIN3 = $0B;
  675. SYNCCH1_PORTB_PIN4 = $0C;
  676. SYNCCH1_PORTB_PIN5 = $0D;
  677. SYNCCH1_PORTB_PIN6 = $0E;
  678. SYNCCH1_PORTB_PIN7 = $0F;
  679. // EVSYS_SYNCUSER0
  680. SYNCUSER0mask = $FF;
  681. SYNCUSER0_OFF = $00;
  682. SYNCUSER0_SYNCCH0 = $01;
  683. end;
  684. TFUSE = object //Fuses
  685. WDTCFG: byte; //Watchdog Configuration
  686. BODCFG: byte; //BOD Configuration
  687. OSCCFG: byte; //Oscillator Configuration
  688. Reserved3: byte;
  689. TCD0CFG: byte; //TCD0 Configuration
  690. SYSCFG0: byte; //System Configuration 0
  691. SYSCFG1: byte; //System Configuration 1
  692. APPEND: byte; //Application Code Section End
  693. BOOTEND: byte; //Boot Section End
  694. const
  695. // FUSE_ACTIVE
  696. ACTIVEmask = $0C;
  697. ACTIVE_DIS = $00;
  698. ACTIVE_ENABLED = $04;
  699. ACTIVE_SAMPLED = $08;
  700. ACTIVE_ENWAKE = $0C;
  701. // FUSE_LVL
  702. LVLmask = $E0;
  703. LVL_BODLEVEL0 = $00;
  704. LVL_BODLEVEL1 = $20;
  705. LVL_BODLEVEL2 = $40;
  706. LVL_BODLEVEL3 = $60;
  707. LVL_BODLEVEL4 = $80;
  708. LVL_BODLEVEL5 = $A0;
  709. LVL_BODLEVEL6 = $C0;
  710. LVL_BODLEVEL7 = $E0;
  711. // FUSE_SAMPFREQ
  712. SAMPFREQmask = $10;
  713. SAMPFREQ_1KHz = $00;
  714. SAMPFREQ_125Hz = $10;
  715. // FUSE_SLEEP
  716. SLEEPmask = $03;
  717. SLEEP_DIS = $00;
  718. SLEEP_ENABLED = $01;
  719. SLEEP_SAMPLED = $02;
  720. // FUSE_FREQSEL
  721. FREQSELmask = $03;
  722. FREQSEL_16MHZ = $01;
  723. FREQSEL_20MHZ = $02;
  724. // Oscillator Lock
  725. OSCLOCKbm = $80;
  726. // FUSE_CRCSRC
  727. CRCSRCmask = $C0;
  728. CRCSRC_FLASH = $00;
  729. CRCSRC_BOOT = $40;
  730. CRCSRC_BOOTAPP = $80;
  731. CRCSRC_NOCRC = $C0;
  732. // EEPROM Save
  733. EESAVEbm = $01;
  734. // FUSE_RSTPINCFG
  735. RSTPINCFGmask = $0C;
  736. RSTPINCFG_GPIO = $00;
  737. RSTPINCFG_UPDI = $04;
  738. RSTPINCFG_RST = $08;
  739. // FUSE_SUT
  740. SUTmask = $07;
  741. SUT_0MS = $00;
  742. SUT_1MS = $01;
  743. SUT_2MS = $02;
  744. SUT_4MS = $03;
  745. SUT_8MS = $04;
  746. SUT_16MS = $05;
  747. SUT_32MS = $06;
  748. SUT_64MS = $07;
  749. // Compare A Default Output Value
  750. CMPAbm = $01;
  751. // Compare A Output Enable
  752. CMPAENbm = $10;
  753. // Compare B Default Output Value
  754. CMPBbm = $02;
  755. // Compare B Output Enable
  756. CMPBENbm = $20;
  757. // Compare C Default Output Value
  758. CMPCbm = $04;
  759. // Compare C Output Enable
  760. CMPCENbm = $40;
  761. // Compare D Default Output Value
  762. CMPDbm = $08;
  763. // Compare D Output Enable
  764. CMPDENbm = $80;
  765. // FUSE_PERIOD
  766. PERIODmask = $0F;
  767. PERIOD_OFF = $00;
  768. PERIOD_8CLK = $01;
  769. PERIOD_16CLK = $02;
  770. PERIOD_32CLK = $03;
  771. PERIOD_64CLK = $04;
  772. PERIOD_128CLK = $05;
  773. PERIOD_256CLK = $06;
  774. PERIOD_512CLK = $07;
  775. PERIOD_1KCLK = $08;
  776. PERIOD_2KCLK = $09;
  777. PERIOD_4KCLK = $0A;
  778. PERIOD_8KCLK = $0B;
  779. // FUSE_WINDOW
  780. WINDOWmask = $F0;
  781. WINDOW_OFF = $00;
  782. WINDOW_8CLK = $10;
  783. WINDOW_16CLK = $20;
  784. WINDOW_32CLK = $30;
  785. WINDOW_64CLK = $40;
  786. WINDOW_128CLK = $50;
  787. WINDOW_256CLK = $60;
  788. WINDOW_512CLK = $70;
  789. WINDOW_1KCLK = $80;
  790. WINDOW_2KCLK = $90;
  791. WINDOW_4KCLK = $A0;
  792. WINDOW_8KCLK = $B0;
  793. end;
  794. TGPIO = object //General Purpose IO
  795. GPIOR0: byte; //General Purpose IO Register 0
  796. GPIOR1: byte; //General Purpose IO Register 1
  797. GPIOR2: byte; //General Purpose IO Register 2
  798. GPIOR3: byte; //General Purpose IO Register 3
  799. end;
  800. TLOCKBIT = object //Lockbit
  801. LOCKBIT: byte; //Lock bits
  802. const
  803. // LOCKBIT_LB
  804. LBmask = $FF;
  805. LB_RWLOCK = $3A;
  806. LB_NOLOCK = $C5;
  807. end;
  808. TNVMCTRL = object //Non-volatile Memory Controller
  809. CTRLA: byte; //Control A
  810. CTRLB: byte; //Control B
  811. STATUS: byte; //Status
  812. INTCTRL: byte; //Interrupt Control
  813. INTFLAGS: byte; //Interrupt Flags
  814. Reserved5: byte;
  815. DATA: word; //Data
  816. ADDR: word; //Address
  817. const
  818. // NVMCTRL_CMD
  819. CMDmask = $07;
  820. CMD_NONE = $00;
  821. CMD_PAGEWRITE = $01;
  822. CMD_PAGEERASE = $02;
  823. CMD_PAGEERASEWRITE = $03;
  824. CMD_PAGEBUFCLR = $04;
  825. CMD_CHIPERASE = $05;
  826. CMD_EEERASE = $06;
  827. CMD_FUSEWRITE = $07;
  828. // Application code write protect
  829. APCWPbm = $01;
  830. // Boot Lock
  831. BOOTLOCKbm = $02;
  832. // EEPROM Ready
  833. EEREADYbm = $01;
  834. // EEPROM busy
  835. EEBUSYbm = $02;
  836. // Flash busy
  837. FBUSYbm = $01;
  838. // Write error
  839. WRERRORbm = $04;
  840. end;
  841. TPORT = object //I/O Ports
  842. DIR: byte; //Data Direction
  843. DIRSET: byte; //Data Direction Set
  844. DIRCLR: byte; //Data Direction Clear
  845. DIRTGL: byte; //Data Direction Toggle
  846. OUT_: byte; //Output Value
  847. OUTSET: byte; //Output Value Set
  848. OUTCLR: byte; //Output Value Clear
  849. OUTTGL: byte; //Output Value Toggle
  850. IN_: byte; //Input Value
  851. INTFLAGS: byte; //Interrupt Flags
  852. Reserved10: byte;
  853. Reserved11: byte;
  854. Reserved12: byte;
  855. Reserved13: byte;
  856. Reserved14: byte;
  857. Reserved15: byte;
  858. PIN0CTRL: byte; //Pin 0 Control
  859. PIN1CTRL: byte; //Pin 1 Control
  860. PIN2CTRL: byte; //Pin 2 Control
  861. PIN3CTRL: byte; //Pin 3 Control
  862. PIN4CTRL: byte; //Pin 4 Control
  863. PIN5CTRL: byte; //Pin 5 Control
  864. PIN6CTRL: byte; //Pin 6 Control
  865. PIN7CTRL: byte; //Pin 7 Control
  866. const
  867. // Pin Interrupt
  868. INT0bm = $01;
  869. INT1bm = $02;
  870. INT2bm = $04;
  871. INT3bm = $08;
  872. INT4bm = $10;
  873. INT5bm = $20;
  874. INT6bm = $40;
  875. INT7bm = $80;
  876. // Inverted I/O Enable
  877. INVENbm = $80;
  878. // PORT_ISC
  879. ISCmask = $07;
  880. ISC_INTDISABLE = $00;
  881. ISC_BOTHEDGES = $01;
  882. ISC_RISING = $02;
  883. ISC_FALLING = $03;
  884. ISC_INPUT_DISABLE = $04;
  885. ISC_LEVEL = $05;
  886. // Pullup enable
  887. PULLUPENbm = $08;
  888. end;
  889. TPORTMUX = object //Port Multiplexer
  890. CTRLA: byte; //Port Multiplexer Control A
  891. CTRLB: byte; //Port Multiplexer Control B
  892. CTRLC: byte; //Port Multiplexer Control C
  893. CTRLD: byte; //Port Multiplexer Control D
  894. const
  895. // Event Output 0
  896. EVOUT0bm = $01;
  897. // Event Output 1
  898. EVOUT1bm = $02;
  899. // Event Output 2
  900. EVOUT2bm = $04;
  901. // PORTMUX_LUT0
  902. LUT0mask = $10;
  903. LUT0_DEFAULT = $00;
  904. LUT0_ALTERNATE = $10;
  905. // PORTMUX_LUT1
  906. LUT1mask = $20;
  907. LUT1_DEFAULT = $00;
  908. LUT1_ALTERNATE = $20;
  909. // PORTMUX_SPI0
  910. SPI0mask = $04;
  911. SPI0_DEFAULT = $00;
  912. SPI0_ALTERNATE = $04;
  913. // PORTMUX_USART0
  914. USART0mask = $01;
  915. USART0_DEFAULT = $00;
  916. USART0_ALTERNATE = $01;
  917. // PORTMUX_TCA00
  918. TCA00mask = $01;
  919. TCA00_DEFAULT = $00;
  920. TCA00_ALTERNATE = $01;
  921. // PORTMUX_TCA01
  922. TCA01mask = $02;
  923. TCA01_DEFAULT = $00;
  924. TCA01_ALTERNATE = $02;
  925. // PORTMUX_TCA02
  926. TCA02mask = $04;
  927. TCA02_DEFAULT = $00;
  928. TCA02_ALTERNATE = $04;
  929. // PORTMUX_TCA03
  930. TCA03mask = $08;
  931. TCA03_DEFAULT = $00;
  932. TCA03_ALTERNATE = $08;
  933. // PORTMUX_TCA04
  934. TCA04mask = $10;
  935. TCA04_DEFAULT = $00;
  936. TCA04_ALTERNATE = $10;
  937. // PORTMUX_TCA05
  938. TCA05mask = $20;
  939. TCA05_DEFAULT = $00;
  940. TCA05_ALTERNATE = $20;
  941. // PORTMUX_TCB0
  942. TCB0mask = $01;
  943. TCB0_DEFAULT = $00;
  944. TCB0_ALTERNATE = $01;
  945. end;
  946. TRSTCTRL = object //Reset controller
  947. RSTFR: byte; //Reset Flags
  948. SWRR: byte; //Software Reset
  949. const
  950. // Brown out detector Reset flag
  951. BORFbm = $02;
  952. // External Reset flag
  953. EXTRFbm = $04;
  954. // Power on Reset flag
  955. PORFbm = $01;
  956. // Software Reset flag
  957. SWRFbm = $10;
  958. // UPDI Reset flag
  959. UPDIRFbm = $20;
  960. // Watch dog Reset flag
  961. WDRFbm = $08;
  962. // Software reset enable
  963. SWREbm = $01;
  964. end;
  965. TRTC = object //Real-Time Counter
  966. CTRLA: byte; //Control A
  967. STATUS: byte; //Status
  968. INTCTRL: byte; //Interrupt Control
  969. INTFLAGS: byte; //Interrupt Flags
  970. TEMP: byte; //Temporary
  971. DBGCTRL: byte; //Debug control
  972. Reserved6: byte;
  973. CLKSEL: byte; //Clock Select
  974. CNT: word; //Counter
  975. PER: word; //Period
  976. CMP: word; //Compare
  977. Reserved14: byte;
  978. Reserved15: byte;
  979. PITCTRLA: byte; //PIT Control A
  980. PITSTATUS: byte; //PIT Status
  981. PITINTCTRL: byte; //PIT Interrupt Control
  982. PITINTFLAGS: byte; //PIT Interrupt Flags
  983. Reserved20: byte;
  984. PITDBGCTRL: byte; //PIT Debug control
  985. const
  986. // RTC_CLKSEL
  987. CLKSELmask = $03;
  988. CLKSEL_INT32K = $00;
  989. CLKSEL_INT1K = $01;
  990. CLKSEL_TOSC32K = $02;
  991. CLKSEL_EXTCLK = $03;
  992. // RTC_PRESCALER
  993. PRESCALERmask = $78;
  994. PRESCALER_DIV1 = $00;
  995. PRESCALER_DIV2 = $08;
  996. PRESCALER_DIV4 = $10;
  997. PRESCALER_DIV8 = $18;
  998. PRESCALER_DIV16 = $20;
  999. PRESCALER_DIV32 = $28;
  1000. PRESCALER_DIV64 = $30;
  1001. PRESCALER_DIV128 = $38;
  1002. PRESCALER_DIV256 = $40;
  1003. PRESCALER_DIV512 = $48;
  1004. PRESCALER_DIV1024 = $50;
  1005. PRESCALER_DIV2048 = $58;
  1006. PRESCALER_DIV4096 = $60;
  1007. PRESCALER_DIV8192 = $68;
  1008. PRESCALER_DIV16384 = $70;
  1009. PRESCALER_DIV32768 = $78;
  1010. // Enable
  1011. RTCENbm = $01;
  1012. // Run In Standby
  1013. RUNSTDBYbm = $80;
  1014. // Run in debug
  1015. DBGRUNbm = $01;
  1016. // Compare Match Interrupt enable
  1017. CMPbm = $02;
  1018. // Overflow Interrupt enable
  1019. OVFbm = $01;
  1020. // RTC_PERIOD
  1021. PERIODmask = $78;
  1022. PERIOD_OFF = $00;
  1023. PERIOD_CYC4 = $08;
  1024. PERIOD_CYC8 = $10;
  1025. PERIOD_CYC16 = $18;
  1026. PERIOD_CYC32 = $20;
  1027. PERIOD_CYC64 = $28;
  1028. PERIOD_CYC128 = $30;
  1029. PERIOD_CYC256 = $38;
  1030. PERIOD_CYC512 = $40;
  1031. PERIOD_CYC1024 = $48;
  1032. PERIOD_CYC2048 = $50;
  1033. PERIOD_CYC4096 = $58;
  1034. PERIOD_CYC8192 = $60;
  1035. PERIOD_CYC16384 = $68;
  1036. PERIOD_CYC32768 = $70;
  1037. // Enable
  1038. PITENbm = $01;
  1039. // Periodic Interrupt
  1040. PIbm = $01;
  1041. // CTRLA Synchronization Busy Flag
  1042. CTRLBUSYbm = $01;
  1043. // Comparator Synchronization Busy Flag
  1044. CMPBUSYbm = $08;
  1045. // Count Synchronization Busy Flag
  1046. CNTBUSYbm = $02;
  1047. // CTRLA Synchronization Busy Flag
  1048. CTRLABUSYbm = $01;
  1049. // Period Synchronization Busy Flag
  1050. PERBUSYbm = $04;
  1051. end;
  1052. TSIGROW = object //Signature row
  1053. DEVICEID0: byte; //Device ID Byte 0
  1054. DEVICEID1: byte; //Device ID Byte 1
  1055. DEVICEID2: byte; //Device ID Byte 2
  1056. SERNUM0: byte; //Serial Number Byte 0
  1057. SERNUM1: byte; //Serial Number Byte 1
  1058. SERNUM2: byte; //Serial Number Byte 2
  1059. SERNUM3: byte; //Serial Number Byte 3
  1060. SERNUM4: byte; //Serial Number Byte 4
  1061. SERNUM5: byte; //Serial Number Byte 5
  1062. SERNUM6: byte; //Serial Number Byte 6
  1063. SERNUM7: byte; //Serial Number Byte 7
  1064. SERNUM8: byte; //Serial Number Byte 8
  1065. SERNUM9: byte; //Serial Number Byte 9
  1066. Reserved13: byte;
  1067. Reserved14: byte;
  1068. Reserved15: byte;
  1069. Reserved16: byte;
  1070. Reserved17: byte;
  1071. Reserved18: byte;
  1072. Reserved19: byte;
  1073. Reserved20: byte;
  1074. Reserved21: byte;
  1075. Reserved22: byte;
  1076. Reserved23: byte;
  1077. Reserved24: byte;
  1078. Reserved25: byte;
  1079. Reserved26: byte;
  1080. Reserved27: byte;
  1081. Reserved28: byte;
  1082. Reserved29: byte;
  1083. Reserved30: byte;
  1084. Reserved31: byte;
  1085. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  1086. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  1087. OSC16ERR3V: byte; //OSC16 error at 3V
  1088. OSC16ERR5V: byte; //OSC16 error at 5V
  1089. OSC20ERR3V: byte; //OSC20 error at 3V
  1090. OSC20ERR5V: byte; //OSC20 error at 5V
  1091. end;
  1092. TSLPCTRL = object //Sleep Controller
  1093. CTRLA: byte; //Control
  1094. const
  1095. // Sleep enable
  1096. SENbm = $01;
  1097. // SLPCTRL_SMODE
  1098. SMODEmask = $06;
  1099. SMODE_IDLE = $00;
  1100. SMODE_STDBY = $02;
  1101. SMODE_PDOWN = $04;
  1102. end;
  1103. TSPI = object //Serial Peripheral Interface
  1104. CTRLA: byte; //Control A
  1105. CTRLB: byte; //Control B
  1106. INTCTRL: byte; //Interrupt Control
  1107. INTFLAGS: byte; //Interrupt Flags
  1108. DATA: byte; //Data
  1109. const
  1110. // Enable Double Speed
  1111. CLK2Xbm = $10;
  1112. // Data Order Setting
  1113. DORDbm = $40;
  1114. // Enable Module
  1115. ENABLEbm = $01;
  1116. // Master Operation Enable
  1117. MASTERbm = $20;
  1118. // SPI_PRESC
  1119. PRESCmask = $06;
  1120. PRESC_DIV4 = $00;
  1121. PRESC_DIV16 = $02;
  1122. PRESC_DIV64 = $04;
  1123. PRESC_DIV128 = $06;
  1124. // Buffer Mode Enable
  1125. BUFENbm = $80;
  1126. // Buffer Write Mode
  1127. BUFWRbm = $40;
  1128. // SPI_MODE
  1129. MODEmask = $03;
  1130. MODE_0 = $00;
  1131. MODE_1 = $01;
  1132. MODE_2 = $02;
  1133. MODE_3 = $03;
  1134. // Slave Select Disable
  1135. SSDbm = $04;
  1136. // Data Register Empty Interrupt Enable
  1137. DREIEbm = $20;
  1138. // Interrupt Enable
  1139. IEbm = $01;
  1140. // Receive Complete Interrupt Enable
  1141. RXCIEbm = $80;
  1142. // Slave Select Trigger Interrupt Enable
  1143. SSIEbm = $10;
  1144. // Transfer Complete Interrupt Enable
  1145. TXCIEbm = $40;
  1146. // Buffer Overflow
  1147. BUFOVFbm = $01;
  1148. // Data Register Empty Interrupt Flag
  1149. DREIFbm = $20;
  1150. // Receive Complete Interrupt Flag
  1151. RXCIFbm = $80;
  1152. // Slave Select Trigger Interrupt Flag
  1153. SSIFbm = $10;
  1154. // Transfer Complete Interrupt Flag
  1155. TXCIFbm = $40;
  1156. // Interrupt Flag
  1157. IFbm = $80;
  1158. // Write Collision
  1159. WRCOLbm = $40;
  1160. end;
  1161. TSYSCFG = object //System Configuration Registers
  1162. Reserved0: byte;
  1163. REVID: byte; //Revision ID
  1164. EXTBRK: byte; //External Break
  1165. const
  1166. // External break enable
  1167. ENEXTBRKbm = $01;
  1168. end;
  1169. TTCA_SINGLE = object //16-bit Timer/Counter Type A - Single Mode
  1170. CTRLA: byte; //Control A
  1171. CTRLB: byte; //Control B
  1172. CTRLC: byte; //Control C
  1173. CTRLD: byte; //Control D
  1174. CTRLECLR: byte; //Control E Clear
  1175. CTRLESET: byte; //Control E Set
  1176. CTRLFCLR: byte; //Control F Clear
  1177. CTRLFSET: byte; //Control F Set
  1178. Reserved8: byte;
  1179. EVCTRL: byte; //Event Control
  1180. INTCTRL: byte; //Interrupt Control
  1181. INTFLAGS: byte; //Interrupt Flags
  1182. Reserved12: byte;
  1183. Reserved13: byte;
  1184. DBGCTRL: byte; //Degbug Control
  1185. TEMP: byte; //Temporary data for 16-bit Access
  1186. Reserved16: byte;
  1187. Reserved17: byte;
  1188. Reserved18: byte;
  1189. Reserved19: byte;
  1190. Reserved20: byte;
  1191. Reserved21: byte;
  1192. Reserved22: byte;
  1193. Reserved23: byte;
  1194. Reserved24: byte;
  1195. Reserved25: byte;
  1196. Reserved26: byte;
  1197. Reserved27: byte;
  1198. Reserved28: byte;
  1199. Reserved29: byte;
  1200. Reserved30: byte;
  1201. Reserved31: byte;
  1202. CNT: word; //Count
  1203. Reserved34: byte;
  1204. Reserved35: byte;
  1205. Reserved36: byte;
  1206. Reserved37: byte;
  1207. PER: word; //Period
  1208. CMP0: word; //Compare 0
  1209. CMP1: word; //Compare 1
  1210. CMP2: word; //Compare 2
  1211. Reserved46: byte;
  1212. Reserved47: byte;
  1213. Reserved48: byte;
  1214. Reserved49: byte;
  1215. Reserved50: byte;
  1216. Reserved51: byte;
  1217. Reserved52: byte;
  1218. Reserved53: byte;
  1219. PERBUF: word; //Period Buffer
  1220. CMP0BUF: word; //Compare 0 Buffer
  1221. CMP1BUF: word; //Compare 1 Buffer
  1222. CMP2BUF: word; //Compare 2 Buffer
  1223. const
  1224. // TCA_SINGLE_CLKSEL
  1225. SINGLE_CLKSELmask = $0E;
  1226. SINGLE_CLKSEL_DIV1 = $00;
  1227. SINGLE_CLKSEL_DIV2 = $02;
  1228. SINGLE_CLKSEL_DIV4 = $04;
  1229. SINGLE_CLKSEL_DIV8 = $06;
  1230. SINGLE_CLKSEL_DIV16 = $08;
  1231. SINGLE_CLKSEL_DIV64 = $0A;
  1232. SINGLE_CLKSEL_DIV256 = $0C;
  1233. SINGLE_CLKSEL_DIV1024 = $0E;
  1234. // Module Enable
  1235. ENABLEbm = $01;
  1236. // Auto Lock Update
  1237. ALUPDbm = $08;
  1238. // Compare 0 Enable
  1239. CMP0ENbm = $10;
  1240. // Compare 1 Enable
  1241. CMP1ENbm = $20;
  1242. // Compare 2 Enable
  1243. CMP2ENbm = $40;
  1244. // TCA_SINGLE_WGMODE
  1245. SINGLE_WGMODEmask = $07;
  1246. SINGLE_WGMODE_NORMAL = $00;
  1247. SINGLE_WGMODE_FRQ = $01;
  1248. SINGLE_WGMODE_SINGLESLOPE = $03;
  1249. SINGLE_WGMODE_DSTOP = $05;
  1250. SINGLE_WGMODE_DSBOTH = $06;
  1251. SINGLE_WGMODE_DSBOTTOM = $07;
  1252. // Compare 0 Waveform Output Value
  1253. CMP0OVbm = $01;
  1254. // Compare 1 Waveform Output Value
  1255. CMP1OVbm = $02;
  1256. // Compare 2 Waveform Output Value
  1257. CMP2OVbm = $04;
  1258. // Split Mode Enable
  1259. SPLITMbm = $01;
  1260. // TCA_SINGLE_CMD
  1261. SINGLE_CMDmask = $0C;
  1262. SINGLE_CMD_NONE = $00;
  1263. SINGLE_CMD_UPDATE = $04;
  1264. SINGLE_CMD_RESTART = $08;
  1265. SINGLE_CMD_RESET = $0C;
  1266. // Direction
  1267. DIRbm = $01;
  1268. // Lock Update
  1269. LUPDbm = $02;
  1270. // Compare 0 Buffer Valid
  1271. CMP0BVbm = $02;
  1272. // Compare 1 Buffer Valid
  1273. CMP1BVbm = $04;
  1274. // Compare 2 Buffer Valid
  1275. CMP2BVbm = $08;
  1276. // Period Buffer Valid
  1277. PERBVbm = $01;
  1278. // Debug Run
  1279. DBGRUNbm = $01;
  1280. // Count on Event Input
  1281. CNTEIbm = $01;
  1282. // TCA_SINGLE_EVACT
  1283. SINGLE_EVACTmask = $06;
  1284. SINGLE_EVACT_POSEDGE = $00;
  1285. SINGLE_EVACT_ANYEDGE = $02;
  1286. SINGLE_EVACT_HIGHLVL = $04;
  1287. SINGLE_EVACT_UPDOWN = $06;
  1288. // Compare 0 Interrupt
  1289. CMP0bm = $10;
  1290. // Compare 1 Interrupt
  1291. CMP1bm = $20;
  1292. // Compare 2 Interrupt
  1293. CMP2bm = $40;
  1294. // Overflow Interrupt
  1295. OVFbm = $01;
  1296. end;
  1297. TTCA_SPLIT = object //16-bit Timer/Counter Type A - Split Mode
  1298. CTRLA: byte; //Control A
  1299. CTRLB: byte; //Control B
  1300. CTRLC: byte; //Control C
  1301. CTRLD: byte; //Control D
  1302. CTRLECLR: byte; //Control E Clear
  1303. CTRLESET: byte; //Control E Set
  1304. Reserved6: byte;
  1305. Reserved7: byte;
  1306. Reserved8: byte;
  1307. Reserved9: byte;
  1308. INTCTRL: byte; //Interrupt Control
  1309. INTFLAGS: byte; //Interrupt Flags
  1310. Reserved12: byte;
  1311. Reserved13: byte;
  1312. DBGCTRL: byte; //Degbug Control
  1313. Reserved15: byte;
  1314. Reserved16: byte;
  1315. Reserved17: byte;
  1316. Reserved18: byte;
  1317. Reserved19: byte;
  1318. Reserved20: byte;
  1319. Reserved21: byte;
  1320. Reserved22: byte;
  1321. Reserved23: byte;
  1322. Reserved24: byte;
  1323. Reserved25: byte;
  1324. Reserved26: byte;
  1325. Reserved27: byte;
  1326. Reserved28: byte;
  1327. Reserved29: byte;
  1328. Reserved30: byte;
  1329. Reserved31: byte;
  1330. LCNT: byte; //Low Count
  1331. HCNT: byte; //High Count
  1332. Reserved34: byte;
  1333. Reserved35: byte;
  1334. Reserved36: byte;
  1335. Reserved37: byte;
  1336. LPER: byte; //Low Period
  1337. HPER: byte; //High Period
  1338. LCMP0: byte; //Low Compare
  1339. HCMP0: byte; //High Compare
  1340. LCMP1: byte; //Low Compare
  1341. HCMP1: byte; //High Compare
  1342. LCMP2: byte; //Low Compare
  1343. HCMP2: byte; //High Compare
  1344. const
  1345. // TCA_SPLIT_CLKSEL
  1346. SPLIT_CLKSELmask = $0E;
  1347. SPLIT_CLKSEL_DIV1 = $00;
  1348. SPLIT_CLKSEL_DIV2 = $02;
  1349. SPLIT_CLKSEL_DIV4 = $04;
  1350. SPLIT_CLKSEL_DIV8 = $06;
  1351. SPLIT_CLKSEL_DIV16 = $08;
  1352. SPLIT_CLKSEL_DIV64 = $0A;
  1353. SPLIT_CLKSEL_DIV256 = $0C;
  1354. SPLIT_CLKSEL_DIV1024 = $0E;
  1355. // Module Enable
  1356. ENABLEbm = $01;
  1357. // High Compare 0 Enable
  1358. HCMP0ENbm = $10;
  1359. // High Compare 1 Enable
  1360. HCMP1ENbm = $20;
  1361. // High Compare 2 Enable
  1362. HCMP2ENbm = $40;
  1363. // Low Compare 0 Enable
  1364. LCMP0ENbm = $01;
  1365. // Low Compare 1 Enable
  1366. LCMP1ENbm = $02;
  1367. // Low Compare 2 Enable
  1368. LCMP2ENbm = $04;
  1369. // High Compare 0 Output Value
  1370. HCMP0OVbm = $10;
  1371. // High Compare 1 Output Value
  1372. HCMP1OVbm = $20;
  1373. // High Compare 2 Output Value
  1374. HCMP2OVbm = $40;
  1375. // Low Compare 0 Output Value
  1376. LCMP0OVbm = $01;
  1377. // Low Compare 1 Output Value
  1378. LCMP1OVbm = $02;
  1379. // Low Compare 2 Output Value
  1380. LCMP2OVbm = $04;
  1381. // Split Mode Enable
  1382. SPLITMbm = $01;
  1383. // TCA_SPLIT_CMD
  1384. SPLIT_CMDmask = $0C;
  1385. SPLIT_CMD_NONE = $00;
  1386. SPLIT_CMD_UPDATE = $04;
  1387. SPLIT_CMD_RESTART = $08;
  1388. SPLIT_CMD_RESET = $0C;
  1389. // Debug Run
  1390. DBGRUNbm = $01;
  1391. // High Underflow Interrupt Enable
  1392. HUNFbm = $02;
  1393. // Low Compare 0 Interrupt Enable
  1394. LCMP0bm = $10;
  1395. // Low Compare 1 Interrupt Enable
  1396. LCMP1bm = $20;
  1397. // Low Compare 2 Interrupt Enable
  1398. LCMP2bm = $40;
  1399. // Low Underflow Interrupt Enable
  1400. LUNFbm = $01;
  1401. end;
  1402. TTCA = record //16-bit Timer/Counter Type A
  1403. case byte of
  1404. 0: (SINGLE: TTCA_SINGLE);
  1405. 1: (SPLIT: TTCA_SPLIT);
  1406. end;
  1407. TTCB = object //16-bit Timer Type B
  1408. CTRLA: byte; //Control A
  1409. CTRLB: byte; //Control Register B
  1410. Reserved2: byte;
  1411. Reserved3: byte;
  1412. EVCTRL: byte; //Event Control
  1413. INTCTRL: byte; //Interrupt Control
  1414. INTFLAGS: byte; //Interrupt Flags
  1415. STATUS: byte; //Status
  1416. DBGCTRL: byte; //Debug Control
  1417. TEMP: byte; //Temporary Value
  1418. CNT: word; //Count
  1419. CCMP: word; //Compare or Capture
  1420. const
  1421. // TCB_CLKSEL
  1422. CLKSELmask = $06;
  1423. CLKSEL_CLKDIV1 = $00;
  1424. CLKSEL_CLKDIV2 = $02;
  1425. CLKSEL_CLKTCA = $04;
  1426. // Enable
  1427. ENABLEbm = $01;
  1428. // Run Standby
  1429. RUNSTDBYbm = $40;
  1430. // Synchronize Update
  1431. SYNCUPDbm = $10;
  1432. // Asynchronous Enable
  1433. ASYNCbm = $40;
  1434. // Pin Output Enable
  1435. CCMPENbm = $10;
  1436. // Pin Initial State
  1437. CCMPINITbm = $20;
  1438. // TCB_CNTMODE
  1439. CNTMODEmask = $07;
  1440. CNTMODE_INT = $00;
  1441. CNTMODE_TIMEOUT = $01;
  1442. CNTMODE_CAPT = $02;
  1443. CNTMODE_FRQ = $03;
  1444. CNTMODE_PW = $04;
  1445. CNTMODE_FRQPW = $05;
  1446. CNTMODE_SINGLE = $06;
  1447. CNTMODE_PWM8 = $07;
  1448. // Debug Run
  1449. DBGRUNbm = $01;
  1450. // Event Input Enable
  1451. CAPTEIbm = $01;
  1452. // Event Edge
  1453. EDGEbm = $10;
  1454. // Input Capture Noise Cancellation Filter
  1455. FILTERbm = $40;
  1456. // Capture or Timeout
  1457. CAPTbm = $01;
  1458. // Run
  1459. RUNbm = $01;
  1460. end;
  1461. TTWI = object //Two-Wire Interface
  1462. CTRLA: byte; //Control A
  1463. Reserved1: byte;
  1464. DBGCTRL: byte; //Debug Control Register
  1465. MCTRLA: byte; //Master Control A
  1466. MCTRLB: byte; //Master Control B
  1467. MSTATUS: byte; //Master Status
  1468. MBAUD: byte; //Master Baurd Rate Control
  1469. MADDR: byte; //Master Address
  1470. MDATA: byte; //Master Data
  1471. SCTRLA: byte; //Slave Control A
  1472. SCTRLB: byte; //Slave Control B
  1473. SSTATUS: byte; //Slave Status
  1474. SADDR: byte; //Slave Address
  1475. SDATA: byte; //Slave Data
  1476. SADDRMASK: byte; //Slave Address Mask
  1477. const
  1478. // FM Plus Enable
  1479. FMPENbm = $02;
  1480. // TWI_SDAHOLD
  1481. SDAHOLDmask = $0C;
  1482. SDAHOLD_OFF = $00;
  1483. SDAHOLD_50NS = $04;
  1484. SDAHOLD_300NS = $08;
  1485. SDAHOLD_500NS = $0C;
  1486. // TWI_SDASETUP
  1487. SDASETUPmask = $10;
  1488. SDASETUP_4CYC = $00;
  1489. SDASETUP_8CYC = $10;
  1490. // Debug Run
  1491. DBGRUNbm = $01;
  1492. // Enable TWI Master
  1493. ENABLEbm = $01;
  1494. // Quick Command Enable
  1495. QCENbm = $10;
  1496. // Read Interrupt Enable
  1497. RIENbm = $80;
  1498. // Smart Mode Enable
  1499. SMENbm = $02;
  1500. // TWI_TIMEOUT
  1501. TIMEOUTmask = $0C;
  1502. TIMEOUT_DISABLED = $00;
  1503. TIMEOUT_50US = $04;
  1504. TIMEOUT_100US = $08;
  1505. TIMEOUT_200US = $0C;
  1506. // Write Interrupt Enable
  1507. WIENbm = $40;
  1508. // TWI_ACKACT
  1509. ACKACTmask = $04;
  1510. ACKACT_ACK = $00;
  1511. ACKACT_NACK = $04;
  1512. // Flush
  1513. FLUSHbm = $08;
  1514. // TWI_MCMD
  1515. MCMDmask = $03;
  1516. MCMD_NOACT = $00;
  1517. MCMD_REPSTART = $01;
  1518. MCMD_RECVTRANS = $02;
  1519. MCMD_STOP = $03;
  1520. // Arbitration Lost
  1521. ARBLOSTbm = $08;
  1522. // Bus Error
  1523. BUSERRbm = $04;
  1524. // TWI_BUSSTATE
  1525. BUSSTATEmask = $03;
  1526. BUSSTATE_UNKNOWN = $00;
  1527. BUSSTATE_IDLE = $01;
  1528. BUSSTATE_OWNER = $02;
  1529. BUSSTATE_BUSY = $03;
  1530. // Clock Hold
  1531. CLKHOLDbm = $20;
  1532. // Read Interrupt Flag
  1533. RIFbm = $80;
  1534. // Received Acknowledge
  1535. RXACKbm = $10;
  1536. // Write Interrupt Flag
  1537. WIFbm = $40;
  1538. // Address Enable
  1539. ADDRENbm = $01;
  1540. // Address Mask
  1541. ADDRMASK0bm = $02;
  1542. ADDRMASK1bm = $04;
  1543. ADDRMASK2bm = $08;
  1544. ADDRMASK3bm = $10;
  1545. ADDRMASK4bm = $20;
  1546. ADDRMASK5bm = $40;
  1547. ADDRMASK6bm = $80;
  1548. // Address/Stop Interrupt Enable
  1549. APIENbm = $40;
  1550. // Data Interrupt Enable
  1551. DIENbm = $80;
  1552. // Stop Interrupt Enable
  1553. PIENbm = $20;
  1554. // Promiscuous Mode Enable
  1555. PMENbm = $04;
  1556. // TWI_SCMD
  1557. SCMDmask = $03;
  1558. SCMD_NOACT = $00;
  1559. SCMD_COMPTRANS = $02;
  1560. SCMD_RESPONSE = $03;
  1561. // TWI_AP
  1562. APmask = $01;
  1563. AP_STOP = $00;
  1564. AP_ADR = $01;
  1565. // Address/Stop Interrupt Flag
  1566. APIFbm = $40;
  1567. // Collision
  1568. COLLbm = $08;
  1569. // Data Interrupt Flag
  1570. DIFbm = $80;
  1571. // Read/Write Direction
  1572. DIRbm = $02;
  1573. end;
  1574. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1575. RXDATAL: byte; //Receive Data Low Byte
  1576. RXDATAH: byte; //Receive Data High Byte
  1577. TXDATAL: byte; //Transmit Data Low Byte
  1578. TXDATAH: byte; //Transmit Data High Byte
  1579. STATUS: byte; //Status
  1580. CTRLA: byte; //Control A
  1581. CTRLB: byte; //Control B
  1582. CTRLC: byte; //Control C
  1583. BAUD: word; //Baud Rate
  1584. Reserved10: byte;
  1585. DBGCTRL: byte; //Debug Control
  1586. EVCTRL: byte; //Event Control
  1587. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1588. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1589. const
  1590. // Auto-baud Error Interrupt Enable
  1591. ABEIEbm = $04;
  1592. // Data Register Empty Interrupt Enable
  1593. DREIEbm = $20;
  1594. // Loop-back Mode Enable
  1595. LBMEbm = $08;
  1596. // USART_RS485
  1597. RS485mask = $03;
  1598. RS485_OFF = $00;
  1599. RS485_EXT = $01;
  1600. RS485_INT = $02;
  1601. // Receive Complete Interrupt Enable
  1602. RXCIEbm = $80;
  1603. // Receiver Start Frame Interrupt Enable
  1604. RXSIEbm = $10;
  1605. // Transmit Complete Interrupt Enable
  1606. TXCIEbm = $40;
  1607. // Multi-processor Communication Mode
  1608. MPCMbm = $01;
  1609. // Open Drain Mode Enable
  1610. ODMEbm = $08;
  1611. // Reciever enable
  1612. RXENbm = $80;
  1613. // USART_RXMODE
  1614. RXMODEmask = $06;
  1615. RXMODE_NORMAL = $00;
  1616. RXMODE_CLK2X = $02;
  1617. RXMODE_GENAUTO = $04;
  1618. RXMODE_LINAUTO = $06;
  1619. // Start Frame Detection Enable
  1620. SFDENbm = $10;
  1621. // Transmitter Enable
  1622. TXENbm = $40;
  1623. // USART_MSPI_CMODE
  1624. MSPI_CMODEmask = $C0;
  1625. MSPI_CMODE_ASYNCHRONOUS = $00;
  1626. MSPI_CMODE_SYNCHRONOUS = $40;
  1627. MSPI_CMODE_IRCOM = $80;
  1628. MSPI_CMODE_MSPI = $C0;
  1629. // SPI Master Mode, Clock Phase
  1630. UCPHAbm = $02;
  1631. // SPI Master Mode, Data Order
  1632. UDORDbm = $04;
  1633. // USART_NORMAL_CHSIZE
  1634. NORMAL_CHSIZEmask = $07;
  1635. NORMAL_CHSIZE_5BIT = $00;
  1636. NORMAL_CHSIZE_6BIT = $01;
  1637. NORMAL_CHSIZE_7BIT = $02;
  1638. NORMAL_CHSIZE_8BIT = $03;
  1639. NORMAL_CHSIZE_9BITL = $06;
  1640. NORMAL_CHSIZE_9BITH = $07;
  1641. // USART_NORMAL_CMODE
  1642. NORMAL_CMODEmask = $C0;
  1643. NORMAL_CMODE_ASYNCHRONOUS = $00;
  1644. NORMAL_CMODE_SYNCHRONOUS = $40;
  1645. NORMAL_CMODE_IRCOM = $80;
  1646. NORMAL_CMODE_MSPI = $C0;
  1647. // USART_NORMAL_PMODE
  1648. NORMAL_PMODEmask = $30;
  1649. NORMAL_PMODE_DISABLED = $00;
  1650. NORMAL_PMODE_EVEN = $20;
  1651. NORMAL_PMODE_ODD = $30;
  1652. // USART_NORMAL_SBMODE
  1653. NORMAL_SBMODEmask = $08;
  1654. NORMAL_SBMODE_1BIT = $00;
  1655. NORMAL_SBMODE_2BIT = $08;
  1656. // Autobaud majority voter bypass
  1657. ABMBPbm = $80;
  1658. // Debug Run
  1659. DBGRUNbm = $01;
  1660. // IrDA Event Input Enable
  1661. IREIbm = $01;
  1662. // Buffer Overflow
  1663. BUFOVFbm = $40;
  1664. // Receiver Data Register
  1665. DATA8bm = $01;
  1666. // Frame Error
  1667. FERRbm = $04;
  1668. // Parity Error
  1669. PERRbm = $02;
  1670. // Receive Complete Interrupt Flag
  1671. RXCIFbm = $80;
  1672. // RX Data
  1673. DATA0bm = $01;
  1674. DATA1bm = $02;
  1675. DATA2bm = $04;
  1676. DATA3bm = $08;
  1677. DATA4bm = $10;
  1678. DATA5bm = $20;
  1679. DATA6bm = $40;
  1680. DATA7bm = $80;
  1681. // Receiver Pulse Lenght
  1682. RXPL0bm = $01;
  1683. RXPL1bm = $02;
  1684. RXPL2bm = $04;
  1685. RXPL3bm = $08;
  1686. RXPL4bm = $10;
  1687. RXPL5bm = $20;
  1688. RXPL6bm = $40;
  1689. // Break Detected Flag
  1690. BDFbm = $02;
  1691. // Data Register Empty Flag
  1692. DREIFbm = $20;
  1693. // Inconsistent Sync Field Interrupt Flag
  1694. ISFIFbm = $08;
  1695. // Receive Start Interrupt
  1696. RXSIFbm = $10;
  1697. // Transmit Interrupt Flag
  1698. TXCIFbm = $40;
  1699. // Wait For Break
  1700. WFBbm = $01;
  1701. // Transmit pulse length
  1702. TXPL0bm = $01;
  1703. TXPL1bm = $02;
  1704. TXPL2bm = $04;
  1705. TXPL3bm = $08;
  1706. TXPL4bm = $10;
  1707. TXPL5bm = $20;
  1708. TXPL6bm = $40;
  1709. TXPL7bm = $80;
  1710. end;
  1711. TUSERROW = object //User Row
  1712. USERROW0: byte; //User Row Byte 0
  1713. USERROW1: byte; //User Row Byte 1
  1714. USERROW2: byte; //User Row Byte 2
  1715. USERROW3: byte; //User Row Byte 3
  1716. USERROW4: byte; //User Row Byte 4
  1717. USERROW5: byte; //User Row Byte 5
  1718. USERROW6: byte; //User Row Byte 6
  1719. USERROW7: byte; //User Row Byte 7
  1720. USERROW8: byte; //User Row Byte 8
  1721. USERROW9: byte; //User Row Byte 9
  1722. USERROW10: byte; //User Row Byte 10
  1723. USERROW11: byte; //User Row Byte 11
  1724. USERROW12: byte; //User Row Byte 12
  1725. USERROW13: byte; //User Row Byte 13
  1726. USERROW14: byte; //User Row Byte 14
  1727. USERROW15: byte; //User Row Byte 15
  1728. USERROW16: byte; //User Row Byte 16
  1729. USERROW17: byte; //User Row Byte 17
  1730. USERROW18: byte; //User Row Byte 18
  1731. USERROW19: byte; //User Row Byte 19
  1732. USERROW20: byte; //User Row Byte 20
  1733. USERROW21: byte; //User Row Byte 21
  1734. USERROW22: byte; //User Row Byte 22
  1735. USERROW23: byte; //User Row Byte 23
  1736. USERROW24: byte; //User Row Byte 24
  1737. USERROW25: byte; //User Row Byte 25
  1738. USERROW26: byte; //User Row Byte 26
  1739. USERROW27: byte; //User Row Byte 27
  1740. USERROW28: byte; //User Row Byte 28
  1741. USERROW29: byte; //User Row Byte 29
  1742. USERROW30: byte; //User Row Byte 30
  1743. USERROW31: byte; //User Row Byte 31
  1744. end;
  1745. TVPORT = object //Virtual Ports
  1746. DIR: byte; //Data Direction
  1747. OUT_: byte; //Output Value
  1748. IN_: byte; //Input Value
  1749. INTFLAGS: byte; //Interrupt Flags
  1750. const
  1751. // Pin Interrupt
  1752. INT0bm = $01;
  1753. INT1bm = $02;
  1754. INT2bm = $04;
  1755. INT3bm = $08;
  1756. INT4bm = $10;
  1757. INT5bm = $20;
  1758. INT6bm = $40;
  1759. INT7bm = $80;
  1760. end;
  1761. TVREF = object //Voltage reference
  1762. CTRLA: byte; //Control A
  1763. CTRLB: byte; //Control B
  1764. const
  1765. // VREF_ADC0REFSEL
  1766. ADC0REFSELmask = $70;
  1767. ADC0REFSEL_0V55 = $00;
  1768. ADC0REFSEL_1V1 = $10;
  1769. ADC0REFSEL_2V5 = $20;
  1770. ADC0REFSEL_4V34 = $30;
  1771. ADC0REFSEL_1V5 = $40;
  1772. // VREF_DAC0REFSEL
  1773. DAC0REFSELmask = $07;
  1774. DAC0REFSEL_0V55 = $00;
  1775. DAC0REFSEL_1V1 = $01;
  1776. DAC0REFSEL_2V5 = $02;
  1777. DAC0REFSEL_4V34 = $03;
  1778. DAC0REFSEL_1V5 = $04;
  1779. // ADC0 reference enable
  1780. ADC0REFENbm = $02;
  1781. // DAC0/AC0 reference enable
  1782. DAC0REFENbm = $01;
  1783. end;
  1784. TWDT = object //Watch-Dog Timer
  1785. CTRLA: byte; //Control A
  1786. STATUS: byte; //Status
  1787. const
  1788. // WDT_PERIOD
  1789. PERIODmask = $0F;
  1790. PERIOD_OFF = $00;
  1791. PERIOD_8CLK = $01;
  1792. PERIOD_16CLK = $02;
  1793. PERIOD_32CLK = $03;
  1794. PERIOD_64CLK = $04;
  1795. PERIOD_128CLK = $05;
  1796. PERIOD_256CLK = $06;
  1797. PERIOD_512CLK = $07;
  1798. PERIOD_1KCLK = $08;
  1799. PERIOD_2KCLK = $09;
  1800. PERIOD_4KCLK = $0A;
  1801. PERIOD_8KCLK = $0B;
  1802. // WDT_WINDOW
  1803. WINDOWmask = $F0;
  1804. WINDOW_OFF = $00;
  1805. WINDOW_8CLK = $10;
  1806. WINDOW_16CLK = $20;
  1807. WINDOW_32CLK = $30;
  1808. WINDOW_64CLK = $40;
  1809. WINDOW_128CLK = $50;
  1810. WINDOW_256CLK = $60;
  1811. WINDOW_512CLK = $70;
  1812. WINDOW_1KCLK = $80;
  1813. WINDOW_2KCLK = $90;
  1814. WINDOW_4KCLK = $A0;
  1815. WINDOW_8KCLK = $B0;
  1816. // Lock enable
  1817. LOCKbm = $80;
  1818. // Syncronization busy
  1819. SYNCBUSYbm = $01;
  1820. end;
  1821. const
  1822. Pin0idx = 0; Pin0bm = 1;
  1823. Pin1idx = 1; Pin1bm = 2;
  1824. Pin2idx = 2; Pin2bm = 4;
  1825. Pin3idx = 3; Pin3bm = 8;
  1826. Pin4idx = 4; Pin4bm = 16;
  1827. Pin5idx = 5; Pin5bm = 32;
  1828. Pin6idx = 6; Pin6bm = 64;
  1829. Pin7idx = 7; Pin7bm = 128;
  1830. var
  1831. VPORTA: TVPORT absolute $0000;
  1832. VPORTB: TVPORT absolute $0004;
  1833. VPORTC: TVPORT absolute $0008;
  1834. GPIO: TGPIO absolute $001C;
  1835. CPU: TCPU absolute $0030;
  1836. RSTCTRL: TRSTCTRL absolute $0040;
  1837. SLPCTRL: TSLPCTRL absolute $0050;
  1838. CLKCTRL: TCLKCTRL absolute $0060;
  1839. BOD: TBOD absolute $0080;
  1840. VREF: TVREF absolute $00A0;
  1841. WDT: TWDT absolute $0100;
  1842. CPUINT: TCPUINT absolute $0110;
  1843. CRCSCAN: TCRCSCAN absolute $0120;
  1844. RTC: TRTC absolute $0140;
  1845. EVSYS: TEVSYS absolute $0180;
  1846. CCL: TCCL absolute $01C0;
  1847. PORTMUX: TPORTMUX absolute $0200;
  1848. PORTA: TPORT absolute $0400;
  1849. PORTB: TPORT absolute $0420;
  1850. PORTC: TPORT absolute $0440;
  1851. ADC0: TADC absolute $0600;
  1852. AC0: TAC absolute $0670;
  1853. USART0: TUSART absolute $0800;
  1854. TWI0: TTWI absolute $0810;
  1855. SPI0: TSPI absolute $0820;
  1856. TCA0: TTCA absolute $0A00;
  1857. TCB0: TTCB absolute $0A40;
  1858. SYSCFG: TSYSCFG absolute $0F00;
  1859. NVMCTRL: TNVMCTRL absolute $1000;
  1860. SIGROW: TSIGROW absolute $1100;
  1861. FUSE: TFUSE absolute $1280;
  1862. LOCKBIT: TLOCKBIT absolute $128A;
  1863. USERROW: TUSERROW absolute $1300;
  1864. implementation
  1865. {$define RELBRANCHES}
  1866. {$i avrcommon.inc}
  1867. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  1868. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  1869. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 3
  1870. procedure PORTB_PORT_ISR; external name 'PORTB_PORT_ISR'; // Interrupt 4
  1871. procedure PORTC_PORT_ISR; external name 'PORTC_PORT_ISR'; // Interrupt 5
  1872. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 6
  1873. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 7
  1874. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 8
  1875. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 8
  1876. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 9
  1877. procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 10
  1878. //procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 10
  1879. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 11
  1880. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 11
  1881. procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 12
  1882. //procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 12
  1883. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 13
  1884. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 16
  1885. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 17
  1886. procedure ADC0_WCOMP_ISR; external name 'ADC0_WCOMP_ISR'; // Interrupt 18
  1887. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 19
  1888. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 20
  1889. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 21
  1890. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 22
  1891. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 23
  1892. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 24
  1893. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 25
  1894. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  1895. asm
  1896. rjmp __dtors_end
  1897. rjmp CRCSCAN_NMI_ISR
  1898. rjmp BOD_VLM_ISR
  1899. rjmp PORTA_PORT_ISR
  1900. rjmp PORTB_PORT_ISR
  1901. rjmp PORTC_PORT_ISR
  1902. rjmp RTC_CNT_ISR
  1903. rjmp RTC_PIT_ISR
  1904. rjmp TCA0_LUNF_ISR
  1905. // rjmp TCA0_OVF_ISR
  1906. rjmp TCA0_HUNF_ISR
  1907. rjmp TCA0_LCMP0_ISR
  1908. // rjmp TCA0_CMP0_ISR
  1909. rjmp TCA0_CMP1_ISR
  1910. // rjmp TCA0_LCMP1_ISR
  1911. rjmp TCA0_CMP2_ISR
  1912. // rjmp TCA0_LCMP2_ISR
  1913. rjmp TCB0_INT_ISR
  1914. rjmp AC0_AC_ISR
  1915. rjmp ADC0_RESRDY_ISR
  1916. rjmp ADC0_WCOMP_ISR
  1917. rjmp TWI0_TWIS_ISR
  1918. rjmp TWI0_TWIM_ISR
  1919. rjmp SPI0_INT_ISR
  1920. rjmp USART0_RXC_ISR
  1921. rjmp USART0_DRE_ISR
  1922. rjmp USART0_TXC_ISR
  1923. rjmp NVMCTRL_EE_ISR
  1924. .weak CRCSCAN_NMI_ISR
  1925. .weak BOD_VLM_ISR
  1926. .weak PORTA_PORT_ISR
  1927. .weak PORTB_PORT_ISR
  1928. .weak PORTC_PORT_ISR
  1929. .weak RTC_CNT_ISR
  1930. .weak RTC_PIT_ISR
  1931. .weak TCA0_LUNF_ISR
  1932. // .weak TCA0_OVF_ISR
  1933. .weak TCA0_HUNF_ISR
  1934. .weak TCA0_LCMP0_ISR
  1935. // .weak TCA0_CMP0_ISR
  1936. .weak TCA0_CMP1_ISR
  1937. // .weak TCA0_LCMP1_ISR
  1938. .weak TCA0_CMP2_ISR
  1939. // .weak TCA0_LCMP2_ISR
  1940. .weak TCB0_INT_ISR
  1941. .weak AC0_AC_ISR
  1942. .weak ADC0_RESRDY_ISR
  1943. .weak ADC0_WCOMP_ISR
  1944. .weak TWI0_TWIS_ISR
  1945. .weak TWI0_TWIM_ISR
  1946. .weak SPI0_INT_ISR
  1947. .weak USART0_RXC_ISR
  1948. .weak USART0_DRE_ISR
  1949. .weak USART0_TXC_ISR
  1950. .weak NVMCTRL_EE_ISR
  1951. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  1952. .set BOD_VLM_ISR, Default_IRQ_handler
  1953. .set PORTA_PORT_ISR, Default_IRQ_handler
  1954. .set PORTB_PORT_ISR, Default_IRQ_handler
  1955. .set PORTC_PORT_ISR, Default_IRQ_handler
  1956. .set RTC_CNT_ISR, Default_IRQ_handler
  1957. .set RTC_PIT_ISR, Default_IRQ_handler
  1958. .set TCA0_LUNF_ISR, Default_IRQ_handler
  1959. // .set TCA0_OVF_ISR, Default_IRQ_handler
  1960. .set TCA0_HUNF_ISR, Default_IRQ_handler
  1961. .set TCA0_LCMP0_ISR, Default_IRQ_handler
  1962. // .set TCA0_CMP0_ISR, Default_IRQ_handler
  1963. .set TCA0_CMP1_ISR, Default_IRQ_handler
  1964. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  1965. .set TCA0_CMP2_ISR, Default_IRQ_handler
  1966. // .set TCA0_LCMP2_ISR, Default_IRQ_handler
  1967. .set TCB0_INT_ISR, Default_IRQ_handler
  1968. .set AC0_AC_ISR, Default_IRQ_handler
  1969. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  1970. .set ADC0_WCOMP_ISR, Default_IRQ_handler
  1971. .set TWI0_TWIS_ISR, Default_IRQ_handler
  1972. .set TWI0_TWIM_ISR, Default_IRQ_handler
  1973. .set SPI0_INT_ISR, Default_IRQ_handler
  1974. .set USART0_RXC_ISR, Default_IRQ_handler
  1975. .set USART0_DRE_ISR, Default_IRQ_handler
  1976. .set USART0_TXC_ISR, Default_IRQ_handler
  1977. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  1978. end;
  1979. end.