attiny412.pp 60 KB

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  1. unit ATtiny412;
  2. interface
  3. type
  4. TAC = object //Analog Comparator
  5. CTRLA: byte; //Control A
  6. Reserved1: byte;
  7. MUXCTRLA: byte; //Mux Control A
  8. Reserved3: byte;
  9. Reserved4: byte;
  10. Reserved5: byte;
  11. INTCTRL: byte; //Interrupt Control
  12. STATUS: byte; //Status
  13. const
  14. // Enable
  15. ENABLEbm = $01;
  16. // AC_HYSMODE
  17. HYSMODEmask = $06;
  18. HYSMODE_OFF = $00;
  19. HYSMODE_10mV = $02;
  20. HYSMODE_25mV = $04;
  21. HYSMODE_50mV = $06;
  22. // AC_INTMODE
  23. INTMODEmask = $30;
  24. INTMODE_BOTHEDGE = $00;
  25. INTMODE_NEGEDGE = $20;
  26. INTMODE_POSEDGE = $30;
  27. // AC_LPMODE
  28. LPMODEmask = $08;
  29. LPMODE_DIS = $00;
  30. LPMODE_EN = $08;
  31. // Output Buffer Enable
  32. OUTENbm = $40;
  33. // Run in Standby Mode
  34. RUNSTDBYbm = $80;
  35. // Analog Comparator 0 Interrupt Enable
  36. CMPbm = $01;
  37. // Invert AC Output
  38. INVERTbm = $80;
  39. // AC_MUXNEG
  40. MUXNEGmask = $03;
  41. MUXNEG_PIN0 = $00;
  42. MUXNEG_VREF = $02;
  43. MUXNEG_DAC = $03;
  44. // AC_MUXPOS
  45. MUXPOSmask = $18;
  46. MUXPOS_PIN0 = $00;
  47. // Analog Comparator State
  48. STATEbm = $10;
  49. end;
  50. TADC = object //Analog to Digital Converter
  51. CTRLA: byte; //Control A
  52. CTRLB: byte; //Control B
  53. CTRLC: byte; //Control C
  54. CTRLD: byte; //Control D
  55. CTRLE: byte; //Control E
  56. SAMPCTRL: byte; //Sample Control
  57. MUXPOS: byte; //Positive mux input
  58. Reserved7: byte;
  59. COMMAND: byte; //Command
  60. EVCTRL: byte; //Event Control
  61. INTCTRL: byte; //Interrupt Control
  62. INTFLAGS: byte; //Interrupt Flags
  63. DBGCTRL: byte; //Debug Control
  64. TEMP: byte; //Temporary Data
  65. Reserved14: byte;
  66. Reserved15: byte;
  67. RES: word; //ADC Accumulator Result
  68. WINLT: word; //Window comparator low threshold
  69. WINHT: word; //Window comparator high threshold
  70. CALIB: byte; //Calibration
  71. const
  72. // ADC_DUTYCYC
  73. DUTYCYCmask = $01;
  74. DUTYCYC_DUTY50 = $00;
  75. DUTYCYC_DUTY25 = $01;
  76. // Start Conversion Operation
  77. STCONVbm = $01;
  78. // ADC Enable
  79. ENABLEbm = $01;
  80. // ADC Freerun mode
  81. FREERUNbm = $02;
  82. // ADC_RESSEL
  83. RESSELmask = $04;
  84. RESSEL_10BIT = $00;
  85. RESSEL_8BIT = $04;
  86. // Run standby mode
  87. RUNSTBYbm = $80;
  88. // ADC_SAMPNUM
  89. SAMPNUMmask = $07;
  90. SAMPNUM_ACC1 = $00;
  91. SAMPNUM_ACC2 = $01;
  92. SAMPNUM_ACC4 = $02;
  93. SAMPNUM_ACC8 = $03;
  94. SAMPNUM_ACC16 = $04;
  95. SAMPNUM_ACC32 = $05;
  96. SAMPNUM_ACC64 = $06;
  97. // ADC_PRESC
  98. PRESCmask = $07;
  99. PRESC_DIV2 = $00;
  100. PRESC_DIV4 = $01;
  101. PRESC_DIV8 = $02;
  102. PRESC_DIV16 = $03;
  103. PRESC_DIV32 = $04;
  104. PRESC_DIV64 = $05;
  105. PRESC_DIV128 = $06;
  106. PRESC_DIV256 = $07;
  107. // ADC_REFSEL
  108. REFSELmask = $30;
  109. REFSEL_INTREF = $00;
  110. REFSEL_VDDREF = $10;
  111. // Sample Capacitance Selection
  112. SAMPCAPbm = $40;
  113. // ADC_ASDV
  114. ASDVmask = $10;
  115. ASDV_ASVOFF = $00;
  116. ASDV_ASVON = $10;
  117. // ADC_INITDLY
  118. INITDLYmask = $E0;
  119. INITDLY_DLY0 = $00;
  120. INITDLY_DLY16 = $20;
  121. INITDLY_DLY32 = $40;
  122. INITDLY_DLY64 = $60;
  123. INITDLY_DLY128 = $80;
  124. INITDLY_DLY256 = $A0;
  125. // Sampling Delay Selection
  126. SAMPDLY0bm = $01;
  127. SAMPDLY1bm = $02;
  128. SAMPDLY2bm = $04;
  129. SAMPDLY3bm = $08;
  130. // ADC_WINCM
  131. WINCMmask = $07;
  132. WINCM_NONE = $00;
  133. WINCM_BELOW = $01;
  134. WINCM_ABOVE = $02;
  135. WINCM_INSIDE = $03;
  136. WINCM_OUTSIDE = $04;
  137. // Debug run
  138. DBGRUNbm = $01;
  139. // Start Event Input Enable
  140. STARTEIbm = $01;
  141. // Result Ready Interrupt Enable
  142. RESRDYbm = $01;
  143. // Window Comparator Interrupt Enable
  144. WCMPbm = $02;
  145. // ADC_MUXPOS
  146. MUXPOSmask = $1F;
  147. MUXPOS_AIN0 = $00;
  148. MUXPOS_AIN1 = $01;
  149. MUXPOS_AIN2 = $02;
  150. MUXPOS_AIN3 = $03;
  151. MUXPOS_AIN4 = $04;
  152. MUXPOS_AIN5 = $05;
  153. MUXPOS_AIN6 = $06;
  154. MUXPOS_AIN7 = $07;
  155. MUXPOS_AIN8 = $08;
  156. MUXPOS_AIN9 = $09;
  157. MUXPOS_AIN10 = $0A;
  158. MUXPOS_AIN11 = $0B;
  159. MUXPOS_DAC0 = $1C;
  160. MUXPOS_INTREF = $1D;
  161. MUXPOS_TEMPSENSE = $1E;
  162. MUXPOS_GND = $1F;
  163. // Sample lenght
  164. SAMPLEN0bm = $01;
  165. SAMPLEN1bm = $02;
  166. SAMPLEN2bm = $04;
  167. SAMPLEN3bm = $08;
  168. SAMPLEN4bm = $10;
  169. // Temporary
  170. TEMP0bm = $01;
  171. TEMP1bm = $02;
  172. TEMP2bm = $04;
  173. TEMP3bm = $08;
  174. TEMP4bm = $10;
  175. TEMP5bm = $20;
  176. TEMP6bm = $40;
  177. TEMP7bm = $80;
  178. end;
  179. TBOD = object //Bod interface
  180. CTRLA: byte; //Control A
  181. CTRLB: byte; //Control B
  182. Reserved2: byte;
  183. Reserved3: byte;
  184. Reserved4: byte;
  185. Reserved5: byte;
  186. Reserved6: byte;
  187. Reserved7: byte;
  188. VLMCTRLA: byte; //Voltage level monitor Control
  189. INTCTRL: byte; //Voltage level monitor interrupt Control
  190. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  191. STATUS: byte; //Voltage level monitor status
  192. const
  193. // BOD_ACTIVE
  194. ACTIVEmask = $0C;
  195. ACTIVE_DIS = $00;
  196. ACTIVE_ENABLED = $04;
  197. ACTIVE_SAMPLED = $08;
  198. ACTIVE_ENWAKE = $0C;
  199. // BOD_SAMPFREQ
  200. SAMPFREQmask = $10;
  201. SAMPFREQ_1KHZ = $00;
  202. SAMPFREQ_125Hz = $10;
  203. // BOD_SLEEP
  204. SLEEPmask = $03;
  205. SLEEP_DIS = $00;
  206. SLEEP_ENABLED = $01;
  207. SLEEP_SAMPLED = $02;
  208. // BOD_LVL
  209. LVLmask = $07;
  210. LVL_BODLEVEL0 = $00;
  211. LVL_BODLEVEL1 = $01;
  212. LVL_BODLEVEL2 = $02;
  213. LVL_BODLEVEL3 = $03;
  214. LVL_BODLEVEL4 = $04;
  215. LVL_BODLEVEL5 = $05;
  216. LVL_BODLEVEL6 = $06;
  217. LVL_BODLEVEL7 = $07;
  218. // BOD_VLMCFG
  219. VLMCFGmask = $06;
  220. VLMCFG_BELOW = $00;
  221. VLMCFG_ABOVE = $02;
  222. VLMCFG_CROSS = $04;
  223. // voltage level monitor interrrupt enable
  224. VLMIEbm = $01;
  225. // Voltage level monitor interrupt flag
  226. VLMIFbm = $01;
  227. // Voltage level monitor status
  228. VLMSbm = $01;
  229. // BOD_VLMLVL
  230. VLMLVLmask = $03;
  231. VLMLVL_5ABOVE = $00;
  232. VLMLVL_15ABOVE = $01;
  233. VLMLVL_25ABOVE = $02;
  234. end;
  235. TCCL = object //Configurable Custom Logic
  236. CTRLA: byte; //Control Register A
  237. SEQCTRL0: byte; //Sequential Control 0
  238. Reserved2: byte;
  239. Reserved3: byte;
  240. Reserved4: byte;
  241. LUT0CTRLA: byte; //LUT Control 0 A
  242. LUT0CTRLB: byte; //LUT Control 0 B
  243. LUT0CTRLC: byte; //LUT Control 0 C
  244. TRUTH0: byte; //Truth 0
  245. LUT1CTRLA: byte; //LUT Control 1 A
  246. LUT1CTRLB: byte; //LUT Control 1 B
  247. LUT1CTRLC: byte; //LUT Control 1 C
  248. TRUTH1: byte; //Truth 1
  249. const
  250. // Enable
  251. ENABLEbm = $01;
  252. // Run in Standby
  253. RUNSTDBYbm = $40;
  254. // Clock Source Selection
  255. CLKSRCbm = $40;
  256. // CCL_EDGEDET
  257. EDGEDETmask = $80;
  258. EDGEDET_DIS = $00;
  259. EDGEDET_EN = $80;
  260. // CCL_FILTSEL
  261. FILTSELmask = $30;
  262. FILTSEL_DISABLE = $00;
  263. FILTSEL_SYNCH = $10;
  264. FILTSEL_FILTER = $20;
  265. // Output Enable
  266. OUTENbm = $08;
  267. // CCL_INSEL0
  268. INSEL0mask = $0F;
  269. INSEL0_MASK = $00;
  270. INSEL0_FEEDBACK = $01;
  271. INSEL0_LINK = $02;
  272. INSEL0_EVENT0 = $03;
  273. INSEL0_EVENT1 = $04;
  274. INSEL0_IO = $05;
  275. INSEL0_AC0 = $06;
  276. INSEL0_TCB0 = $07;
  277. INSEL0_TCA0 = $08;
  278. INSEL0_TCD0 = $09;
  279. INSEL0_USART0 = $0A;
  280. INSEL0_SPI0 = $0B;
  281. // CCL_INSEL1
  282. INSEL1mask = $F0;
  283. INSEL1_MASK = $00;
  284. INSEL1_FEEDBACK = $10;
  285. INSEL1_LINK = $20;
  286. INSEL1_EVENT0 = $30;
  287. INSEL1_EVENT1 = $40;
  288. INSEL1_IO = $50;
  289. INSEL1_AC0 = $60;
  290. INSEL1_TCB0 = $70;
  291. INSEL1_TCA0 = $80;
  292. INSEL1_TCD0 = $90;
  293. INSEL1_USART0 = $A0;
  294. INSEL1_SPI0 = $B0;
  295. // CCL_INSEL2
  296. INSEL2mask = $0F;
  297. INSEL2_MASK = $00;
  298. INSEL2_FEEDBACK = $01;
  299. INSEL2_LINK = $02;
  300. INSEL2_EVENT0 = $03;
  301. INSEL2_EVENT1 = $04;
  302. INSEL2_IO = $05;
  303. INSEL2_AC0 = $06;
  304. INSEL2_TCB0 = $07;
  305. INSEL2_TCA0 = $08;
  306. INSEL2_TCD0 = $09;
  307. INSEL2_SPI0 = $0B;
  308. // CCL_SEQSEL
  309. SEQSELmask = $07;
  310. SEQSEL_DISABLE = $00;
  311. SEQSEL_DFF = $01;
  312. SEQSEL_JK = $02;
  313. SEQSEL_LATCH = $03;
  314. SEQSEL_RS = $04;
  315. end;
  316. TCLKCTRL = object //Clock controller
  317. MCLKCTRLA: byte; //MCLK Control A
  318. MCLKCTRLB: byte; //MCLK Control B
  319. MCLKLOCK: byte; //MCLK Lock
  320. MCLKSTATUS: byte; //MCLK Status
  321. Reserved4: byte;
  322. Reserved5: byte;
  323. Reserved6: byte;
  324. Reserved7: byte;
  325. Reserved8: byte;
  326. Reserved9: byte;
  327. Reserved10: byte;
  328. Reserved11: byte;
  329. Reserved12: byte;
  330. Reserved13: byte;
  331. Reserved14: byte;
  332. Reserved15: byte;
  333. OSC20MCTRLA: byte; //OSC20M Control A
  334. OSC20MCALIBA: byte; //OSC20M Calibration A
  335. OSC20MCALIBB: byte; //OSC20M Calibration B
  336. Reserved19: byte;
  337. Reserved20: byte;
  338. Reserved21: byte;
  339. Reserved22: byte;
  340. Reserved23: byte;
  341. OSC32KCTRLA: byte; //OSC32K Control A
  342. Reserved25: byte;
  343. Reserved26: byte;
  344. Reserved27: byte;
  345. XOSC32KCTRLA: byte; //XOSC32K Control A
  346. const
  347. // System clock out
  348. CLKOUTbm = $80;
  349. // CLKCTRL_CLKSEL
  350. CLKSELmask = $03;
  351. CLKSEL_OSC20M = $00;
  352. CLKSEL_OSCULP32K = $01;
  353. CLKSEL_XOSC32K = $02;
  354. CLKSEL_EXTCLK = $03;
  355. // CLKCTRL_PDIV
  356. PDIVmask = $1E;
  357. PDIV_2X = $00;
  358. PDIV_4X = $02;
  359. PDIV_8X = $04;
  360. PDIV_16X = $06;
  361. PDIV_32X = $08;
  362. PDIV_64X = $0A;
  363. PDIV_6X = $10;
  364. PDIV_10X = $12;
  365. PDIV_12X = $14;
  366. PDIV_24X = $16;
  367. PDIV_48X = $18;
  368. // Prescaler enable
  369. PENbm = $01;
  370. // lock ebable
  371. LOCKENbm = $01;
  372. // External Clock status
  373. EXTSbm = $80;
  374. // 20MHz oscillator status
  375. OSC20MSbm = $10;
  376. // 32KHz oscillator status
  377. OSC32KSbm = $20;
  378. // System Oscillator changing
  379. SOSCbm = $01;
  380. // 32.768 kHz Crystal Oscillator status
  381. XOSC32KSbm = $40;
  382. // Calibration
  383. CAL20M0bm = $01;
  384. CAL20M1bm = $02;
  385. CAL20M2bm = $04;
  386. CAL20M3bm = $08;
  387. CAL20M4bm = $10;
  388. CAL20M5bm = $20;
  389. // Lock
  390. LOCKbm = $80;
  391. // Oscillator temperature coefficient
  392. TEMPCAL20M0bm = $01;
  393. TEMPCAL20M1bm = $02;
  394. TEMPCAL20M2bm = $04;
  395. TEMPCAL20M3bm = $08;
  396. // Run standby
  397. RUNSTDBYbm = $02;
  398. // CLKCTRL_CSUT
  399. CSUTmask = $30;
  400. CSUT_1K = $00;
  401. CSUT_16K = $10;
  402. CSUT_32K = $20;
  403. CSUT_64K = $30;
  404. // Enable
  405. ENABLEbm = $01;
  406. // Select
  407. SELbm = $04;
  408. end;
  409. TCPU = object //CPU
  410. Reserved0: byte;
  411. Reserved1: byte;
  412. Reserved2: byte;
  413. Reserved3: byte;
  414. CCP: byte; //Configuration Change Protection
  415. Reserved5: byte;
  416. Reserved6: byte;
  417. Reserved7: byte;
  418. Reserved8: byte;
  419. Reserved9: byte;
  420. Reserved10: byte;
  421. Reserved11: byte;
  422. Reserved12: byte;
  423. SPL: byte; //Stack Pointer Low
  424. SPH: byte; //Stack Pointer High
  425. SREG: byte; //Status Register
  426. const
  427. // CPU_CCP
  428. CCPmask = $FF;
  429. CCP_SPM = $9D;
  430. CCP_IOREG = $D8;
  431. // Carry Flag
  432. Cbm = $01;
  433. // Half Carry Flag
  434. Hbm = $20;
  435. // Global Interrupt Enable Flag
  436. Ibm = $80;
  437. // Negative Flag
  438. Nbm = $04;
  439. // N Exclusive Or V Flag
  440. Sbm = $10;
  441. // Transfer Bit
  442. Tbm = $40;
  443. // Two's Complement Overflow Flag
  444. Vbm = $08;
  445. // Zero Flag
  446. Zbm = $02;
  447. end;
  448. TCPUINT = object //Interrupt Controller
  449. CTRLA: byte; //Control A
  450. STATUS: byte; //Status
  451. LVL0PRI: byte; //Interrupt Level 0 Priority
  452. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  453. const
  454. // Compact Vector Table
  455. CVTbm = $20;
  456. // Interrupt Vector Select
  457. IVSELbm = $40;
  458. // Round-robin Scheduling Enable
  459. LVL0RRbm = $01;
  460. // Interrupt Level Priority
  461. LVL0PRI0bm = $01;
  462. LVL0PRI1bm = $02;
  463. LVL0PRI2bm = $04;
  464. LVL0PRI3bm = $08;
  465. LVL0PRI4bm = $10;
  466. LVL0PRI5bm = $20;
  467. LVL0PRI6bm = $40;
  468. LVL0PRI7bm = $80;
  469. // Interrupt Vector with High Priority
  470. LVL1VEC0bm = $01;
  471. LVL1VEC1bm = $02;
  472. LVL1VEC2bm = $04;
  473. LVL1VEC3bm = $08;
  474. LVL1VEC4bm = $10;
  475. LVL1VEC5bm = $20;
  476. LVL1VEC6bm = $40;
  477. LVL1VEC7bm = $80;
  478. // Level 0 Interrupt Executing
  479. LVL0EXbm = $01;
  480. // Level 1 Interrupt Executing
  481. LVL1EXbm = $02;
  482. // Non-maskable Interrupt Executing
  483. NMIEXbm = $80;
  484. end;
  485. TCRCSCAN = object //CRCSCAN
  486. CTRLA: byte; //Control A
  487. CTRLB: byte; //Control B
  488. STATUS: byte; //Status
  489. const
  490. // Enable CRC scan
  491. ENABLEbm = $01;
  492. // Enable NMI Trigger
  493. NMIENbm = $02;
  494. // Reset CRC scan
  495. RESETbm = $80;
  496. // CRCSCAN_MODE
  497. MODEmask = $30;
  498. MODE_PRIORITY = $00;
  499. MODE_RESERVED = $10;
  500. MODE_BACKGROUND = $20;
  501. MODE_CONTINUOUS = $30;
  502. // CRCSCAN_SRC
  503. SRCmask = $03;
  504. SRC_FLASH = $00;
  505. SRC_APPLICATION = $01;
  506. SRC_BOOT = $02;
  507. // CRC Busy
  508. BUSYbm = $01;
  509. // CRC Ok
  510. OKbm = $02;
  511. end;
  512. TDAC = object //Digital to Analog Converter
  513. CTRLA: byte; //Control Register A
  514. DATA: byte; //DATA Register
  515. const
  516. // DAC Enable
  517. ENABLEbm = $01;
  518. // Output Buffer Enable
  519. OUTENbm = $40;
  520. // Run in Standby Mode
  521. RUNSTDBYbm = $80;
  522. end;
  523. TEVSYS = object //Event System
  524. ASYNCSTROBE: byte; //Asynchronous Channel Strobe
  525. SYNCSTROBE: byte; //Synchronous Channel Strobe
  526. ASYNCCH0: byte; //Asynchronous Channel 0 Generator Selection
  527. ASYNCCH1: byte; //Asynchronous Channel 1 Generator Selection
  528. ASYNCCH2: byte; //Asynchronous Channel 2 Generator Selection
  529. ASYNCCH3: byte; //Asynchronous Channel 3 Generator Selection
  530. Reserved6: byte;
  531. Reserved7: byte;
  532. Reserved8: byte;
  533. Reserved9: byte;
  534. SYNCCH0: byte; //Synchronous Channel 0 Generator Selection
  535. SYNCCH1: byte; //Synchronous Channel 1 Generator Selection
  536. Reserved12: byte;
  537. Reserved13: byte;
  538. Reserved14: byte;
  539. Reserved15: byte;
  540. Reserved16: byte;
  541. Reserved17: byte;
  542. ASYNCUSER0: byte; //Asynchronous User Ch 0 Input Selection - TCB0
  543. ASYNCUSER1: byte; //Asynchronous User Ch 1 Input Selection - ADC0
  544. ASYNCUSER2: byte; //Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  545. ASYNCUSER3: byte; //Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  546. ASYNCUSER4: byte; //Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  547. ASYNCUSER5: byte; //Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  548. ASYNCUSER6: byte; //Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  549. ASYNCUSER7: byte; //Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  550. ASYNCUSER8: byte; //Asynchronous User Ch 8 Input Selection - Event Out 0
  551. ASYNCUSER9: byte; //Asynchronous User Ch 9 Input Selection - Event Out 1
  552. ASYNCUSER10: byte; //Asynchronous User Ch 10 Input Selection - Event Out 2
  553. Reserved29: byte;
  554. Reserved30: byte;
  555. Reserved31: byte;
  556. Reserved32: byte;
  557. Reserved33: byte;
  558. SYNCUSER0: byte; //Synchronous User Ch 0 Input Selection - TCA0
  559. SYNCUSER1: byte; //Synchronous User Ch 1 Input Selection - USART0
  560. const
  561. // EVSYS_ASYNCCH0
  562. ASYNCCH0mask = $FF;
  563. ASYNCCH0_OFF = $00;
  564. ASYNCCH0_CCL_LUT0 = $01;
  565. ASYNCCH0_CCL_LUT1 = $02;
  566. ASYNCCH0_AC0_OUT = $03;
  567. ASYNCCH0_TCD0_CMPBCLR = $04;
  568. ASYNCCH0_TCD0_CMPASET = $05;
  569. ASYNCCH0_TCD0_CMPBSET = $06;
  570. ASYNCCH0_TCD0_PROGEV = $07;
  571. ASYNCCH0_RTC_OVF = $08;
  572. ASYNCCH0_RTC_CMP = $09;
  573. ASYNCCH0_PORTA_PIN0 = $0A;
  574. ASYNCCH0_PORTA_PIN1 = $0B;
  575. ASYNCCH0_PORTA_PIN2 = $0C;
  576. ASYNCCH0_PORTA_PIN3 = $0D;
  577. ASYNCCH0_PORTA_PIN4 = $0E;
  578. ASYNCCH0_PORTA_PIN5 = $0F;
  579. ASYNCCH0_PORTA_PIN6 = $10;
  580. ASYNCCH0_PORTA_PIN7 = $11;
  581. ASYNCCH0_UPDI = $12;
  582. // EVSYS_ASYNCCH1
  583. ASYNCCH1mask = $FF;
  584. ASYNCCH1_OFF = $00;
  585. ASYNCCH1_CCL_LUT0 = $01;
  586. ASYNCCH1_CCL_LUT1 = $02;
  587. ASYNCCH1_AC0_OUT = $03;
  588. ASYNCCH1_TCD0_CMPBCLR = $04;
  589. ASYNCCH1_TCD0_CMPASET = $05;
  590. ASYNCCH1_TCD0_CMPBSET = $06;
  591. ASYNCCH1_TCD0_PROGEV = $07;
  592. ASYNCCH1_RTC_OVF = $08;
  593. ASYNCCH1_RTC_CMP = $09;
  594. ASYNCCH1_PORTB_PIN0 = $0A;
  595. ASYNCCH1_PORTB_PIN1 = $0B;
  596. ASYNCCH1_PORTB_PIN2 = $0C;
  597. ASYNCCH1_PORTB_PIN3 = $0D;
  598. ASYNCCH1_PORTB_PIN4 = $0E;
  599. ASYNCCH1_PORTB_PIN5 = $0F;
  600. ASYNCCH1_PORTB_PIN6 = $10;
  601. ASYNCCH1_PORTB_PIN7 = $11;
  602. // EVSYS_ASYNCCH2
  603. ASYNCCH2mask = $FF;
  604. ASYNCCH2_OFF = $00;
  605. ASYNCCH2_CCL_LUT0 = $01;
  606. ASYNCCH2_CCL_LUT1 = $02;
  607. ASYNCCH2_AC0_OUT = $03;
  608. ASYNCCH2_TCD0_CMPBCLR = $04;
  609. ASYNCCH2_TCD0_CMPASET = $05;
  610. ASYNCCH2_TCD0_CMPBSET = $06;
  611. ASYNCCH2_TCD0_PROGEV = $07;
  612. ASYNCCH2_RTC_OVF = $08;
  613. ASYNCCH2_RTC_CMP = $09;
  614. ASYNCCH2_PORTC_PIN0 = $0A;
  615. ASYNCCH2_PORTC_PIN1 = $0B;
  616. ASYNCCH2_PORTC_PIN2 = $0C;
  617. ASYNCCH2_PORTC_PIN3 = $0D;
  618. ASYNCCH2_PORTC_PIN4 = $0E;
  619. ASYNCCH2_PORTC_PIN5 = $0F;
  620. // EVSYS_ASYNCCH3
  621. ASYNCCH3mask = $FF;
  622. ASYNCCH3_OFF = $00;
  623. ASYNCCH3_CCL_LUT0 = $01;
  624. ASYNCCH3_CCL_LUT1 = $02;
  625. ASYNCCH3_AC0_OUT = $03;
  626. ASYNCCH3_TCD0_CMPBCLR = $04;
  627. ASYNCCH3_TCD0_CMPASET = $05;
  628. ASYNCCH3_TCD0_CMPBSET = $06;
  629. ASYNCCH3_TCD0_PROGEV = $07;
  630. ASYNCCH3_RTC_OVF = $08;
  631. ASYNCCH3_RTC_CMP = $09;
  632. ASYNCCH3_PIT_DIV8192 = $0A;
  633. ASYNCCH3_PIT_DIV4096 = $0B;
  634. ASYNCCH3_PIT_DIV2048 = $0C;
  635. ASYNCCH3_PIT_DIV1024 = $0D;
  636. ASYNCCH3_PIT_DIV512 = $0E;
  637. ASYNCCH3_PIT_DIV256 = $0F;
  638. ASYNCCH3_PIT_DIV128 = $10;
  639. ASYNCCH3_PIT_DIV64 = $11;
  640. // EVSYS_ASYNCUSER0
  641. ASYNCUSER0mask = $FF;
  642. ASYNCUSER0_OFF = $00;
  643. ASYNCUSER0_SYNCCH0 = $01;
  644. ASYNCUSER0_SYNCCH1 = $02;
  645. ASYNCUSER0_ASYNCCH0 = $03;
  646. ASYNCUSER0_ASYNCCH1 = $04;
  647. ASYNCUSER0_ASYNCCH2 = $05;
  648. ASYNCUSER0_ASYNCCH3 = $06;
  649. // EVSYS_ASYNCUSER1
  650. ASYNCUSER1mask = $FF;
  651. ASYNCUSER1_OFF = $00;
  652. ASYNCUSER1_SYNCCH0 = $01;
  653. ASYNCUSER1_SYNCCH1 = $02;
  654. ASYNCUSER1_ASYNCCH0 = $03;
  655. ASYNCUSER1_ASYNCCH1 = $04;
  656. ASYNCUSER1_ASYNCCH2 = $05;
  657. ASYNCUSER1_ASYNCCH3 = $06;
  658. // EVSYS_ASYNCUSER2
  659. ASYNCUSER2mask = $FF;
  660. ASYNCUSER2_OFF = $00;
  661. ASYNCUSER2_SYNCCH0 = $01;
  662. ASYNCUSER2_SYNCCH1 = $02;
  663. ASYNCUSER2_ASYNCCH0 = $03;
  664. ASYNCUSER2_ASYNCCH1 = $04;
  665. ASYNCUSER2_ASYNCCH2 = $05;
  666. ASYNCUSER2_ASYNCCH3 = $06;
  667. // EVSYS_ASYNCUSER3
  668. ASYNCUSER3mask = $FF;
  669. ASYNCUSER3_OFF = $00;
  670. ASYNCUSER3_SYNCCH0 = $01;
  671. ASYNCUSER3_SYNCCH1 = $02;
  672. ASYNCUSER3_ASYNCCH0 = $03;
  673. ASYNCUSER3_ASYNCCH1 = $04;
  674. ASYNCUSER3_ASYNCCH2 = $05;
  675. ASYNCUSER3_ASYNCCH3 = $06;
  676. // EVSYS_ASYNCUSER4
  677. ASYNCUSER4mask = $FF;
  678. ASYNCUSER4_OFF = $00;
  679. ASYNCUSER4_SYNCCH0 = $01;
  680. ASYNCUSER4_SYNCCH1 = $02;
  681. ASYNCUSER4_ASYNCCH0 = $03;
  682. ASYNCUSER4_ASYNCCH1 = $04;
  683. ASYNCUSER4_ASYNCCH2 = $05;
  684. ASYNCUSER4_ASYNCCH3 = $06;
  685. // EVSYS_ASYNCUSER5
  686. ASYNCUSER5mask = $FF;
  687. ASYNCUSER5_OFF = $00;
  688. ASYNCUSER5_SYNCCH0 = $01;
  689. ASYNCUSER5_SYNCCH1 = $02;
  690. ASYNCUSER5_ASYNCCH0 = $03;
  691. ASYNCUSER5_ASYNCCH1 = $04;
  692. ASYNCUSER5_ASYNCCH2 = $05;
  693. ASYNCUSER5_ASYNCCH3 = $06;
  694. // EVSYS_ASYNCUSER6
  695. ASYNCUSER6mask = $FF;
  696. ASYNCUSER6_OFF = $00;
  697. ASYNCUSER6_SYNCCH0 = $01;
  698. ASYNCUSER6_SYNCCH1 = $02;
  699. ASYNCUSER6_ASYNCCH0 = $03;
  700. ASYNCUSER6_ASYNCCH1 = $04;
  701. ASYNCUSER6_ASYNCCH2 = $05;
  702. ASYNCUSER6_ASYNCCH3 = $06;
  703. // EVSYS_ASYNCUSER7
  704. ASYNCUSER7mask = $FF;
  705. ASYNCUSER7_OFF = $00;
  706. ASYNCUSER7_SYNCCH0 = $01;
  707. ASYNCUSER7_SYNCCH1 = $02;
  708. ASYNCUSER7_ASYNCCH0 = $03;
  709. ASYNCUSER7_ASYNCCH1 = $04;
  710. ASYNCUSER7_ASYNCCH2 = $05;
  711. ASYNCUSER7_ASYNCCH3 = $06;
  712. // EVSYS_ASYNCUSER8
  713. ASYNCUSER8mask = $FF;
  714. ASYNCUSER8_OFF = $00;
  715. ASYNCUSER8_SYNCCH0 = $01;
  716. ASYNCUSER8_SYNCCH1 = $02;
  717. ASYNCUSER8_ASYNCCH0 = $03;
  718. ASYNCUSER8_ASYNCCH1 = $04;
  719. ASYNCUSER8_ASYNCCH2 = $05;
  720. ASYNCUSER8_ASYNCCH3 = $06;
  721. // EVSYS_ASYNCUSER9
  722. ASYNCUSER9mask = $FF;
  723. ASYNCUSER9_OFF = $00;
  724. ASYNCUSER9_SYNCCH0 = $01;
  725. ASYNCUSER9_SYNCCH1 = $02;
  726. ASYNCUSER9_ASYNCCH0 = $03;
  727. ASYNCUSER9_ASYNCCH1 = $04;
  728. ASYNCUSER9_ASYNCCH2 = $05;
  729. ASYNCUSER9_ASYNCCH3 = $06;
  730. // EVSYS_ASYNCUSER10
  731. ASYNCUSER10mask = $FF;
  732. ASYNCUSER10_OFF = $00;
  733. ASYNCUSER10_SYNCCH0 = $01;
  734. ASYNCUSER10_SYNCCH1 = $02;
  735. ASYNCUSER10_ASYNCCH0 = $03;
  736. ASYNCUSER10_ASYNCCH1 = $04;
  737. ASYNCUSER10_ASYNCCH2 = $05;
  738. ASYNCUSER10_ASYNCCH3 = $06;
  739. // EVSYS_SYNCCH0
  740. SYNCCH0mask = $FF;
  741. SYNCCH0_OFF = $00;
  742. SYNCCH0_TCB0 = $01;
  743. SYNCCH0_TCA0_OVF_LUNF = $02;
  744. SYNCCH0_TCA0_HUNF = $03;
  745. SYNCCH0_TCA0_CMP0 = $04;
  746. SYNCCH0_TCA0_CMP1 = $05;
  747. SYNCCH0_TCA0_CMP2 = $06;
  748. SYNCCH0_PORTC_PIN0 = $07;
  749. SYNCCH0_PORTC_PIN1 = $08;
  750. SYNCCH0_PORTC_PIN2 = $09;
  751. SYNCCH0_PORTC_PIN3 = $0A;
  752. SYNCCH0_PORTC_PIN4 = $0B;
  753. SYNCCH0_PORTC_PIN5 = $0C;
  754. SYNCCH0_PORTA_PIN0 = $0D;
  755. SYNCCH0_PORTA_PIN1 = $0E;
  756. SYNCCH0_PORTA_PIN2 = $0F;
  757. SYNCCH0_PORTA_PIN3 = $10;
  758. SYNCCH0_PORTA_PIN4 = $11;
  759. SYNCCH0_PORTA_PIN5 = $12;
  760. SYNCCH0_PORTA_PIN6 = $13;
  761. SYNCCH0_PORTA_PIN7 = $14;
  762. // EVSYS_SYNCCH1
  763. SYNCCH1mask = $FF;
  764. SYNCCH1_OFF = $00;
  765. SYNCCH1_TCB0 = $01;
  766. SYNCCH1_TCA0_OVF_LUNF = $02;
  767. SYNCCH1_TCA0_HUNF = $03;
  768. SYNCCH1_TCA0_CMP0 = $04;
  769. SYNCCH1_TCA0_CMP1 = $05;
  770. SYNCCH1_TCA0_CMP2 = $06;
  771. SYNCCH1_PORTB_PIN0 = $08;
  772. SYNCCH1_PORTB_PIN1 = $09;
  773. SYNCCH1_PORTB_PIN2 = $0A;
  774. SYNCCH1_PORTB_PIN3 = $0B;
  775. SYNCCH1_PORTB_PIN4 = $0C;
  776. SYNCCH1_PORTB_PIN5 = $0D;
  777. SYNCCH1_PORTB_PIN6 = $0E;
  778. SYNCCH1_PORTB_PIN7 = $0F;
  779. // EVSYS_SYNCUSER0
  780. SYNCUSER0mask = $FF;
  781. SYNCUSER0_OFF = $00;
  782. SYNCUSER0_SYNCCH0 = $01;
  783. SYNCUSER0_SYNCCH1 = $02;
  784. // EVSYS_SYNCUSER1
  785. SYNCUSER1mask = $FF;
  786. SYNCUSER1_OFF = $00;
  787. SYNCUSER1_SYNCCH0 = $01;
  788. SYNCUSER1_SYNCCH1 = $02;
  789. end;
  790. TFUSE = object //Fuses
  791. WDTCFG: byte; //Watchdog Configuration
  792. BODCFG: byte; //BOD Configuration
  793. OSCCFG: byte; //Oscillator Configuration
  794. Reserved3: byte;
  795. TCD0CFG: byte; //TCD0 Configuration
  796. SYSCFG0: byte; //System Configuration 0
  797. SYSCFG1: byte; //System Configuration 1
  798. APPEND: byte; //Application Code Section End
  799. BOOTEND: byte; //Boot Section End
  800. const
  801. // FUSE_ACTIVE
  802. ACTIVEmask = $0C;
  803. ACTIVE_DIS = $00;
  804. ACTIVE_ENABLED = $04;
  805. ACTIVE_SAMPLED = $08;
  806. ACTIVE_ENWAKE = $0C;
  807. // FUSE_LVL
  808. LVLmask = $E0;
  809. LVL_BODLEVEL0 = $00;
  810. LVL_BODLEVEL1 = $20;
  811. LVL_BODLEVEL2 = $40;
  812. LVL_BODLEVEL3 = $60;
  813. LVL_BODLEVEL4 = $80;
  814. LVL_BODLEVEL5 = $A0;
  815. LVL_BODLEVEL6 = $C0;
  816. LVL_BODLEVEL7 = $E0;
  817. // FUSE_SAMPFREQ
  818. SAMPFREQmask = $10;
  819. SAMPFREQ_1KHz = $00;
  820. SAMPFREQ_125Hz = $10;
  821. // FUSE_SLEEP
  822. SLEEPmask = $03;
  823. SLEEP_DIS = $00;
  824. SLEEP_ENABLED = $01;
  825. SLEEP_SAMPLED = $02;
  826. // FUSE_FREQSEL
  827. FREQSELmask = $03;
  828. FREQSEL_16MHZ = $01;
  829. FREQSEL_20MHZ = $02;
  830. // Oscillator Lock
  831. OSCLOCKbm = $80;
  832. // FUSE_CRCSRC
  833. CRCSRCmask = $C0;
  834. CRCSRC_FLASH = $00;
  835. CRCSRC_BOOT = $40;
  836. CRCSRC_BOOTAPP = $80;
  837. CRCSRC_NOCRC = $C0;
  838. // EEPROM Save
  839. EESAVEbm = $01;
  840. // FUSE_RSTPINCFG
  841. RSTPINCFGmask = $0C;
  842. RSTPINCFG_GPIO = $00;
  843. RSTPINCFG_UPDI = $04;
  844. RSTPINCFG_RST = $08;
  845. // FUSE_SUT
  846. SUTmask = $07;
  847. SUT_0MS = $00;
  848. SUT_1MS = $01;
  849. SUT_2MS = $02;
  850. SUT_4MS = $03;
  851. SUT_8MS = $04;
  852. SUT_16MS = $05;
  853. SUT_32MS = $06;
  854. SUT_64MS = $07;
  855. // Compare A Default Output Value
  856. CMPAbm = $01;
  857. // Compare A Output Enable
  858. CMPAENbm = $10;
  859. // Compare B Default Output Value
  860. CMPBbm = $02;
  861. // Compare B Output Enable
  862. CMPBENbm = $20;
  863. // Compare C Default Output Value
  864. CMPCbm = $04;
  865. // Compare C Output Enable
  866. CMPCENbm = $40;
  867. // Compare D Default Output Value
  868. CMPDbm = $08;
  869. // Compare D Output Enable
  870. CMPDENbm = $80;
  871. // FUSE_PERIOD
  872. PERIODmask = $0F;
  873. PERIOD_OFF = $00;
  874. PERIOD_8CLK = $01;
  875. PERIOD_16CLK = $02;
  876. PERIOD_32CLK = $03;
  877. PERIOD_64CLK = $04;
  878. PERIOD_128CLK = $05;
  879. PERIOD_256CLK = $06;
  880. PERIOD_512CLK = $07;
  881. PERIOD_1KCLK = $08;
  882. PERIOD_2KCLK = $09;
  883. PERIOD_4KCLK = $0A;
  884. PERIOD_8KCLK = $0B;
  885. // FUSE_WINDOW
  886. WINDOWmask = $F0;
  887. WINDOW_OFF = $00;
  888. WINDOW_8CLK = $10;
  889. WINDOW_16CLK = $20;
  890. WINDOW_32CLK = $30;
  891. WINDOW_64CLK = $40;
  892. WINDOW_128CLK = $50;
  893. WINDOW_256CLK = $60;
  894. WINDOW_512CLK = $70;
  895. WINDOW_1KCLK = $80;
  896. WINDOW_2KCLK = $90;
  897. WINDOW_4KCLK = $A0;
  898. WINDOW_8KCLK = $B0;
  899. end;
  900. TGPIO = object //General Purpose IO
  901. GPIOR0: byte; //General Purpose IO Register 0
  902. GPIOR1: byte; //General Purpose IO Register 1
  903. GPIOR2: byte; //General Purpose IO Register 2
  904. GPIOR3: byte; //General Purpose IO Register 3
  905. end;
  906. TLOCKBIT = object //Lockbit
  907. LOCKBIT: byte; //Lock bits
  908. const
  909. // LOCKBIT_LB
  910. LBmask = $FF;
  911. LB_RWLOCK = $3A;
  912. LB_NOLOCK = $C5;
  913. end;
  914. TNVMCTRL = object //Non-volatile Memory Controller
  915. CTRLA: byte; //Control A
  916. CTRLB: byte; //Control B
  917. STATUS: byte; //Status
  918. INTCTRL: byte; //Interrupt Control
  919. INTFLAGS: byte; //Interrupt Flags
  920. Reserved5: byte;
  921. DATA: word; //Data
  922. ADDR: word; //Address
  923. const
  924. // NVMCTRL_CMD
  925. CMDmask = $07;
  926. CMD_NONE = $00;
  927. CMD_PAGEWRITE = $01;
  928. CMD_PAGEERASE = $02;
  929. CMD_PAGEERASEWRITE = $03;
  930. CMD_PAGEBUFCLR = $04;
  931. CMD_CHIPERASE = $05;
  932. CMD_EEERASE = $06;
  933. CMD_FUSEWRITE = $07;
  934. // Application code write protect
  935. APCWPbm = $01;
  936. // Boot Lock
  937. BOOTLOCKbm = $02;
  938. // EEPROM Ready
  939. EEREADYbm = $01;
  940. // EEPROM busy
  941. EEBUSYbm = $02;
  942. // Flash busy
  943. FBUSYbm = $01;
  944. // Write error
  945. WRERRORbm = $04;
  946. end;
  947. TPORT = object //I/O Ports
  948. DIR: byte; //Data Direction
  949. DIRSET: byte; //Data Direction Set
  950. DIRCLR: byte; //Data Direction Clear
  951. DIRTGL: byte; //Data Direction Toggle
  952. OUT_: byte; //Output Value
  953. OUTSET: byte; //Output Value Set
  954. OUTCLR: byte; //Output Value Clear
  955. OUTTGL: byte; //Output Value Toggle
  956. IN_: byte; //Input Value
  957. INTFLAGS: byte; //Interrupt Flags
  958. Reserved10: byte;
  959. Reserved11: byte;
  960. Reserved12: byte;
  961. Reserved13: byte;
  962. Reserved14: byte;
  963. Reserved15: byte;
  964. PIN0CTRL: byte; //Pin 0 Control
  965. PIN1CTRL: byte; //Pin 1 Control
  966. PIN2CTRL: byte; //Pin 2 Control
  967. PIN3CTRL: byte; //Pin 3 Control
  968. PIN4CTRL: byte; //Pin 4 Control
  969. PIN5CTRL: byte; //Pin 5 Control
  970. PIN6CTRL: byte; //Pin 6 Control
  971. PIN7CTRL: byte; //Pin 7 Control
  972. const
  973. // Pin Interrupt
  974. INT0bm = $01;
  975. INT1bm = $02;
  976. INT2bm = $04;
  977. INT3bm = $08;
  978. INT4bm = $10;
  979. INT5bm = $20;
  980. INT6bm = $40;
  981. INT7bm = $80;
  982. // Inverted I/O Enable
  983. INVENbm = $80;
  984. // PORT_ISC
  985. ISCmask = $07;
  986. ISC_INTDISABLE = $00;
  987. ISC_BOTHEDGES = $01;
  988. ISC_RISING = $02;
  989. ISC_FALLING = $03;
  990. ISC_INPUT_DISABLE = $04;
  991. ISC_LEVEL = $05;
  992. // Pullup enable
  993. PULLUPENbm = $08;
  994. end;
  995. TPORTMUX = object //Port Multiplexer
  996. CTRLA: byte; //Port Multiplexer Control A
  997. CTRLB: byte; //Port Multiplexer Control B
  998. CTRLC: byte; //Port Multiplexer Control C
  999. CTRLD: byte; //Port Multiplexer Control D
  1000. const
  1001. // Event Output 0
  1002. EVOUT0bm = $01;
  1003. // Event Output 1
  1004. EVOUT1bm = $02;
  1005. // Event Output 2
  1006. EVOUT2bm = $04;
  1007. // PORTMUX_LUT0
  1008. LUT0mask = $10;
  1009. LUT0_DEFAULT = $00;
  1010. LUT0_ALTERNATE = $10;
  1011. // PORTMUX_LUT1
  1012. LUT1mask = $20;
  1013. LUT1_DEFAULT = $00;
  1014. LUT1_ALTERNATE = $20;
  1015. // PORTMUX_SPI0
  1016. SPI0mask = $04;
  1017. SPI0_DEFAULT = $00;
  1018. SPI0_ALTERNATE = $04;
  1019. // PORTMUX_USART0
  1020. USART0mask = $01;
  1021. USART0_DEFAULT = $00;
  1022. USART0_ALTERNATE = $01;
  1023. // PORTMUX_TCA00
  1024. TCA00mask = $01;
  1025. TCA00_DEFAULT = $00;
  1026. TCA00_ALTERNATE = $01;
  1027. // PORTMUX_TCA01
  1028. TCA01mask = $02;
  1029. TCA01_DEFAULT = $00;
  1030. TCA01_ALTERNATE = $02;
  1031. // PORTMUX_TCA02
  1032. TCA02mask = $04;
  1033. TCA02_DEFAULT = $00;
  1034. TCA02_ALTERNATE = $04;
  1035. // PORTMUX_TCA03
  1036. TCA03mask = $08;
  1037. TCA03_DEFAULT = $00;
  1038. TCA03_ALTERNATE = $08;
  1039. // PORTMUX_TCB0
  1040. TCB0mask = $01;
  1041. TCB0_DEFAULT = $00;
  1042. TCB0_ALTERNATE = $01;
  1043. end;
  1044. TRSTCTRL = object //Reset controller
  1045. RSTFR: byte; //Reset Flags
  1046. SWRR: byte; //Software Reset
  1047. const
  1048. // Brown out detector Reset flag
  1049. BORFbm = $02;
  1050. // External Reset flag
  1051. EXTRFbm = $04;
  1052. // Power on Reset flag
  1053. PORFbm = $01;
  1054. // Software Reset flag
  1055. SWRFbm = $10;
  1056. // UPDI Reset flag
  1057. UPDIRFbm = $20;
  1058. // Watch dog Reset flag
  1059. WDRFbm = $08;
  1060. // Software reset enable
  1061. SWREbm = $01;
  1062. end;
  1063. TRTC = object //Real-Time Counter
  1064. CTRLA: byte; //Control A
  1065. STATUS: byte; //Status
  1066. INTCTRL: byte; //Interrupt Control
  1067. INTFLAGS: byte; //Interrupt Flags
  1068. TEMP: byte; //Temporary
  1069. DBGCTRL: byte; //Debug control
  1070. Reserved6: byte;
  1071. CLKSEL: byte; //Clock Select
  1072. CNT: word; //Counter
  1073. PER: word; //Period
  1074. CMP: word; //Compare
  1075. Reserved14: byte;
  1076. Reserved15: byte;
  1077. PITCTRLA: byte; //PIT Control A
  1078. PITSTATUS: byte; //PIT Status
  1079. PITINTCTRL: byte; //PIT Interrupt Control
  1080. PITINTFLAGS: byte; //PIT Interrupt Flags
  1081. Reserved20: byte;
  1082. PITDBGCTRL: byte; //PIT Debug control
  1083. const
  1084. // RTC_CLKSEL
  1085. CLKSELmask = $03;
  1086. CLKSEL_INT32K = $00;
  1087. CLKSEL_INT1K = $01;
  1088. CLKSEL_TOSC32K = $02;
  1089. CLKSEL_EXTCLK = $03;
  1090. // RTC_PRESCALER
  1091. PRESCALERmask = $78;
  1092. PRESCALER_DIV1 = $00;
  1093. PRESCALER_DIV2 = $08;
  1094. PRESCALER_DIV4 = $10;
  1095. PRESCALER_DIV8 = $18;
  1096. PRESCALER_DIV16 = $20;
  1097. PRESCALER_DIV32 = $28;
  1098. PRESCALER_DIV64 = $30;
  1099. PRESCALER_DIV128 = $38;
  1100. PRESCALER_DIV256 = $40;
  1101. PRESCALER_DIV512 = $48;
  1102. PRESCALER_DIV1024 = $50;
  1103. PRESCALER_DIV2048 = $58;
  1104. PRESCALER_DIV4096 = $60;
  1105. PRESCALER_DIV8192 = $68;
  1106. PRESCALER_DIV16384 = $70;
  1107. PRESCALER_DIV32768 = $78;
  1108. // Enable
  1109. RTCENbm = $01;
  1110. // Run In Standby
  1111. RUNSTDBYbm = $80;
  1112. // Run in debug
  1113. DBGRUNbm = $01;
  1114. // Compare Match Interrupt enable
  1115. CMPbm = $02;
  1116. // Overflow Interrupt enable
  1117. OVFbm = $01;
  1118. // RTC_PERIOD
  1119. PERIODmask = $78;
  1120. PERIOD_OFF = $00;
  1121. PERIOD_CYC4 = $08;
  1122. PERIOD_CYC8 = $10;
  1123. PERIOD_CYC16 = $18;
  1124. PERIOD_CYC32 = $20;
  1125. PERIOD_CYC64 = $28;
  1126. PERIOD_CYC128 = $30;
  1127. PERIOD_CYC256 = $38;
  1128. PERIOD_CYC512 = $40;
  1129. PERIOD_CYC1024 = $48;
  1130. PERIOD_CYC2048 = $50;
  1131. PERIOD_CYC4096 = $58;
  1132. PERIOD_CYC8192 = $60;
  1133. PERIOD_CYC16384 = $68;
  1134. PERIOD_CYC32768 = $70;
  1135. // Enable
  1136. PITENbm = $01;
  1137. // Periodic Interrupt
  1138. PIbm = $01;
  1139. // CTRLA Synchronization Busy Flag
  1140. CTRLBUSYbm = $01;
  1141. // Comparator Synchronization Busy Flag
  1142. CMPBUSYbm = $08;
  1143. // Count Synchronization Busy Flag
  1144. CNTBUSYbm = $02;
  1145. // CTRLA Synchronization Busy Flag
  1146. CTRLABUSYbm = $01;
  1147. // Period Synchronization Busy Flag
  1148. PERBUSYbm = $04;
  1149. end;
  1150. TSIGROW = object //Signature row
  1151. DEVICEID0: byte; //Device ID Byte 0
  1152. DEVICEID1: byte; //Device ID Byte 1
  1153. DEVICEID2: byte; //Device ID Byte 2
  1154. SERNUM0: byte; //Serial Number Byte 0
  1155. SERNUM1: byte; //Serial Number Byte 1
  1156. SERNUM2: byte; //Serial Number Byte 2
  1157. SERNUM3: byte; //Serial Number Byte 3
  1158. SERNUM4: byte; //Serial Number Byte 4
  1159. SERNUM5: byte; //Serial Number Byte 5
  1160. SERNUM6: byte; //Serial Number Byte 6
  1161. SERNUM7: byte; //Serial Number Byte 7
  1162. SERNUM8: byte; //Serial Number Byte 8
  1163. SERNUM9: byte; //Serial Number Byte 9
  1164. Reserved13: byte;
  1165. Reserved14: byte;
  1166. Reserved15: byte;
  1167. Reserved16: byte;
  1168. Reserved17: byte;
  1169. Reserved18: byte;
  1170. Reserved19: byte;
  1171. Reserved20: byte;
  1172. Reserved21: byte;
  1173. Reserved22: byte;
  1174. Reserved23: byte;
  1175. Reserved24: byte;
  1176. Reserved25: byte;
  1177. Reserved26: byte;
  1178. Reserved27: byte;
  1179. Reserved28: byte;
  1180. Reserved29: byte;
  1181. Reserved30: byte;
  1182. Reserved31: byte;
  1183. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  1184. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  1185. OSC16ERR3V: byte; //OSC16 error at 3V
  1186. OSC16ERR5V: byte; //OSC16 error at 5V
  1187. OSC20ERR3V: byte; //OSC20 error at 3V
  1188. OSC20ERR5V: byte; //OSC20 error at 5V
  1189. end;
  1190. TSLPCTRL = object //Sleep Controller
  1191. CTRLA: byte; //Control
  1192. const
  1193. // Sleep enable
  1194. SENbm = $01;
  1195. // SLPCTRL_SMODE
  1196. SMODEmask = $06;
  1197. SMODE_IDLE = $00;
  1198. SMODE_STDBY = $02;
  1199. SMODE_PDOWN = $04;
  1200. end;
  1201. TSPI = object //Serial Peripheral Interface
  1202. CTRLA: byte; //Control A
  1203. CTRLB: byte; //Control B
  1204. INTCTRL: byte; //Interrupt Control
  1205. INTFLAGS: byte; //Interrupt Flags
  1206. DATA: byte; //Data
  1207. const
  1208. // Enable Double Speed
  1209. CLK2Xbm = $10;
  1210. // Data Order Setting
  1211. DORDbm = $40;
  1212. // Enable Module
  1213. ENABLEbm = $01;
  1214. // Master Operation Enable
  1215. MASTERbm = $20;
  1216. // SPI_PRESC
  1217. PRESCmask = $06;
  1218. PRESC_DIV4 = $00;
  1219. PRESC_DIV16 = $02;
  1220. PRESC_DIV64 = $04;
  1221. PRESC_DIV128 = $06;
  1222. // Buffer Mode Enable
  1223. BUFENbm = $80;
  1224. // Buffer Write Mode
  1225. BUFWRbm = $40;
  1226. // SPI_MODE
  1227. MODEmask = $03;
  1228. MODE_0 = $00;
  1229. MODE_1 = $01;
  1230. MODE_2 = $02;
  1231. MODE_3 = $03;
  1232. // Slave Select Disable
  1233. SSDbm = $04;
  1234. // Data Register Empty Interrupt Enable
  1235. DREIEbm = $20;
  1236. // Interrupt Enable
  1237. IEbm = $01;
  1238. // Receive Complete Interrupt Enable
  1239. RXCIEbm = $80;
  1240. // Slave Select Trigger Interrupt Enable
  1241. SSIEbm = $10;
  1242. // Transfer Complete Interrupt Enable
  1243. TXCIEbm = $40;
  1244. // Buffer Overflow
  1245. BUFOVFbm = $01;
  1246. // Data Register Empty Interrupt Flag
  1247. DREIFbm = $20;
  1248. // Receive Complete Interrupt Flag
  1249. RXCIFbm = $80;
  1250. // Slave Select Trigger Interrupt Flag
  1251. SSIFbm = $10;
  1252. // Transfer Complete Interrupt Flag
  1253. TXCIFbm = $40;
  1254. // Interrupt Flag
  1255. IFbm = $80;
  1256. // Write Collision
  1257. WRCOLbm = $40;
  1258. end;
  1259. TSYSCFG = object //System Configuration Registers
  1260. Reserved0: byte;
  1261. REVID: byte; //Revision ID
  1262. EXTBRK: byte; //External Break
  1263. const
  1264. // External break enable
  1265. ENEXTBRKbm = $01;
  1266. end;
  1267. TTCA_SINGLE = object //16-bit Timer/Counter Type A - Single Mode
  1268. CTRLA: byte; //Control A
  1269. CTRLB: byte; //Control B
  1270. CTRLC: byte; //Control C
  1271. CTRLD: byte; //Control D
  1272. CTRLECLR: byte; //Control E Clear
  1273. CTRLESET: byte; //Control E Set
  1274. CTRLFCLR: byte; //Control F Clear
  1275. CTRLFSET: byte; //Control F Set
  1276. Reserved8: byte;
  1277. EVCTRL: byte; //Event Control
  1278. INTCTRL: byte; //Interrupt Control
  1279. INTFLAGS: byte; //Interrupt Flags
  1280. Reserved12: byte;
  1281. Reserved13: byte;
  1282. DBGCTRL: byte; //Degbug Control
  1283. TEMP: byte; //Temporary data for 16-bit Access
  1284. Reserved16: byte;
  1285. Reserved17: byte;
  1286. Reserved18: byte;
  1287. Reserved19: byte;
  1288. Reserved20: byte;
  1289. Reserved21: byte;
  1290. Reserved22: byte;
  1291. Reserved23: byte;
  1292. Reserved24: byte;
  1293. Reserved25: byte;
  1294. Reserved26: byte;
  1295. Reserved27: byte;
  1296. Reserved28: byte;
  1297. Reserved29: byte;
  1298. Reserved30: byte;
  1299. Reserved31: byte;
  1300. CNT: word; //Count
  1301. Reserved34: byte;
  1302. Reserved35: byte;
  1303. Reserved36: byte;
  1304. Reserved37: byte;
  1305. PER: word; //Period
  1306. CMP0: word; //Compare 0
  1307. CMP1: word; //Compare 1
  1308. CMP2: word; //Compare 2
  1309. Reserved46: byte;
  1310. Reserved47: byte;
  1311. Reserved48: byte;
  1312. Reserved49: byte;
  1313. Reserved50: byte;
  1314. Reserved51: byte;
  1315. Reserved52: byte;
  1316. Reserved53: byte;
  1317. PERBUF: word; //Period Buffer
  1318. CMP0BUF: word; //Compare 0 Buffer
  1319. CMP1BUF: word; //Compare 1 Buffer
  1320. CMP2BUF: word; //Compare 2 Buffer
  1321. const
  1322. // TCA_SINGLE_CLKSEL
  1323. SINGLE_CLKSELmask = $0E;
  1324. SINGLE_CLKSEL_DIV1 = $00;
  1325. SINGLE_CLKSEL_DIV2 = $02;
  1326. SINGLE_CLKSEL_DIV4 = $04;
  1327. SINGLE_CLKSEL_DIV8 = $06;
  1328. SINGLE_CLKSEL_DIV16 = $08;
  1329. SINGLE_CLKSEL_DIV64 = $0A;
  1330. SINGLE_CLKSEL_DIV256 = $0C;
  1331. SINGLE_CLKSEL_DIV1024 = $0E;
  1332. // Module Enable
  1333. ENABLEbm = $01;
  1334. // Auto Lock Update
  1335. ALUPDbm = $08;
  1336. // Compare 0 Enable
  1337. CMP0ENbm = $10;
  1338. // Compare 1 Enable
  1339. CMP1ENbm = $20;
  1340. // Compare 2 Enable
  1341. CMP2ENbm = $40;
  1342. // TCA_SINGLE_WGMODE
  1343. SINGLE_WGMODEmask = $07;
  1344. SINGLE_WGMODE_NORMAL = $00;
  1345. SINGLE_WGMODE_FRQ = $01;
  1346. SINGLE_WGMODE_SINGLESLOPE = $03;
  1347. SINGLE_WGMODE_DSTOP = $05;
  1348. SINGLE_WGMODE_DSBOTH = $06;
  1349. SINGLE_WGMODE_DSBOTTOM = $07;
  1350. // Compare 0 Waveform Output Value
  1351. CMP0OVbm = $01;
  1352. // Compare 1 Waveform Output Value
  1353. CMP1OVbm = $02;
  1354. // Compare 2 Waveform Output Value
  1355. CMP2OVbm = $04;
  1356. // Split Mode Enable
  1357. SPLITMbm = $01;
  1358. // TCA_SINGLE_CMD
  1359. SINGLE_CMDmask = $0C;
  1360. SINGLE_CMD_NONE = $00;
  1361. SINGLE_CMD_UPDATE = $04;
  1362. SINGLE_CMD_RESTART = $08;
  1363. SINGLE_CMD_RESET = $0C;
  1364. // Direction
  1365. DIRbm = $01;
  1366. // Lock Update
  1367. LUPDbm = $02;
  1368. // Compare 0 Buffer Valid
  1369. CMP0BVbm = $02;
  1370. // Compare 1 Buffer Valid
  1371. CMP1BVbm = $04;
  1372. // Compare 2 Buffer Valid
  1373. CMP2BVbm = $08;
  1374. // Period Buffer Valid
  1375. PERBVbm = $01;
  1376. // Debug Run
  1377. DBGRUNbm = $01;
  1378. // Count on Event Input
  1379. CNTEIbm = $01;
  1380. // TCA_SINGLE_EVACT
  1381. SINGLE_EVACTmask = $06;
  1382. SINGLE_EVACT_POSEDGE = $00;
  1383. SINGLE_EVACT_ANYEDGE = $02;
  1384. SINGLE_EVACT_HIGHLVL = $04;
  1385. SINGLE_EVACT_UPDOWN = $06;
  1386. // Compare 0 Interrupt
  1387. CMP0bm = $10;
  1388. // Compare 1 Interrupt
  1389. CMP1bm = $20;
  1390. // Compare 2 Interrupt
  1391. CMP2bm = $40;
  1392. // Overflow Interrupt
  1393. OVFbm = $01;
  1394. end;
  1395. TTCA_SPLIT = object //16-bit Timer/Counter Type A - Split Mode
  1396. CTRLA: byte; //Control A
  1397. CTRLB: byte; //Control B
  1398. CTRLC: byte; //Control C
  1399. CTRLD: byte; //Control D
  1400. CTRLECLR: byte; //Control E Clear
  1401. CTRLESET: byte; //Control E Set
  1402. Reserved6: byte;
  1403. Reserved7: byte;
  1404. Reserved8: byte;
  1405. Reserved9: byte;
  1406. INTCTRL: byte; //Interrupt Control
  1407. INTFLAGS: byte; //Interrupt Flags
  1408. Reserved12: byte;
  1409. Reserved13: byte;
  1410. DBGCTRL: byte; //Degbug Control
  1411. Reserved15: byte;
  1412. Reserved16: byte;
  1413. Reserved17: byte;
  1414. Reserved18: byte;
  1415. Reserved19: byte;
  1416. Reserved20: byte;
  1417. Reserved21: byte;
  1418. Reserved22: byte;
  1419. Reserved23: byte;
  1420. Reserved24: byte;
  1421. Reserved25: byte;
  1422. Reserved26: byte;
  1423. Reserved27: byte;
  1424. Reserved28: byte;
  1425. Reserved29: byte;
  1426. Reserved30: byte;
  1427. Reserved31: byte;
  1428. LCNT: byte; //Low Count
  1429. HCNT: byte; //High Count
  1430. Reserved34: byte;
  1431. Reserved35: byte;
  1432. Reserved36: byte;
  1433. Reserved37: byte;
  1434. LPER: byte; //Low Period
  1435. HPER: byte; //High Period
  1436. LCMP0: byte; //Low Compare
  1437. HCMP0: byte; //High Compare
  1438. LCMP1: byte; //Low Compare
  1439. HCMP1: byte; //High Compare
  1440. LCMP2: byte; //Low Compare
  1441. HCMP2: byte; //High Compare
  1442. const
  1443. // TCA_SPLIT_CLKSEL
  1444. SPLIT_CLKSELmask = $0E;
  1445. SPLIT_CLKSEL_DIV1 = $00;
  1446. SPLIT_CLKSEL_DIV2 = $02;
  1447. SPLIT_CLKSEL_DIV4 = $04;
  1448. SPLIT_CLKSEL_DIV8 = $06;
  1449. SPLIT_CLKSEL_DIV16 = $08;
  1450. SPLIT_CLKSEL_DIV64 = $0A;
  1451. SPLIT_CLKSEL_DIV256 = $0C;
  1452. SPLIT_CLKSEL_DIV1024 = $0E;
  1453. // Module Enable
  1454. ENABLEbm = $01;
  1455. // High Compare 0 Enable
  1456. HCMP0ENbm = $10;
  1457. // High Compare 1 Enable
  1458. HCMP1ENbm = $20;
  1459. // High Compare 2 Enable
  1460. HCMP2ENbm = $40;
  1461. // Low Compare 0 Enable
  1462. LCMP0ENbm = $01;
  1463. // Low Compare 1 Enable
  1464. LCMP1ENbm = $02;
  1465. // Low Compare 2 Enable
  1466. LCMP2ENbm = $04;
  1467. // High Compare 0 Output Value
  1468. HCMP0OVbm = $10;
  1469. // High Compare 1 Output Value
  1470. HCMP1OVbm = $20;
  1471. // High Compare 2 Output Value
  1472. HCMP2OVbm = $40;
  1473. // Low Compare 0 Output Value
  1474. LCMP0OVbm = $01;
  1475. // Low Compare 1 Output Value
  1476. LCMP1OVbm = $02;
  1477. // Low Compare 2 Output Value
  1478. LCMP2OVbm = $04;
  1479. // Split Mode Enable
  1480. SPLITMbm = $01;
  1481. // TCA_SPLIT_CMD
  1482. SPLIT_CMDmask = $0C;
  1483. SPLIT_CMD_NONE = $00;
  1484. SPLIT_CMD_UPDATE = $04;
  1485. SPLIT_CMD_RESTART = $08;
  1486. SPLIT_CMD_RESET = $0C;
  1487. // Debug Run
  1488. DBGRUNbm = $01;
  1489. // High Underflow Interrupt Enable
  1490. HUNFbm = $02;
  1491. // Low Compare 0 Interrupt Enable
  1492. LCMP0bm = $10;
  1493. // Low Compare 1 Interrupt Enable
  1494. LCMP1bm = $20;
  1495. // Low Compare 2 Interrupt Enable
  1496. LCMP2bm = $40;
  1497. // Low Underflow Interrupt Enable
  1498. LUNFbm = $01;
  1499. end;
  1500. TTCA = record //16-bit Timer/Counter Type A
  1501. case byte of
  1502. 0: (SINGLE: TTCA_SINGLE);
  1503. 1: (SPLIT: TTCA_SPLIT);
  1504. end;
  1505. TTCB = object //16-bit Timer Type B
  1506. CTRLA: byte; //Control A
  1507. CTRLB: byte; //Control Register B
  1508. Reserved2: byte;
  1509. Reserved3: byte;
  1510. EVCTRL: byte; //Event Control
  1511. INTCTRL: byte; //Interrupt Control
  1512. INTFLAGS: byte; //Interrupt Flags
  1513. STATUS: byte; //Status
  1514. DBGCTRL: byte; //Debug Control
  1515. TEMP: byte; //Temporary Value
  1516. CNT: word; //Count
  1517. CCMP: word; //Compare or Capture
  1518. const
  1519. // TCB_CLKSEL
  1520. CLKSELmask = $06;
  1521. CLKSEL_CLKDIV1 = $00;
  1522. CLKSEL_CLKDIV2 = $02;
  1523. CLKSEL_CLKTCA = $04;
  1524. // Enable
  1525. ENABLEbm = $01;
  1526. // Run Standby
  1527. RUNSTDBYbm = $40;
  1528. // Synchronize Update
  1529. SYNCUPDbm = $10;
  1530. // Asynchronous Enable
  1531. ASYNCbm = $40;
  1532. // Pin Output Enable
  1533. CCMPENbm = $10;
  1534. // Pin Initial State
  1535. CCMPINITbm = $20;
  1536. // TCB_CNTMODE
  1537. CNTMODEmask = $07;
  1538. CNTMODE_INT = $00;
  1539. CNTMODE_TIMEOUT = $01;
  1540. CNTMODE_CAPT = $02;
  1541. CNTMODE_FRQ = $03;
  1542. CNTMODE_PW = $04;
  1543. CNTMODE_FRQPW = $05;
  1544. CNTMODE_SINGLE = $06;
  1545. CNTMODE_PWM8 = $07;
  1546. // Debug Run
  1547. DBGRUNbm = $01;
  1548. // Event Input Enable
  1549. CAPTEIbm = $01;
  1550. // Event Edge
  1551. EDGEbm = $10;
  1552. // Input Capture Noise Cancellation Filter
  1553. FILTERbm = $40;
  1554. // Capture or Timeout
  1555. CAPTbm = $01;
  1556. // Run
  1557. RUNbm = $01;
  1558. end;
  1559. TTCD = object //Timer Counter D
  1560. CTRLA: byte; //Control A
  1561. CTRLB: byte; //Control B
  1562. CTRLC: byte; //Control C
  1563. CTRLD: byte; //Control D
  1564. CTRLE: byte; //Control E
  1565. Reserved5: byte;
  1566. Reserved6: byte;
  1567. Reserved7: byte;
  1568. EVCTRLA: byte; //EVCTRLA
  1569. EVCTRLB: byte; //EVCTRLB
  1570. Reserved10: byte;
  1571. Reserved11: byte;
  1572. INTCTRL: byte; //Interrupt Control
  1573. INTFLAGS: byte; //Interrupt Flags
  1574. STATUS: byte; //Status
  1575. Reserved15: byte;
  1576. INPUTCTRLA: byte; //Input Control A
  1577. INPUTCTRLB: byte; //Input Control B
  1578. FAULTCTRL: byte; //Fault Control
  1579. Reserved19: byte;
  1580. DLYCTRL: byte; //Delay Control
  1581. DLYVAL: byte; //Delay value
  1582. Reserved22: byte;
  1583. Reserved23: byte;
  1584. DITCTRL: byte; //Dither Control A
  1585. DITVAL: byte; //Dither value
  1586. Reserved26: byte;
  1587. Reserved27: byte;
  1588. Reserved28: byte;
  1589. Reserved29: byte;
  1590. DBGCTRL: byte; //Debug Control
  1591. Reserved31: byte;
  1592. Reserved32: byte;
  1593. Reserved33: byte;
  1594. CAPTUREA: word; //Capture A
  1595. CAPTUREB: word; //Capture B
  1596. Reserved38: byte;
  1597. Reserved39: byte;
  1598. CMPASET: word; //Compare A Set
  1599. CMPACLR: word; //Compare A Clear
  1600. CMPBSET: word; //Compare B Set
  1601. CMPBCLR: word; //Compare B Clear
  1602. const
  1603. // TCD_CLKSEL
  1604. CLKSELmask = $60;
  1605. CLKSEL_20MHZ = $00;
  1606. CLKSEL_EXTCLK = $40;
  1607. CLKSEL_SYSCLK = $60;
  1608. // TCD_CNTPRES
  1609. CNTPRESmask = $18;
  1610. CNTPRES_DIV1 = $00;
  1611. CNTPRES_DIV4 = $08;
  1612. CNTPRES_DIV32 = $10;
  1613. // Enable
  1614. ENABLEbm = $01;
  1615. // TCD_SYNCPRES
  1616. SYNCPRESmask = $06;
  1617. SYNCPRES_DIV1 = $00;
  1618. SYNCPRES_DIV2 = $02;
  1619. SYNCPRES_DIV4 = $04;
  1620. SYNCPRES_DIV8 = $06;
  1621. // TCD_WGMODE
  1622. WGMODEmask = $03;
  1623. WGMODE_ONERAMP = $00;
  1624. WGMODE_TWORAMP = $01;
  1625. WGMODE_FOURRAMP = $02;
  1626. WGMODE_DS = $03;
  1627. // Auto update
  1628. AUPDATEbm = $02;
  1629. // TCD_CMPCSEL
  1630. CMPCSELmask = $40;
  1631. CMPCSEL_PWMA = $00;
  1632. CMPCSEL_PWMB = $40;
  1633. // TCD_CMPDSEL
  1634. CMPDSELmask = $80;
  1635. CMPDSEL_PWMA = $00;
  1636. CMPDSEL_PWMB = $80;
  1637. // Compare output value override
  1638. CMPOVRbm = $01;
  1639. // Fifty percent waveform
  1640. FIFTYbm = $08;
  1641. // Compare A value
  1642. CMPAVAL0bm = $01;
  1643. CMPAVAL1bm = $02;
  1644. CMPAVAL2bm = $04;
  1645. CMPAVAL3bm = $08;
  1646. // Compare B value
  1647. CMPBVAL0bm = $10;
  1648. CMPBVAL1bm = $20;
  1649. CMPBVAL2bm = $40;
  1650. CMPBVAL3bm = $80;
  1651. // Disable at end of cycle
  1652. DISEOCbm = $80;
  1653. // Restart strobe
  1654. RESTARTbm = $04;
  1655. // Software Capture A Strobe
  1656. SCAPTUREAbm = $08;
  1657. // Software Capture B Strobe
  1658. SCAPTUREBbm = $10;
  1659. // synchronize strobe
  1660. SYNCbm = $02;
  1661. // synchronize end of cycle strobe
  1662. SYNCEOCbm = $01;
  1663. // Debug run
  1664. DBGRUNbm = $01;
  1665. // Fault detection
  1666. FAULTDETbm = $04;
  1667. // TCD_DITHERSEL
  1668. DITHERSELmask = $03;
  1669. DITHERSEL_ONTIMEB = $00;
  1670. DITHERSEL_ONTIMEAB = $01;
  1671. DITHERSEL_DEADTIMEB = $02;
  1672. DITHERSEL_DEADTIMEAB = $03;
  1673. // Dither value
  1674. DITHER0bm = $01;
  1675. DITHER1bm = $02;
  1676. DITHER2bm = $04;
  1677. DITHER3bm = $08;
  1678. // TCD_DLYPRESC
  1679. DLYPRESCmask = $30;
  1680. DLYPRESC_DIV1 = $00;
  1681. DLYPRESC_DIV2 = $10;
  1682. DLYPRESC_DIV4 = $20;
  1683. DLYPRESC_DIV8 = $30;
  1684. // TCD_DLYSEL
  1685. DLYSELmask = $03;
  1686. DLYSEL_OFF = $00;
  1687. DLYSEL_INBLANK = $01;
  1688. DLYSEL_EVENT = $02;
  1689. // TCD_DLYTRIG
  1690. DLYTRIGmask = $0C;
  1691. DLYTRIG_CMPASET = $00;
  1692. DLYTRIG_CMPACLR = $04;
  1693. DLYTRIG_CMPBSET = $08;
  1694. DLYTRIG_CMPBCLR = $0C;
  1695. // Delay value
  1696. DLYVAL0bm = $01;
  1697. DLYVAL1bm = $02;
  1698. DLYVAL2bm = $04;
  1699. DLYVAL3bm = $08;
  1700. DLYVAL4bm = $10;
  1701. DLYVAL5bm = $20;
  1702. DLYVAL6bm = $40;
  1703. DLYVAL7bm = $80;
  1704. // TCD_ACTION
  1705. ACTIONmask = $04;
  1706. ACTION_FAULT = $00;
  1707. ACTION_CAPTURE = $04;
  1708. // TCD_CFG
  1709. CFGmask = $C0;
  1710. CFG_NEITHER = $00;
  1711. CFG_FILTER = $40;
  1712. CFG_ASYNC = $80;
  1713. // TCD_EDGE
  1714. EDGEmask = $10;
  1715. EDGE_FALL_LOW = $00;
  1716. EDGE_RISE_HIGH = $10;
  1717. // Trigger event enable
  1718. TRIGEIbm = $01;
  1719. // Compare A value
  1720. CMPAbm = $01;
  1721. // Compare A enable
  1722. CMPAENbm = $10;
  1723. // Compare B value
  1724. CMPBbm = $02;
  1725. // Compare B enable
  1726. CMPBENbm = $20;
  1727. // Compare C value
  1728. CMPCbm = $04;
  1729. // Compare C enable
  1730. CMPCENbm = $40;
  1731. // Compare D vaule
  1732. CMPDbm = $08;
  1733. // Compare D enable
  1734. CMPDENbm = $80;
  1735. // TCD_INPUTMODE
  1736. INPUTMODEmask = $0F;
  1737. INPUTMODE_NONE = $00;
  1738. INPUTMODE_JMPWAIT = $01;
  1739. INPUTMODE_EXECWAIT = $02;
  1740. INPUTMODE_EXECFAULT = $03;
  1741. INPUTMODE_FREQ = $04;
  1742. INPUTMODE_EXECDT = $05;
  1743. INPUTMODE_WAIT = $06;
  1744. INPUTMODE_WAITSW = $07;
  1745. INPUTMODE_EDGETRIG = $08;
  1746. INPUTMODE_EDGETRIGFREQ = $09;
  1747. INPUTMODE_LVLTRIGFREQ = $0A;
  1748. // Overflow interrupt enable
  1749. OVFbm = $01;
  1750. // Trigger A interrupt enable
  1751. TRIGAbm = $04;
  1752. // Trigger B interrupt enable
  1753. TRIGBbm = $08;
  1754. // Command ready
  1755. CMDRDYbm = $02;
  1756. // Enable ready
  1757. ENRDYbm = $01;
  1758. // PWM activity on A
  1759. PWMACTAbm = $40;
  1760. // PWM activity on B
  1761. PWMACTBbm = $80;
  1762. end;
  1763. TTWI = object //Two-Wire Interface
  1764. CTRLA: byte; //Control A
  1765. Reserved1: byte;
  1766. DBGCTRL: byte; //Debug Control Register
  1767. MCTRLA: byte; //Master Control A
  1768. MCTRLB: byte; //Master Control B
  1769. MSTATUS: byte; //Master Status
  1770. MBAUD: byte; //Master Baurd Rate Control
  1771. MADDR: byte; //Master Address
  1772. MDATA: byte; //Master Data
  1773. SCTRLA: byte; //Slave Control A
  1774. SCTRLB: byte; //Slave Control B
  1775. SSTATUS: byte; //Slave Status
  1776. SADDR: byte; //Slave Address
  1777. SDATA: byte; //Slave Data
  1778. SADDRMASK: byte; //Slave Address Mask
  1779. const
  1780. // FM Plus Enable
  1781. FMPENbm = $02;
  1782. // TWI_SDAHOLD
  1783. SDAHOLDmask = $0C;
  1784. SDAHOLD_OFF = $00;
  1785. SDAHOLD_50NS = $04;
  1786. SDAHOLD_300NS = $08;
  1787. SDAHOLD_500NS = $0C;
  1788. // TWI_SDASETUP
  1789. SDASETUPmask = $10;
  1790. SDASETUP_4CYC = $00;
  1791. SDASETUP_8CYC = $10;
  1792. // Debug Run
  1793. DBGRUNbm = $01;
  1794. // Enable TWI Master
  1795. ENABLEbm = $01;
  1796. // Quick Command Enable
  1797. QCENbm = $10;
  1798. // Read Interrupt Enable
  1799. RIENbm = $80;
  1800. // Smart Mode Enable
  1801. SMENbm = $02;
  1802. // TWI_TIMEOUT
  1803. TIMEOUTmask = $0C;
  1804. TIMEOUT_DISABLED = $00;
  1805. TIMEOUT_50US = $04;
  1806. TIMEOUT_100US = $08;
  1807. TIMEOUT_200US = $0C;
  1808. // Write Interrupt Enable
  1809. WIENbm = $40;
  1810. // TWI_ACKACT
  1811. ACKACTmask = $04;
  1812. ACKACT_ACK = $00;
  1813. ACKACT_NACK = $04;
  1814. // Flush
  1815. FLUSHbm = $08;
  1816. // TWI_MCMD
  1817. MCMDmask = $03;
  1818. MCMD_NOACT = $00;
  1819. MCMD_REPSTART = $01;
  1820. MCMD_RECVTRANS = $02;
  1821. MCMD_STOP = $03;
  1822. // Arbitration Lost
  1823. ARBLOSTbm = $08;
  1824. // Bus Error
  1825. BUSERRbm = $04;
  1826. // TWI_BUSSTATE
  1827. BUSSTATEmask = $03;
  1828. BUSSTATE_UNKNOWN = $00;
  1829. BUSSTATE_IDLE = $01;
  1830. BUSSTATE_OWNER = $02;
  1831. BUSSTATE_BUSY = $03;
  1832. // Clock Hold
  1833. CLKHOLDbm = $20;
  1834. // Read Interrupt Flag
  1835. RIFbm = $80;
  1836. // Received Acknowledge
  1837. RXACKbm = $10;
  1838. // Write Interrupt Flag
  1839. WIFbm = $40;
  1840. // Address Enable
  1841. ADDRENbm = $01;
  1842. // Address Mask
  1843. ADDRMASK0bm = $02;
  1844. ADDRMASK1bm = $04;
  1845. ADDRMASK2bm = $08;
  1846. ADDRMASK3bm = $10;
  1847. ADDRMASK4bm = $20;
  1848. ADDRMASK5bm = $40;
  1849. ADDRMASK6bm = $80;
  1850. // Address/Stop Interrupt Enable
  1851. APIENbm = $40;
  1852. // Data Interrupt Enable
  1853. DIENbm = $80;
  1854. // Stop Interrupt Enable
  1855. PIENbm = $20;
  1856. // Promiscuous Mode Enable
  1857. PMENbm = $04;
  1858. // TWI_SCMD
  1859. SCMDmask = $03;
  1860. SCMD_NOACT = $00;
  1861. SCMD_COMPTRANS = $02;
  1862. SCMD_RESPONSE = $03;
  1863. // TWI_AP
  1864. APmask = $01;
  1865. AP_STOP = $00;
  1866. AP_ADR = $01;
  1867. // Address/Stop Interrupt Flag
  1868. APIFbm = $40;
  1869. // Collision
  1870. COLLbm = $08;
  1871. // Data Interrupt Flag
  1872. DIFbm = $80;
  1873. // Read/Write Direction
  1874. DIRbm = $02;
  1875. end;
  1876. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1877. RXDATAL: byte; //Receive Data Low Byte
  1878. RXDATAH: byte; //Receive Data High Byte
  1879. TXDATAL: byte; //Transmit Data Low Byte
  1880. TXDATAH: byte; //Transmit Data High Byte
  1881. STATUS: byte; //Status
  1882. CTRLA: byte; //Control A
  1883. CTRLB: byte; //Control B
  1884. CTRLC: byte; //Control C
  1885. BAUD: word; //Baud Rate
  1886. Reserved10: byte;
  1887. DBGCTRL: byte; //Debug Control
  1888. EVCTRL: byte; //Event Control
  1889. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1890. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1891. const
  1892. // Auto-baud Error Interrupt Enable
  1893. ABEIEbm = $04;
  1894. // Data Register Empty Interrupt Enable
  1895. DREIEbm = $20;
  1896. // Loop-back Mode Enable
  1897. LBMEbm = $08;
  1898. // USART_RS485
  1899. RS485mask = $03;
  1900. RS485_OFF = $00;
  1901. RS485_EXT = $01;
  1902. RS485_INT = $02;
  1903. // Receive Complete Interrupt Enable
  1904. RXCIEbm = $80;
  1905. // Receiver Start Frame Interrupt Enable
  1906. RXSIEbm = $10;
  1907. // Transmit Complete Interrupt Enable
  1908. TXCIEbm = $40;
  1909. // Multi-processor Communication Mode
  1910. MPCMbm = $01;
  1911. // Open Drain Mode Enable
  1912. ODMEbm = $08;
  1913. // Reciever enable
  1914. RXENbm = $80;
  1915. // USART_RXMODE
  1916. RXMODEmask = $06;
  1917. RXMODE_NORMAL = $00;
  1918. RXMODE_CLK2X = $02;
  1919. RXMODE_GENAUTO = $04;
  1920. RXMODE_LINAUTO = $06;
  1921. // Start Frame Detection Enable
  1922. SFDENbm = $10;
  1923. // Transmitter Enable
  1924. TXENbm = $40;
  1925. // USART_MSPI_CMODE
  1926. MSPI_CMODEmask = $C0;
  1927. MSPI_CMODE_ASYNCHRONOUS = $00;
  1928. MSPI_CMODE_SYNCHRONOUS = $40;
  1929. MSPI_CMODE_IRCOM = $80;
  1930. MSPI_CMODE_MSPI = $C0;
  1931. // SPI Master Mode, Clock Phase
  1932. UCPHAbm = $02;
  1933. // SPI Master Mode, Data Order
  1934. UDORDbm = $04;
  1935. // USART_NORMAL_CHSIZE
  1936. NORMAL_CHSIZEmask = $07;
  1937. NORMAL_CHSIZE_5BIT = $00;
  1938. NORMAL_CHSIZE_6BIT = $01;
  1939. NORMAL_CHSIZE_7BIT = $02;
  1940. NORMAL_CHSIZE_8BIT = $03;
  1941. NORMAL_CHSIZE_9BITL = $06;
  1942. NORMAL_CHSIZE_9BITH = $07;
  1943. // USART_NORMAL_CMODE
  1944. NORMAL_CMODEmask = $C0;
  1945. NORMAL_CMODE_ASYNCHRONOUS = $00;
  1946. NORMAL_CMODE_SYNCHRONOUS = $40;
  1947. NORMAL_CMODE_IRCOM = $80;
  1948. NORMAL_CMODE_MSPI = $C0;
  1949. // USART_NORMAL_PMODE
  1950. NORMAL_PMODEmask = $30;
  1951. NORMAL_PMODE_DISABLED = $00;
  1952. NORMAL_PMODE_EVEN = $20;
  1953. NORMAL_PMODE_ODD = $30;
  1954. // USART_NORMAL_SBMODE
  1955. NORMAL_SBMODEmask = $08;
  1956. NORMAL_SBMODE_1BIT = $00;
  1957. NORMAL_SBMODE_2BIT = $08;
  1958. // Autobaud majority voter bypass
  1959. ABMBPbm = $80;
  1960. // Debug Run
  1961. DBGRUNbm = $01;
  1962. // IrDA Event Input Enable
  1963. IREIbm = $01;
  1964. // Buffer Overflow
  1965. BUFOVFbm = $40;
  1966. // Receiver Data Register
  1967. DATA8bm = $01;
  1968. // Frame Error
  1969. FERRbm = $04;
  1970. // Parity Error
  1971. PERRbm = $02;
  1972. // Receive Complete Interrupt Flag
  1973. RXCIFbm = $80;
  1974. // RX Data
  1975. DATA0bm = $01;
  1976. DATA1bm = $02;
  1977. DATA2bm = $04;
  1978. DATA3bm = $08;
  1979. DATA4bm = $10;
  1980. DATA5bm = $20;
  1981. DATA6bm = $40;
  1982. DATA7bm = $80;
  1983. // Receiver Pulse Lenght
  1984. RXPL0bm = $01;
  1985. RXPL1bm = $02;
  1986. RXPL2bm = $04;
  1987. RXPL3bm = $08;
  1988. RXPL4bm = $10;
  1989. RXPL5bm = $20;
  1990. RXPL6bm = $40;
  1991. // Break Detected Flag
  1992. BDFbm = $02;
  1993. // Data Register Empty Flag
  1994. DREIFbm = $20;
  1995. // Inconsistent Sync Field Interrupt Flag
  1996. ISFIFbm = $08;
  1997. // Receive Start Interrupt
  1998. RXSIFbm = $10;
  1999. // Transmit Interrupt Flag
  2000. TXCIFbm = $40;
  2001. // Wait For Break
  2002. WFBbm = $01;
  2003. // Transmit pulse length
  2004. TXPL0bm = $01;
  2005. TXPL1bm = $02;
  2006. TXPL2bm = $04;
  2007. TXPL3bm = $08;
  2008. TXPL4bm = $10;
  2009. TXPL5bm = $20;
  2010. TXPL6bm = $40;
  2011. TXPL7bm = $80;
  2012. end;
  2013. TUSERROW = object //User Row
  2014. USERROW0: byte; //User Row Byte 0
  2015. USERROW1: byte; //User Row Byte 1
  2016. USERROW2: byte; //User Row Byte 2
  2017. USERROW3: byte; //User Row Byte 3
  2018. USERROW4: byte; //User Row Byte 4
  2019. USERROW5: byte; //User Row Byte 5
  2020. USERROW6: byte; //User Row Byte 6
  2021. USERROW7: byte; //User Row Byte 7
  2022. USERROW8: byte; //User Row Byte 8
  2023. USERROW9: byte; //User Row Byte 9
  2024. USERROW10: byte; //User Row Byte 10
  2025. USERROW11: byte; //User Row Byte 11
  2026. USERROW12: byte; //User Row Byte 12
  2027. USERROW13: byte; //User Row Byte 13
  2028. USERROW14: byte; //User Row Byte 14
  2029. USERROW15: byte; //User Row Byte 15
  2030. USERROW16: byte; //User Row Byte 16
  2031. USERROW17: byte; //User Row Byte 17
  2032. USERROW18: byte; //User Row Byte 18
  2033. USERROW19: byte; //User Row Byte 19
  2034. USERROW20: byte; //User Row Byte 20
  2035. USERROW21: byte; //User Row Byte 21
  2036. USERROW22: byte; //User Row Byte 22
  2037. USERROW23: byte; //User Row Byte 23
  2038. USERROW24: byte; //User Row Byte 24
  2039. USERROW25: byte; //User Row Byte 25
  2040. USERROW26: byte; //User Row Byte 26
  2041. USERROW27: byte; //User Row Byte 27
  2042. USERROW28: byte; //User Row Byte 28
  2043. USERROW29: byte; //User Row Byte 29
  2044. USERROW30: byte; //User Row Byte 30
  2045. USERROW31: byte; //User Row Byte 31
  2046. end;
  2047. TVPORT = object //Virtual Ports
  2048. DIR: byte; //Data Direction
  2049. OUT_: byte; //Output Value
  2050. IN_: byte; //Input Value
  2051. INTFLAGS: byte; //Interrupt Flags
  2052. const
  2053. // Pin Interrupt
  2054. INT0bm = $01;
  2055. INT1bm = $02;
  2056. INT2bm = $04;
  2057. INT3bm = $08;
  2058. INT4bm = $10;
  2059. INT5bm = $20;
  2060. INT6bm = $40;
  2061. INT7bm = $80;
  2062. end;
  2063. TVREF = object //Voltage reference
  2064. CTRLA: byte; //Control A
  2065. CTRLB: byte; //Control B
  2066. const
  2067. // VREF_ADC0REFSEL
  2068. ADC0REFSELmask = $70;
  2069. ADC0REFSEL_0V55 = $00;
  2070. ADC0REFSEL_1V1 = $10;
  2071. ADC0REFSEL_2V5 = $20;
  2072. ADC0REFSEL_4V34 = $30;
  2073. ADC0REFSEL_1V5 = $40;
  2074. // VREF_DAC0REFSEL
  2075. DAC0REFSELmask = $07;
  2076. DAC0REFSEL_0V55 = $00;
  2077. DAC0REFSEL_1V1 = $01;
  2078. DAC0REFSEL_2V5 = $02;
  2079. DAC0REFSEL_4V34 = $03;
  2080. DAC0REFSEL_1V5 = $04;
  2081. // ADC0 reference enable
  2082. ADC0REFENbm = $02;
  2083. // DAC0/AC0 reference enable
  2084. DAC0REFENbm = $01;
  2085. end;
  2086. TWDT = object //Watch-Dog Timer
  2087. CTRLA: byte; //Control A
  2088. STATUS: byte; //Status
  2089. const
  2090. // WDT_PERIOD
  2091. PERIODmask = $0F;
  2092. PERIOD_OFF = $00;
  2093. PERIOD_8CLK = $01;
  2094. PERIOD_16CLK = $02;
  2095. PERIOD_32CLK = $03;
  2096. PERIOD_64CLK = $04;
  2097. PERIOD_128CLK = $05;
  2098. PERIOD_256CLK = $06;
  2099. PERIOD_512CLK = $07;
  2100. PERIOD_1KCLK = $08;
  2101. PERIOD_2KCLK = $09;
  2102. PERIOD_4KCLK = $0A;
  2103. PERIOD_8KCLK = $0B;
  2104. // WDT_WINDOW
  2105. WINDOWmask = $F0;
  2106. WINDOW_OFF = $00;
  2107. WINDOW_8CLK = $10;
  2108. WINDOW_16CLK = $20;
  2109. WINDOW_32CLK = $30;
  2110. WINDOW_64CLK = $40;
  2111. WINDOW_128CLK = $50;
  2112. WINDOW_256CLK = $60;
  2113. WINDOW_512CLK = $70;
  2114. WINDOW_1KCLK = $80;
  2115. WINDOW_2KCLK = $90;
  2116. WINDOW_4KCLK = $A0;
  2117. WINDOW_8KCLK = $B0;
  2118. // Lock enable
  2119. LOCKbm = $80;
  2120. // Syncronization busy
  2121. SYNCBUSYbm = $01;
  2122. end;
  2123. const
  2124. Pin0idx = 0; Pin0bm = 1;
  2125. Pin1idx = 1; Pin1bm = 2;
  2126. Pin2idx = 2; Pin2bm = 4;
  2127. Pin3idx = 3; Pin3bm = 8;
  2128. Pin4idx = 4; Pin4bm = 16;
  2129. Pin5idx = 5; Pin5bm = 32;
  2130. Pin6idx = 6; Pin6bm = 64;
  2131. Pin7idx = 7; Pin7bm = 128;
  2132. var
  2133. VPORTA: TVPORT absolute $0000;
  2134. VPORTB: TVPORT absolute $0004;
  2135. VPORTC: TVPORT absolute $0008;
  2136. GPIO: TGPIO absolute $001C;
  2137. CPU: TCPU absolute $0030;
  2138. RSTCTRL: TRSTCTRL absolute $0040;
  2139. SLPCTRL: TSLPCTRL absolute $0050;
  2140. CLKCTRL: TCLKCTRL absolute $0060;
  2141. BOD: TBOD absolute $0080;
  2142. VREF: TVREF absolute $00A0;
  2143. WDT: TWDT absolute $0100;
  2144. CPUINT: TCPUINT absolute $0110;
  2145. CRCSCAN: TCRCSCAN absolute $0120;
  2146. RTC: TRTC absolute $0140;
  2147. EVSYS: TEVSYS absolute $0180;
  2148. CCL: TCCL absolute $01C0;
  2149. PORTMUX: TPORTMUX absolute $0200;
  2150. PORTA: TPORT absolute $0400;
  2151. ADC0: TADC absolute $0600;
  2152. AC0: TAC absolute $0670;
  2153. DAC0: TDAC absolute $0680;
  2154. USART0: TUSART absolute $0800;
  2155. TWI0: TTWI absolute $0810;
  2156. SPI0: TSPI absolute $0820;
  2157. TCA0: TTCA absolute $0A00;
  2158. TCB0: TTCB absolute $0A40;
  2159. TCD0: TTCD absolute $0A80;
  2160. SYSCFG: TSYSCFG absolute $0F00;
  2161. NVMCTRL: TNVMCTRL absolute $1000;
  2162. SIGROW: TSIGROW absolute $1100;
  2163. FUSE: TFUSE absolute $1280;
  2164. LOCKBIT: TLOCKBIT absolute $128A;
  2165. USERROW: TUSERROW absolute $1300;
  2166. implementation
  2167. {$define RELBRANCHES}
  2168. {$i avrcommon.inc}
  2169. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  2170. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  2171. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 3
  2172. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 6
  2173. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 7
  2174. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 8
  2175. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 8
  2176. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 9
  2177. procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 10
  2178. //procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 10
  2179. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 11
  2180. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 11
  2181. procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 12
  2182. //procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 12
  2183. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 13
  2184. procedure TCD0_OVF_ISR; external name 'TCD0_OVF_ISR'; // Interrupt 14
  2185. procedure TCD0_TRIG_ISR; external name 'TCD0_TRIG_ISR'; // Interrupt 15
  2186. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 16
  2187. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 17
  2188. procedure ADC0_WCOMP_ISR; external name 'ADC0_WCOMP_ISR'; // Interrupt 18
  2189. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 19
  2190. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 20
  2191. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 21
  2192. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 22
  2193. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 23
  2194. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 24
  2195. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 25
  2196. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  2197. asm
  2198. rjmp __dtors_end
  2199. rjmp CRCSCAN_NMI_ISR
  2200. rjmp BOD_VLM_ISR
  2201. rjmp PORTA_PORT_ISR
  2202. rjmp RTC_CNT_ISR
  2203. rjmp RTC_PIT_ISR
  2204. rjmp TCA0_LUNF_ISR
  2205. // rjmp TCA0_OVF_ISR
  2206. rjmp TCA0_HUNF_ISR
  2207. rjmp TCA0_LCMP0_ISR
  2208. // rjmp TCA0_CMP0_ISR
  2209. rjmp TCA0_CMP1_ISR
  2210. // rjmp TCA0_LCMP1_ISR
  2211. rjmp TCA0_LCMP2_ISR
  2212. // rjmp TCA0_CMP2_ISR
  2213. rjmp TCB0_INT_ISR
  2214. rjmp TCD0_OVF_ISR
  2215. rjmp TCD0_TRIG_ISR
  2216. rjmp AC0_AC_ISR
  2217. rjmp ADC0_RESRDY_ISR
  2218. rjmp ADC0_WCOMP_ISR
  2219. rjmp TWI0_TWIS_ISR
  2220. rjmp TWI0_TWIM_ISR
  2221. rjmp SPI0_INT_ISR
  2222. rjmp USART0_RXC_ISR
  2223. rjmp USART0_DRE_ISR
  2224. rjmp USART0_TXC_ISR
  2225. rjmp NVMCTRL_EE_ISR
  2226. .weak CRCSCAN_NMI_ISR
  2227. .weak BOD_VLM_ISR
  2228. .weak PORTA_PORT_ISR
  2229. .weak RTC_CNT_ISR
  2230. .weak RTC_PIT_ISR
  2231. .weak TCA0_LUNF_ISR
  2232. // .weak TCA0_OVF_ISR
  2233. .weak TCA0_HUNF_ISR
  2234. .weak TCA0_LCMP0_ISR
  2235. // .weak TCA0_CMP0_ISR
  2236. .weak TCA0_CMP1_ISR
  2237. // .weak TCA0_LCMP1_ISR
  2238. .weak TCA0_LCMP2_ISR
  2239. // .weak TCA0_CMP2_ISR
  2240. .weak TCB0_INT_ISR
  2241. .weak TCD0_OVF_ISR
  2242. .weak TCD0_TRIG_ISR
  2243. .weak AC0_AC_ISR
  2244. .weak ADC0_RESRDY_ISR
  2245. .weak ADC0_WCOMP_ISR
  2246. .weak TWI0_TWIS_ISR
  2247. .weak TWI0_TWIM_ISR
  2248. .weak SPI0_INT_ISR
  2249. .weak USART0_RXC_ISR
  2250. .weak USART0_DRE_ISR
  2251. .weak USART0_TXC_ISR
  2252. .weak NVMCTRL_EE_ISR
  2253. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  2254. .set BOD_VLM_ISR, Default_IRQ_handler
  2255. .set PORTA_PORT_ISR, Default_IRQ_handler
  2256. .set RTC_CNT_ISR, Default_IRQ_handler
  2257. .set RTC_PIT_ISR, Default_IRQ_handler
  2258. .set TCA0_LUNF_ISR, Default_IRQ_handler
  2259. // .set TCA0_OVF_ISR, Default_IRQ_handler
  2260. .set TCA0_HUNF_ISR, Default_IRQ_handler
  2261. .set TCA0_LCMP0_ISR, Default_IRQ_handler
  2262. // .set TCA0_CMP0_ISR, Default_IRQ_handler
  2263. .set TCA0_CMP1_ISR, Default_IRQ_handler
  2264. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  2265. .set TCA0_LCMP2_ISR, Default_IRQ_handler
  2266. // .set TCA0_CMP2_ISR, Default_IRQ_handler
  2267. .set TCB0_INT_ISR, Default_IRQ_handler
  2268. .set TCD0_OVF_ISR, Default_IRQ_handler
  2269. .set TCD0_TRIG_ISR, Default_IRQ_handler
  2270. .set AC0_AC_ISR, Default_IRQ_handler
  2271. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  2272. .set ADC0_WCOMP_ISR, Default_IRQ_handler
  2273. .set TWI0_TWIS_ISR, Default_IRQ_handler
  2274. .set TWI0_TWIM_ISR, Default_IRQ_handler
  2275. .set SPI0_INT_ISR, Default_IRQ_handler
  2276. .set USART0_RXC_ISR, Default_IRQ_handler
  2277. .set USART0_DRE_ISR, Default_IRQ_handler
  2278. .set USART0_TXC_ISR, Default_IRQ_handler
  2279. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  2280. end;
  2281. end.