attiny416auto.pp 60 KB

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  1. unit ATtiny416auto;
  2. interface
  3. type
  4. TAC = object //Analog Comparator
  5. CTRLA: byte; //Control A
  6. Reserved1: byte;
  7. MUXCTRLA: byte; //Mux Control A
  8. Reserved3: byte;
  9. Reserved4: byte;
  10. Reserved5: byte;
  11. INTCTRL: byte; //Interrupt Control
  12. STATUS: byte; //Status
  13. const
  14. // Enable
  15. ENABLEbm = $01;
  16. // AC_HYSMODE
  17. HYSMODEmask = $06;
  18. HYSMODE_OFF = $00;
  19. HYSMODE_10mV = $02;
  20. HYSMODE_25mV = $04;
  21. HYSMODE_50mV = $06;
  22. // AC_INTMODE
  23. INTMODEmask = $30;
  24. INTMODE_BOTHEDGE = $00;
  25. INTMODE_NEGEDGE = $20;
  26. INTMODE_POSEDGE = $30;
  27. // AC_LPMODE
  28. LPMODEmask = $08;
  29. LPMODE_DIS = $00;
  30. LPMODE_EN = $08;
  31. // Output Buffer Enable
  32. OUTENbm = $40;
  33. // Run in Standby Mode
  34. RUNSTDBYbm = $80;
  35. // Analog Comparator 0 Interrupt Enable
  36. CMPbm = $01;
  37. // Invert AC Output
  38. INVERTbm = $80;
  39. // AC_MUXNEG
  40. MUXNEGmask = $03;
  41. MUXNEG_PIN0 = $00;
  42. MUXNEG_PIN1 = $01;
  43. MUXNEG_VREF = $02;
  44. MUXNEG_DAC = $03;
  45. // AC_MUXPOS
  46. MUXPOSmask = $18;
  47. MUXPOS_PIN0 = $00;
  48. MUXPOS_PIN1 = $08;
  49. // Analog Comparator State
  50. STATEbm = $10;
  51. end;
  52. TADC = object //Analog to Digital Converter
  53. CTRLA: byte; //Control A
  54. CTRLB: byte; //Control B
  55. CTRLC: byte; //Control C
  56. CTRLD: byte; //Control D
  57. CTRLE: byte; //Control E
  58. SAMPCTRL: byte; //Sample Control
  59. MUXPOS: byte; //Positive mux input
  60. Reserved7: byte;
  61. COMMAND: byte; //Command
  62. EVCTRL: byte; //Event Control
  63. INTCTRL: byte; //Interrupt Control
  64. INTFLAGS: byte; //Interrupt Flags
  65. DBGCTRL: byte; //Debug Control
  66. TEMP: byte; //Temporary Data
  67. Reserved14: byte;
  68. Reserved15: byte;
  69. RES: word; //ADC Accumulator Result
  70. WINLT: word; //Window comparator low threshold
  71. WINHT: word; //Window comparator high threshold
  72. CALIB: byte; //Calibration
  73. const
  74. // ADC_DUTYCYC
  75. DUTYCYCmask = $01;
  76. DUTYCYC_DUTY50 = $00;
  77. DUTYCYC_DUTY25 = $01;
  78. // Start Conversion Operation
  79. STCONVbm = $01;
  80. // ADC Enable
  81. ENABLEbm = $01;
  82. // ADC Freerun mode
  83. FREERUNbm = $02;
  84. // ADC_RESSEL
  85. RESSELmask = $04;
  86. RESSEL_10BIT = $00;
  87. RESSEL_8BIT = $04;
  88. // Run standby mode
  89. RUNSTBYbm = $80;
  90. // ADC_SAMPNUM
  91. SAMPNUMmask = $07;
  92. SAMPNUM_ACC1 = $00;
  93. SAMPNUM_ACC2 = $01;
  94. SAMPNUM_ACC4 = $02;
  95. SAMPNUM_ACC8 = $03;
  96. SAMPNUM_ACC16 = $04;
  97. SAMPNUM_ACC32 = $05;
  98. SAMPNUM_ACC64 = $06;
  99. // ADC_PRESC
  100. PRESCmask = $07;
  101. PRESC_DIV2 = $00;
  102. PRESC_DIV4 = $01;
  103. PRESC_DIV8 = $02;
  104. PRESC_DIV16 = $03;
  105. PRESC_DIV32 = $04;
  106. PRESC_DIV64 = $05;
  107. PRESC_DIV128 = $06;
  108. PRESC_DIV256 = $07;
  109. // ADC_REFSEL
  110. REFSELmask = $30;
  111. REFSEL_INTREF = $00;
  112. REFSEL_VDDREF = $10;
  113. // Sample Capacitance Selection
  114. SAMPCAPbm = $40;
  115. // ADC_ASDV
  116. ASDVmask = $10;
  117. ASDV_ASVOFF = $00;
  118. ASDV_ASVON = $10;
  119. // ADC_INITDLY
  120. INITDLYmask = $E0;
  121. INITDLY_DLY0 = $00;
  122. INITDLY_DLY16 = $20;
  123. INITDLY_DLY32 = $40;
  124. INITDLY_DLY64 = $60;
  125. INITDLY_DLY128 = $80;
  126. INITDLY_DLY256 = $A0;
  127. // Sampling Delay Selection
  128. SAMPDLY0bm = $01;
  129. SAMPDLY1bm = $02;
  130. SAMPDLY2bm = $04;
  131. SAMPDLY3bm = $08;
  132. // ADC_WINCM
  133. WINCMmask = $07;
  134. WINCM_NONE = $00;
  135. WINCM_BELOW = $01;
  136. WINCM_ABOVE = $02;
  137. WINCM_INSIDE = $03;
  138. WINCM_OUTSIDE = $04;
  139. // Debug run
  140. DBGRUNbm = $01;
  141. // Start Event Input Enable
  142. STARTEIbm = $01;
  143. // Result Ready Interrupt Enable
  144. RESRDYbm = $01;
  145. // Window Comparator Interrupt Enable
  146. WCMPbm = $02;
  147. // ADC_MUXPOS
  148. MUXPOSmask = $1F;
  149. MUXPOS_AIN0 = $00;
  150. MUXPOS_AIN1 = $01;
  151. MUXPOS_AIN2 = $02;
  152. MUXPOS_AIN3 = $03;
  153. MUXPOS_AIN4 = $04;
  154. MUXPOS_AIN5 = $05;
  155. MUXPOS_AIN6 = $06;
  156. MUXPOS_AIN7 = $07;
  157. MUXPOS_AIN8 = $08;
  158. MUXPOS_AIN9 = $09;
  159. MUXPOS_AIN10 = $0A;
  160. MUXPOS_AIN11 = $0B;
  161. MUXPOS_DAC0 = $1C;
  162. MUXPOS_INTREF = $1D;
  163. MUXPOS_TEMPSENSE = $1E;
  164. MUXPOS_GND = $1F;
  165. // Sample lenght
  166. SAMPLEN0bm = $01;
  167. SAMPLEN1bm = $02;
  168. SAMPLEN2bm = $04;
  169. SAMPLEN3bm = $08;
  170. SAMPLEN4bm = $10;
  171. // Temporary
  172. TEMP0bm = $01;
  173. TEMP1bm = $02;
  174. TEMP2bm = $04;
  175. TEMP3bm = $08;
  176. TEMP4bm = $10;
  177. TEMP5bm = $20;
  178. TEMP6bm = $40;
  179. TEMP7bm = $80;
  180. end;
  181. TBOD = object //Bod interface
  182. CTRLA: byte; //Control A
  183. CTRLB: byte; //Control B
  184. Reserved2: byte;
  185. Reserved3: byte;
  186. Reserved4: byte;
  187. Reserved5: byte;
  188. Reserved6: byte;
  189. Reserved7: byte;
  190. VLMCTRLA: byte; //Voltage level monitor Control
  191. INTCTRL: byte; //Voltage level monitor interrupt Control
  192. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  193. STATUS: byte; //Voltage level monitor status
  194. const
  195. // BOD_ACTIVE
  196. ACTIVEmask = $0C;
  197. ACTIVE_DIS = $00;
  198. ACTIVE_ENABLED = $04;
  199. ACTIVE_SAMPLED = $08;
  200. ACTIVE_ENWAKE = $0C;
  201. // BOD_SAMPFREQ
  202. SAMPFREQmask = $10;
  203. SAMPFREQ_1KHZ = $00;
  204. SAMPFREQ_125Hz = $10;
  205. // BOD_SLEEP
  206. SLEEPmask = $03;
  207. SLEEP_DIS = $00;
  208. SLEEP_ENABLED = $01;
  209. SLEEP_SAMPLED = $02;
  210. // BOD_LVL
  211. LVLmask = $07;
  212. LVL_BODLEVEL0 = $00;
  213. LVL_BODLEVEL1 = $01;
  214. LVL_BODLEVEL2 = $02;
  215. LVL_BODLEVEL3 = $03;
  216. LVL_BODLEVEL4 = $04;
  217. LVL_BODLEVEL5 = $05;
  218. LVL_BODLEVEL6 = $06;
  219. LVL_BODLEVEL7 = $07;
  220. // BOD_VLMCFG
  221. VLMCFGmask = $06;
  222. VLMCFG_BELOW = $00;
  223. VLMCFG_ABOVE = $02;
  224. VLMCFG_CROSS = $04;
  225. // voltage level monitor interrrupt enable
  226. VLMIEbm = $01;
  227. // Voltage level monitor interrupt flag
  228. VLMIFbm = $01;
  229. // Voltage level monitor status
  230. VLMSbm = $01;
  231. // BOD_VLMLVL
  232. VLMLVLmask = $03;
  233. VLMLVL_5ABOVE = $00;
  234. VLMLVL_15ABOVE = $01;
  235. VLMLVL_25ABOVE = $02;
  236. end;
  237. TCCL = object //Configurable Custom Logic
  238. CTRLA: byte; //Control Register A
  239. SEQCTRL0: byte; //Sequential Control 0
  240. Reserved2: byte;
  241. Reserved3: byte;
  242. Reserved4: byte;
  243. LUT0CTRLA: byte; //LUT Control 0 A
  244. LUT0CTRLB: byte; //LUT Control 0 B
  245. LUT0CTRLC: byte; //LUT Control 0 C
  246. TRUTH0: byte; //Truth 0
  247. LUT1CTRLA: byte; //LUT Control 1 A
  248. LUT1CTRLB: byte; //LUT Control 1 B
  249. LUT1CTRLC: byte; //LUT Control 1 C
  250. TRUTH1: byte; //Truth 1
  251. const
  252. // Enable
  253. ENABLEbm = $01;
  254. // Run in Standby
  255. RUNSTDBYbm = $40;
  256. // Clock Source Selection
  257. CLKSRCbm = $40;
  258. // CCL_EDGEDET
  259. EDGEDETmask = $80;
  260. EDGEDET_DIS = $00;
  261. EDGEDET_EN = $80;
  262. // CCL_FILTSEL
  263. FILTSELmask = $30;
  264. FILTSEL_DISABLE = $00;
  265. FILTSEL_SYNCH = $10;
  266. FILTSEL_FILTER = $20;
  267. // Output Enable
  268. OUTENbm = $08;
  269. // CCL_INSEL0
  270. INSEL0mask = $0F;
  271. INSEL0_MASK = $00;
  272. INSEL0_FEEDBACK = $01;
  273. INSEL0_LINK = $02;
  274. INSEL0_EVENT0 = $03;
  275. INSEL0_EVENT1 = $04;
  276. INSEL0_IO = $05;
  277. INSEL0_AC0 = $06;
  278. INSEL0_TCB0 = $07;
  279. INSEL0_TCA0 = $08;
  280. INSEL0_TCD0 = $09;
  281. INSEL0_USART0 = $0A;
  282. INSEL0_SPI0 = $0B;
  283. // CCL_INSEL1
  284. INSEL1mask = $F0;
  285. INSEL1_MASK = $00;
  286. INSEL1_FEEDBACK = $10;
  287. INSEL1_LINK = $20;
  288. INSEL1_EVENT0 = $30;
  289. INSEL1_EVENT1 = $40;
  290. INSEL1_IO = $50;
  291. INSEL1_AC0 = $60;
  292. INSEL1_TCB0 = $70;
  293. INSEL1_TCA0 = $80;
  294. INSEL1_TCD0 = $90;
  295. INSEL1_USART0 = $A0;
  296. INSEL1_SPI0 = $B0;
  297. // CCL_INSEL2
  298. INSEL2mask = $0F;
  299. INSEL2_MASK = $00;
  300. INSEL2_FEEDBACK = $01;
  301. INSEL2_LINK = $02;
  302. INSEL2_EVENT0 = $03;
  303. INSEL2_EVENT1 = $04;
  304. INSEL2_IO = $05;
  305. INSEL2_AC0 = $06;
  306. INSEL2_TCB0 = $07;
  307. INSEL2_TCA0 = $08;
  308. INSEL2_TCD0 = $09;
  309. INSEL2_SPI0 = $0B;
  310. // CCL_SEQSEL
  311. SEQSELmask = $07;
  312. SEQSEL_DISABLE = $00;
  313. SEQSEL_DFF = $01;
  314. SEQSEL_JK = $02;
  315. SEQSEL_LATCH = $03;
  316. SEQSEL_RS = $04;
  317. end;
  318. TCLKCTRL = object //Clock controller
  319. MCLKCTRLA: byte; //MCLK Control A
  320. MCLKCTRLB: byte; //MCLK Control B
  321. MCLKLOCK: byte; //MCLK Lock
  322. MCLKSTATUS: byte; //MCLK Status
  323. Reserved4: byte;
  324. Reserved5: byte;
  325. Reserved6: byte;
  326. Reserved7: byte;
  327. Reserved8: byte;
  328. Reserved9: byte;
  329. Reserved10: byte;
  330. Reserved11: byte;
  331. Reserved12: byte;
  332. Reserved13: byte;
  333. Reserved14: byte;
  334. Reserved15: byte;
  335. OSC20MCTRLA: byte; //OSC20M Control A
  336. OSC20MCALIBA: byte; //OSC20M Calibration A
  337. OSC20MCALIBB: byte; //OSC20M Calibration B
  338. Reserved19: byte;
  339. Reserved20: byte;
  340. Reserved21: byte;
  341. Reserved22: byte;
  342. Reserved23: byte;
  343. OSC32KCTRLA: byte; //OSC32K Control A
  344. Reserved25: byte;
  345. Reserved26: byte;
  346. Reserved27: byte;
  347. XOSC32KCTRLA: byte; //XOSC32K Control A
  348. const
  349. // System clock out
  350. CLKOUTbm = $80;
  351. // CLKCTRL_CLKSEL
  352. CLKSELmask = $03;
  353. CLKSEL_OSC20M = $00;
  354. CLKSEL_OSCULP32K = $01;
  355. CLKSEL_XOSC32K = $02;
  356. CLKSEL_EXTCLK = $03;
  357. // CLKCTRL_PDIV
  358. PDIVmask = $1E;
  359. PDIV_2X = $00;
  360. PDIV_4X = $02;
  361. PDIV_8X = $04;
  362. PDIV_16X = $06;
  363. PDIV_32X = $08;
  364. PDIV_64X = $0A;
  365. PDIV_6X = $10;
  366. PDIV_10X = $12;
  367. PDIV_12X = $14;
  368. PDIV_24X = $16;
  369. PDIV_48X = $18;
  370. // Prescaler enable
  371. PENbm = $01;
  372. // lock ebable
  373. LOCKENbm = $01;
  374. // External Clock status
  375. EXTSbm = $80;
  376. // 20MHz oscillator status
  377. OSC20MSbm = $10;
  378. // 32KHz oscillator status
  379. OSC32KSbm = $20;
  380. // System Oscillator changing
  381. SOSCbm = $01;
  382. // 32.768 kHz Crystal Oscillator status
  383. XOSC32KSbm = $40;
  384. // Calibration freq select
  385. CALSEL20M0bm = $40;
  386. CALSEL20M1bm = $80;
  387. // Calibration
  388. CAL20M0bm = $01;
  389. CAL20M1bm = $02;
  390. CAL20M2bm = $04;
  391. CAL20M3bm = $08;
  392. CAL20M4bm = $10;
  393. CAL20M5bm = $20;
  394. // Lock
  395. LOCKbm = $80;
  396. // Oscillator temperature coefficient
  397. TEMPCAL20M0bm = $01;
  398. TEMPCAL20M1bm = $02;
  399. TEMPCAL20M2bm = $04;
  400. TEMPCAL20M3bm = $08;
  401. // Run standby
  402. RUNSTDBYbm = $02;
  403. // CLKCTRL_CSUT
  404. CSUTmask = $30;
  405. CSUT_1K = $00;
  406. CSUT_16K = $10;
  407. CSUT_32K = $20;
  408. CSUT_64K = $30;
  409. // Enable
  410. ENABLEbm = $01;
  411. // Select
  412. SELbm = $04;
  413. end;
  414. TCPU = object //CPU
  415. Reserved0: byte;
  416. Reserved1: byte;
  417. Reserved2: byte;
  418. Reserved3: byte;
  419. CCP: byte; //Configuration Change Protection
  420. Reserved5: byte;
  421. Reserved6: byte;
  422. Reserved7: byte;
  423. Reserved8: byte;
  424. Reserved9: byte;
  425. Reserved10: byte;
  426. Reserved11: byte;
  427. Reserved12: byte;
  428. SPL: byte; //Stack Pointer Low
  429. SPH: byte; //Stack Pointer High
  430. SREG: byte; //Status Register
  431. const
  432. // CPU_CCP
  433. CCPmask = $FF;
  434. CCP_SPM = $9D;
  435. CCP_IOREG = $D8;
  436. // Carry Flag
  437. Cbm = $01;
  438. // Half Carry Flag
  439. Hbm = $20;
  440. // Global Interrupt Enable Flag
  441. Ibm = $80;
  442. // Negative Flag
  443. Nbm = $04;
  444. // N Exclusive Or V Flag
  445. Sbm = $10;
  446. // Transfer Bit
  447. Tbm = $40;
  448. // Two's Complement Overflow Flag
  449. Vbm = $08;
  450. // Zero Flag
  451. Zbm = $02;
  452. end;
  453. TCPUINT = object //Interrupt Controller
  454. CTRLA: byte; //Control A
  455. STATUS: byte; //Status
  456. LVL0PRI: byte; //Interrupt Level 0 Priority
  457. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  458. const
  459. // Compact Vector Table
  460. CVTbm = $20;
  461. // Interrupt Vector Select
  462. IVSELbm = $40;
  463. // Round-robin Scheduling Enable
  464. LVL0RRbm = $01;
  465. // Interrupt Level Priority
  466. LVL0PRI0bm = $01;
  467. LVL0PRI1bm = $02;
  468. LVL0PRI2bm = $04;
  469. LVL0PRI3bm = $08;
  470. LVL0PRI4bm = $10;
  471. LVL0PRI5bm = $20;
  472. LVL0PRI6bm = $40;
  473. LVL0PRI7bm = $80;
  474. // Interrupt Vector with High Priority
  475. LVL1VEC0bm = $01;
  476. LVL1VEC1bm = $02;
  477. LVL1VEC2bm = $04;
  478. LVL1VEC3bm = $08;
  479. LVL1VEC4bm = $10;
  480. LVL1VEC5bm = $20;
  481. LVL1VEC6bm = $40;
  482. LVL1VEC7bm = $80;
  483. // Level 0 Interrupt Executing
  484. LVL0EXbm = $01;
  485. // Level 1 Interrupt Executing
  486. LVL1EXbm = $02;
  487. // Non-maskable Interrupt Executing
  488. NMIEXbm = $80;
  489. end;
  490. TCRCSCAN = object //CRCSCAN
  491. CTRLA: byte; //Control A
  492. CTRLB: byte; //Control B
  493. STATUS: byte; //Status
  494. const
  495. // Enable CRC scan
  496. ENABLEbm = $01;
  497. // Enable NMI Trigger
  498. NMIENbm = $02;
  499. // Reset CRC scan
  500. RESETbm = $80;
  501. // CRCSCAN_MODE
  502. MODEmask = $30;
  503. MODE_PRIORITY = $00;
  504. MODE_RESERVED = $10;
  505. MODE_BACKGROUND = $20;
  506. MODE_CONTINUOUS = $30;
  507. // CRCSCAN_SRC
  508. SRCmask = $03;
  509. SRC_FLASH = $00;
  510. SRC_APPLICATION = $01;
  511. SRC_BOOT = $02;
  512. // CRC Busy
  513. BUSYbm = $01;
  514. // CRC Ok
  515. OKbm = $02;
  516. end;
  517. TDAC = object //Digital to Analog Converter
  518. CTRLA: byte; //Control Register A
  519. DATA: byte; //DATA Register
  520. const
  521. // DAC Enable
  522. ENABLEbm = $01;
  523. // Output Buffer Enable
  524. OUTENbm = $40;
  525. // Run in Standby Mode
  526. RUNSTDBYbm = $80;
  527. end;
  528. TEVSYS = object //Event System
  529. ASYNCSTROBE: byte; //Asynchronous Channel Strobe
  530. SYNCSTROBE: byte; //Synchronous Channel Strobe
  531. ASYNCCH0: byte; //Asynchronous Channel 0 Generator Selection
  532. ASYNCCH1: byte; //Asynchronous Channel 1 Generator Selection
  533. ASYNCCH2: byte; //Asynchronous Channel 2 Generator Selection
  534. ASYNCCH3: byte; //Asynchronous Channel 3 Generator Selection
  535. Reserved6: byte;
  536. Reserved7: byte;
  537. Reserved8: byte;
  538. Reserved9: byte;
  539. SYNCCH0: byte; //Synchronous Channel 0 Generator Selection
  540. SYNCCH1: byte; //Synchronous Channel 1 Generator Selection
  541. Reserved12: byte;
  542. Reserved13: byte;
  543. Reserved14: byte;
  544. Reserved15: byte;
  545. Reserved16: byte;
  546. Reserved17: byte;
  547. ASYNCUSER0: byte; //Asynchronous User Ch 0 Input Selection - TCB0
  548. ASYNCUSER1: byte; //Asynchronous User Ch 1 Input Selection - ADC0
  549. ASYNCUSER2: byte; //Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  550. ASYNCUSER3: byte; //Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  551. ASYNCUSER4: byte; //Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  552. ASYNCUSER5: byte; //Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  553. ASYNCUSER6: byte; //Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  554. ASYNCUSER7: byte; //Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  555. ASYNCUSER8: byte; //Asynchronous User Ch 8 Input Selection - Event Out 0
  556. ASYNCUSER9: byte; //Asynchronous User Ch 9 Input Selection - Event Out 1
  557. ASYNCUSER10: byte; //Asynchronous User Ch 10 Input Selection - Event Out 2
  558. Reserved29: byte;
  559. Reserved30: byte;
  560. Reserved31: byte;
  561. Reserved32: byte;
  562. Reserved33: byte;
  563. SYNCUSER0: byte; //Synchronous User Ch 0 Input Selection - TCA0
  564. SYNCUSER1: byte; //Synchronous User Ch 1 Input Selection - USART0
  565. const
  566. // EVSYS_ASYNCCH0
  567. ASYNCCH0mask = $FF;
  568. ASYNCCH0_OFF = $00;
  569. ASYNCCH0_CCL_LUT0 = $01;
  570. ASYNCCH0_CCL_LUT1 = $02;
  571. ASYNCCH0_AC0_OUT = $03;
  572. ASYNCCH0_TCD0_CMPBCLR = $04;
  573. ASYNCCH0_TCD0_CMPASET = $05;
  574. ASYNCCH0_TCD0_CMPBSET = $06;
  575. ASYNCCH0_TCD0_PROGEV = $07;
  576. ASYNCCH0_RTC_OVF = $08;
  577. ASYNCCH0_RTC_CMP = $09;
  578. ASYNCCH0_PORTA_PIN0 = $0A;
  579. ASYNCCH0_PORTA_PIN1 = $0B;
  580. ASYNCCH0_PORTA_PIN2 = $0C;
  581. ASYNCCH0_PORTA_PIN3 = $0D;
  582. ASYNCCH0_PORTA_PIN4 = $0E;
  583. ASYNCCH0_PORTA_PIN5 = $0F;
  584. ASYNCCH0_PORTA_PIN6 = $10;
  585. ASYNCCH0_PORTA_PIN7 = $11;
  586. ASYNCCH0_UPDI = $12;
  587. // EVSYS_ASYNCCH1
  588. ASYNCCH1mask = $FF;
  589. ASYNCCH1_OFF = $00;
  590. ASYNCCH1_CCL_LUT0 = $01;
  591. ASYNCCH1_CCL_LUT1 = $02;
  592. ASYNCCH1_AC0_OUT = $03;
  593. ASYNCCH1_TCD0_CMPBCLR = $04;
  594. ASYNCCH1_TCD0_CMPASET = $05;
  595. ASYNCCH1_TCD0_CMPBSET = $06;
  596. ASYNCCH1_TCD0_PROGEV = $07;
  597. ASYNCCH1_RTC_OVF = $08;
  598. ASYNCCH1_RTC_CMP = $09;
  599. ASYNCCH1_PORTB_PIN0 = $0A;
  600. ASYNCCH1_PORTB_PIN1 = $0B;
  601. ASYNCCH1_PORTB_PIN2 = $0C;
  602. ASYNCCH1_PORTB_PIN3 = $0D;
  603. ASYNCCH1_PORTB_PIN4 = $0E;
  604. ASYNCCH1_PORTB_PIN5 = $0F;
  605. ASYNCCH1_PORTB_PIN6 = $10;
  606. ASYNCCH1_PORTB_PIN7 = $11;
  607. // EVSYS_ASYNCCH2
  608. ASYNCCH2mask = $FF;
  609. ASYNCCH2_OFF = $00;
  610. ASYNCCH2_CCL_LUT0 = $01;
  611. ASYNCCH2_CCL_LUT1 = $02;
  612. ASYNCCH2_AC0_OUT = $03;
  613. ASYNCCH2_TCD0_CMPBCLR = $04;
  614. ASYNCCH2_TCD0_CMPASET = $05;
  615. ASYNCCH2_TCD0_CMPBSET = $06;
  616. ASYNCCH2_TCD0_PROGEV = $07;
  617. ASYNCCH2_RTC_OVF = $08;
  618. ASYNCCH2_RTC_CMP = $09;
  619. ASYNCCH2_PORTC_PIN0 = $0A;
  620. ASYNCCH2_PORTC_PIN1 = $0B;
  621. ASYNCCH2_PORTC_PIN2 = $0C;
  622. ASYNCCH2_PORTC_PIN3 = $0D;
  623. ASYNCCH2_PORTC_PIN4 = $0E;
  624. ASYNCCH2_PORTC_PIN5 = $0F;
  625. // EVSYS_ASYNCCH3
  626. ASYNCCH3mask = $FF;
  627. ASYNCCH3_OFF = $00;
  628. ASYNCCH3_CCL_LUT0 = $01;
  629. ASYNCCH3_CCL_LUT1 = $02;
  630. ASYNCCH3_AC0_OUT = $03;
  631. ASYNCCH3_TCD0_CMPBCLR = $04;
  632. ASYNCCH3_TCD0_CMPASET = $05;
  633. ASYNCCH3_TCD0_CMPBSET = $06;
  634. ASYNCCH3_TCD0_PROGEV = $07;
  635. ASYNCCH3_RTC_OVF = $08;
  636. ASYNCCH3_RTC_CMP = $09;
  637. ASYNCCH3_PIT_DIV8192 = $0A;
  638. ASYNCCH3_PIT_DIV4096 = $0B;
  639. ASYNCCH3_PIT_DIV2048 = $0C;
  640. ASYNCCH3_PIT_DIV1024 = $0D;
  641. ASYNCCH3_PIT_DIV512 = $0E;
  642. ASYNCCH3_PIT_DIV256 = $0F;
  643. ASYNCCH3_PIT_DIV128 = $10;
  644. ASYNCCH3_PIT_DIV64 = $11;
  645. // EVSYS_ASYNCUSER0
  646. ASYNCUSER0mask = $FF;
  647. ASYNCUSER0_OFF = $00;
  648. ASYNCUSER0_SYNCCH0 = $01;
  649. ASYNCUSER0_SYNCCH1 = $02;
  650. ASYNCUSER0_ASYNCCH0 = $03;
  651. ASYNCUSER0_ASYNCCH1 = $04;
  652. ASYNCUSER0_ASYNCCH2 = $05;
  653. ASYNCUSER0_ASYNCCH3 = $06;
  654. // EVSYS_ASYNCUSER1
  655. ASYNCUSER1mask = $FF;
  656. ASYNCUSER1_OFF = $00;
  657. ASYNCUSER1_SYNCCH0 = $01;
  658. ASYNCUSER1_SYNCCH1 = $02;
  659. ASYNCUSER1_ASYNCCH0 = $03;
  660. ASYNCUSER1_ASYNCCH1 = $04;
  661. ASYNCUSER1_ASYNCCH2 = $05;
  662. ASYNCUSER1_ASYNCCH3 = $06;
  663. // EVSYS_ASYNCUSER2
  664. ASYNCUSER2mask = $FF;
  665. ASYNCUSER2_OFF = $00;
  666. ASYNCUSER2_SYNCCH0 = $01;
  667. ASYNCUSER2_SYNCCH1 = $02;
  668. ASYNCUSER2_ASYNCCH0 = $03;
  669. ASYNCUSER2_ASYNCCH1 = $04;
  670. ASYNCUSER2_ASYNCCH2 = $05;
  671. ASYNCUSER2_ASYNCCH3 = $06;
  672. // EVSYS_ASYNCUSER3
  673. ASYNCUSER3mask = $FF;
  674. ASYNCUSER3_OFF = $00;
  675. ASYNCUSER3_SYNCCH0 = $01;
  676. ASYNCUSER3_SYNCCH1 = $02;
  677. ASYNCUSER3_ASYNCCH0 = $03;
  678. ASYNCUSER3_ASYNCCH1 = $04;
  679. ASYNCUSER3_ASYNCCH2 = $05;
  680. ASYNCUSER3_ASYNCCH3 = $06;
  681. // EVSYS_ASYNCUSER4
  682. ASYNCUSER4mask = $FF;
  683. ASYNCUSER4_OFF = $00;
  684. ASYNCUSER4_SYNCCH0 = $01;
  685. ASYNCUSER4_SYNCCH1 = $02;
  686. ASYNCUSER4_ASYNCCH0 = $03;
  687. ASYNCUSER4_ASYNCCH1 = $04;
  688. ASYNCUSER4_ASYNCCH2 = $05;
  689. ASYNCUSER4_ASYNCCH3 = $06;
  690. // EVSYS_ASYNCUSER5
  691. ASYNCUSER5mask = $FF;
  692. ASYNCUSER5_OFF = $00;
  693. ASYNCUSER5_SYNCCH0 = $01;
  694. ASYNCUSER5_SYNCCH1 = $02;
  695. ASYNCUSER5_ASYNCCH0 = $03;
  696. ASYNCUSER5_ASYNCCH1 = $04;
  697. ASYNCUSER5_ASYNCCH2 = $05;
  698. ASYNCUSER5_ASYNCCH3 = $06;
  699. // EVSYS_ASYNCUSER6
  700. ASYNCUSER6mask = $FF;
  701. ASYNCUSER6_OFF = $00;
  702. ASYNCUSER6_SYNCCH0 = $01;
  703. ASYNCUSER6_SYNCCH1 = $02;
  704. ASYNCUSER6_ASYNCCH0 = $03;
  705. ASYNCUSER6_ASYNCCH1 = $04;
  706. ASYNCUSER6_ASYNCCH2 = $05;
  707. ASYNCUSER6_ASYNCCH3 = $06;
  708. // EVSYS_ASYNCUSER7
  709. ASYNCUSER7mask = $FF;
  710. ASYNCUSER7_OFF = $00;
  711. ASYNCUSER7_SYNCCH0 = $01;
  712. ASYNCUSER7_SYNCCH1 = $02;
  713. ASYNCUSER7_ASYNCCH0 = $03;
  714. ASYNCUSER7_ASYNCCH1 = $04;
  715. ASYNCUSER7_ASYNCCH2 = $05;
  716. ASYNCUSER7_ASYNCCH3 = $06;
  717. // EVSYS_ASYNCUSER8
  718. ASYNCUSER8mask = $FF;
  719. ASYNCUSER8_OFF = $00;
  720. ASYNCUSER8_SYNCCH0 = $01;
  721. ASYNCUSER8_SYNCCH1 = $02;
  722. ASYNCUSER8_ASYNCCH0 = $03;
  723. ASYNCUSER8_ASYNCCH1 = $04;
  724. ASYNCUSER8_ASYNCCH2 = $05;
  725. ASYNCUSER8_ASYNCCH3 = $06;
  726. // EVSYS_ASYNCUSER9
  727. ASYNCUSER9mask = $FF;
  728. ASYNCUSER9_OFF = $00;
  729. ASYNCUSER9_SYNCCH0 = $01;
  730. ASYNCUSER9_SYNCCH1 = $02;
  731. ASYNCUSER9_ASYNCCH0 = $03;
  732. ASYNCUSER9_ASYNCCH1 = $04;
  733. ASYNCUSER9_ASYNCCH2 = $05;
  734. ASYNCUSER9_ASYNCCH3 = $06;
  735. // EVSYS_ASYNCUSER10
  736. ASYNCUSER10mask = $FF;
  737. ASYNCUSER10_OFF = $00;
  738. ASYNCUSER10_SYNCCH0 = $01;
  739. ASYNCUSER10_SYNCCH1 = $02;
  740. ASYNCUSER10_ASYNCCH0 = $03;
  741. ASYNCUSER10_ASYNCCH1 = $04;
  742. ASYNCUSER10_ASYNCCH2 = $05;
  743. ASYNCUSER10_ASYNCCH3 = $06;
  744. // EVSYS_SYNCCH0
  745. SYNCCH0mask = $FF;
  746. SYNCCH0_OFF = $00;
  747. SYNCCH0_TCB0 = $01;
  748. SYNCCH0_TCA0_OVF_LUNF = $02;
  749. SYNCCH0_TCA0_HUNF = $03;
  750. SYNCCH0_TCA0_CMP0 = $04;
  751. SYNCCH0_TCA0_CMP1 = $05;
  752. SYNCCH0_TCA0_CMP2 = $06;
  753. SYNCCH0_PORTC_PIN0 = $07;
  754. SYNCCH0_PORTC_PIN1 = $08;
  755. SYNCCH0_PORTC_PIN2 = $09;
  756. SYNCCH0_PORTC_PIN3 = $0A;
  757. SYNCCH0_PORTC_PIN4 = $0B;
  758. SYNCCH0_PORTC_PIN5 = $0C;
  759. SYNCCH0_PORTA_PIN0 = $0D;
  760. SYNCCH0_PORTA_PIN1 = $0E;
  761. SYNCCH0_PORTA_PIN2 = $0F;
  762. SYNCCH0_PORTA_PIN3 = $10;
  763. SYNCCH0_PORTA_PIN4 = $11;
  764. SYNCCH0_PORTA_PIN5 = $12;
  765. SYNCCH0_PORTA_PIN6 = $13;
  766. SYNCCH0_PORTA_PIN7 = $14;
  767. // EVSYS_SYNCCH1
  768. SYNCCH1mask = $FF;
  769. SYNCCH1_OFF = $00;
  770. SYNCCH1_TCB0 = $01;
  771. SYNCCH1_TCA0_OVF_LUNF = $02;
  772. SYNCCH1_TCA0_HUNF = $03;
  773. SYNCCH1_TCA0_CMP0 = $04;
  774. SYNCCH1_TCA0_CMP1 = $05;
  775. SYNCCH1_TCA0_CMP2 = $06;
  776. SYNCCH1_PORTB_PIN0 = $08;
  777. SYNCCH1_PORTB_PIN1 = $09;
  778. SYNCCH1_PORTB_PIN2 = $0A;
  779. SYNCCH1_PORTB_PIN3 = $0B;
  780. SYNCCH1_PORTB_PIN4 = $0C;
  781. SYNCCH1_PORTB_PIN5 = $0D;
  782. SYNCCH1_PORTB_PIN6 = $0E;
  783. SYNCCH1_PORTB_PIN7 = $0F;
  784. // EVSYS_SYNCUSER0
  785. SYNCUSER0mask = $FF;
  786. SYNCUSER0_OFF = $00;
  787. SYNCUSER0_SYNCCH0 = $01;
  788. SYNCUSER0_SYNCCH1 = $02;
  789. // EVSYS_SYNCUSER1
  790. SYNCUSER1mask = $FF;
  791. SYNCUSER1_OFF = $00;
  792. SYNCUSER1_SYNCCH0 = $01;
  793. SYNCUSER1_SYNCCH1 = $02;
  794. end;
  795. TFUSE = object //Fuses
  796. WDTCFG: byte; //Watchdog Configuration
  797. BODCFG: byte; //BOD Configuration
  798. OSCCFG: byte; //Oscillator Configuration
  799. Reserved3: byte;
  800. TCD0CFG: byte; //TCD0 Configuration
  801. SYSCFG0: byte; //System Configuration 0
  802. SYSCFG1: byte; //System Configuration 1
  803. APPEND: byte; //Application Code Section End
  804. BOOTEND: byte; //Boot Section End
  805. const
  806. // FUSE_ACTIVE
  807. ACTIVEmask = $0C;
  808. ACTIVE_DIS = $00;
  809. ACTIVE_ENABLED = $04;
  810. ACTIVE_SAMPLED = $08;
  811. ACTIVE_ENWAKE = $0C;
  812. // FUSE_LVL
  813. LVLmask = $E0;
  814. LVL_BODLEVEL0 = $00;
  815. LVL_BODLEVEL1 = $20;
  816. LVL_BODLEVEL2 = $40;
  817. LVL_BODLEVEL3 = $60;
  818. LVL_BODLEVEL4 = $80;
  819. LVL_BODLEVEL5 = $A0;
  820. LVL_BODLEVEL6 = $C0;
  821. LVL_BODLEVEL7 = $E0;
  822. // FUSE_SAMPFREQ
  823. SAMPFREQmask = $10;
  824. SAMPFREQ_1KHz = $00;
  825. SAMPFREQ_125Hz = $10;
  826. // FUSE_SLEEP
  827. SLEEPmask = $03;
  828. SLEEP_DIS = $00;
  829. SLEEP_ENABLED = $01;
  830. SLEEP_SAMPLED = $02;
  831. // FUSE_FREQSEL
  832. FREQSELmask = $03;
  833. FREQSEL_16MHZ = $01;
  834. // Oscillator Lock
  835. OSCLOCKbm = $80;
  836. // FUSE_CRCSRC
  837. CRCSRCmask = $C0;
  838. CRCSRC_FLASH = $00;
  839. CRCSRC_BOOT = $40;
  840. CRCSRC_BOOTAPP = $80;
  841. CRCSRC_NOCRC = $C0;
  842. // EEPROM Save
  843. EESAVEbm = $01;
  844. // FUSE_RSTPINCFG
  845. RSTPINCFGmask = $0C;
  846. RSTPINCFG_GPIO = $00;
  847. RSTPINCFG_UPDI = $04;
  848. RSTPINCFG_RST = $08;
  849. // FUSE_SUT
  850. SUTmask = $07;
  851. SUT_0MS = $00;
  852. SUT_1MS = $01;
  853. SUT_2MS = $02;
  854. SUT_4MS = $03;
  855. SUT_8MS = $04;
  856. SUT_16MS = $05;
  857. SUT_32MS = $06;
  858. SUT_64MS = $07;
  859. // Compare A Default Output Value
  860. CMPAbm = $01;
  861. // Compare A Output Enable
  862. CMPAENbm = $10;
  863. // Compare B Default Output Value
  864. CMPBbm = $02;
  865. // Compare B Output Enable
  866. CMPBENbm = $20;
  867. // Compare C Default Output Value
  868. CMPCbm = $04;
  869. // Compare C Output Enable
  870. CMPCENbm = $40;
  871. // Compare D Default Output Value
  872. CMPDbm = $08;
  873. // Compare D Output Enable
  874. CMPDENbm = $80;
  875. // FUSE_PERIOD
  876. PERIODmask = $0F;
  877. PERIOD_OFF = $00;
  878. PERIOD_8CLK = $01;
  879. PERIOD_16CLK = $02;
  880. PERIOD_32CLK = $03;
  881. PERIOD_64CLK = $04;
  882. PERIOD_128CLK = $05;
  883. PERIOD_256CLK = $06;
  884. PERIOD_512CLK = $07;
  885. PERIOD_1KCLK = $08;
  886. PERIOD_2KCLK = $09;
  887. PERIOD_4KCLK = $0A;
  888. PERIOD_8KCLK = $0B;
  889. // FUSE_WINDOW
  890. WINDOWmask = $F0;
  891. WINDOW_OFF = $00;
  892. WINDOW_8CLK = $10;
  893. WINDOW_16CLK = $20;
  894. WINDOW_32CLK = $30;
  895. WINDOW_64CLK = $40;
  896. WINDOW_128CLK = $50;
  897. WINDOW_256CLK = $60;
  898. WINDOW_512CLK = $70;
  899. WINDOW_1KCLK = $80;
  900. WINDOW_2KCLK = $90;
  901. WINDOW_4KCLK = $A0;
  902. WINDOW_8KCLK = $B0;
  903. end;
  904. TGPIO = object //General Purpose IO
  905. GPIOR0: byte; //General Purpose IO Register 0
  906. GPIOR1: byte; //General Purpose IO Register 1
  907. GPIOR2: byte; //General Purpose IO Register 2
  908. GPIOR3: byte; //General Purpose IO Register 3
  909. end;
  910. TLOCKBIT = object //Lockbit
  911. LOCKBIT: byte; //Lock bits
  912. const
  913. // LOCKBIT_LB
  914. LBmask = $FF;
  915. LB_RWLOCK = $3A;
  916. LB_NOLOCK = $C5;
  917. end;
  918. TNVMCTRL = object //Non-volatile Memory Controller
  919. CTRLA: byte; //Control A
  920. CTRLB: byte; //Control B
  921. STATUS: byte; //Status
  922. INTCTRL: byte; //Interrupt Control
  923. INTFLAGS: byte; //Interrupt Flags
  924. Reserved5: byte;
  925. DATA: word; //Data
  926. ADDR: word; //Address
  927. const
  928. // NVMCTRL_CMD
  929. CMDmask = $07;
  930. CMD_NONE = $00;
  931. CMD_PAGEWRITE = $01;
  932. CMD_PAGEERASE = $02;
  933. CMD_PAGEERASEWRITE = $03;
  934. CMD_PAGEBUFCLR = $04;
  935. CMD_CHIPERASE = $05;
  936. CMD_EEERASE = $06;
  937. CMD_FUSEWRITE = $07;
  938. // Application code write protect
  939. APCWPbm = $01;
  940. // Boot Lock
  941. BOOTLOCKbm = $02;
  942. // EEPROM Ready
  943. EEREADYbm = $01;
  944. // EEPROM busy
  945. EEBUSYbm = $02;
  946. // Flash busy
  947. FBUSYbm = $01;
  948. // Write error
  949. WRERRORbm = $04;
  950. end;
  951. TPORT = object //I/O Ports
  952. DIR: byte; //Data Direction
  953. DIRSET: byte; //Data Direction Set
  954. DIRCLR: byte; //Data Direction Clear
  955. DIRTGL: byte; //Data Direction Toggle
  956. OUT_: byte; //Output Value
  957. OUTSET: byte; //Output Value Set
  958. OUTCLR: byte; //Output Value Clear
  959. OUTTGL: byte; //Output Value Toggle
  960. IN_: byte; //Input Value
  961. INTFLAGS: byte; //Interrupt Flags
  962. Reserved10: byte;
  963. Reserved11: byte;
  964. Reserved12: byte;
  965. Reserved13: byte;
  966. Reserved14: byte;
  967. Reserved15: byte;
  968. PIN0CTRL: byte; //Pin 0 Control
  969. PIN1CTRL: byte; //Pin 1 Control
  970. PIN2CTRL: byte; //Pin 2 Control
  971. PIN3CTRL: byte; //Pin 3 Control
  972. PIN4CTRL: byte; //Pin 4 Control
  973. PIN5CTRL: byte; //Pin 5 Control
  974. PIN6CTRL: byte; //Pin 6 Control
  975. PIN7CTRL: byte; //Pin 7 Control
  976. const
  977. // Pin Interrupt
  978. INT0bm = $01;
  979. INT1bm = $02;
  980. INT2bm = $04;
  981. INT3bm = $08;
  982. INT4bm = $10;
  983. INT5bm = $20;
  984. INT6bm = $40;
  985. INT7bm = $80;
  986. // Inverted I/O Enable
  987. INVENbm = $80;
  988. // PORT_ISC
  989. ISCmask = $07;
  990. ISC_INTDISABLE = $00;
  991. ISC_BOTHEDGES = $01;
  992. ISC_RISING = $02;
  993. ISC_FALLING = $03;
  994. ISC_INPUT_DISABLE = $04;
  995. ISC_LEVEL = $05;
  996. // Pullup enable
  997. PULLUPENbm = $08;
  998. end;
  999. TPORTMUX = object //Port Multiplexer
  1000. CTRLA: byte; //Port Multiplexer Control A
  1001. CTRLB: byte; //Port Multiplexer Control B
  1002. CTRLC: byte; //Port Multiplexer Control C
  1003. CTRLD: byte; //Port Multiplexer Control D
  1004. const
  1005. // Event Output 0
  1006. EVOUT0bm = $01;
  1007. // Event Output 1
  1008. EVOUT1bm = $02;
  1009. // Event Output 2
  1010. EVOUT2bm = $04;
  1011. // PORTMUX_LUT0
  1012. LUT0mask = $10;
  1013. LUT0_DEFAULT = $00;
  1014. LUT0_ALTERNATE = $10;
  1015. // PORTMUX_LUT1
  1016. LUT1mask = $20;
  1017. LUT1_DEFAULT = $00;
  1018. LUT1_ALTERNATE = $20;
  1019. // PORTMUX_SPI0
  1020. SPI0mask = $04;
  1021. SPI0_DEFAULT = $00;
  1022. SPI0_ALTERNATE = $04;
  1023. // PORTMUX_TWI0
  1024. TWI0mask = $10;
  1025. TWI0_DEFAULT = $00;
  1026. TWI0_ALTERNATE = $10;
  1027. // PORTMUX_USART0
  1028. USART0mask = $01;
  1029. USART0_DEFAULT = $00;
  1030. USART0_ALTERNATE = $01;
  1031. // PORTMUX_TCA00
  1032. TCA00mask = $01;
  1033. TCA00_DEFAULT = $00;
  1034. TCA00_ALTERNATE = $01;
  1035. // PORTMUX_TCA01
  1036. TCA01mask = $02;
  1037. TCA01_DEFAULT = $00;
  1038. TCA01_ALTERNATE = $02;
  1039. // PORTMUX_TCA02
  1040. TCA02mask = $04;
  1041. TCA02_DEFAULT = $00;
  1042. TCA02_ALTERNATE = $04;
  1043. // PORTMUX_TCA03
  1044. TCA03mask = $08;
  1045. TCA03_DEFAULT = $00;
  1046. TCA03_ALTERNATE = $08;
  1047. // PORTMUX_TCA04
  1048. TCA04mask = $10;
  1049. TCA04_DEFAULT = $00;
  1050. TCA04_ALTERNATE = $10;
  1051. // PORTMUX_TCA05
  1052. TCA05mask = $20;
  1053. TCA05_DEFAULT = $00;
  1054. TCA05_ALTERNATE = $20;
  1055. // PORTMUX_TCB0
  1056. TCB0mask = $01;
  1057. TCB0_DEFAULT = $00;
  1058. TCB0_ALTERNATE = $01;
  1059. end;
  1060. TRSTCTRL = object //Reset controller
  1061. RSTFR: byte; //Reset Flags
  1062. SWRR: byte; //Software Reset
  1063. const
  1064. // Brown out detector Reset flag
  1065. BORFbm = $02;
  1066. // External Reset flag
  1067. EXTRFbm = $04;
  1068. // Power on Reset flag
  1069. PORFbm = $01;
  1070. // Software Reset flag
  1071. SWRFbm = $10;
  1072. // UPDI Reset flag
  1073. UPDIRFbm = $20;
  1074. // Watch dog Reset flag
  1075. WDRFbm = $08;
  1076. // Software reset enable
  1077. SWREbm = $01;
  1078. end;
  1079. TRTC = object //Real-Time Counter
  1080. CTRLA: byte; //Control A
  1081. STATUS: byte; //Status
  1082. INTCTRL: byte; //Interrupt Control
  1083. INTFLAGS: byte; //Interrupt Flags
  1084. TEMP: byte; //Temporary
  1085. DBGCTRL: byte; //Debug control
  1086. Reserved6: byte;
  1087. CLKSEL: byte; //Clock Select
  1088. CNT: word; //Counter
  1089. PER: word; //Period
  1090. CMP: word; //Compare
  1091. Reserved14: byte;
  1092. Reserved15: byte;
  1093. PITCTRLA: byte; //PIT Control A
  1094. PITSTATUS: byte; //PIT Status
  1095. PITINTCTRL: byte; //PIT Interrupt Control
  1096. PITINTFLAGS: byte; //PIT Interrupt Flags
  1097. Reserved20: byte;
  1098. PITDBGCTRL: byte; //PIT Debug control
  1099. const
  1100. // RTC_CLKSEL
  1101. CLKSELmask = $03;
  1102. CLKSEL_INT32K = $00;
  1103. CLKSEL_INT1K = $01;
  1104. CLKSEL_TOSC32K = $02;
  1105. CLKSEL_EXTCLK = $03;
  1106. // RTC_PRESCALER
  1107. PRESCALERmask = $78;
  1108. PRESCALER_DIV1 = $00;
  1109. PRESCALER_DIV2 = $08;
  1110. PRESCALER_DIV4 = $10;
  1111. PRESCALER_DIV8 = $18;
  1112. PRESCALER_DIV16 = $20;
  1113. PRESCALER_DIV32 = $28;
  1114. PRESCALER_DIV64 = $30;
  1115. PRESCALER_DIV128 = $38;
  1116. PRESCALER_DIV256 = $40;
  1117. PRESCALER_DIV512 = $48;
  1118. PRESCALER_DIV1024 = $50;
  1119. PRESCALER_DIV2048 = $58;
  1120. PRESCALER_DIV4096 = $60;
  1121. PRESCALER_DIV8192 = $68;
  1122. PRESCALER_DIV16384 = $70;
  1123. PRESCALER_DIV32768 = $78;
  1124. // Enable
  1125. RTCENbm = $01;
  1126. // Run In Standby
  1127. RUNSTDBYbm = $80;
  1128. // Run in debug
  1129. DBGRUNbm = $01;
  1130. // Compare Match Interrupt enable
  1131. CMPbm = $02;
  1132. // Overflow Interrupt enable
  1133. OVFbm = $01;
  1134. // RTC_PERIOD
  1135. PERIODmask = $78;
  1136. PERIOD_OFF = $00;
  1137. PERIOD_CYC4 = $08;
  1138. PERIOD_CYC8 = $10;
  1139. PERIOD_CYC16 = $18;
  1140. PERIOD_CYC32 = $20;
  1141. PERIOD_CYC64 = $28;
  1142. PERIOD_CYC128 = $30;
  1143. PERIOD_CYC256 = $38;
  1144. PERIOD_CYC512 = $40;
  1145. PERIOD_CYC1024 = $48;
  1146. PERIOD_CYC2048 = $50;
  1147. PERIOD_CYC4096 = $58;
  1148. PERIOD_CYC8192 = $60;
  1149. PERIOD_CYC16384 = $68;
  1150. PERIOD_CYC32768 = $70;
  1151. // Enable
  1152. PITENbm = $01;
  1153. // Periodic Interrupt
  1154. PIbm = $01;
  1155. // CTRLA Synchronization Busy Flag
  1156. CTRLBUSYbm = $01;
  1157. // Comparator Synchronization Busy Flag
  1158. CMPBUSYbm = $08;
  1159. // Count Synchronization Busy Flag
  1160. CNTBUSYbm = $02;
  1161. // CTRLA Synchronization Busy Flag
  1162. CTRLABUSYbm = $01;
  1163. // Period Synchronization Busy Flag
  1164. PERBUSYbm = $04;
  1165. end;
  1166. TSIGROW = object //Signature row
  1167. DEVICEID0: byte; //Device ID Byte 0
  1168. DEVICEID1: byte; //Device ID Byte 1
  1169. DEVICEID2: byte; //Device ID Byte 2
  1170. SERNUM0: byte; //Serial Number Byte 0
  1171. SERNUM1: byte; //Serial Number Byte 1
  1172. SERNUM2: byte; //Serial Number Byte 2
  1173. SERNUM3: byte; //Serial Number Byte 3
  1174. SERNUM4: byte; //Serial Number Byte 4
  1175. SERNUM5: byte; //Serial Number Byte 5
  1176. SERNUM6: byte; //Serial Number Byte 6
  1177. SERNUM7: byte; //Serial Number Byte 7
  1178. SERNUM8: byte; //Serial Number Byte 8
  1179. SERNUM9: byte; //Serial Number Byte 9
  1180. Reserved13: byte;
  1181. Reserved14: byte;
  1182. Reserved15: byte;
  1183. Reserved16: byte;
  1184. Reserved17: byte;
  1185. Reserved18: byte;
  1186. Reserved19: byte;
  1187. Reserved20: byte;
  1188. Reserved21: byte;
  1189. Reserved22: byte;
  1190. Reserved23: byte;
  1191. Reserved24: byte;
  1192. Reserved25: byte;
  1193. Reserved26: byte;
  1194. Reserved27: byte;
  1195. Reserved28: byte;
  1196. Reserved29: byte;
  1197. Reserved30: byte;
  1198. Reserved31: byte;
  1199. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  1200. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  1201. OSC16ERR3V: byte; //OSC16 error at 3V
  1202. OSC16ERR5V: byte; //OSC16 error at 5V
  1203. OSC20ERR3V: byte; //OSC20 error at 3V
  1204. OSC20ERR5V: byte; //OSC20 error at 5V
  1205. end;
  1206. TSLPCTRL = object //Sleep Controller
  1207. CTRLA: byte; //Control
  1208. const
  1209. // Sleep enable
  1210. SENbm = $01;
  1211. // SLPCTRL_SMODE
  1212. SMODEmask = $06;
  1213. SMODE_IDLE = $00;
  1214. SMODE_STDBY = $02;
  1215. SMODE_PDOWN = $04;
  1216. end;
  1217. TSPI = object //Serial Peripheral Interface
  1218. CTRLA: byte; //Control A
  1219. CTRLB: byte; //Control B
  1220. INTCTRL: byte; //Interrupt Control
  1221. INTFLAGS: byte; //Interrupt Flags
  1222. DATA: byte; //Data
  1223. const
  1224. // Enable Double Speed
  1225. CLK2Xbm = $10;
  1226. // Data Order Setting
  1227. DORDbm = $40;
  1228. // Enable Module
  1229. ENABLEbm = $01;
  1230. // Master Operation Enable
  1231. MASTERbm = $20;
  1232. // SPI_PRESC
  1233. PRESCmask = $06;
  1234. PRESC_DIV4 = $00;
  1235. PRESC_DIV16 = $02;
  1236. PRESC_DIV64 = $04;
  1237. PRESC_DIV128 = $06;
  1238. // Buffer Mode Enable
  1239. BUFENbm = $80;
  1240. // Buffer Write Mode
  1241. BUFWRbm = $40;
  1242. // SPI_MODE
  1243. MODEmask = $03;
  1244. MODE_0 = $00;
  1245. MODE_1 = $01;
  1246. MODE_2 = $02;
  1247. MODE_3 = $03;
  1248. // Slave Select Disable
  1249. SSDbm = $04;
  1250. // Data Register Empty Interrupt Enable
  1251. DREIEbm = $20;
  1252. // Interrupt Enable
  1253. IEbm = $01;
  1254. // Receive Complete Interrupt Enable
  1255. RXCIEbm = $80;
  1256. // Slave Select Trigger Interrupt Enable
  1257. SSIEbm = $10;
  1258. // Transfer Complete Interrupt Enable
  1259. TXCIEbm = $40;
  1260. // Buffer Overflow
  1261. BUFOVFbm = $01;
  1262. // Data Register Empty Interrupt Flag
  1263. DREIFbm = $20;
  1264. // Receive Complete Interrupt Flag
  1265. RXCIFbm = $80;
  1266. // Slave Select Trigger Interrupt Flag
  1267. SSIFbm = $10;
  1268. // Transfer Complete Interrupt Flag
  1269. TXCIFbm = $40;
  1270. // Interrupt Flag
  1271. IFbm = $80;
  1272. // Write Collision
  1273. WRCOLbm = $40;
  1274. end;
  1275. TSYSCFG = object //System Configuration Registers
  1276. Reserved0: byte;
  1277. REVID: byte; //Revision ID
  1278. EXTBRK: byte; //External Break
  1279. const
  1280. // External break enable
  1281. ENEXTBRKbm = $01;
  1282. end;
  1283. TTCA_SINGLE = object //16-bit Timer/Counter Type A - Single Mode
  1284. CTRLA: byte; //Control A
  1285. CTRLB: byte; //Control B
  1286. CTRLC: byte; //Control C
  1287. CTRLD: byte; //Control D
  1288. CTRLECLR: byte; //Control E Clear
  1289. CTRLESET: byte; //Control E Set
  1290. CTRLFCLR: byte; //Control F Clear
  1291. CTRLFSET: byte; //Control F Set
  1292. Reserved8: byte;
  1293. EVCTRL: byte; //Event Control
  1294. INTCTRL: byte; //Interrupt Control
  1295. INTFLAGS: byte; //Interrupt Flags
  1296. Reserved12: byte;
  1297. Reserved13: byte;
  1298. DBGCTRL: byte; //Degbug Control
  1299. TEMP: byte; //Temporary data for 16-bit Access
  1300. Reserved16: byte;
  1301. Reserved17: byte;
  1302. Reserved18: byte;
  1303. Reserved19: byte;
  1304. Reserved20: byte;
  1305. Reserved21: byte;
  1306. Reserved22: byte;
  1307. Reserved23: byte;
  1308. Reserved24: byte;
  1309. Reserved25: byte;
  1310. Reserved26: byte;
  1311. Reserved27: byte;
  1312. Reserved28: byte;
  1313. Reserved29: byte;
  1314. Reserved30: byte;
  1315. Reserved31: byte;
  1316. CNT: word; //Count
  1317. Reserved34: byte;
  1318. Reserved35: byte;
  1319. Reserved36: byte;
  1320. Reserved37: byte;
  1321. PER: word; //Period
  1322. CMP0: word; //Compare 0
  1323. CMP1: word; //Compare 1
  1324. CMP2: word; //Compare 2
  1325. Reserved46: byte;
  1326. Reserved47: byte;
  1327. Reserved48: byte;
  1328. Reserved49: byte;
  1329. Reserved50: byte;
  1330. Reserved51: byte;
  1331. Reserved52: byte;
  1332. Reserved53: byte;
  1333. PERBUF: word; //Period Buffer
  1334. CMP0BUF: word; //Compare 0 Buffer
  1335. CMP1BUF: word; //Compare 1 Buffer
  1336. CMP2BUF: word; //Compare 2 Buffer
  1337. const
  1338. // TCA_SINGLE_CLKSEL
  1339. SINGLE_CLKSELmask = $0E;
  1340. SINGLE_CLKSEL_DIV1 = $00;
  1341. SINGLE_CLKSEL_DIV2 = $02;
  1342. SINGLE_CLKSEL_DIV4 = $04;
  1343. SINGLE_CLKSEL_DIV8 = $06;
  1344. SINGLE_CLKSEL_DIV16 = $08;
  1345. SINGLE_CLKSEL_DIV64 = $0A;
  1346. SINGLE_CLKSEL_DIV256 = $0C;
  1347. SINGLE_CLKSEL_DIV1024 = $0E;
  1348. // Module Enable
  1349. ENABLEbm = $01;
  1350. // Auto Lock Update
  1351. ALUPDbm = $08;
  1352. // Compare 0 Enable
  1353. CMP0ENbm = $10;
  1354. // Compare 1 Enable
  1355. CMP1ENbm = $20;
  1356. // Compare 2 Enable
  1357. CMP2ENbm = $40;
  1358. // TCA_SINGLE_WGMODE
  1359. SINGLE_WGMODEmask = $07;
  1360. SINGLE_WGMODE_NORMAL = $00;
  1361. SINGLE_WGMODE_FRQ = $01;
  1362. SINGLE_WGMODE_SINGLESLOPE = $03;
  1363. SINGLE_WGMODE_DSTOP = $05;
  1364. SINGLE_WGMODE_DSBOTH = $06;
  1365. SINGLE_WGMODE_DSBOTTOM = $07;
  1366. // Compare 0 Waveform Output Value
  1367. CMP0OVbm = $01;
  1368. // Compare 1 Waveform Output Value
  1369. CMP1OVbm = $02;
  1370. // Compare 2 Waveform Output Value
  1371. CMP2OVbm = $04;
  1372. // Split Mode Enable
  1373. SPLITMbm = $01;
  1374. // TCA_SINGLE_CMD
  1375. SINGLE_CMDmask = $0C;
  1376. SINGLE_CMD_NONE = $00;
  1377. SINGLE_CMD_UPDATE = $04;
  1378. SINGLE_CMD_RESTART = $08;
  1379. SINGLE_CMD_RESET = $0C;
  1380. // Direction
  1381. DIRbm = $01;
  1382. // Lock Update
  1383. LUPDbm = $02;
  1384. // Compare 0 Buffer Valid
  1385. CMP0BVbm = $02;
  1386. // Compare 1 Buffer Valid
  1387. CMP1BVbm = $04;
  1388. // Compare 2 Buffer Valid
  1389. CMP2BVbm = $08;
  1390. // Period Buffer Valid
  1391. PERBVbm = $01;
  1392. // Debug Run
  1393. DBGRUNbm = $01;
  1394. // Count on Event Input
  1395. CNTEIbm = $01;
  1396. // TCA_SINGLE_EVACT
  1397. SINGLE_EVACTmask = $06;
  1398. SINGLE_EVACT_POSEDGE = $00;
  1399. SINGLE_EVACT_ANYEDGE = $02;
  1400. SINGLE_EVACT_HIGHLVL = $04;
  1401. SINGLE_EVACT_UPDOWN = $06;
  1402. // Compare 0 Interrupt
  1403. CMP0bm = $10;
  1404. // Compare 1 Interrupt
  1405. CMP1bm = $20;
  1406. // Compare 2 Interrupt
  1407. CMP2bm = $40;
  1408. // Overflow Interrupt
  1409. OVFbm = $01;
  1410. end;
  1411. TTCA_SPLIT = object //16-bit Timer/Counter Type A - Split Mode
  1412. CTRLA: byte; //Control A
  1413. CTRLB: byte; //Control B
  1414. CTRLC: byte; //Control C
  1415. CTRLD: byte; //Control D
  1416. CTRLECLR: byte; //Control E Clear
  1417. CTRLESET: byte; //Control E Set
  1418. Reserved6: byte;
  1419. Reserved7: byte;
  1420. Reserved8: byte;
  1421. Reserved9: byte;
  1422. INTCTRL: byte; //Interrupt Control
  1423. INTFLAGS: byte; //Interrupt Flags
  1424. Reserved12: byte;
  1425. Reserved13: byte;
  1426. DBGCTRL: byte; //Degbug Control
  1427. Reserved15: byte;
  1428. Reserved16: byte;
  1429. Reserved17: byte;
  1430. Reserved18: byte;
  1431. Reserved19: byte;
  1432. Reserved20: byte;
  1433. Reserved21: byte;
  1434. Reserved22: byte;
  1435. Reserved23: byte;
  1436. Reserved24: byte;
  1437. Reserved25: byte;
  1438. Reserved26: byte;
  1439. Reserved27: byte;
  1440. Reserved28: byte;
  1441. Reserved29: byte;
  1442. Reserved30: byte;
  1443. Reserved31: byte;
  1444. LCNT: byte; //Low Count
  1445. HCNT: byte; //High Count
  1446. Reserved34: byte;
  1447. Reserved35: byte;
  1448. Reserved36: byte;
  1449. Reserved37: byte;
  1450. LPER: byte; //Low Period
  1451. HPER: byte; //High Period
  1452. LCMP0: byte; //Low Compare
  1453. HCMP0: byte; //High Compare
  1454. LCMP1: byte; //Low Compare
  1455. HCMP1: byte; //High Compare
  1456. LCMP2: byte; //Low Compare
  1457. HCMP2: byte; //High Compare
  1458. const
  1459. // TCA_SPLIT_CLKSEL
  1460. SPLIT_CLKSELmask = $0E;
  1461. SPLIT_CLKSEL_DIV1 = $00;
  1462. SPLIT_CLKSEL_DIV2 = $02;
  1463. SPLIT_CLKSEL_DIV4 = $04;
  1464. SPLIT_CLKSEL_DIV8 = $06;
  1465. SPLIT_CLKSEL_DIV16 = $08;
  1466. SPLIT_CLKSEL_DIV64 = $0A;
  1467. SPLIT_CLKSEL_DIV256 = $0C;
  1468. SPLIT_CLKSEL_DIV1024 = $0E;
  1469. // Module Enable
  1470. ENABLEbm = $01;
  1471. // High Compare 0 Enable
  1472. HCMP0ENbm = $10;
  1473. // High Compare 1 Enable
  1474. HCMP1ENbm = $20;
  1475. // High Compare 2 Enable
  1476. HCMP2ENbm = $40;
  1477. // Low Compare 0 Enable
  1478. LCMP0ENbm = $01;
  1479. // Low Compare 1 Enable
  1480. LCMP1ENbm = $02;
  1481. // Low Compare 2 Enable
  1482. LCMP2ENbm = $04;
  1483. // High Compare 0 Output Value
  1484. HCMP0OVbm = $10;
  1485. // High Compare 1 Output Value
  1486. HCMP1OVbm = $20;
  1487. // High Compare 2 Output Value
  1488. HCMP2OVbm = $40;
  1489. // Low Compare 0 Output Value
  1490. LCMP0OVbm = $01;
  1491. // Low Compare 1 Output Value
  1492. LCMP1OVbm = $02;
  1493. // Low Compare 2 Output Value
  1494. LCMP2OVbm = $04;
  1495. // Split Mode Enable
  1496. SPLITMbm = $01;
  1497. // TCA_SPLIT_CMD
  1498. SPLIT_CMDmask = $0C;
  1499. SPLIT_CMD_NONE = $00;
  1500. SPLIT_CMD_UPDATE = $04;
  1501. SPLIT_CMD_RESTART = $08;
  1502. SPLIT_CMD_RESET = $0C;
  1503. // Debug Run
  1504. DBGRUNbm = $01;
  1505. // High Underflow Interrupt Enable
  1506. HUNFbm = $02;
  1507. // Low Compare 0 Interrupt Enable
  1508. LCMP0bm = $10;
  1509. // Low Compare 1 Interrupt Enable
  1510. LCMP1bm = $20;
  1511. // Low Compare 2 Interrupt Enable
  1512. LCMP2bm = $40;
  1513. // Low Underflow Interrupt Enable
  1514. LUNFbm = $01;
  1515. end;
  1516. TTCA = record //16-bit Timer/Counter Type A
  1517. case byte of
  1518. 0: (SINGLE: TTCA_SINGLE);
  1519. 1: (SPLIT: TTCA_SPLIT);
  1520. end;
  1521. TTCB = object //16-bit Timer Type B
  1522. CTRLA: byte; //Control A
  1523. CTRLB: byte; //Control Register B
  1524. Reserved2: byte;
  1525. Reserved3: byte;
  1526. EVCTRL: byte; //Event Control
  1527. INTCTRL: byte; //Interrupt Control
  1528. INTFLAGS: byte; //Interrupt Flags
  1529. STATUS: byte; //Status
  1530. DBGCTRL: byte; //Debug Control
  1531. TEMP: byte; //Temporary Value
  1532. CNT: word; //Count
  1533. CCMP: word; //Compare or Capture
  1534. const
  1535. // TCB_CLKSEL
  1536. CLKSELmask = $06;
  1537. CLKSEL_CLKDIV1 = $00;
  1538. CLKSEL_CLKDIV2 = $02;
  1539. CLKSEL_CLKTCA = $04;
  1540. // Enable
  1541. ENABLEbm = $01;
  1542. // Run Standby
  1543. RUNSTDBYbm = $40;
  1544. // Synchronize Update
  1545. SYNCUPDbm = $10;
  1546. // Asynchronous Enable
  1547. ASYNCbm = $40;
  1548. // Pin Output Enable
  1549. CCMPENbm = $10;
  1550. // Pin Initial State
  1551. CCMPINITbm = $20;
  1552. // TCB_CNTMODE
  1553. CNTMODEmask = $07;
  1554. CNTMODE_INT = $00;
  1555. CNTMODE_TIMEOUT = $01;
  1556. CNTMODE_CAPT = $02;
  1557. CNTMODE_FRQ = $03;
  1558. CNTMODE_PW = $04;
  1559. CNTMODE_FRQPW = $05;
  1560. CNTMODE_SINGLE = $06;
  1561. CNTMODE_PWM8 = $07;
  1562. // Debug Run
  1563. DBGRUNbm = $01;
  1564. // Event Input Enable
  1565. CAPTEIbm = $01;
  1566. // Event Edge
  1567. EDGEbm = $10;
  1568. // Input Capture Noise Cancellation Filter
  1569. FILTERbm = $40;
  1570. // Capture or Timeout
  1571. CAPTbm = $01;
  1572. // Run
  1573. RUNbm = $01;
  1574. end;
  1575. TTCD = object //Timer Counter D
  1576. CTRLA: byte; //Control A
  1577. CTRLB: byte; //Control B
  1578. CTRLC: byte; //Control C
  1579. CTRLD: byte; //Control D
  1580. CTRLE: byte; //Control E
  1581. Reserved5: byte;
  1582. Reserved6: byte;
  1583. Reserved7: byte;
  1584. EVCTRLA: byte; //EVCTRLA
  1585. EVCTRLB: byte; //EVCTRLB
  1586. Reserved10: byte;
  1587. Reserved11: byte;
  1588. INTCTRL: byte; //Interrupt Control
  1589. INTFLAGS: byte; //Interrupt Flags
  1590. STATUS: byte; //Status
  1591. Reserved15: byte;
  1592. INPUTCTRLA: byte; //Input Control A
  1593. INPUTCTRLB: byte; //Input Control B
  1594. FAULTCTRL: byte; //Fault Control
  1595. Reserved19: byte;
  1596. DLYCTRL: byte; //Delay Control
  1597. DLYVAL: byte; //Delay value
  1598. Reserved22: byte;
  1599. Reserved23: byte;
  1600. DITCTRL: byte; //Dither Control A
  1601. DITVAL: byte; //Dither value
  1602. Reserved26: byte;
  1603. Reserved27: byte;
  1604. Reserved28: byte;
  1605. Reserved29: byte;
  1606. DBGCTRL: byte; //Debug Control
  1607. Reserved31: byte;
  1608. Reserved32: byte;
  1609. Reserved33: byte;
  1610. CAPTUREA: word; //Capture A
  1611. CAPTUREB: word; //Capture B
  1612. Reserved38: byte;
  1613. Reserved39: byte;
  1614. CMPASET: word; //Compare A Set
  1615. CMPACLR: word; //Compare A Clear
  1616. CMPBSET: word; //Compare B Set
  1617. CMPBCLR: word; //Compare B Clear
  1618. const
  1619. // TCD_CLKSEL
  1620. CLKSELmask = $60;
  1621. CLKSEL_20MHZ = $00;
  1622. CLKSEL_EXTCLK = $40;
  1623. CLKSEL_SYSCLK = $60;
  1624. // TCD_CNTPRES
  1625. CNTPRESmask = $18;
  1626. CNTPRES_DIV1 = $00;
  1627. CNTPRES_DIV4 = $08;
  1628. CNTPRES_DIV32 = $10;
  1629. // Enable
  1630. ENABLEbm = $01;
  1631. // TCD_SYNCPRES
  1632. SYNCPRESmask = $06;
  1633. SYNCPRES_DIV1 = $00;
  1634. SYNCPRES_DIV2 = $02;
  1635. SYNCPRES_DIV4 = $04;
  1636. SYNCPRES_DIV8 = $06;
  1637. // TCD_WGMODE
  1638. WGMODEmask = $03;
  1639. WGMODE_ONERAMP = $00;
  1640. WGMODE_TWORAMP = $01;
  1641. WGMODE_FOURRAMP = $02;
  1642. WGMODE_DS = $03;
  1643. // Auto update
  1644. AUPDATEbm = $02;
  1645. // TCD_CMPCSEL
  1646. CMPCSELmask = $40;
  1647. CMPCSEL_PWMA = $00;
  1648. CMPCSEL_PWMB = $40;
  1649. // TCD_CMPDSEL
  1650. CMPDSELmask = $80;
  1651. CMPDSEL_PWMA = $00;
  1652. CMPDSEL_PWMB = $80;
  1653. // Compare output value override
  1654. CMPOVRbm = $01;
  1655. // Fifty percent waveform
  1656. FIFTYbm = $08;
  1657. // Compare A value
  1658. CMPAVAL0bm = $01;
  1659. CMPAVAL1bm = $02;
  1660. CMPAVAL2bm = $04;
  1661. CMPAVAL3bm = $08;
  1662. // Compare B value
  1663. CMPBVAL0bm = $10;
  1664. CMPBVAL1bm = $20;
  1665. CMPBVAL2bm = $40;
  1666. CMPBVAL3bm = $80;
  1667. // Disable at end of cycle
  1668. DISEOCbm = $80;
  1669. // Restart strobe
  1670. RESTARTbm = $04;
  1671. // Software Capture A Strobe
  1672. SCAPTUREAbm = $08;
  1673. // Software Capture B Strobe
  1674. SCAPTUREBbm = $10;
  1675. // synchronize strobe
  1676. SYNCbm = $02;
  1677. // synchronize end of cycle strobe
  1678. SYNCEOCbm = $01;
  1679. // Debug run
  1680. DBGRUNbm = $01;
  1681. // Fault detection
  1682. FAULTDETbm = $04;
  1683. // TCD_DITHERSEL
  1684. DITHERSELmask = $03;
  1685. DITHERSEL_ONTIMEB = $00;
  1686. DITHERSEL_ONTIMEAB = $01;
  1687. DITHERSEL_DEADTIMEB = $02;
  1688. DITHERSEL_DEADTIMEAB = $03;
  1689. // Dither value
  1690. DITHER0bm = $01;
  1691. DITHER1bm = $02;
  1692. DITHER2bm = $04;
  1693. DITHER3bm = $08;
  1694. // TCD_DLYPRESC
  1695. DLYPRESCmask = $30;
  1696. DLYPRESC_DIV1 = $00;
  1697. DLYPRESC_DIV2 = $10;
  1698. DLYPRESC_DIV4 = $20;
  1699. DLYPRESC_DIV8 = $30;
  1700. // TCD_DLYSEL
  1701. DLYSELmask = $03;
  1702. DLYSEL_OFF = $00;
  1703. DLYSEL_INBLANK = $01;
  1704. DLYSEL_EVENT = $02;
  1705. // TCD_DLYTRIG
  1706. DLYTRIGmask = $0C;
  1707. DLYTRIG_CMPASET = $00;
  1708. DLYTRIG_CMPACLR = $04;
  1709. DLYTRIG_CMPBSET = $08;
  1710. DLYTRIG_CMPBCLR = $0C;
  1711. // Delay value
  1712. DLYVAL0bm = $01;
  1713. DLYVAL1bm = $02;
  1714. DLYVAL2bm = $04;
  1715. DLYVAL3bm = $08;
  1716. DLYVAL4bm = $10;
  1717. DLYVAL5bm = $20;
  1718. DLYVAL6bm = $40;
  1719. DLYVAL7bm = $80;
  1720. // TCD_ACTION
  1721. ACTIONmask = $04;
  1722. ACTION_FAULT = $00;
  1723. ACTION_CAPTURE = $04;
  1724. // TCD_CFG
  1725. CFGmask = $C0;
  1726. CFG_NEITHER = $00;
  1727. CFG_FILTER = $40;
  1728. CFG_ASYNC = $80;
  1729. // TCD_EDGE
  1730. EDGEmask = $10;
  1731. EDGE_FALL_LOW = $00;
  1732. EDGE_RISE_HIGH = $10;
  1733. // Trigger event enable
  1734. TRIGEIbm = $01;
  1735. // Compare A value
  1736. CMPAbm = $01;
  1737. // Compare A enable
  1738. CMPAENbm = $10;
  1739. // Compare B value
  1740. CMPBbm = $02;
  1741. // Compare B enable
  1742. CMPBENbm = $20;
  1743. // Compare C value
  1744. CMPCbm = $04;
  1745. // Compare C enable
  1746. CMPCENbm = $40;
  1747. // Compare D vaule
  1748. CMPDbm = $08;
  1749. // Compare D enable
  1750. CMPDENbm = $80;
  1751. // TCD_INPUTMODE
  1752. INPUTMODEmask = $0F;
  1753. INPUTMODE_NONE = $00;
  1754. INPUTMODE_JMPWAIT = $01;
  1755. INPUTMODE_EXECWAIT = $02;
  1756. INPUTMODE_EXECFAULT = $03;
  1757. INPUTMODE_FREQ = $04;
  1758. INPUTMODE_EXECDT = $05;
  1759. INPUTMODE_WAIT = $06;
  1760. INPUTMODE_WAITSW = $07;
  1761. INPUTMODE_EDGETRIG = $08;
  1762. INPUTMODE_EDGETRIGFREQ = $09;
  1763. INPUTMODE_LVLTRIGFREQ = $0A;
  1764. // Overflow interrupt enable
  1765. OVFbm = $01;
  1766. // Trigger A interrupt enable
  1767. TRIGAbm = $04;
  1768. // Trigger B interrupt enable
  1769. TRIGBbm = $08;
  1770. // Command ready
  1771. CMDRDYbm = $02;
  1772. // Enable ready
  1773. ENRDYbm = $01;
  1774. // PWM activity on A
  1775. PWMACTAbm = $40;
  1776. // PWM activity on B
  1777. PWMACTBbm = $80;
  1778. end;
  1779. TTWI = object //Two-Wire Interface
  1780. CTRLA: byte; //Control A
  1781. Reserved1: byte;
  1782. DBGCTRL: byte; //Debug Control Register
  1783. MCTRLA: byte; //Master Control A
  1784. MCTRLB: byte; //Master Control B
  1785. MSTATUS: byte; //Master Status
  1786. MBAUD: byte; //Master Baurd Rate Control
  1787. MADDR: byte; //Master Address
  1788. MDATA: byte; //Master Data
  1789. SCTRLA: byte; //Slave Control A
  1790. SCTRLB: byte; //Slave Control B
  1791. SSTATUS: byte; //Slave Status
  1792. SADDR: byte; //Slave Address
  1793. SDATA: byte; //Slave Data
  1794. SADDRMASK: byte; //Slave Address Mask
  1795. const
  1796. // FM Plus Enable
  1797. FMPENbm = $02;
  1798. // TWI_SDAHOLD
  1799. SDAHOLDmask = $0C;
  1800. SDAHOLD_OFF = $00;
  1801. SDAHOLD_50NS = $04;
  1802. SDAHOLD_300NS = $08;
  1803. SDAHOLD_500NS = $0C;
  1804. // TWI_SDASETUP
  1805. SDASETUPmask = $10;
  1806. SDASETUP_4CYC = $00;
  1807. SDASETUP_8CYC = $10;
  1808. // Debug Run
  1809. DBGRUNbm = $01;
  1810. // Enable TWI Master
  1811. ENABLEbm = $01;
  1812. // Quick Command Enable
  1813. QCENbm = $10;
  1814. // Read Interrupt Enable
  1815. RIENbm = $80;
  1816. // Smart Mode Enable
  1817. SMENbm = $02;
  1818. // TWI_TIMEOUT
  1819. TIMEOUTmask = $0C;
  1820. TIMEOUT_DISABLED = $00;
  1821. TIMEOUT_50US = $04;
  1822. TIMEOUT_100US = $08;
  1823. TIMEOUT_200US = $0C;
  1824. // Write Interrupt Enable
  1825. WIENbm = $40;
  1826. // TWI_ACKACT
  1827. ACKACTmask = $04;
  1828. ACKACT_ACK = $00;
  1829. ACKACT_NACK = $04;
  1830. // Flush
  1831. FLUSHbm = $08;
  1832. // TWI_MCMD
  1833. MCMDmask = $03;
  1834. MCMD_NOACT = $00;
  1835. MCMD_REPSTART = $01;
  1836. MCMD_RECVTRANS = $02;
  1837. MCMD_STOP = $03;
  1838. // Arbitration Lost
  1839. ARBLOSTbm = $08;
  1840. // Bus Error
  1841. BUSERRbm = $04;
  1842. // TWI_BUSSTATE
  1843. BUSSTATEmask = $03;
  1844. BUSSTATE_UNKNOWN = $00;
  1845. BUSSTATE_IDLE = $01;
  1846. BUSSTATE_OWNER = $02;
  1847. BUSSTATE_BUSY = $03;
  1848. // Clock Hold
  1849. CLKHOLDbm = $20;
  1850. // Read Interrupt Flag
  1851. RIFbm = $80;
  1852. // Received Acknowledge
  1853. RXACKbm = $10;
  1854. // Write Interrupt Flag
  1855. WIFbm = $40;
  1856. // Address Enable
  1857. ADDRENbm = $01;
  1858. // Address Mask
  1859. ADDRMASK0bm = $02;
  1860. ADDRMASK1bm = $04;
  1861. ADDRMASK2bm = $08;
  1862. ADDRMASK3bm = $10;
  1863. ADDRMASK4bm = $20;
  1864. ADDRMASK5bm = $40;
  1865. ADDRMASK6bm = $80;
  1866. // Address/Stop Interrupt Enable
  1867. APIENbm = $40;
  1868. // Data Interrupt Enable
  1869. DIENbm = $80;
  1870. // Stop Interrupt Enable
  1871. PIENbm = $20;
  1872. // Promiscuous Mode Enable
  1873. PMENbm = $04;
  1874. // TWI_SCMD
  1875. SCMDmask = $03;
  1876. SCMD_NOACT = $00;
  1877. SCMD_COMPTRANS = $02;
  1878. SCMD_RESPONSE = $03;
  1879. // TWI_AP
  1880. APmask = $01;
  1881. AP_STOP = $00;
  1882. AP_ADR = $01;
  1883. // Address/Stop Interrupt Flag
  1884. APIFbm = $40;
  1885. // Collision
  1886. COLLbm = $08;
  1887. // Data Interrupt Flag
  1888. DIFbm = $80;
  1889. // Read/Write Direction
  1890. DIRbm = $02;
  1891. end;
  1892. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1893. RXDATAL: byte; //Receive Data Low Byte
  1894. RXDATAH: byte; //Receive Data High Byte
  1895. TXDATAL: byte; //Transmit Data Low Byte
  1896. TXDATAH: byte; //Transmit Data High Byte
  1897. STATUS: byte; //Status
  1898. CTRLA: byte; //Control A
  1899. CTRLB: byte; //Control B
  1900. CTRLC: byte; //Control C
  1901. BAUD: word; //Baud Rate
  1902. Reserved10: byte;
  1903. DBGCTRL: byte; //Debug Control
  1904. EVCTRL: byte; //Event Control
  1905. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1906. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1907. const
  1908. // Auto-baud Error Interrupt Enable
  1909. ABEIEbm = $04;
  1910. // Data Register Empty Interrupt Enable
  1911. DREIEbm = $20;
  1912. // Loop-back Mode Enable
  1913. LBMEbm = $08;
  1914. // USART_RS485
  1915. RS485mask = $03;
  1916. RS485_OFF = $00;
  1917. RS485_EXT = $01;
  1918. RS485_INT = $02;
  1919. // Receive Complete Interrupt Enable
  1920. RXCIEbm = $80;
  1921. // Receiver Start Frame Interrupt Enable
  1922. RXSIEbm = $10;
  1923. // Transmit Complete Interrupt Enable
  1924. TXCIEbm = $40;
  1925. // Multi-processor Communication Mode
  1926. MPCMbm = $01;
  1927. // Open Drain Mode Enable
  1928. ODMEbm = $08;
  1929. // Reciever enable
  1930. RXENbm = $80;
  1931. // USART_RXMODE
  1932. RXMODEmask = $06;
  1933. RXMODE_NORMAL = $00;
  1934. RXMODE_CLK2X = $02;
  1935. RXMODE_GENAUTO = $04;
  1936. RXMODE_LINAUTO = $06;
  1937. // Start Frame Detection Enable
  1938. SFDENbm = $10;
  1939. // Transmitter Enable
  1940. TXENbm = $40;
  1941. // USART_MSPI_CMODE
  1942. MSPI_CMODEmask = $C0;
  1943. MSPI_CMODE_ASYNCHRONOUS = $00;
  1944. MSPI_CMODE_SYNCHRONOUS = $40;
  1945. MSPI_CMODE_IRCOM = $80;
  1946. MSPI_CMODE_MSPI = $C0;
  1947. // SPI Master Mode, Clock Phase
  1948. UCPHAbm = $02;
  1949. // SPI Master Mode, Data Order
  1950. UDORDbm = $04;
  1951. // USART_NORMAL_CHSIZE
  1952. NORMAL_CHSIZEmask = $07;
  1953. NORMAL_CHSIZE_5BIT = $00;
  1954. NORMAL_CHSIZE_6BIT = $01;
  1955. NORMAL_CHSIZE_7BIT = $02;
  1956. NORMAL_CHSIZE_8BIT = $03;
  1957. NORMAL_CHSIZE_9BITL = $06;
  1958. NORMAL_CHSIZE_9BITH = $07;
  1959. // USART_NORMAL_CMODE
  1960. NORMAL_CMODEmask = $C0;
  1961. NORMAL_CMODE_ASYNCHRONOUS = $00;
  1962. NORMAL_CMODE_SYNCHRONOUS = $40;
  1963. NORMAL_CMODE_IRCOM = $80;
  1964. NORMAL_CMODE_MSPI = $C0;
  1965. // USART_NORMAL_PMODE
  1966. NORMAL_PMODEmask = $30;
  1967. NORMAL_PMODE_DISABLED = $00;
  1968. NORMAL_PMODE_EVEN = $20;
  1969. NORMAL_PMODE_ODD = $30;
  1970. // USART_NORMAL_SBMODE
  1971. NORMAL_SBMODEmask = $08;
  1972. NORMAL_SBMODE_1BIT = $00;
  1973. NORMAL_SBMODE_2BIT = $08;
  1974. // Autobaud majority voter bypass
  1975. ABMBPbm = $80;
  1976. // Debug Run
  1977. DBGRUNbm = $01;
  1978. // IrDA Event Input Enable
  1979. IREIbm = $01;
  1980. // Buffer Overflow
  1981. BUFOVFbm = $40;
  1982. // Receiver Data Register
  1983. DATA8bm = $01;
  1984. // Frame Error
  1985. FERRbm = $04;
  1986. // Parity Error
  1987. PERRbm = $02;
  1988. // Receive Complete Interrupt Flag
  1989. RXCIFbm = $80;
  1990. // RX Data
  1991. DATA0bm = $01;
  1992. DATA1bm = $02;
  1993. DATA2bm = $04;
  1994. DATA3bm = $08;
  1995. DATA4bm = $10;
  1996. DATA5bm = $20;
  1997. DATA6bm = $40;
  1998. DATA7bm = $80;
  1999. // Receiver Pulse Lenght
  2000. RXPL0bm = $01;
  2001. RXPL1bm = $02;
  2002. RXPL2bm = $04;
  2003. RXPL3bm = $08;
  2004. RXPL4bm = $10;
  2005. RXPL5bm = $20;
  2006. RXPL6bm = $40;
  2007. // Break Detected Flag
  2008. BDFbm = $02;
  2009. // Data Register Empty Flag
  2010. DREIFbm = $20;
  2011. // Inconsistent Sync Field Interrupt Flag
  2012. ISFIFbm = $08;
  2013. // Receive Start Interrupt
  2014. RXSIFbm = $10;
  2015. // Transmit Interrupt Flag
  2016. TXCIFbm = $40;
  2017. // Wait For Break
  2018. WFBbm = $01;
  2019. // Transmit pulse length
  2020. TXPL0bm = $01;
  2021. TXPL1bm = $02;
  2022. TXPL2bm = $04;
  2023. TXPL3bm = $08;
  2024. TXPL4bm = $10;
  2025. TXPL5bm = $20;
  2026. TXPL6bm = $40;
  2027. TXPL7bm = $80;
  2028. end;
  2029. TUSERROW = object //User Row
  2030. USERROW0: byte; //User Row Byte 0
  2031. USERROW1: byte; //User Row Byte 1
  2032. USERROW2: byte; //User Row Byte 2
  2033. USERROW3: byte; //User Row Byte 3
  2034. USERROW4: byte; //User Row Byte 4
  2035. USERROW5: byte; //User Row Byte 5
  2036. USERROW6: byte; //User Row Byte 6
  2037. USERROW7: byte; //User Row Byte 7
  2038. USERROW8: byte; //User Row Byte 8
  2039. USERROW9: byte; //User Row Byte 9
  2040. USERROW10: byte; //User Row Byte 10
  2041. USERROW11: byte; //User Row Byte 11
  2042. USERROW12: byte; //User Row Byte 12
  2043. USERROW13: byte; //User Row Byte 13
  2044. USERROW14: byte; //User Row Byte 14
  2045. USERROW15: byte; //User Row Byte 15
  2046. USERROW16: byte; //User Row Byte 16
  2047. USERROW17: byte; //User Row Byte 17
  2048. USERROW18: byte; //User Row Byte 18
  2049. USERROW19: byte; //User Row Byte 19
  2050. USERROW20: byte; //User Row Byte 20
  2051. USERROW21: byte; //User Row Byte 21
  2052. USERROW22: byte; //User Row Byte 22
  2053. USERROW23: byte; //User Row Byte 23
  2054. USERROW24: byte; //User Row Byte 24
  2055. USERROW25: byte; //User Row Byte 25
  2056. USERROW26: byte; //User Row Byte 26
  2057. USERROW27: byte; //User Row Byte 27
  2058. USERROW28: byte; //User Row Byte 28
  2059. USERROW29: byte; //User Row Byte 29
  2060. USERROW30: byte; //User Row Byte 30
  2061. USERROW31: byte; //User Row Byte 31
  2062. end;
  2063. TVPORT = object //Virtual Ports
  2064. DIR: byte; //Data Direction
  2065. OUT_: byte; //Output Value
  2066. IN_: byte; //Input Value
  2067. INTFLAGS: byte; //Interrupt Flags
  2068. const
  2069. // Pin Interrupt
  2070. INT0bm = $01;
  2071. INT1bm = $02;
  2072. INT2bm = $04;
  2073. INT3bm = $08;
  2074. INT4bm = $10;
  2075. INT5bm = $20;
  2076. INT6bm = $40;
  2077. INT7bm = $80;
  2078. end;
  2079. TVREF = object //Voltage reference
  2080. CTRLA: byte; //Control A
  2081. CTRLB: byte; //Control B
  2082. const
  2083. // VREF_ADC0REFSEL
  2084. ADC0REFSELmask = $70;
  2085. ADC0REFSEL_0V55 = $00;
  2086. ADC0REFSEL_1V1 = $10;
  2087. ADC0REFSEL_2V5 = $20;
  2088. ADC0REFSEL_4V34 = $30;
  2089. ADC0REFSEL_1V5 = $40;
  2090. // VREF_DAC0REFSEL
  2091. DAC0REFSELmask = $07;
  2092. DAC0REFSEL_0V55 = $00;
  2093. DAC0REFSEL_1V1 = $01;
  2094. DAC0REFSEL_2V5 = $02;
  2095. DAC0REFSEL_4V34 = $03;
  2096. DAC0REFSEL_1V5 = $04;
  2097. // ADC0 reference enable
  2098. ADC0REFENbm = $02;
  2099. // DAC0/AC0 reference enable
  2100. DAC0REFENbm = $01;
  2101. end;
  2102. TWDT = object //Watch-Dog Timer
  2103. CTRLA: byte; //Control A
  2104. STATUS: byte; //Status
  2105. const
  2106. // WDT_PERIOD
  2107. PERIODmask = $0F;
  2108. PERIOD_OFF = $00;
  2109. PERIOD_8CLK = $01;
  2110. PERIOD_16CLK = $02;
  2111. PERIOD_32CLK = $03;
  2112. PERIOD_64CLK = $04;
  2113. PERIOD_128CLK = $05;
  2114. PERIOD_256CLK = $06;
  2115. PERIOD_512CLK = $07;
  2116. PERIOD_1KCLK = $08;
  2117. PERIOD_2KCLK = $09;
  2118. PERIOD_4KCLK = $0A;
  2119. PERIOD_8KCLK = $0B;
  2120. // WDT_WINDOW
  2121. WINDOWmask = $F0;
  2122. WINDOW_OFF = $00;
  2123. WINDOW_8CLK = $10;
  2124. WINDOW_16CLK = $20;
  2125. WINDOW_32CLK = $30;
  2126. WINDOW_64CLK = $40;
  2127. WINDOW_128CLK = $50;
  2128. WINDOW_256CLK = $60;
  2129. WINDOW_512CLK = $70;
  2130. WINDOW_1KCLK = $80;
  2131. WINDOW_2KCLK = $90;
  2132. WINDOW_4KCLK = $A0;
  2133. WINDOW_8KCLK = $B0;
  2134. // Lock enable
  2135. LOCKbm = $80;
  2136. // Syncronization busy
  2137. SYNCBUSYbm = $01;
  2138. end;
  2139. const
  2140. Pin0idx = 0; Pin0bm = 1;
  2141. Pin1idx = 1; Pin1bm = 2;
  2142. Pin2idx = 2; Pin2bm = 4;
  2143. Pin3idx = 3; Pin3bm = 8;
  2144. Pin4idx = 4; Pin4bm = 16;
  2145. Pin5idx = 5; Pin5bm = 32;
  2146. Pin6idx = 6; Pin6bm = 64;
  2147. Pin7idx = 7; Pin7bm = 128;
  2148. var
  2149. VPORTA: TVPORT absolute $0000;
  2150. VPORTB: TVPORT absolute $0004;
  2151. VPORTC: TVPORT absolute $0008;
  2152. GPIO: TGPIO absolute $001C;
  2153. CPU: TCPU absolute $0030;
  2154. RSTCTRL: TRSTCTRL absolute $0040;
  2155. SLPCTRL: TSLPCTRL absolute $0050;
  2156. CLKCTRL: TCLKCTRL absolute $0060;
  2157. BOD: TBOD absolute $0080;
  2158. VREF: TVREF absolute $00A0;
  2159. WDT: TWDT absolute $0100;
  2160. CPUINT: TCPUINT absolute $0110;
  2161. CRCSCAN: TCRCSCAN absolute $0120;
  2162. RTC: TRTC absolute $0140;
  2163. EVSYS: TEVSYS absolute $0180;
  2164. CCL: TCCL absolute $01C0;
  2165. PORTMUX: TPORTMUX absolute $0200;
  2166. PORTA: TPORT absolute $0400;
  2167. PORTB: TPORT absolute $0420;
  2168. PORTC: TPORT absolute $0440;
  2169. ADC0: TADC absolute $0600;
  2170. AC0: TAC absolute $0670;
  2171. DAC0: TDAC absolute $0680;
  2172. USART0: TUSART absolute $0800;
  2173. TWI0: TTWI absolute $0810;
  2174. SPI0: TSPI absolute $0820;
  2175. TCA0: TTCA absolute $0A00;
  2176. TCB0: TTCB absolute $0A40;
  2177. TCD0: TTCD absolute $0A80;
  2178. SYSCFG: TSYSCFG absolute $0F00;
  2179. NVMCTRL: TNVMCTRL absolute $1000;
  2180. SIGROW: TSIGROW absolute $1100;
  2181. FUSE: TFUSE absolute $1280;
  2182. LOCKBIT: TLOCKBIT absolute $128A;
  2183. USERROW: TUSERROW absolute $1300;
  2184. implementation
  2185. {$define RELBRANCHES}
  2186. {$i avrcommon.inc}
  2187. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  2188. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  2189. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 3
  2190. procedure PORTB_PORT_ISR; external name 'PORTB_PORT_ISR'; // Interrupt 4
  2191. procedure PORTC_PORT_ISR; external name 'PORTC_PORT_ISR'; // Interrupt 5
  2192. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 6
  2193. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 7
  2194. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 8
  2195. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 8
  2196. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 9
  2197. procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 10
  2198. //procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 10
  2199. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 11
  2200. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 11
  2201. procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 12
  2202. //procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 12
  2203. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 13
  2204. procedure TCD0_OVF_ISR; external name 'TCD0_OVF_ISR'; // Interrupt 14
  2205. procedure TCD0_TRIG_ISR; external name 'TCD0_TRIG_ISR'; // Interrupt 15
  2206. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 16
  2207. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 17
  2208. procedure ADC0_WCOMP_ISR; external name 'ADC0_WCOMP_ISR'; // Interrupt 18
  2209. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 19
  2210. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 20
  2211. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 21
  2212. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 22
  2213. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 23
  2214. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 24
  2215. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 25
  2216. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  2217. asm
  2218. rjmp __dtors_end
  2219. rjmp CRCSCAN_NMI_ISR
  2220. rjmp BOD_VLM_ISR
  2221. rjmp PORTA_PORT_ISR
  2222. rjmp PORTB_PORT_ISR
  2223. rjmp PORTC_PORT_ISR
  2224. rjmp RTC_CNT_ISR
  2225. rjmp RTC_PIT_ISR
  2226. rjmp TCA0_LUNF_ISR
  2227. // rjmp TCA0_OVF_ISR
  2228. rjmp TCA0_HUNF_ISR
  2229. rjmp TCA0_LCMP0_ISR
  2230. // rjmp TCA0_CMP0_ISR
  2231. rjmp TCA0_CMP1_ISR
  2232. // rjmp TCA0_LCMP1_ISR
  2233. rjmp TCA0_CMP2_ISR
  2234. // rjmp TCA0_LCMP2_ISR
  2235. rjmp TCB0_INT_ISR
  2236. rjmp TCD0_OVF_ISR
  2237. rjmp TCD0_TRIG_ISR
  2238. rjmp AC0_AC_ISR
  2239. rjmp ADC0_RESRDY_ISR
  2240. rjmp ADC0_WCOMP_ISR
  2241. rjmp TWI0_TWIS_ISR
  2242. rjmp TWI0_TWIM_ISR
  2243. rjmp SPI0_INT_ISR
  2244. rjmp USART0_RXC_ISR
  2245. rjmp USART0_DRE_ISR
  2246. rjmp USART0_TXC_ISR
  2247. rjmp NVMCTRL_EE_ISR
  2248. .weak CRCSCAN_NMI_ISR
  2249. .weak BOD_VLM_ISR
  2250. .weak PORTA_PORT_ISR
  2251. .weak PORTB_PORT_ISR
  2252. .weak PORTC_PORT_ISR
  2253. .weak RTC_CNT_ISR
  2254. .weak RTC_PIT_ISR
  2255. .weak TCA0_LUNF_ISR
  2256. // .weak TCA0_OVF_ISR
  2257. .weak TCA0_HUNF_ISR
  2258. .weak TCA0_LCMP0_ISR
  2259. // .weak TCA0_CMP0_ISR
  2260. .weak TCA0_CMP1_ISR
  2261. // .weak TCA0_LCMP1_ISR
  2262. .weak TCA0_CMP2_ISR
  2263. // .weak TCA0_LCMP2_ISR
  2264. .weak TCB0_INT_ISR
  2265. .weak TCD0_OVF_ISR
  2266. .weak TCD0_TRIG_ISR
  2267. .weak AC0_AC_ISR
  2268. .weak ADC0_RESRDY_ISR
  2269. .weak ADC0_WCOMP_ISR
  2270. .weak TWI0_TWIS_ISR
  2271. .weak TWI0_TWIM_ISR
  2272. .weak SPI0_INT_ISR
  2273. .weak USART0_RXC_ISR
  2274. .weak USART0_DRE_ISR
  2275. .weak USART0_TXC_ISR
  2276. .weak NVMCTRL_EE_ISR
  2277. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  2278. .set BOD_VLM_ISR, Default_IRQ_handler
  2279. .set PORTA_PORT_ISR, Default_IRQ_handler
  2280. .set PORTB_PORT_ISR, Default_IRQ_handler
  2281. .set PORTC_PORT_ISR, Default_IRQ_handler
  2282. .set RTC_CNT_ISR, Default_IRQ_handler
  2283. .set RTC_PIT_ISR, Default_IRQ_handler
  2284. .set TCA0_LUNF_ISR, Default_IRQ_handler
  2285. // .set TCA0_OVF_ISR, Default_IRQ_handler
  2286. .set TCA0_HUNF_ISR, Default_IRQ_handler
  2287. .set TCA0_LCMP0_ISR, Default_IRQ_handler
  2288. // .set TCA0_CMP0_ISR, Default_IRQ_handler
  2289. .set TCA0_CMP1_ISR, Default_IRQ_handler
  2290. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  2291. .set TCA0_CMP2_ISR, Default_IRQ_handler
  2292. // .set TCA0_LCMP2_ISR, Default_IRQ_handler
  2293. .set TCB0_INT_ISR, Default_IRQ_handler
  2294. .set TCD0_OVF_ISR, Default_IRQ_handler
  2295. .set TCD0_TRIG_ISR, Default_IRQ_handler
  2296. .set AC0_AC_ISR, Default_IRQ_handler
  2297. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  2298. .set ADC0_WCOMP_ISR, Default_IRQ_handler
  2299. .set TWI0_TWIS_ISR, Default_IRQ_handler
  2300. .set TWI0_TWIM_ISR, Default_IRQ_handler
  2301. .set SPI0_INT_ISR, Default_IRQ_handler
  2302. .set USART0_RXC_ISR, Default_IRQ_handler
  2303. .set USART0_DRE_ISR, Default_IRQ_handler
  2304. .set USART0_TXC_ISR, Default_IRQ_handler
  2305. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  2306. end;
  2307. end.