attiny807.pp 52 KB

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  1. unit ATtiny807;
  2. interface
  3. type
  4. TAC = object //Analog Comparator
  5. CTRLA: byte; //Control A
  6. Reserved1: byte;
  7. MUXCTRLA: byte; //Mux Control A
  8. Reserved3: byte;
  9. Reserved4: byte;
  10. Reserved5: byte;
  11. INTCTRL: byte; //Interrupt Control
  12. STATUS: byte; //Status
  13. const
  14. // Enable
  15. ENABLEbm = $01;
  16. // AC_HYSMODE
  17. HYSMODEmask = $06;
  18. HYSMODE_OFF = $00;
  19. HYSMODE_10mV = $02;
  20. HYSMODE_25mV = $04;
  21. HYSMODE_50mV = $06;
  22. // AC_INTMODE
  23. INTMODEmask = $30;
  24. INTMODE_BOTHEDGE = $00;
  25. INTMODE_NEGEDGE = $20;
  26. INTMODE_POSEDGE = $30;
  27. // Output Buffer Enable
  28. OUTENbm = $40;
  29. // Run in Standby Mode
  30. RUNSTDBYbm = $80;
  31. // Analog Comparator 0 Interrupt Enable
  32. CMPbm = $01;
  33. // Invert AC Output
  34. INVERTbm = $80;
  35. // AC_MUXNEG
  36. MUXNEGmask = $03;
  37. MUXNEG_PIN0 = $00;
  38. MUXNEG_PIN1 = $01;
  39. MUXNEG_VREF = $02;
  40. // AC_MUXPOS
  41. MUXPOSmask = $18;
  42. MUXPOS_PIN0 = $00;
  43. MUXPOS_PIN1 = $08;
  44. MUXPOS_PIN2 = $10;
  45. MUXPOS_PIN3 = $18;
  46. // Analog Comparator State
  47. STATEbm = $10;
  48. end;
  49. TADC = object //Analog to Digital Converter
  50. CTRLA: byte; //Control A
  51. CTRLB: byte; //Control B
  52. CTRLC: byte; //Control C
  53. CTRLD: byte; //Control D
  54. CTRLE: byte; //Control E
  55. SAMPCTRL: byte; //Sample Control
  56. MUXPOS: byte; //Positive mux input
  57. Reserved7: byte;
  58. COMMAND: byte; //Command
  59. EVCTRL: byte; //Event Control
  60. INTCTRL: byte; //Interrupt Control
  61. INTFLAGS: byte; //Interrupt Flags
  62. DBGCTRL: byte; //Debug Control
  63. TEMP: byte; //Temporary Data
  64. Reserved14: byte;
  65. Reserved15: byte;
  66. RES: word; //ADC Accumulator Result
  67. WINLT: word; //Window comparator low threshold
  68. WINHT: word; //Window comparator high threshold
  69. CALIB: byte; //Calibration
  70. const
  71. // ADC_DUTYCYC
  72. DUTYCYCmask = $01;
  73. DUTYCYC_DUTY50 = $00;
  74. DUTYCYC_DUTY25 = $01;
  75. // Start Conversion Operation
  76. STCONVbm = $01;
  77. // ADC Enable
  78. ENABLEbm = $01;
  79. // ADC Freerun mode
  80. FREERUNbm = $02;
  81. // ADC_RESSEL
  82. RESSELmask = $04;
  83. RESSEL_10BIT = $00;
  84. RESSEL_8BIT = $04;
  85. // Run standby mode
  86. RUNSTBYbm = $80;
  87. // ADC_SAMPNUM
  88. SAMPNUMmask = $07;
  89. SAMPNUM_ACC1 = $00;
  90. SAMPNUM_ACC2 = $01;
  91. SAMPNUM_ACC4 = $02;
  92. SAMPNUM_ACC8 = $03;
  93. SAMPNUM_ACC16 = $04;
  94. SAMPNUM_ACC32 = $05;
  95. SAMPNUM_ACC64 = $06;
  96. // ADC_PRESC
  97. PRESCmask = $07;
  98. PRESC_DIV2 = $00;
  99. PRESC_DIV4 = $01;
  100. PRESC_DIV8 = $02;
  101. PRESC_DIV16 = $03;
  102. PRESC_DIV32 = $04;
  103. PRESC_DIV64 = $05;
  104. PRESC_DIV128 = $06;
  105. PRESC_DIV256 = $07;
  106. // ADC_REFSEL
  107. REFSELmask = $30;
  108. REFSEL_INTREF = $00;
  109. REFSEL_VDDREF = $10;
  110. REFSEL_VREFA = $20;
  111. // Sample Capacitance Selection
  112. SAMPCAPbm = $40;
  113. // ADC_ASDV
  114. ASDVmask = $10;
  115. ASDV_ASVOFF = $00;
  116. ASDV_ASVON = $10;
  117. // ADC_INITDLY
  118. INITDLYmask = $E0;
  119. INITDLY_DLY0 = $00;
  120. INITDLY_DLY16 = $20;
  121. INITDLY_DLY32 = $40;
  122. INITDLY_DLY64 = $60;
  123. INITDLY_DLY128 = $80;
  124. INITDLY_DLY256 = $A0;
  125. // Sampling Delay Selection
  126. SAMPDLY0bm = $01;
  127. SAMPDLY1bm = $02;
  128. SAMPDLY2bm = $04;
  129. SAMPDLY3bm = $08;
  130. // ADC_WINCM
  131. WINCMmask = $07;
  132. WINCM_NONE = $00;
  133. WINCM_BELOW = $01;
  134. WINCM_ABOVE = $02;
  135. WINCM_INSIDE = $03;
  136. WINCM_OUTSIDE = $04;
  137. // Debug run
  138. DBGRUNbm = $01;
  139. // Start Event Input Enable
  140. STARTEIbm = $01;
  141. // Result Ready Interrupt Enable
  142. RESRDYbm = $01;
  143. // Window Comparator Interrupt Enable
  144. WCMPbm = $02;
  145. // ADC_MUXPOS
  146. MUXPOSmask = $1F;
  147. MUXPOS_AIN0 = $00;
  148. MUXPOS_AIN1 = $01;
  149. MUXPOS_AIN2 = $02;
  150. MUXPOS_AIN3 = $03;
  151. MUXPOS_AIN4 = $04;
  152. MUXPOS_AIN5 = $05;
  153. MUXPOS_AIN6 = $06;
  154. MUXPOS_AIN7 = $07;
  155. MUXPOS_AIN8 = $08;
  156. MUXPOS_AIN9 = $09;
  157. MUXPOS_AIN10 = $0A;
  158. MUXPOS_AIN11 = $0B;
  159. MUXPOS_INTREF = $1D;
  160. MUXPOS_TEMPSENSE = $1E;
  161. MUXPOS_GND = $1F;
  162. // Sample lenght
  163. SAMPLEN0bm = $01;
  164. SAMPLEN1bm = $02;
  165. SAMPLEN2bm = $04;
  166. SAMPLEN3bm = $08;
  167. SAMPLEN4bm = $10;
  168. // Temporary
  169. TEMP0bm = $01;
  170. TEMP1bm = $02;
  171. TEMP2bm = $04;
  172. TEMP3bm = $08;
  173. TEMP4bm = $10;
  174. TEMP5bm = $20;
  175. TEMP6bm = $40;
  176. TEMP7bm = $80;
  177. end;
  178. TBOD = object //Bod interface
  179. CTRLA: byte; //Control A
  180. CTRLB: byte; //Control B
  181. Reserved2: byte;
  182. Reserved3: byte;
  183. Reserved4: byte;
  184. Reserved5: byte;
  185. Reserved6: byte;
  186. Reserved7: byte;
  187. VLMCTRLA: byte; //Voltage level monitor Control
  188. INTCTRL: byte; //Voltage level monitor interrupt Control
  189. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  190. STATUS: byte; //Voltage level monitor status
  191. const
  192. // BOD_ACTIVE
  193. ACTIVEmask = $0C;
  194. ACTIVE_DIS = $00;
  195. ACTIVE_ENABLED = $04;
  196. ACTIVE_SAMPLED = $08;
  197. ACTIVE_ENWAKE = $0C;
  198. // BOD_SAMPFREQ
  199. SAMPFREQmask = $10;
  200. SAMPFREQ_1KHZ = $00;
  201. SAMPFREQ_125HZ = $10;
  202. // BOD_SLEEP
  203. SLEEPmask = $03;
  204. SLEEP_DIS = $00;
  205. SLEEP_ENABLED = $01;
  206. SLEEP_SAMPLED = $02;
  207. // BOD_LVL
  208. LVLmask = $07;
  209. LVL_BODLEVEL0 = $00;
  210. LVL_BODLEVEL1 = $01;
  211. LVL_BODLEVEL2 = $02;
  212. LVL_BODLEVEL3 = $03;
  213. LVL_BODLEVEL4 = $04;
  214. LVL_BODLEVEL5 = $05;
  215. LVL_BODLEVEL6 = $06;
  216. LVL_BODLEVEL7 = $07;
  217. // BOD_VLMCFG
  218. VLMCFGmask = $06;
  219. VLMCFG_BELOW = $00;
  220. VLMCFG_ABOVE = $02;
  221. VLMCFG_CROSS = $04;
  222. // voltage level monitor interrrupt enable
  223. VLMIEbm = $01;
  224. // Voltage level monitor interrupt flag
  225. VLMIFbm = $01;
  226. // Voltage level monitor status
  227. VLMSbm = $01;
  228. // BOD_VLMLVL
  229. VLMLVLmask = $03;
  230. VLMLVL_5ABOVE = $00;
  231. VLMLVL_15ABOVE = $01;
  232. VLMLVL_25ABOVE = $02;
  233. end;
  234. TCCL = object //Configurable Custom Logic
  235. CTRLA: byte; //Control Register A
  236. SEQCTRL0: byte; //Sequential Control 0
  237. Reserved2: byte;
  238. Reserved3: byte;
  239. Reserved4: byte;
  240. LUT0CTRLA: byte; //LUT Control 0 A
  241. LUT0CTRLB: byte; //LUT Control 0 B
  242. LUT0CTRLC: byte; //LUT Control 0 C
  243. TRUTH0: byte; //Truth 0
  244. LUT1CTRLA: byte; //LUT Control 1 A
  245. LUT1CTRLB: byte; //LUT Control 1 B
  246. LUT1CTRLC: byte; //LUT Control 1 C
  247. TRUTH1: byte; //Truth 1
  248. const
  249. // Enable
  250. ENABLEbm = $01;
  251. // Run in Standby
  252. RUNSTDBYbm = $40;
  253. // Clock Source Selection
  254. CLKSRCbm = $40;
  255. // CCL_EDGEDET
  256. EDGEDETmask = $80;
  257. EDGEDET_DIS = $00;
  258. EDGEDET_EN = $80;
  259. // CCL_FILTSEL
  260. FILTSELmask = $30;
  261. FILTSEL_DISABLE = $00;
  262. FILTSEL_SYNCH = $10;
  263. FILTSEL_FILTER = $20;
  264. // Output Enable
  265. OUTENbm = $08;
  266. // CCL_INSEL0
  267. INSEL0mask = $0F;
  268. INSEL0_MASK = $00;
  269. INSEL0_FEEDBACK = $01;
  270. INSEL0_LINK = $02;
  271. INSEL0_EVENT0 = $03;
  272. INSEL0_EVENT1 = $04;
  273. INSEL0_IO = $05;
  274. INSEL0_AC0 = $06;
  275. INSEL0_TCB0 = $07;
  276. INSEL0_TCA0 = $08;
  277. INSEL0_TCD0 = $09;
  278. INSEL0_USART0 = $0A;
  279. INSEL0_SPI0 = $0B;
  280. // CCL_INSEL1
  281. INSEL1mask = $F0;
  282. INSEL1_MASK = $00;
  283. INSEL1_FEEDBACK = $10;
  284. INSEL1_LINK = $20;
  285. INSEL1_EVENT0 = $30;
  286. INSEL1_EVENT1 = $40;
  287. INSEL1_IO = $50;
  288. INSEL1_AC0 = $60;
  289. INSEL1_TCB0 = $70;
  290. INSEL1_TCA0 = $80;
  291. INSEL1_TCD0 = $90;
  292. INSEL1_USART0 = $A0;
  293. INSEL1_SPI0 = $B0;
  294. // CCL_INSEL2
  295. INSEL2mask = $0F;
  296. INSEL2_MASK = $00;
  297. INSEL2_FEEDBACK = $01;
  298. INSEL2_LINK = $02;
  299. INSEL2_EVENT0 = $03;
  300. INSEL2_EVENT1 = $04;
  301. INSEL2_IO = $05;
  302. INSEL2_AC0 = $06;
  303. INSEL2_TCB0 = $07;
  304. INSEL2_TCA0 = $08;
  305. INSEL2_TCD0 = $09;
  306. INSEL2_SPI0 = $0B;
  307. // CCL_SEQSEL
  308. SEQSELmask = $07;
  309. SEQSEL_DISABLE = $00;
  310. SEQSEL_DFF = $01;
  311. SEQSEL_JK = $02;
  312. SEQSEL_LATCH = $03;
  313. SEQSEL_RS = $04;
  314. end;
  315. TCLKCTRL = object //Clock controller
  316. MCLKCTRLA: byte; //MCLK Control A
  317. MCLKCTRLB: byte; //MCLK Control B
  318. MCLKLOCK: byte; //MCLK Lock
  319. MCLKSTATUS: byte; //MCLK Status
  320. Reserved4: byte;
  321. Reserved5: byte;
  322. Reserved6: byte;
  323. Reserved7: byte;
  324. Reserved8: byte;
  325. Reserved9: byte;
  326. Reserved10: byte;
  327. Reserved11: byte;
  328. Reserved12: byte;
  329. Reserved13: byte;
  330. Reserved14: byte;
  331. Reserved15: byte;
  332. OSC20MCTRLA: byte; //OSC20M Control A
  333. OSC20MCALIBA: byte; //OSC20M Calibration A
  334. OSC20MCALIBB: byte; //OSC20M Calibration B
  335. Reserved19: byte;
  336. Reserved20: byte;
  337. Reserved21: byte;
  338. Reserved22: byte;
  339. Reserved23: byte;
  340. OSC32KCTRLA: byte; //OSC32K Control A
  341. const
  342. // System clock out
  343. CLKOUTbm = $80;
  344. // CLKCTRL_CLKSEL
  345. CLKSELmask = $03;
  346. CLKSEL_OSC20M = $00;
  347. CLKSEL_OSCULP32K = $01;
  348. CLKSEL_XOSC32K = $02;
  349. CLKSEL_EXTCLK = $03;
  350. // CLKCTRL_PDIV
  351. PDIVmask = $1E;
  352. PDIV_2X = $00;
  353. PDIV_4X = $02;
  354. PDIV_8X = $04;
  355. PDIV_16X = $06;
  356. PDIV_32X = $08;
  357. PDIV_64X = $0A;
  358. PDIV_6X = $10;
  359. PDIV_10X = $12;
  360. PDIV_12X = $14;
  361. PDIV_24X = $16;
  362. PDIV_48X = $18;
  363. // Prescaler enable
  364. PENbm = $01;
  365. // lock ebable
  366. LOCKENbm = $01;
  367. // External Clock status
  368. EXTSbm = $80;
  369. // 20MHz oscillator status
  370. OSC20MSbm = $10;
  371. // 32KHz oscillator status
  372. OSC32KSbm = $20;
  373. // System Oscillator changing
  374. SOSCbm = $01;
  375. // 32.768 kHz Crystal Oscillator status
  376. XOSC32KSbm = $40;
  377. // Calibration
  378. CAL20M0bm = $01;
  379. CAL20M1bm = $02;
  380. CAL20M2bm = $04;
  381. CAL20M3bm = $08;
  382. CAL20M4bm = $10;
  383. CAL20M5bm = $20;
  384. // Lock
  385. LOCKbm = $80;
  386. // Oscillator temperature coefficient
  387. TEMPCAL20M0bm = $01;
  388. TEMPCAL20M1bm = $02;
  389. TEMPCAL20M2bm = $04;
  390. TEMPCAL20M3bm = $08;
  391. // Run standby
  392. RUNSTDBYbm = $02;
  393. end;
  394. TCPU = object //CPU
  395. Reserved0: byte;
  396. Reserved1: byte;
  397. Reserved2: byte;
  398. Reserved3: byte;
  399. CCP: byte; //Configuration Change Protection
  400. Reserved5: byte;
  401. Reserved6: byte;
  402. Reserved7: byte;
  403. Reserved8: byte;
  404. Reserved9: byte;
  405. Reserved10: byte;
  406. Reserved11: byte;
  407. Reserved12: byte;
  408. SPL: byte; //Stack Pointer Low
  409. SPH: byte; //Stack Pointer High
  410. SREG: byte; //Status Register
  411. const
  412. // CPU_CCP
  413. CCPmask = $FF;
  414. CCP_SPM = $9D;
  415. CCP_IOREG = $D8;
  416. // Carry Flag
  417. Cbm = $01;
  418. // Half Carry Flag
  419. Hbm = $20;
  420. // Global Interrupt Enable Flag
  421. Ibm = $80;
  422. // Negative Flag
  423. Nbm = $04;
  424. // N Exclusive Or V Flag
  425. Sbm = $10;
  426. // Transfer Bit
  427. Tbm = $40;
  428. // Two's Complement Overflow Flag
  429. Vbm = $08;
  430. // Zero Flag
  431. Zbm = $02;
  432. end;
  433. TCPUINT = object //Interrupt Controller
  434. CTRLA: byte; //Control A
  435. STATUS: byte; //Status
  436. LVL0PRI: byte; //Interrupt Level 0 Priority
  437. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  438. const
  439. // Compact Vector Table
  440. CVTbm = $20;
  441. // Interrupt Vector Select
  442. IVSELbm = $40;
  443. // Round-robin Scheduling Enable
  444. LVL0RRbm = $01;
  445. // Interrupt Level Priority
  446. LVL0PRI0bm = $01;
  447. LVL0PRI1bm = $02;
  448. LVL0PRI2bm = $04;
  449. LVL0PRI3bm = $08;
  450. LVL0PRI4bm = $10;
  451. LVL0PRI5bm = $20;
  452. LVL0PRI6bm = $40;
  453. LVL0PRI7bm = $80;
  454. // Interrupt Vector with High Priority
  455. LVL1VEC0bm = $01;
  456. LVL1VEC1bm = $02;
  457. LVL1VEC2bm = $04;
  458. LVL1VEC3bm = $08;
  459. LVL1VEC4bm = $10;
  460. LVL1VEC5bm = $20;
  461. LVL1VEC6bm = $40;
  462. LVL1VEC7bm = $80;
  463. // Level 0 Interrupt Executing
  464. LVL0EXbm = $01;
  465. // Level 1 Interrupt Executing
  466. LVL1EXbm = $02;
  467. // Non-maskable Interrupt Executing
  468. NMIEXbm = $80;
  469. end;
  470. TCRCSCAN = object //CRCSCAN
  471. CTRLA: byte; //Control A
  472. CTRLB: byte; //Control B
  473. STATUS: byte; //Status
  474. const
  475. // Enable CRC scan
  476. ENABLEbm = $01;
  477. // Enable NMI Trigger
  478. NMIENbm = $02;
  479. // Reset CRC scan
  480. RESETbm = $80;
  481. // CRCSCAN_SRC
  482. SRCmask = $03;
  483. SRC_FLASH = $00;
  484. SRC_APPLICATION = $01;
  485. SRC_BOOT = $02;
  486. // CRC Busy
  487. BUSYbm = $01;
  488. // CRC Ok
  489. OKbm = $02;
  490. end;
  491. TEVSYS = object //Event System
  492. ASYNCSTROBE: byte; //Asynchronous Channel Strobe
  493. SYNCSTROBE: byte; //Synchronous Channel Strobe
  494. ASYNCCH0: byte; //Asynchronous Channel 0 Generator Selection
  495. ASYNCCH1: byte; //Asynchronous Channel 1 Generator Selection
  496. Reserved4: byte;
  497. Reserved5: byte;
  498. Reserved6: byte;
  499. Reserved7: byte;
  500. Reserved8: byte;
  501. Reserved9: byte;
  502. SYNCCH0: byte; //Synchronous Channel 0 Generator Selection
  503. Reserved11: byte;
  504. Reserved12: byte;
  505. Reserved13: byte;
  506. Reserved14: byte;
  507. Reserved15: byte;
  508. Reserved16: byte;
  509. Reserved17: byte;
  510. ASYNCUSER0: byte; //Asynchronous User Ch 0 Input Selection - TCB0
  511. ASYNCUSER1: byte; //Asynchronous User Ch 1 Input Selection - ADC0
  512. ASYNCUSER2: byte; //Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  513. ASYNCUSER3: byte; //Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  514. ASYNCUSER4: byte; //Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  515. ASYNCUSER5: byte; //Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  516. ASYNCUSER6: byte; //Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  517. ASYNCUSER7: byte; //Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  518. ASYNCUSER8: byte; //Asynchronous User Ch 8 Input Selection - Event Out 0
  519. ASYNCUSER9: byte; //Asynchronous User Ch 9 Input Selection - Event Out 1
  520. ASYNCUSER10: byte; //Asynchronous User Ch 10 Input Selection - Event Out 2
  521. ASYNCUSER11: byte; //Asynchronous User Ch 11 Input Selection - TCB1
  522. ASYNCUSER12: byte; //Asynchronous User Ch 12 Input Selection - ADC1
  523. Reserved31: byte;
  524. Reserved32: byte;
  525. Reserved33: byte;
  526. SYNCUSER0: byte; //Synchronous User Ch 0 - TCA0
  527. SYNCUSER1: byte; //Synchronous User Ch 1 - USART0
  528. const
  529. // EVSYS_ASYNCCH0
  530. ASYNCCH0mask = $FF;
  531. ASYNCCH0_OFF = $00;
  532. ASYNCCH0_CCL_LUT0 = $01;
  533. ASYNCCH0_CCL_LUT1 = $02;
  534. ASYNCCH0_AC0_OUT = $03;
  535. ASYNCCH0_TCD0_CMPBCLR = $04;
  536. ASYNCCH0_TCD0_CMPASET = $05;
  537. ASYNCCH0_TCD0_CMPBSET = $06;
  538. ASYNCCH0_TCD0_PROGEV = $07;
  539. ASYNCCH0_RTC_OVF = $08;
  540. ASYNCCH0_RTC_CMP = $09;
  541. ASYNCCH0_PORTA_PIN0 = $0A;
  542. ASYNCCH0_PORTA_PIN1 = $0B;
  543. ASYNCCH0_PORTA_PIN2 = $0C;
  544. ASYNCCH0_PORTA_PIN3 = $0D;
  545. ASYNCCH0_PORTA_PIN4 = $0E;
  546. ASYNCCH0_PORTA_PIN5 = $0F;
  547. ASYNCCH0_PORTA_PIN6 = $10;
  548. ASYNCCH0_PORTA_PIN7 = $11;
  549. ASYNCCH0_UPDI = $12;
  550. ASYNCCH0_AC1_OUT = $13;
  551. ASYNCCH0_AC2_OUT = $14;
  552. // EVSYS_ASYNCCH1
  553. ASYNCCH1mask = $FF;
  554. ASYNCCH1_OFF = $00;
  555. ASYNCCH1_CCL_LUT0 = $01;
  556. ASYNCCH1_CCL_LUT1 = $02;
  557. ASYNCCH1_AC0_OUT = $03;
  558. ASYNCCH1_TCD0_CMPBCLR = $04;
  559. ASYNCCH1_TCD0_CMPASET = $05;
  560. ASYNCCH1_TCD0_CMPBSET = $06;
  561. ASYNCCH1_TCD0_PROGEV = $07;
  562. ASYNCCH1_RTC_OVF = $08;
  563. ASYNCCH1_RTC_CMP = $09;
  564. ASYNCCH1_PORTB_PIN0 = $0A;
  565. ASYNCCH1_PORTB_PIN1 = $0B;
  566. ASYNCCH1_PORTB_PIN2 = $0C;
  567. ASYNCCH1_PORTB_PIN3 = $0D;
  568. ASYNCCH1_PORTB_PIN4 = $0E;
  569. ASYNCCH1_PORTB_PIN5 = $0F;
  570. ASYNCCH1_PORTB_PIN6 = $10;
  571. ASYNCCH1_PORTB_PIN7 = $11;
  572. ASYNCCH1_AC1_OUT = $12;
  573. ASYNCCH1_AC2_OUT = $13;
  574. // EVSYS_ASYNCUSER0
  575. ASYNCUSER0mask = $FF;
  576. ASYNCUSER0_OFF = $00;
  577. ASYNCUSER0_SYNCCH0 = $01;
  578. ASYNCUSER0_ASYNCCH0 = $03;
  579. ASYNCUSER0_ASYNCCH1 = $04;
  580. // EVSYS_ASYNCUSER1
  581. ASYNCUSER1mask = $FF;
  582. ASYNCUSER1_OFF = $00;
  583. ASYNCUSER1_SYNCCH0 = $01;
  584. ASYNCUSER1_ASYNCCH0 = $03;
  585. ASYNCUSER1_ASYNCCH1 = $04;
  586. // EVSYS_ASYNCUSER2
  587. ASYNCUSER2mask = $FF;
  588. ASYNCUSER2_OFF = $00;
  589. ASYNCUSER2_SYNCCH0 = $01;
  590. ASYNCUSER2_ASYNCCH0 = $03;
  591. ASYNCUSER2_ASYNCCH1 = $04;
  592. // EVSYS_ASYNCUSER3
  593. ASYNCUSER3mask = $FF;
  594. ASYNCUSER3_OFF = $00;
  595. ASYNCUSER3_SYNCCH0 = $01;
  596. ASYNCUSER3_ASYNCCH0 = $03;
  597. ASYNCUSER3_ASYNCCH1 = $04;
  598. // EVSYS_ASYNCUSER4
  599. ASYNCUSER4mask = $FF;
  600. ASYNCUSER4_OFF = $00;
  601. ASYNCUSER4_SYNCCH0 = $01;
  602. ASYNCUSER4_ASYNCCH0 = $03;
  603. ASYNCUSER4_ASYNCCH1 = $04;
  604. // EVSYS_ASYNCUSER5
  605. ASYNCUSER5mask = $FF;
  606. ASYNCUSER5_OFF = $00;
  607. ASYNCUSER5_SYNCCH0 = $01;
  608. ASYNCUSER5_ASYNCCH0 = $03;
  609. ASYNCUSER5_ASYNCCH1 = $04;
  610. // EVSYS_ASYNCUSER6
  611. ASYNCUSER6mask = $FF;
  612. ASYNCUSER6_OFF = $00;
  613. ASYNCUSER6_SYNCCH0 = $01;
  614. ASYNCUSER6_ASYNCCH0 = $03;
  615. ASYNCUSER6_ASYNCCH1 = $04;
  616. // EVSYS_ASYNCUSER7
  617. ASYNCUSER7mask = $FF;
  618. ASYNCUSER7_OFF = $00;
  619. ASYNCUSER7_SYNCCH0 = $01;
  620. ASYNCUSER7_ASYNCCH0 = $03;
  621. ASYNCUSER7_ASYNCCH1 = $04;
  622. // EVSYS_ASYNCUSER8
  623. ASYNCUSER8mask = $FF;
  624. ASYNCUSER8_OFF = $00;
  625. ASYNCUSER8_SYNCCH0 = $01;
  626. ASYNCUSER8_ASYNCCH0 = $03;
  627. ASYNCUSER8_ASYNCCH1 = $04;
  628. // EVSYS_ASYNCUSER9
  629. ASYNCUSER9mask = $FF;
  630. ASYNCUSER9_OFF = $00;
  631. ASYNCUSER9_SYNCCH0 = $01;
  632. ASYNCUSER9_ASYNCCH0 = $03;
  633. ASYNCUSER9_ASYNCCH1 = $04;
  634. // EVSYS_ASYNCUSER10
  635. ASYNCUSER10mask = $FF;
  636. ASYNCUSER10_OFF = $00;
  637. ASYNCUSER10_SYNCCH0 = $01;
  638. ASYNCUSER10_ASYNCCH0 = $03;
  639. ASYNCUSER10_ASYNCCH1 = $04;
  640. // EVSYS_ASYNCUSER11
  641. ASYNCUSER11mask = $FF;
  642. ASYNCUSER11_OFF = $00;
  643. ASYNCUSER11_SYNCCH0 = $01;
  644. ASYNCUSER11_ASYNCCH0 = $03;
  645. ASYNCUSER11_ASYNCCH1 = $04;
  646. // EVSYS_ASYNCUSER12
  647. ASYNCUSER12mask = $FF;
  648. ASYNCUSER12_OFF = $00;
  649. ASYNCUSER12_SYNCCH0 = $01;
  650. ASYNCUSER12_ASYNCCH0 = $03;
  651. ASYNCUSER12_ASYNCCH1 = $04;
  652. // EVSYS_SYNCCH0
  653. SYNCCH0mask = $FF;
  654. SYNCCH0_OFF = $00;
  655. SYNCCH0_TCB0 = $01;
  656. SYNCCH0_TCA0_OVF_LUNF = $02;
  657. SYNCCH0_TCA0_HUNF = $03;
  658. SYNCCH0_TCA0_CMP0 = $04;
  659. SYNCCH0_TCA0_CMP1 = $05;
  660. SYNCCH0_TCA0_CMP2 = $06;
  661. SYNCCH0_PORTC_PIN0 = $07;
  662. SYNCCH0_PORTC_PIN1 = $08;
  663. SYNCCH0_PORTC_PIN2 = $09;
  664. SYNCCH0_PORTC_PIN3 = $0A;
  665. SYNCCH0_PORTC_PIN4 = $0B;
  666. SYNCCH0_PORTC_PIN5 = $0C;
  667. SYNCCH0_PORTA_PIN0 = $0D;
  668. SYNCCH0_PORTA_PIN1 = $0E;
  669. SYNCCH0_PORTA_PIN2 = $0F;
  670. SYNCCH0_PORTA_PIN3 = $10;
  671. SYNCCH0_PORTA_PIN4 = $11;
  672. SYNCCH0_PORTA_PIN5 = $12;
  673. SYNCCH0_PORTA_PIN6 = $13;
  674. SYNCCH0_PORTA_PIN7 = $14;
  675. SYNCCH0_TCB1 = $15;
  676. // EVSYS_SYNCUSER0
  677. SYNCUSER0mask = $FF;
  678. SYNCUSER0_OFF = $00;
  679. SYNCUSER0_SYNCCH0 = $01;
  680. // EVSYS_SYNCUSER1
  681. SYNCUSER1mask = $FF;
  682. SYNCUSER1_OFF = $00;
  683. SYNCUSER1_SYNCCH0 = $01;
  684. end;
  685. TFUSE = object //Fuses
  686. WDTCFG: byte; //Watchdog Configuration
  687. BODCFG: byte; //BOD Configuration
  688. OSCCFG: byte; //Oscillator Configuration
  689. Reserved3: byte;
  690. TCD0CFG: byte; //TCD0 Configuration
  691. SYSCFG0: byte; //System Configuration 0
  692. SYSCFG1: byte; //System Configuration 1
  693. APPEND: byte; //Application Code Section End
  694. BOOTEND: byte; //Boot Section End
  695. const
  696. // FUSE_ACTIVE
  697. ACTIVEmask = $0C;
  698. ACTIVE_DIS = $00;
  699. ACTIVE_ENABLED = $04;
  700. ACTIVE_SAMPLED = $08;
  701. ACTIVE_ENWAKE = $0C;
  702. // FUSE_LVL
  703. LVLmask = $E0;
  704. LVL_BODLEVEL0 = $00;
  705. LVL_BODLEVEL1 = $20;
  706. LVL_BODLEVEL2 = $40;
  707. LVL_BODLEVEL3 = $60;
  708. LVL_BODLEVEL4 = $80;
  709. LVL_BODLEVEL5 = $A0;
  710. LVL_BODLEVEL6 = $C0;
  711. LVL_BODLEVEL7 = $E0;
  712. // FUSE_SAMPFREQ
  713. SAMPFREQmask = $10;
  714. SAMPFREQ_1KHZ = $00;
  715. SAMPFREQ_125HZ = $10;
  716. // FUSE_SLEEP
  717. SLEEPmask = $03;
  718. SLEEP_DIS = $00;
  719. SLEEP_ENABLED = $01;
  720. SLEEP_SAMPLED = $02;
  721. // FUSE_FREQSEL
  722. FREQSELmask = $03;
  723. FREQSEL_16MHZ = $01;
  724. FREQSEL_20MHZ = $02;
  725. // Oscillator Lock
  726. OSCLOCKbm = $80;
  727. // FUSE_CRCSRC
  728. CRCSRCmask = $C0;
  729. CRCSRC_FLASH = $00;
  730. CRCSRC_BOOT = $40;
  731. CRCSRC_BOOTAPP = $80;
  732. CRCSRC_NOCRC = $C0;
  733. // EEPROM Save
  734. EESAVEbm = $01;
  735. // FUSE_RSTPINCFG
  736. RSTPINCFGmask = $0C;
  737. RSTPINCFG_GPIO = $00;
  738. RSTPINCFG_UPDI = $04;
  739. RSTPINCFG_RST = $08;
  740. // FUSE_SUT
  741. SUTmask = $07;
  742. SUT_0MS = $00;
  743. SUT_1MS = $01;
  744. SUT_2MS = $02;
  745. SUT_4MS = $03;
  746. SUT_8MS = $04;
  747. SUT_16MS = $05;
  748. SUT_32MS = $06;
  749. SUT_64MS = $07;
  750. // Compare A Default Output Value
  751. CMPAbm = $01;
  752. // Compare A Output Enable
  753. CMPAENbm = $10;
  754. // Compare B Default Output Value
  755. CMPBbm = $02;
  756. // Compare B Output Enable
  757. CMPBENbm = $20;
  758. // Compare C Default Output Value
  759. CMPCbm = $04;
  760. // Compare C Output Enable
  761. CMPCENbm = $40;
  762. // Compare D Default Output Value
  763. CMPDbm = $08;
  764. // Compare D Output Enable
  765. CMPDENbm = $80;
  766. // FUSE_PERIOD
  767. PERIODmask = $0F;
  768. PERIOD_OFF = $00;
  769. PERIOD_8CLK = $01;
  770. PERIOD_16CLK = $02;
  771. PERIOD_32CLK = $03;
  772. PERIOD_64CLK = $04;
  773. PERIOD_128CLK = $05;
  774. PERIOD_256CLK = $06;
  775. PERIOD_512CLK = $07;
  776. PERIOD_1KCLK = $08;
  777. PERIOD_2KCLK = $09;
  778. PERIOD_4KCLK = $0A;
  779. PERIOD_8KCLK = $0B;
  780. // FUSE_WINDOW
  781. WINDOWmask = $F0;
  782. WINDOW_OFF = $00;
  783. WINDOW_8CLK = $10;
  784. WINDOW_16CLK = $20;
  785. WINDOW_32CLK = $30;
  786. WINDOW_64CLK = $40;
  787. WINDOW_128CLK = $50;
  788. WINDOW_256CLK = $60;
  789. WINDOW_512CLK = $70;
  790. WINDOW_1KCLK = $80;
  791. WINDOW_2KCLK = $90;
  792. WINDOW_4KCLK = $A0;
  793. WINDOW_8KCLK = $B0;
  794. end;
  795. TGPIO = object //General Purpose IO
  796. GPIOR0: byte; //General Purpose IO Register 0
  797. GPIOR1: byte; //General Purpose IO Register 1
  798. GPIOR2: byte; //General Purpose IO Register 2
  799. GPIOR3: byte; //General Purpose IO Register 3
  800. end;
  801. TLOCKBIT = object //Lockbit
  802. LOCKBIT: byte; //Lock bits
  803. const
  804. // LOCKBIT_LB
  805. LBmask = $FF;
  806. LB_RWLOCK = $3A;
  807. LB_NOLOCK = $C5;
  808. end;
  809. TNVMCTRL = object //Non-volatile Memory Controller
  810. CTRLA: byte; //Control A
  811. CTRLB: byte; //Control B
  812. STATUS: byte; //Status
  813. INTCTRL: byte; //Interrupt Control
  814. INTFLAGS: byte; //Interrupt Flags
  815. Reserved5: byte;
  816. DATA: word; //Data
  817. ADDR: word; //Address
  818. const
  819. // NVMCTRL_CMD
  820. CMDmask = $07;
  821. CMD_NONE = $00;
  822. CMD_PAGEWRITE = $01;
  823. CMD_PAGEERASE = $02;
  824. CMD_PAGEERASEWRITE = $03;
  825. CMD_PAGEBUFCLR = $04;
  826. CMD_CHIPERASE = $05;
  827. CMD_EEERASE = $06;
  828. CMD_FUSEWRITE = $07;
  829. // Application code write protect
  830. APCWPbm = $01;
  831. // Boot Lock
  832. BOOTLOCKbm = $02;
  833. // EEPROM Ready
  834. EEREADYbm = $01;
  835. // EEPROM busy
  836. EEBUSYbm = $02;
  837. // Flash busy
  838. FBUSYbm = $01;
  839. // Write error
  840. WRERRORbm = $04;
  841. end;
  842. TPORT = object //I/O Ports
  843. DIR: byte; //Data Direction
  844. DIRSET: byte; //Data Direction Set
  845. DIRCLR: byte; //Data Direction Clear
  846. DIRTGL: byte; //Data Direction Toggle
  847. OUT_: byte; //Output Value
  848. OUTSET: byte; //Output Value Set
  849. OUTCLR: byte; //Output Value Clear
  850. OUTTGL: byte; //Output Value Toggle
  851. IN_: byte; //Input Value
  852. INTFLAGS: byte; //Interrupt Flags
  853. Reserved10: byte;
  854. Reserved11: byte;
  855. Reserved12: byte;
  856. Reserved13: byte;
  857. Reserved14: byte;
  858. Reserved15: byte;
  859. PIN0CTRL: byte; //Pin 0 Control
  860. PIN1CTRL: byte; //Pin 1 Control
  861. PIN2CTRL: byte; //Pin 2 Control
  862. PIN3CTRL: byte; //Pin 3 Control
  863. PIN4CTRL: byte; //Pin 4 Control
  864. PIN5CTRL: byte; //Pin 5 Control
  865. PIN6CTRL: byte; //Pin 6 Control
  866. PIN7CTRL: byte; //Pin 7 Control
  867. const
  868. // Pin Interrupt
  869. INT0bm = $01;
  870. INT1bm = $02;
  871. INT2bm = $04;
  872. INT3bm = $08;
  873. INT4bm = $10;
  874. INT5bm = $20;
  875. INT6bm = $40;
  876. INT7bm = $80;
  877. // Inverted I/O Enable
  878. INVENbm = $80;
  879. // PORT_ISC
  880. ISCmask = $07;
  881. ISC_INTDISABLE = $00;
  882. ISC_BOTHEDGES = $01;
  883. ISC_RISING = $02;
  884. ISC_FALLING = $03;
  885. ISC_INPUT_DISABLE = $04;
  886. ISC_LEVEL = $05;
  887. // Pullup enable
  888. PULLUPENbm = $08;
  889. end;
  890. TPORTMUX = object //Port Multiplexer
  891. CTRLA: byte; //Port Multiplexer Control A
  892. CTRLB: byte; //Port Multiplexer Control B
  893. CTRLC: byte; //Port Multiplexer Control C
  894. CTRLD: byte; //Port Multiplexer Control D
  895. const
  896. // Event Output 0
  897. EVOUT0bm = $01;
  898. // Event Output 1
  899. EVOUT1bm = $02;
  900. // Event Output 2
  901. EVOUT2bm = $04;
  902. // PORTMUX_LUT0
  903. LUT0mask = $10;
  904. LUT0_DEFAULT = $00;
  905. LUT0_ALTERNATE = $10;
  906. // PORTMUX_LUT1
  907. LUT1mask = $20;
  908. LUT1_DEFAULT = $00;
  909. LUT1_ALTERNATE = $20;
  910. // PORTMUX_SPI0
  911. SPI0mask = $04;
  912. SPI0_DEFAULT = $00;
  913. SPI0_ALTERNATE = $04;
  914. // PORTMUX_USART0
  915. USART0mask = $01;
  916. USART0_DEFAULT = $00;
  917. USART0_ALTERNATE = $01;
  918. // PORTMUX_TCA00
  919. TCA00mask = $01;
  920. TCA00_DEFAULT = $00;
  921. TCA00_ALTERNATE = $01;
  922. // PORTMUX_TCA01
  923. TCA01mask = $02;
  924. TCA01_DEFAULT = $00;
  925. TCA01_ALTERNATE = $02;
  926. // PORTMUX_TCA02
  927. TCA02mask = $04;
  928. TCA02_DEFAULT = $00;
  929. TCA02_ALTERNATE = $04;
  930. // PORTMUX_TCA03
  931. TCA03mask = $08;
  932. TCA03_DEFAULT = $00;
  933. TCA03_ALTERNATE = $08;
  934. // PORTMUX_TCA04
  935. TCA04mask = $10;
  936. TCA04_DEFAULT = $00;
  937. TCA04_ALTERNATE = $10;
  938. // PORTMUX_TCA05
  939. TCA05mask = $20;
  940. TCA05_DEFAULT = $00;
  941. TCA05_ALTERNATE = $20;
  942. // PORTMUX_TCB0
  943. TCB0mask = $01;
  944. TCB0_DEFAULT = $00;
  945. TCB0_ALTERNATE = $01;
  946. end;
  947. TRSTCTRL = object //Reset controller
  948. RSTFR: byte; //Reset Flags
  949. SWRR: byte; //Software Reset
  950. const
  951. // Brown out detector Reset flag
  952. BORFbm = $02;
  953. // External Reset flag
  954. EXTRFbm = $04;
  955. // Power on Reset flag
  956. PORFbm = $01;
  957. // Software Reset flag
  958. SWRFbm = $10;
  959. // UPDI Reset flag
  960. UPDIRFbm = $20;
  961. // Watch dog Reset flag
  962. WDRFbm = $08;
  963. // Software reset enable
  964. SWREbm = $01;
  965. end;
  966. TRTC = object //Real-Time Counter
  967. CTRLA: byte; //Control A
  968. STATUS: byte; //Status
  969. INTCTRL: byte; //Interrupt Control
  970. INTFLAGS: byte; //Interrupt Flags
  971. TEMP: byte; //Temporary
  972. DBGCTRL: byte; //Debug control
  973. Reserved6: byte;
  974. CLKSEL: byte; //Clock Select
  975. CNT: word; //Counter
  976. PER: word; //Period
  977. CMP: word; //Compare
  978. Reserved14: byte;
  979. Reserved15: byte;
  980. PITCTRLA: byte; //PIT Control A
  981. PITSTATUS: byte; //PIT Status
  982. PITINTCTRL: byte; //PIT Interrupt Control
  983. PITINTFLAGS: byte; //PIT Interrupt Flags
  984. Reserved20: byte;
  985. PITDBGCTRL: byte; //PIT Debug control
  986. const
  987. // RTC_CLKSEL
  988. CLKSELmask = $03;
  989. CLKSEL_INT32K = $00;
  990. CLKSEL_INT1K = $01;
  991. CLKSEL_TOSC32K = $02;
  992. CLKSEL_EXTCLK = $03;
  993. // RTC_PRESCALER
  994. PRESCALERmask = $78;
  995. PRESCALER_DIV1 = $00;
  996. PRESCALER_DIV2 = $08;
  997. PRESCALER_DIV4 = $10;
  998. PRESCALER_DIV8 = $18;
  999. PRESCALER_DIV16 = $20;
  1000. PRESCALER_DIV32 = $28;
  1001. PRESCALER_DIV64 = $30;
  1002. PRESCALER_DIV128 = $38;
  1003. PRESCALER_DIV256 = $40;
  1004. PRESCALER_DIV512 = $48;
  1005. PRESCALER_DIV1024 = $50;
  1006. PRESCALER_DIV2048 = $58;
  1007. PRESCALER_DIV4096 = $60;
  1008. PRESCALER_DIV8192 = $68;
  1009. PRESCALER_DIV16384 = $70;
  1010. PRESCALER_DIV32768 = $78;
  1011. // Enable
  1012. RTCENbm = $01;
  1013. // Run In Standby
  1014. RUNSTDBYbm = $80;
  1015. // Run in debug
  1016. DBGRUNbm = $01;
  1017. // Compare Match Interrupt enable
  1018. CMPbm = $02;
  1019. // Overflow Interrupt enable
  1020. OVFbm = $01;
  1021. // RTC_PERIOD
  1022. PERIODmask = $78;
  1023. PERIOD_OFF = $00;
  1024. PERIOD_CYC4 = $08;
  1025. PERIOD_CYC8 = $10;
  1026. PERIOD_CYC16 = $18;
  1027. PERIOD_CYC32 = $20;
  1028. PERIOD_CYC64 = $28;
  1029. PERIOD_CYC128 = $30;
  1030. PERIOD_CYC256 = $38;
  1031. PERIOD_CYC512 = $40;
  1032. PERIOD_CYC1024 = $48;
  1033. PERIOD_CYC2048 = $50;
  1034. PERIOD_CYC4096 = $58;
  1035. PERIOD_CYC8192 = $60;
  1036. PERIOD_CYC16384 = $68;
  1037. PERIOD_CYC32768 = $70;
  1038. // Enable
  1039. PITENbm = $01;
  1040. // Periodic Interrupt
  1041. PIbm = $01;
  1042. // CTRLA Synchronization Busy Flag
  1043. CTRLBUSYbm = $01;
  1044. // Comparator Synchronization Busy Flag
  1045. CMPBUSYbm = $08;
  1046. // Count Synchronization Busy Flag
  1047. CNTBUSYbm = $02;
  1048. // CTRLA Synchronization Busy Flag
  1049. CTRLABUSYbm = $01;
  1050. // Period Synchronization Busy Flag
  1051. PERBUSYbm = $04;
  1052. end;
  1053. TSIGROW = object //Signature row
  1054. DEVICEID0: byte; //Device ID Byte 0
  1055. DEVICEID1: byte; //Device ID Byte 1
  1056. DEVICEID2: byte; //Device ID Byte 2
  1057. SERNUM0: byte; //Serial Number Byte 0
  1058. SERNUM1: byte; //Serial Number Byte 1
  1059. SERNUM2: byte; //Serial Number Byte 2
  1060. SERNUM3: byte; //Serial Number Byte 3
  1061. SERNUM4: byte; //Serial Number Byte 4
  1062. SERNUM5: byte; //Serial Number Byte 5
  1063. SERNUM6: byte; //Serial Number Byte 6
  1064. SERNUM7: byte; //Serial Number Byte 7
  1065. SERNUM8: byte; //Serial Number Byte 8
  1066. SERNUM9: byte; //Serial Number Byte 9
  1067. Reserved13: byte;
  1068. Reserved14: byte;
  1069. Reserved15: byte;
  1070. Reserved16: byte;
  1071. Reserved17: byte;
  1072. Reserved18: byte;
  1073. Reserved19: byte;
  1074. Reserved20: byte;
  1075. Reserved21: byte;
  1076. Reserved22: byte;
  1077. Reserved23: byte;
  1078. Reserved24: byte;
  1079. Reserved25: byte;
  1080. Reserved26: byte;
  1081. Reserved27: byte;
  1082. Reserved28: byte;
  1083. Reserved29: byte;
  1084. Reserved30: byte;
  1085. Reserved31: byte;
  1086. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  1087. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  1088. OSC16ERR3V: byte; //OSC16 error at 3V
  1089. OSC16ERR5V: byte; //OSC16 error at 5V
  1090. OSC20ERR3V: byte; //OSC20 error at 3V
  1091. OSC20ERR5V: byte; //OSC20 error at 5V
  1092. end;
  1093. TSLPCTRL = object //Sleep Controller
  1094. CTRLA: byte; //Control
  1095. const
  1096. // Sleep enable
  1097. SENbm = $01;
  1098. // SLPCTRL_SMODE
  1099. SMODEmask = $06;
  1100. SMODE_IDLE = $00;
  1101. SMODE_STDBY = $02;
  1102. SMODE_PDOWN = $04;
  1103. end;
  1104. TSPI = object //Serial Peripheral Interface
  1105. CTRLA: byte; //Control A
  1106. CTRLB: byte; //Control B
  1107. INTCTRL: byte; //Interrupt Control
  1108. INTFLAGS: byte; //Interrupt Flags
  1109. DATA: byte; //Data
  1110. const
  1111. // Enable Double Speed
  1112. CLK2Xbm = $10;
  1113. // Data Order Setting
  1114. DORDbm = $40;
  1115. // Enable Module
  1116. ENABLEbm = $01;
  1117. // Master Operation Enable
  1118. MASTERbm = $20;
  1119. // SPI_PRESC
  1120. PRESCmask = $06;
  1121. PRESC_DIV4 = $00;
  1122. PRESC_DIV16 = $02;
  1123. PRESC_DIV64 = $04;
  1124. PRESC_DIV128 = $06;
  1125. // Buffer Mode Enable
  1126. BUFENbm = $80;
  1127. // Buffer Write Mode
  1128. BUFWRbm = $40;
  1129. // SPI_MODE
  1130. MODEmask = $03;
  1131. MODE_0 = $00;
  1132. MODE_1 = $01;
  1133. MODE_2 = $02;
  1134. MODE_3 = $03;
  1135. // Slave Select Disable
  1136. SSDbm = $04;
  1137. // Data Register Empty Interrupt Enable
  1138. DREIEbm = $20;
  1139. // Interrupt Enable
  1140. IEbm = $01;
  1141. // Receive Complete Interrupt Enable
  1142. RXCIEbm = $80;
  1143. // Slave Select Trigger Interrupt Enable
  1144. SSIEbm = $10;
  1145. // Transfer Complete Interrupt Enable
  1146. TXCIEbm = $40;
  1147. // Buffer Overflow
  1148. BUFOVFbm = $01;
  1149. // Data Register Empty Interrupt Flag
  1150. DREIFbm = $20;
  1151. // Receive Complete Interrupt Flag
  1152. RXCIFbm = $80;
  1153. // Slave Select Trigger Interrupt Flag
  1154. SSIFbm = $10;
  1155. // Transfer Complete Interrupt Flag
  1156. TXCIFbm = $40;
  1157. // Interrupt Flag
  1158. IFbm = $80;
  1159. // Write Collision
  1160. WRCOLbm = $40;
  1161. end;
  1162. TSYSCFG = object //System Configuration Registers
  1163. Reserved0: byte;
  1164. REVID: byte; //Revision ID
  1165. EXTBRK: byte; //External Break
  1166. const
  1167. // External break enable
  1168. ENEXTBRKbm = $01;
  1169. end;
  1170. TTCA_SINGLE = object //16-bit Timer/Counter Type A - Single Mode
  1171. CTRLA: byte; //Control A
  1172. CTRLB: byte; //Control B
  1173. CTRLC: byte; //Control C
  1174. CTRLD: byte; //Control D
  1175. CTRLECLR: byte; //Control E Clear
  1176. CTRLESET: byte; //Control E Set
  1177. CTRLFCLR: byte; //Control F Clear
  1178. CTRLFSET: byte; //Control F Set
  1179. Reserved8: byte;
  1180. EVCTRL: byte; //Event Control
  1181. INTCTRL: byte; //Interrupt Control
  1182. INTFLAGS: byte; //Interrupt Flags
  1183. Reserved12: byte;
  1184. Reserved13: byte;
  1185. DBGCTRL: byte; //Degbug Control
  1186. TEMP: byte; //Temporary data for 16-bit Access
  1187. Reserved16: byte;
  1188. Reserved17: byte;
  1189. Reserved18: byte;
  1190. Reserved19: byte;
  1191. Reserved20: byte;
  1192. Reserved21: byte;
  1193. Reserved22: byte;
  1194. Reserved23: byte;
  1195. Reserved24: byte;
  1196. Reserved25: byte;
  1197. Reserved26: byte;
  1198. Reserved27: byte;
  1199. Reserved28: byte;
  1200. Reserved29: byte;
  1201. Reserved30: byte;
  1202. Reserved31: byte;
  1203. CNT: word; //Count
  1204. Reserved34: byte;
  1205. Reserved35: byte;
  1206. Reserved36: byte;
  1207. Reserved37: byte;
  1208. PER: word; //Period
  1209. CMP0: word; //Compare 0
  1210. CMP1: word; //Compare 1
  1211. CMP2: word; //Compare 2
  1212. Reserved46: byte;
  1213. Reserved47: byte;
  1214. Reserved48: byte;
  1215. Reserved49: byte;
  1216. Reserved50: byte;
  1217. Reserved51: byte;
  1218. Reserved52: byte;
  1219. Reserved53: byte;
  1220. PERBUF: word; //Period Buffer
  1221. CMP0BUF: word; //Compare 0 Buffer
  1222. CMP1BUF: word; //Compare 1 Buffer
  1223. CMP2BUF: word; //Compare 2 Buffer
  1224. const
  1225. // TCA_SINGLE_CLKSEL
  1226. SINGLE_CLKSELmask = $0E;
  1227. SINGLE_CLKSEL_DIV1 = $00;
  1228. SINGLE_CLKSEL_DIV2 = $02;
  1229. SINGLE_CLKSEL_DIV4 = $04;
  1230. SINGLE_CLKSEL_DIV8 = $06;
  1231. SINGLE_CLKSEL_DIV16 = $08;
  1232. SINGLE_CLKSEL_DIV64 = $0A;
  1233. SINGLE_CLKSEL_DIV256 = $0C;
  1234. SINGLE_CLKSEL_DIV1024 = $0E;
  1235. // Module Enable
  1236. ENABLEbm = $01;
  1237. // Auto Lock Update
  1238. ALUPDbm = $08;
  1239. // Compare 0 Enable
  1240. CMP0ENbm = $10;
  1241. // Compare 1 Enable
  1242. CMP1ENbm = $20;
  1243. // Compare 2 Enable
  1244. CMP2ENbm = $40;
  1245. // TCA_SINGLE_WGMODE
  1246. SINGLE_WGMODEmask = $07;
  1247. SINGLE_WGMODE_NORMAL = $00;
  1248. SINGLE_WGMODE_FRQ = $01;
  1249. SINGLE_WGMODE_SINGLESLOPE = $03;
  1250. SINGLE_WGMODE_DSTOP = $05;
  1251. SINGLE_WGMODE_DSBOTH = $06;
  1252. SINGLE_WGMODE_DSBOTTOM = $07;
  1253. // Compare 0 Waveform Output Value
  1254. CMP0OVbm = $01;
  1255. // Compare 1 Waveform Output Value
  1256. CMP1OVbm = $02;
  1257. // Compare 2 Waveform Output Value
  1258. CMP2OVbm = $04;
  1259. // Split Mode Enable
  1260. SPLITMbm = $01;
  1261. // TCA_SINGLE_CMD
  1262. SINGLE_CMDmask = $0C;
  1263. SINGLE_CMD_NONE = $00;
  1264. SINGLE_CMD_UPDATE = $04;
  1265. SINGLE_CMD_RESTART = $08;
  1266. SINGLE_CMD_RESET = $0C;
  1267. // Direction
  1268. DIRbm = $01;
  1269. // Lock Update
  1270. LUPDbm = $02;
  1271. // Compare 0 Buffer Valid
  1272. CMP0BVbm = $02;
  1273. // Compare 1 Buffer Valid
  1274. CMP1BVbm = $04;
  1275. // Compare 2 Buffer Valid
  1276. CMP2BVbm = $08;
  1277. // Period Buffer Valid
  1278. PERBVbm = $01;
  1279. // Debug Run
  1280. DBGRUNbm = $01;
  1281. // Count on Event Input
  1282. CNTEIbm = $01;
  1283. // TCA_SINGLE_EVACT
  1284. SINGLE_EVACTmask = $06;
  1285. SINGLE_EVACT_POSEDGE = $00;
  1286. SINGLE_EVACT_ANYEDGE = $02;
  1287. SINGLE_EVACT_HIGHLVL = $04;
  1288. SINGLE_EVACT_UPDOWN = $06;
  1289. // Compare 0 Interrupt
  1290. CMP0bm = $10;
  1291. // Compare 1 Interrupt
  1292. CMP1bm = $20;
  1293. // Compare 2 Interrupt
  1294. CMP2bm = $40;
  1295. // Overflow Interrupt
  1296. OVFbm = $01;
  1297. end;
  1298. TTCA_SPLIT = object //16-bit Timer/Counter Type A - Split Mode
  1299. CTRLA: byte; //Control A
  1300. CTRLB: byte; //Control B
  1301. CTRLC: byte; //Control C
  1302. CTRLD: byte; //Control D
  1303. CTRLECLR: byte; //Control E Clear
  1304. CTRLESET: byte; //Control E Set
  1305. Reserved6: byte;
  1306. Reserved7: byte;
  1307. Reserved8: byte;
  1308. Reserved9: byte;
  1309. INTCTRL: byte; //Interrupt Control
  1310. INTFLAGS: byte; //Interrupt Flags
  1311. Reserved12: byte;
  1312. Reserved13: byte;
  1313. DBGCTRL: byte; //Degbug Control
  1314. Reserved15: byte;
  1315. Reserved16: byte;
  1316. Reserved17: byte;
  1317. Reserved18: byte;
  1318. Reserved19: byte;
  1319. Reserved20: byte;
  1320. Reserved21: byte;
  1321. Reserved22: byte;
  1322. Reserved23: byte;
  1323. Reserved24: byte;
  1324. Reserved25: byte;
  1325. Reserved26: byte;
  1326. Reserved27: byte;
  1327. Reserved28: byte;
  1328. Reserved29: byte;
  1329. Reserved30: byte;
  1330. Reserved31: byte;
  1331. LCNT: byte; //Low Count
  1332. HCNT: byte; //High Count
  1333. Reserved34: byte;
  1334. Reserved35: byte;
  1335. Reserved36: byte;
  1336. Reserved37: byte;
  1337. LPER: byte; //Low Period
  1338. HPER: byte; //High Period
  1339. LCMP0: byte; //Low Compare
  1340. HCMP0: byte; //High Compare
  1341. LCMP1: byte; //Low Compare
  1342. HCMP1: byte; //High Compare
  1343. LCMP2: byte; //Low Compare
  1344. HCMP2: byte; //High Compare
  1345. const
  1346. // TCA_SPLIT_CLKSEL
  1347. SPLIT_CLKSELmask = $0E;
  1348. SPLIT_CLKSEL_DIV1 = $00;
  1349. SPLIT_CLKSEL_DIV2 = $02;
  1350. SPLIT_CLKSEL_DIV4 = $04;
  1351. SPLIT_CLKSEL_DIV8 = $06;
  1352. SPLIT_CLKSEL_DIV16 = $08;
  1353. SPLIT_CLKSEL_DIV64 = $0A;
  1354. SPLIT_CLKSEL_DIV256 = $0C;
  1355. SPLIT_CLKSEL_DIV1024 = $0E;
  1356. // Module Enable
  1357. ENABLEbm = $01;
  1358. // High Compare 0 Enable
  1359. HCMP0ENbm = $10;
  1360. // High Compare 1 Enable
  1361. HCMP1ENbm = $20;
  1362. // High Compare 2 Enable
  1363. HCMP2ENbm = $40;
  1364. // Low Compare 0 Enable
  1365. LCMP0ENbm = $01;
  1366. // Low Compare 1 Enable
  1367. LCMP1ENbm = $02;
  1368. // Low Compare 2 Enable
  1369. LCMP2ENbm = $04;
  1370. // High Compare 0 Output Value
  1371. HCMP0OVbm = $10;
  1372. // High Compare 1 Output Value
  1373. HCMP1OVbm = $20;
  1374. // High Compare 2 Output Value
  1375. HCMP2OVbm = $40;
  1376. // Low Compare 0 Output Value
  1377. LCMP0OVbm = $01;
  1378. // Low Compare 1 Output Value
  1379. LCMP1OVbm = $02;
  1380. // Low Compare 2 Output Value
  1381. LCMP2OVbm = $04;
  1382. // Split Mode Enable
  1383. SPLITMbm = $01;
  1384. // TCA_SPLIT_CMD
  1385. SPLIT_CMDmask = $0C;
  1386. SPLIT_CMD_NONE = $00;
  1387. SPLIT_CMD_UPDATE = $04;
  1388. SPLIT_CMD_RESTART = $08;
  1389. SPLIT_CMD_RESET = $0C;
  1390. // Debug Run
  1391. DBGRUNbm = $01;
  1392. // High Underflow Interrupt Enable
  1393. HUNFbm = $02;
  1394. // Low Compare 0 Interrupt Enable
  1395. LCMP0bm = $10;
  1396. // Low Compare 1 Interrupt Enable
  1397. LCMP1bm = $20;
  1398. // Low Compare 2 Interrupt Enable
  1399. LCMP2bm = $40;
  1400. // Low Underflow Interrupt Enable
  1401. LUNFbm = $01;
  1402. end;
  1403. TTCA = record //16-bit Timer/Counter Type A
  1404. case byte of
  1405. 0: (SINGLE: TTCA_SINGLE);
  1406. 1: (SPLIT: TTCA_SPLIT);
  1407. end;
  1408. TTCB = object //16-bit Timer Type B
  1409. CTRLA: byte; //Control A
  1410. CTRLB: byte; //Control Register B
  1411. Reserved2: byte;
  1412. Reserved3: byte;
  1413. EVCTRL: byte; //Event Control
  1414. INTCTRL: byte; //Interrupt Control
  1415. INTFLAGS: byte; //Interrupt Flags
  1416. STATUS: byte; //Status
  1417. DBGCTRL: byte; //Debug Control
  1418. TEMP: byte; //Temporary Value
  1419. CNT: word; //Count
  1420. CCMP: word; //Compare or Capture
  1421. const
  1422. // TCB_CLKSEL
  1423. CLKSELmask = $06;
  1424. CLKSEL_CLKDIV1 = $00;
  1425. CLKSEL_CLKDIV2 = $02;
  1426. CLKSEL_CLKTCA = $04;
  1427. // Enable
  1428. ENABLEbm = $01;
  1429. // Run Standby
  1430. RUNSTDBYbm = $40;
  1431. // Synchronize Update
  1432. SYNCUPDbm = $10;
  1433. // Asynchronous Enable
  1434. ASYNCbm = $40;
  1435. // Pin Output Enable
  1436. CCMPENbm = $10;
  1437. // Pin Initial State
  1438. CCMPINITbm = $20;
  1439. // TCB_CNTMODE
  1440. CNTMODEmask = $07;
  1441. CNTMODE_INT = $00;
  1442. CNTMODE_TIMEOUT = $01;
  1443. CNTMODE_CAPT = $02;
  1444. CNTMODE_FRQ = $03;
  1445. CNTMODE_PW = $04;
  1446. CNTMODE_FRQPW = $05;
  1447. CNTMODE_SINGLE = $06;
  1448. CNTMODE_PWM8 = $07;
  1449. // Debug Run
  1450. DBGRUNbm = $01;
  1451. // Event Input Enable
  1452. CAPTEIbm = $01;
  1453. // Event Edge
  1454. EDGEbm = $10;
  1455. // Input Capture Noise Cancellation Filter
  1456. FILTERbm = $40;
  1457. // Capture or Timeout
  1458. CAPTbm = $01;
  1459. // Run
  1460. RUNbm = $01;
  1461. end;
  1462. TTWI = object //Two-Wire Interface
  1463. CTRLA: byte; //Control A
  1464. Reserved1: byte;
  1465. DBGCTRL: byte; //Debug Control Register
  1466. MCTRLA: byte; //Master Control A
  1467. MCTRLB: byte; //Master Control B
  1468. MSTATUS: byte; //Master Status
  1469. MBAUD: byte; //Master Baurd Rate Control
  1470. MADDR: byte; //Master Address
  1471. MDATA: byte; //Master Data
  1472. SCTRLA: byte; //Slave Control A
  1473. SCTRLB: byte; //Slave Control B
  1474. SSTATUS: byte; //Slave Status
  1475. SADDR: byte; //Slave Address
  1476. SDATA: byte; //Slave Data
  1477. SADDRMASK: byte; //Slave Address Mask
  1478. const
  1479. // FM Plus Enable
  1480. FMPENbm = $02;
  1481. // TWI_DEFAULT_SDAHOLD
  1482. DEFAULT_SDAHOLDmask = $0C;
  1483. DEFAULT_SDAHOLD_OFF = $00;
  1484. DEFAULT_SDAHOLD_50NS = $04;
  1485. DEFAULT_SDAHOLD_300NS = $08;
  1486. DEFAULT_SDAHOLD_500NS = $0C;
  1487. // TWI_DEFAULT_SDASETUP
  1488. DEFAULT_SDASETUPmask = $10;
  1489. DEFAULT_SDASETUP_4CYC = $00;
  1490. DEFAULT_SDASETUP_8CYC = $10;
  1491. // Debug Run
  1492. DBGRUNbm = $01;
  1493. // Enable TWI Master
  1494. ENABLEbm = $01;
  1495. // Quick Command Enable
  1496. QCENbm = $10;
  1497. // Read Interrupt Enable
  1498. RIENbm = $80;
  1499. // Smart Mode Enable
  1500. SMENbm = $02;
  1501. // TWI_TIMEOUT
  1502. TIMEOUTmask = $0C;
  1503. TIMEOUT_DISABLED = $00;
  1504. TIMEOUT_50US = $04;
  1505. TIMEOUT_100US = $08;
  1506. TIMEOUT_200US = $0C;
  1507. // Write Interrupt Enable
  1508. WIENbm = $40;
  1509. // TWI_ACKACT
  1510. ACKACTmask = $04;
  1511. ACKACT_ACK = $00;
  1512. ACKACT_NACK = $04;
  1513. // Flush
  1514. FLUSHbm = $08;
  1515. // TWI_MCMD
  1516. MCMDmask = $03;
  1517. MCMD_NOACT = $00;
  1518. MCMD_REPSTART = $01;
  1519. MCMD_RECVTRANS = $02;
  1520. MCMD_STOP = $03;
  1521. // Arbitration Lost
  1522. ARBLOSTbm = $08;
  1523. // Bus Error
  1524. BUSERRbm = $04;
  1525. // TWI_BUSSTATE
  1526. BUSSTATEmask = $03;
  1527. BUSSTATE_UNKNOWN = $00;
  1528. BUSSTATE_IDLE = $01;
  1529. BUSSTATE_OWNER = $02;
  1530. BUSSTATE_BUSY = $03;
  1531. // Clock Hold
  1532. CLKHOLDbm = $20;
  1533. // Read Interrupt Flag
  1534. RIFbm = $80;
  1535. // Received Acknowledge
  1536. RXACKbm = $10;
  1537. // Write Interrupt Flag
  1538. WIFbm = $40;
  1539. // Address Enable
  1540. ADDRENbm = $01;
  1541. // Address Mask
  1542. ADDRMASK0bm = $02;
  1543. ADDRMASK1bm = $04;
  1544. ADDRMASK2bm = $08;
  1545. ADDRMASK3bm = $10;
  1546. ADDRMASK4bm = $20;
  1547. ADDRMASK5bm = $40;
  1548. ADDRMASK6bm = $80;
  1549. // Address/Stop Interrupt Enable
  1550. APIENbm = $40;
  1551. // Data Interrupt Enable
  1552. DIENbm = $80;
  1553. // Stop Interrupt Enable
  1554. PIENbm = $20;
  1555. // Promiscuous Mode Enable
  1556. PMENbm = $04;
  1557. // TWI_SCMD
  1558. SCMDmask = $03;
  1559. SCMD_NOACT = $00;
  1560. SCMD_COMPTRANS = $02;
  1561. SCMD_RESPONSE = $03;
  1562. // TWI_AP
  1563. APmask = $01;
  1564. AP_STOP = $00;
  1565. AP_ADR = $01;
  1566. // Address/Stop Interrupt Flag
  1567. APIFbm = $40;
  1568. // Collision
  1569. COLLbm = $08;
  1570. // Data Interrupt Flag
  1571. DIFbm = $80;
  1572. // Read/Write Direction
  1573. DIRbm = $02;
  1574. end;
  1575. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1576. RXDATAL: byte; //Receive Data Low Byte
  1577. RXDATAH: byte; //Receive Data High Byte
  1578. TXDATAL: byte; //Transmit Data Low Byte
  1579. TXDATAH: byte; //Transmit Data High Byte
  1580. STATUS: byte; //Status
  1581. CTRLA: byte; //Control A
  1582. CTRLB: byte; //Control B
  1583. CTRLC: byte; //Control C
  1584. BAUD: word; //Baud Rate
  1585. Reserved10: byte;
  1586. DBGCTRL: byte; //Debug Control
  1587. EVCTRL: byte; //Event Control
  1588. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1589. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1590. const
  1591. // Auto-baud Error Interrupt Enable
  1592. ABEIEbm = $04;
  1593. // Data Register Empty Interrupt Enable
  1594. DREIEbm = $20;
  1595. // Loop-back Mode Enable
  1596. LBMEbm = $08;
  1597. // USART_RS485
  1598. RS485mask = $03;
  1599. RS485_OFF = $00;
  1600. RS485_EXT = $01;
  1601. RS485_INT = $02;
  1602. // Receive Complete Interrupt Enable
  1603. RXCIEbm = $80;
  1604. // Receiver Start Frame Interrupt Enable
  1605. RXSIEbm = $10;
  1606. // Transmit Complete Interrupt Enable
  1607. TXCIEbm = $40;
  1608. // Multi-processor Communication Mode
  1609. MPCMbm = $01;
  1610. // Open Drain Mode Enable
  1611. ODMEbm = $08;
  1612. // Reciever enable
  1613. RXENbm = $80;
  1614. // USART_RXMODE
  1615. RXMODEmask = $06;
  1616. RXMODE_NORMAL = $00;
  1617. RXMODE_CLK2X = $02;
  1618. RXMODE_GENAUTO = $04;
  1619. RXMODE_LINAUTO = $06;
  1620. // Start Frame Detection Enable
  1621. SFDENbm = $10;
  1622. // Transmitter Enable
  1623. TXENbm = $40;
  1624. // USART_MSPI_CMODE
  1625. MSPI_CMODEmask = $C0;
  1626. MSPI_CMODE_ASYNCHRONOUS = $00;
  1627. MSPI_CMODE_SYNCHRONOUS = $40;
  1628. MSPI_CMODE_IRCOM = $80;
  1629. MSPI_CMODE_MSPI = $C0;
  1630. // SPI Master Mode, Clock Phase
  1631. UCPHAbm = $02;
  1632. // SPI Master Mode, Data Order
  1633. UDORDbm = $04;
  1634. // USART_NORMAL_CHSIZE
  1635. NORMAL_CHSIZEmask = $07;
  1636. NORMAL_CHSIZE_5BIT = $00;
  1637. NORMAL_CHSIZE_6BIT = $01;
  1638. NORMAL_CHSIZE_7BIT = $02;
  1639. NORMAL_CHSIZE_8BIT = $03;
  1640. NORMAL_CHSIZE_9BITL = $06;
  1641. NORMAL_CHSIZE_9BITH = $07;
  1642. // USART_NORMAL_CMODE
  1643. NORMAL_CMODEmask = $C0;
  1644. NORMAL_CMODE_ASYNCHRONOUS = $00;
  1645. NORMAL_CMODE_SYNCHRONOUS = $40;
  1646. NORMAL_CMODE_IRCOM = $80;
  1647. NORMAL_CMODE_MSPI = $C0;
  1648. // USART_NORMAL_PMODE
  1649. NORMAL_PMODEmask = $30;
  1650. NORMAL_PMODE_DISABLED = $00;
  1651. NORMAL_PMODE_EVEN = $20;
  1652. NORMAL_PMODE_ODD = $30;
  1653. // USART_NORMAL_SBMODE
  1654. NORMAL_SBMODEmask = $08;
  1655. NORMAL_SBMODE_1BIT = $00;
  1656. NORMAL_SBMODE_2BIT = $08;
  1657. // Autobaud majority voter bypass
  1658. ABMBPbm = $80;
  1659. // Debug Run
  1660. DBGRUNbm = $01;
  1661. // IrDA Event Input Enable
  1662. IREIbm = $01;
  1663. // Buffer Overflow
  1664. BUFOVFbm = $40;
  1665. // Receiver Data Register
  1666. DATA8bm = $01;
  1667. // Frame Error
  1668. FERRbm = $04;
  1669. // Parity Error
  1670. PERRbm = $02;
  1671. // Receive Complete Interrupt Flag
  1672. RXCIFbm = $80;
  1673. // RX Data
  1674. DATA0bm = $01;
  1675. DATA1bm = $02;
  1676. DATA2bm = $04;
  1677. DATA3bm = $08;
  1678. DATA4bm = $10;
  1679. DATA5bm = $20;
  1680. DATA6bm = $40;
  1681. DATA7bm = $80;
  1682. // Receiver Pulse Lenght
  1683. RXPL0bm = $01;
  1684. RXPL1bm = $02;
  1685. RXPL2bm = $04;
  1686. RXPL3bm = $08;
  1687. RXPL4bm = $10;
  1688. RXPL5bm = $20;
  1689. RXPL6bm = $40;
  1690. // Break Detected Flag
  1691. BDFbm = $02;
  1692. // Data Register Empty Flag
  1693. DREIFbm = $20;
  1694. // Inconsistent Sync Field Interrupt Flag
  1695. ISFIFbm = $08;
  1696. // Receive Start Interrupt
  1697. RXSIFbm = $10;
  1698. // Transmit Interrupt Flag
  1699. TXCIFbm = $40;
  1700. // Wait For Break
  1701. WFBbm = $01;
  1702. // Transmit pulse length
  1703. TXPL0bm = $01;
  1704. TXPL1bm = $02;
  1705. TXPL2bm = $04;
  1706. TXPL3bm = $08;
  1707. TXPL4bm = $10;
  1708. TXPL5bm = $20;
  1709. TXPL6bm = $40;
  1710. TXPL7bm = $80;
  1711. end;
  1712. TUSERROW = object //User Row
  1713. USERROW0: byte; //User Row Byte 0
  1714. USERROW1: byte; //User Row Byte 1
  1715. USERROW2: byte; //User Row Byte 2
  1716. USERROW3: byte; //User Row Byte 3
  1717. USERROW4: byte; //User Row Byte 4
  1718. USERROW5: byte; //User Row Byte 5
  1719. USERROW6: byte; //User Row Byte 6
  1720. USERROW7: byte; //User Row Byte 7
  1721. USERROW8: byte; //User Row Byte 8
  1722. USERROW9: byte; //User Row Byte 9
  1723. USERROW10: byte; //User Row Byte 10
  1724. USERROW11: byte; //User Row Byte 11
  1725. USERROW12: byte; //User Row Byte 12
  1726. USERROW13: byte; //User Row Byte 13
  1727. USERROW14: byte; //User Row Byte 14
  1728. USERROW15: byte; //User Row Byte 15
  1729. USERROW16: byte; //User Row Byte 16
  1730. USERROW17: byte; //User Row Byte 17
  1731. USERROW18: byte; //User Row Byte 18
  1732. USERROW19: byte; //User Row Byte 19
  1733. USERROW20: byte; //User Row Byte 20
  1734. USERROW21: byte; //User Row Byte 21
  1735. USERROW22: byte; //User Row Byte 22
  1736. USERROW23: byte; //User Row Byte 23
  1737. USERROW24: byte; //User Row Byte 24
  1738. USERROW25: byte; //User Row Byte 25
  1739. USERROW26: byte; //User Row Byte 26
  1740. USERROW27: byte; //User Row Byte 27
  1741. USERROW28: byte; //User Row Byte 28
  1742. USERROW29: byte; //User Row Byte 29
  1743. USERROW30: byte; //User Row Byte 30
  1744. USERROW31: byte; //User Row Byte 31
  1745. end;
  1746. TVPORT = object //Virtual Ports
  1747. DIR: byte; //Data Direction
  1748. OUT_: byte; //Output Value
  1749. IN_: byte; //Input Value
  1750. INTFLAGS: byte; //Interrupt Flags
  1751. const
  1752. // Pin Interrupt
  1753. INT0bm = $01;
  1754. INT1bm = $02;
  1755. INT2bm = $04;
  1756. INT3bm = $08;
  1757. INT4bm = $10;
  1758. INT5bm = $20;
  1759. INT6bm = $40;
  1760. INT7bm = $80;
  1761. end;
  1762. TVREF = object //Voltage reference
  1763. CTRLA: byte; //Control A
  1764. CTRLB: byte; //Control B
  1765. const
  1766. // VREF_ADC0REFSEL
  1767. ADC0REFSELmask = $70;
  1768. ADC0REFSEL_0V55 = $00;
  1769. ADC0REFSEL_1V1 = $10;
  1770. ADC0REFSEL_2V5 = $20;
  1771. ADC0REFSEL_4V34 = $30;
  1772. ADC0REFSEL_1V5 = $40;
  1773. // VREF_DAC0REFSEL
  1774. DAC0REFSELmask = $07;
  1775. DAC0REFSEL_0V55 = $00;
  1776. DAC0REFSEL_1V1 = $01;
  1777. DAC0REFSEL_2V5 = $02;
  1778. DAC0REFSEL_4V34 = $03;
  1779. DAC0REFSEL_1V5 = $04;
  1780. // ADC0 reference enable
  1781. ADC0REFENbm = $02;
  1782. // DAC0/AC0 reference enable
  1783. DAC0REFENbm = $01;
  1784. end;
  1785. TWDT = object //Watch-Dog Timer
  1786. CTRLA: byte; //Control A
  1787. STATUS: byte; //Status
  1788. const
  1789. // WDT_PERIOD
  1790. PERIODmask = $0F;
  1791. PERIOD_OFF = $00;
  1792. PERIOD_8CLK = $01;
  1793. PERIOD_16CLK = $02;
  1794. PERIOD_32CLK = $03;
  1795. PERIOD_64CLK = $04;
  1796. PERIOD_128CLK = $05;
  1797. PERIOD_256CLK = $06;
  1798. PERIOD_512CLK = $07;
  1799. PERIOD_1KCLK = $08;
  1800. PERIOD_2KCLK = $09;
  1801. PERIOD_4KCLK = $0A;
  1802. PERIOD_8KCLK = $0B;
  1803. // WDT_WINDOW
  1804. WINDOWmask = $F0;
  1805. WINDOW_OFF = $00;
  1806. WINDOW_8CLK = $10;
  1807. WINDOW_16CLK = $20;
  1808. WINDOW_32CLK = $30;
  1809. WINDOW_64CLK = $40;
  1810. WINDOW_128CLK = $50;
  1811. WINDOW_256CLK = $60;
  1812. WINDOW_512CLK = $70;
  1813. WINDOW_1KCLK = $80;
  1814. WINDOW_2KCLK = $90;
  1815. WINDOW_4KCLK = $A0;
  1816. WINDOW_8KCLK = $B0;
  1817. // Lock enable
  1818. LOCKbm = $80;
  1819. // Syncronization busy
  1820. SYNCBUSYbm = $01;
  1821. end;
  1822. const
  1823. Pin0idx = 0; Pin0bm = 1;
  1824. Pin1idx = 1; Pin1bm = 2;
  1825. Pin2idx = 2; Pin2bm = 4;
  1826. Pin3idx = 3; Pin3bm = 8;
  1827. Pin4idx = 4; Pin4bm = 16;
  1828. Pin5idx = 5; Pin5bm = 32;
  1829. Pin6idx = 6; Pin6bm = 64;
  1830. Pin7idx = 7; Pin7bm = 128;
  1831. var
  1832. VPORTA: TVPORT absolute $0000;
  1833. VPORTB: TVPORT absolute $0004;
  1834. VPORTC: TVPORT absolute $0008;
  1835. GPIO: TGPIO absolute $001C;
  1836. CPU: TCPU absolute $0030;
  1837. RSTCTRL: TRSTCTRL absolute $0040;
  1838. SLPCTRL: TSLPCTRL absolute $0050;
  1839. CLKCTRL: TCLKCTRL absolute $0060;
  1840. BOD: TBOD absolute $0080;
  1841. VREF: TVREF absolute $00A0;
  1842. WDT: TWDT absolute $0100;
  1843. CPUINT: TCPUINT absolute $0110;
  1844. CRCSCAN: TCRCSCAN absolute $0120;
  1845. RTC: TRTC absolute $0140;
  1846. EVSYS: TEVSYS absolute $0180;
  1847. CCL: TCCL absolute $01C0;
  1848. PORTMUX: TPORTMUX absolute $0200;
  1849. PORTA: TPORT absolute $0400;
  1850. PORTB: TPORT absolute $0420;
  1851. PORTC: TPORT absolute $0440;
  1852. ADC0: TADC absolute $0600;
  1853. AC0: TAC absolute $0680;
  1854. USART0: TUSART absolute $0800;
  1855. TWI0: TTWI absolute $0810;
  1856. SPI0: TSPI absolute $0820;
  1857. TCA0: TTCA absolute $0A00;
  1858. TCB0: TTCB absolute $0A40;
  1859. SYSCFG: TSYSCFG absolute $0F00;
  1860. NVMCTRL: TNVMCTRL absolute $1000;
  1861. SIGROW: TSIGROW absolute $1100;
  1862. FUSE: TFUSE absolute $1280;
  1863. LOCKBIT: TLOCKBIT absolute $128A;
  1864. USERROW: TUSERROW absolute $1300;
  1865. implementation
  1866. {$define RELBRANCHES}
  1867. {$i avrcommon.inc}
  1868. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  1869. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  1870. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 3
  1871. procedure PORTB_PORT_ISR; external name 'PORTB_PORT_ISR'; // Interrupt 4
  1872. procedure PORTC_PORT_ISR; external name 'PORTC_PORT_ISR'; // Interrupt 5
  1873. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 6
  1874. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 7
  1875. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 8
  1876. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 8
  1877. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 9
  1878. procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 10
  1879. //procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 10
  1880. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 11
  1881. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 11
  1882. procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 12
  1883. //procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 12
  1884. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 13
  1885. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 17
  1886. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 20
  1887. procedure ADC0_WCOMP_ISR; external name 'ADC0_WCOMP_ISR'; // Interrupt 21
  1888. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 24
  1889. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 25
  1890. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 26
  1891. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 27
  1892. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 28
  1893. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 29
  1894. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 30
  1895. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  1896. asm
  1897. rjmp __dtors_end
  1898. rjmp CRCSCAN_NMI_ISR
  1899. rjmp BOD_VLM_ISR
  1900. rjmp PORTA_PORT_ISR
  1901. rjmp PORTB_PORT_ISR
  1902. rjmp PORTC_PORT_ISR
  1903. rjmp RTC_CNT_ISR
  1904. rjmp RTC_PIT_ISR
  1905. rjmp TCA0_LUNF_ISR
  1906. // rjmp TCA0_OVF_ISR
  1907. rjmp TCA0_HUNF_ISR
  1908. rjmp TCA0_LCMP0_ISR
  1909. // rjmp TCA0_CMP0_ISR
  1910. rjmp TCA0_CMP1_ISR
  1911. // rjmp TCA0_LCMP1_ISR
  1912. rjmp TCA0_CMP2_ISR
  1913. // rjmp TCA0_LCMP2_ISR
  1914. rjmp TCB0_INT_ISR
  1915. rjmp AC0_AC_ISR
  1916. rjmp ADC0_RESRDY_ISR
  1917. rjmp ADC0_WCOMP_ISR
  1918. rjmp TWI0_TWIS_ISR
  1919. rjmp TWI0_TWIM_ISR
  1920. rjmp SPI0_INT_ISR
  1921. rjmp USART0_RXC_ISR
  1922. rjmp USART0_DRE_ISR
  1923. rjmp USART0_TXC_ISR
  1924. rjmp NVMCTRL_EE_ISR
  1925. .weak CRCSCAN_NMI_ISR
  1926. .weak BOD_VLM_ISR
  1927. .weak PORTA_PORT_ISR
  1928. .weak PORTB_PORT_ISR
  1929. .weak PORTC_PORT_ISR
  1930. .weak RTC_CNT_ISR
  1931. .weak RTC_PIT_ISR
  1932. .weak TCA0_LUNF_ISR
  1933. // .weak TCA0_OVF_ISR
  1934. .weak TCA0_HUNF_ISR
  1935. .weak TCA0_LCMP0_ISR
  1936. // .weak TCA0_CMP0_ISR
  1937. .weak TCA0_CMP1_ISR
  1938. // .weak TCA0_LCMP1_ISR
  1939. .weak TCA0_CMP2_ISR
  1940. // .weak TCA0_LCMP2_ISR
  1941. .weak TCB0_INT_ISR
  1942. .weak AC0_AC_ISR
  1943. .weak ADC0_RESRDY_ISR
  1944. .weak ADC0_WCOMP_ISR
  1945. .weak TWI0_TWIS_ISR
  1946. .weak TWI0_TWIM_ISR
  1947. .weak SPI0_INT_ISR
  1948. .weak USART0_RXC_ISR
  1949. .weak USART0_DRE_ISR
  1950. .weak USART0_TXC_ISR
  1951. .weak NVMCTRL_EE_ISR
  1952. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  1953. .set BOD_VLM_ISR, Default_IRQ_handler
  1954. .set PORTA_PORT_ISR, Default_IRQ_handler
  1955. .set PORTB_PORT_ISR, Default_IRQ_handler
  1956. .set PORTC_PORT_ISR, Default_IRQ_handler
  1957. .set RTC_CNT_ISR, Default_IRQ_handler
  1958. .set RTC_PIT_ISR, Default_IRQ_handler
  1959. .set TCA0_LUNF_ISR, Default_IRQ_handler
  1960. // .set TCA0_OVF_ISR, Default_IRQ_handler
  1961. .set TCA0_HUNF_ISR, Default_IRQ_handler
  1962. .set TCA0_LCMP0_ISR, Default_IRQ_handler
  1963. // .set TCA0_CMP0_ISR, Default_IRQ_handler
  1964. .set TCA0_CMP1_ISR, Default_IRQ_handler
  1965. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  1966. .set TCA0_CMP2_ISR, Default_IRQ_handler
  1967. // .set TCA0_LCMP2_ISR, Default_IRQ_handler
  1968. .set TCB0_INT_ISR, Default_IRQ_handler
  1969. .set AC0_AC_ISR, Default_IRQ_handler
  1970. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  1971. .set ADC0_WCOMP_ISR, Default_IRQ_handler
  1972. .set TWI0_TWIS_ISR, Default_IRQ_handler
  1973. .set TWI0_TWIM_ISR, Default_IRQ_handler
  1974. .set SPI0_INT_ISR, Default_IRQ_handler
  1975. .set USART0_RXC_ISR, Default_IRQ_handler
  1976. .set USART0_DRE_ISR, Default_IRQ_handler
  1977. .set USART0_TXC_ISR, Default_IRQ_handler
  1978. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  1979. end;
  1980. end.