cgobj.pas 140 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330
  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symbase,symtype,symdef,symtable,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. sould be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. alignment : talignment;
  48. rg : array[tregistertype] of trgobj;
  49. t_times : longint;
  50. {$ifdef flowgraph}
  51. aktflownode:word;
  52. {$endif}
  53. {************************************************}
  54. { basic routines }
  55. constructor create;
  56. {# Initialize the register allocators needed for the codegenerator.}
  57. procedure init_register_allocators;virtual;
  58. {# Clean up the register allocators needed for the codegenerator.}
  59. procedure done_register_allocators;virtual;
  60. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  61. procedure set_regalloc_extend_backwards(b: boolean);
  62. {$ifdef flowgraph}
  63. procedure init_flowgraph;
  64. procedure done_flowgraph;
  65. {$endif}
  66. {# Gets a register suitable to do integer operations on.}
  67. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  68. {# Gets a register suitable to do integer operations on.}
  69. function getaddressregister(list:TAsmList):Tregister;virtual;
  70. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  71. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;abstract;
  73. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  74. the cpu specific child cg object have such a method?}
  75. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  76. procedure add_move_instruction(instr:Taicpu);virtual;
  77. function uses_registers(rt:Tregistertype):boolean;virtual;
  78. {# Get a specific register.}
  79. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  80. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  81. {# Get multiple registers specified.}
  82. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  83. {# Free multiple registers specified.}
  84. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  85. procedure allocallcpuregisters(list:TAsmList);virtual;
  86. procedure deallocallcpuregisters(list:TAsmList);virtual;
  87. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  88. procedure translate_register(var reg : tregister);
  89. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  90. {# Emit a label to the instruction stream. }
  91. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  92. {# Allocates register r by inserting a pai_realloc record }
  93. procedure a_reg_alloc(list : TAsmList;r : tregister);
  94. {# Deallocates register r by inserting a pa_regdealloc record}
  95. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  96. { Synchronize register, make sure it is still valid }
  97. procedure a_reg_sync(list : TAsmList;r : tregister);
  98. {# Pass a parameter, which is located in a register, to a routine.
  99. This routine should push/send the parameter to the routine, as
  100. required by the specific processor ABI and routine modifiers.
  101. This must be overriden for each CPU target.
  102. @param(size size of the operand in the register)
  103. @param(r register source of the operand)
  104. @param(cgpara where the parameter will be stored)
  105. }
  106. procedure a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  107. {# Pass a parameter, which is a constant, to a routine.
  108. A generic version is provided. This routine should
  109. be overriden for optimization purposes if the cpu
  110. permits directly sending this type of parameter.
  111. @param(size size of the operand in constant)
  112. @param(a value of constant to send)
  113. @param(cgpara where the parameter will be stored)
  114. }
  115. procedure a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  116. {# Pass the value of a parameter, which is located in memory, to a routine.
  117. A generic version is provided. This routine should
  118. be overriden for optimization purposes if the cpu
  119. permits directly sending this type of parameter.
  120. @param(size size of the operand in constant)
  121. @param(r Memory reference of value to send)
  122. @param(cgpara where the parameter will be stored)
  123. }
  124. procedure a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  125. {# Pass the value of a parameter, which can be located either in a register or memory location,
  126. to a routine.
  127. A generic version is provided.
  128. @param(l location of the operand to send)
  129. @param(nr parameter number (starting from one) of routine (from left to right))
  130. @param(cgpara where the parameter will be stored)
  131. }
  132. procedure a_param_loc(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  133. {# Pass the address of a reference to a routine. This routine
  134. will calculate the address of the reference, and pass this
  135. calculated address as a parameter.
  136. A generic version is provided. This routine should
  137. be overriden for optimization purposes if the cpu
  138. permits directly sending this type of parameter.
  139. @param(r reference to get address from)
  140. @param(nr parameter number (starting from one) of routine (from left to right))
  141. }
  142. procedure a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  143. { Remarks:
  144. * If a method specifies a size you have only to take care
  145. of that number of bits, i.e. load_const_reg with OP_8 must
  146. only load the lower 8 bit of the specified register
  147. the rest of the register can be undefined
  148. if necessary the compiler will call a method
  149. to zero or sign extend the register
  150. * The a_load_XX_XX with OP_64 needn't to be
  151. implemented for 32 bit
  152. processors, the code generator takes care of that
  153. * the addr size is for work with the natural pointer
  154. size
  155. * the procedures without fpu/mm are only for integer usage
  156. * normally the first location is the source and the
  157. second the destination
  158. }
  159. {# Emits instruction to call the method specified by symbol name.
  160. This routine must be overriden for each new target cpu.
  161. There is no a_call_ref because loading the reference will use
  162. a temp register on most cpu's resulting in conflicts with the
  163. registers used for the parameters (PFV)
  164. }
  165. procedure a_call_name(list : TAsmList;const s : string);virtual; abstract;
  166. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  167. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  168. { same as a_call_name, might be overriden on certain architectures to emit
  169. static calls without usage of a got trampoline }
  170. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  171. { move instructions }
  172. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  173. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  174. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  175. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  176. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  177. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  178. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  179. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  180. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  181. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  182. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  183. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  184. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  185. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  186. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  187. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  188. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  189. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  190. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister); virtual;
  191. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  192. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  193. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  194. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  195. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  196. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  197. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference); virtual;
  198. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  199. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  200. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  201. { fpu move instructions }
  202. procedure a_loadfpu_reg_reg(list: TAsmList; size:tcgsize; reg1, reg2: tregister); virtual; abstract;
  203. procedure a_loadfpu_ref_reg(list: TAsmList; size: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  204. procedure a_loadfpu_reg_ref(list: TAsmList; size: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  205. procedure a_loadfpu_loc_reg(list: TAsmList; const loc: tlocation; const reg: tregister);
  206. procedure a_loadfpu_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation);
  207. procedure a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  208. procedure a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  209. { vector register move instructions }
  210. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  211. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  212. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  213. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  214. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  215. procedure a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  216. procedure a_parammm_ref(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  217. procedure a_parammm_loc(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  218. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  219. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  220. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  221. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  222. { basic arithmetic operations }
  223. { note: for operators which require only one argument (not, neg), use }
  224. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  225. { that in this case the *second* operand is used as both source and }
  226. { destination (JM) }
  227. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  228. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  229. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister); virtual;
  230. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference); virtual;
  231. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  232. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  233. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  234. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  235. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  236. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  237. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  238. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  239. { trinary operations for processors that support them, 'emulated' }
  240. { on others. None with "ref" arguments since I don't think there }
  241. { are any processors that support it (JM) }
  242. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  243. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  244. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  245. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  246. { comparison operations }
  247. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  248. l : tasmlabel);virtual; abstract;
  249. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  250. l : tasmlabel); virtual;
  251. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  252. l : tasmlabel);
  253. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  254. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  255. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  256. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  257. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  258. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  259. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  260. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  261. l : tasmlabel);
  262. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  263. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  264. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  265. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  266. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  267. }
  268. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  269. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  270. {
  271. This routine tries to optimize the op_const_reg/ref opcode, and should be
  272. called at the start of a_op_const_reg/ref. It returns the actual opcode
  273. to emit, and the constant value to emit. This function can opcode OP_NONE to
  274. remove the opcode and OP_MOVE to replace it with a simple load
  275. @param(op The opcode to emit, returns the opcode which must be emitted)
  276. @param(a The constant which should be emitted, returns the constant which must
  277. be emitted)
  278. }
  279. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  280. {#
  281. This routine is used in exception management nodes. It should
  282. save the exception reason currently in the FUNCTION_RETURN_REG. The
  283. save should be done either to a temp (pointed to by href).
  284. or on the stack (pushing the value on the stack).
  285. The size of the value to save is OS_S32. The default version
  286. saves the exception reason to a temp. memory area.
  287. }
  288. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  289. {#
  290. This routine is used in exception management nodes. It should
  291. save the exception reason constant. The
  292. save should be done either to a temp (pointed to by href).
  293. or on the stack (pushing the value on the stack).
  294. The size of the value to save is OS_S32. The default version
  295. saves the exception reason to a temp. memory area.
  296. }
  297. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  298. {#
  299. This routine is used in exception management nodes. It should
  300. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  301. should either be in the temp. area (pointed to by href , href should
  302. *NOT* be freed) or on the stack (the value should be popped).
  303. The size of the value to save is OS_S32. The default version
  304. saves the exception reason to a temp. memory area.
  305. }
  306. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  307. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  308. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  309. {# This should emit the opcode to copy len bytes from the source
  310. to destination.
  311. It must be overriden for each new target processor.
  312. @param(source Source reference of copy)
  313. @param(dest Destination reference of copy)
  314. }
  315. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  316. {# This should emit the opcode to copy len bytes from the an unaligned source
  317. to destination.
  318. It must be overriden for each new target processor.
  319. @param(source Source reference of copy)
  320. @param(dest Destination reference of copy)
  321. }
  322. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  323. {# This should emit the opcode to a shortrstring from the source
  324. to destination.
  325. @param(source Source reference of copy)
  326. @param(dest Destination reference of copy)
  327. }
  328. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  329. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  330. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  331. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  332. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  333. {# Generates range checking code. It is to note
  334. that this routine does not need to be overriden,
  335. as it takes care of everything.
  336. @param(p Node which contains the value to check)
  337. @param(todef Type definition of node to range check)
  338. }
  339. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  340. {# Generates overflow checking code for a node }
  341. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  342. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  343. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  344. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  345. {# Emits instructions when compilation is done in profile
  346. mode (this is set as a command line option). The default
  347. behavior does nothing, should be overriden as required.
  348. }
  349. procedure g_profilecode(list : TAsmList);virtual;
  350. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  351. @param(size Number of bytes to allocate)
  352. }
  353. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  354. {# Emits instruction for allocating the locals in entry
  355. code of a routine. This is one of the first
  356. routine called in @var(genentrycode).
  357. @param(localsize Number of bytes to allocate as locals)
  358. }
  359. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  360. {# Emits instructions for returning from a subroutine.
  361. Should also restore the framepointer and stack.
  362. @param(parasize Number of bytes of parameters to deallocate from stack)
  363. }
  364. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  365. {# This routine is called when generating the code for the entry point
  366. of a routine. It should save all registers which are not used in this
  367. routine, and which should be declared as saved in the std_saved_registers
  368. set.
  369. This routine is mainly used when linking to code which is generated
  370. by ABI-compliant compilers (like GCC), to make sure that the reserved
  371. registers of that ABI are not clobbered.
  372. @param(usedinproc Registers which are used in the code of this routine)
  373. }
  374. procedure g_save_standard_registers(list:TAsmList);virtual;
  375. {# This routine is called when generating the code for the exit point
  376. of a routine. It should restore all registers which were previously
  377. saved in @var(g_save_standard_registers).
  378. @param(usedinproc Registers which are used in the code of this routine)
  379. }
  380. procedure g_restore_standard_registers(list:TAsmList);virtual;
  381. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  382. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  383. function g_indirect_sym_load(list:TAsmList;const symname: string): tregister;virtual;
  384. protected
  385. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  386. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  387. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  388. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  389. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  390. end;
  391. {$ifndef cpu64bit}
  392. {# @abstract(Abstract code generator for 64 Bit operations)
  393. This class implements an abstract code generator class
  394. for 64 Bit operations.
  395. }
  396. tcg64 = class
  397. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  398. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  399. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  400. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  401. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  402. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  403. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  404. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  405. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  406. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  407. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  408. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  409. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  410. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  411. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  412. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  413. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  414. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  415. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  416. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  417. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  418. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  419. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  420. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  421. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  422. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  423. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  424. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  425. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  426. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  427. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  428. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  429. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  430. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  431. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  432. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  433. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  434. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  435. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  436. procedure a_param64_reg(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  437. procedure a_param64_const(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  438. procedure a_param64_ref(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  439. procedure a_param64_loc(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  440. {
  441. This routine tries to optimize the const_reg opcode, and should be
  442. called at the start of a_op64_const_reg. It returns the actual opcode
  443. to emit, and the constant value to emit. If this routine returns
  444. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  445. @param(op The opcode to emit, returns the opcode which must be emitted)
  446. @param(a The constant which should be emitted, returns the constant which must
  447. be emitted)
  448. @param(reg The register to emit the opcode with, returns the register with
  449. which the opcode will be emitted)
  450. }
  451. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  452. { override to catch 64bit rangechecks }
  453. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  454. end;
  455. {$endif cpu64bit}
  456. var
  457. {# Main code generator class }
  458. cg : tcg;
  459. {$ifndef cpu64bit}
  460. {# Code generator class for all operations working with 64-Bit operands }
  461. cg64 : tcg64;
  462. {$endif cpu64bit}
  463. implementation
  464. uses
  465. globals,options,systems,
  466. verbose,defutil,paramgr,symsym,
  467. tgobj,cutils,procinfo,
  468. ncgrtti;
  469. {*****************************************************************************
  470. basic functionallity
  471. ******************************************************************************}
  472. constructor tcg.create;
  473. begin
  474. end;
  475. {*****************************************************************************
  476. register allocation
  477. ******************************************************************************}
  478. procedure tcg.init_register_allocators;
  479. begin
  480. fillchar(rg,sizeof(rg),0);
  481. add_reg_instruction_hook:=@add_reg_instruction;
  482. end;
  483. procedure tcg.done_register_allocators;
  484. begin
  485. { Safety }
  486. fillchar(rg,sizeof(rg),0);
  487. add_reg_instruction_hook:=nil;
  488. end;
  489. {$ifdef flowgraph}
  490. procedure Tcg.init_flowgraph;
  491. begin
  492. aktflownode:=0;
  493. end;
  494. procedure Tcg.done_flowgraph;
  495. begin
  496. end;
  497. {$endif}
  498. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  499. begin
  500. if not assigned(rg[R_INTREGISTER]) then
  501. internalerror(200312122);
  502. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  503. end;
  504. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  505. begin
  506. if not assigned(rg[R_FPUREGISTER]) then
  507. internalerror(200312123);
  508. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  509. end;
  510. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  511. begin
  512. if not assigned(rg[R_MMREGISTER]) then
  513. internalerror(2003121214);
  514. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  515. end;
  516. function tcg.getaddressregister(list:TAsmList):Tregister;
  517. begin
  518. if assigned(rg[R_ADDRESSREGISTER]) then
  519. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  520. else
  521. begin
  522. if not assigned(rg[R_INTREGISTER]) then
  523. internalerror(200312121);
  524. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  525. end;
  526. end;
  527. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  528. var
  529. subreg:Tsubregister;
  530. begin
  531. subreg:=cgsize2subreg(size);
  532. result:=reg;
  533. setsubreg(result,subreg);
  534. { notify RA }
  535. if result<>reg then
  536. list.concat(tai_regalloc.resize(result));
  537. end;
  538. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  539. begin
  540. if not assigned(rg[getregtype(r)]) then
  541. internalerror(200312125);
  542. rg[getregtype(r)].getcpuregister(list,r);
  543. end;
  544. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  545. begin
  546. if not assigned(rg[getregtype(r)]) then
  547. internalerror(200312126);
  548. rg[getregtype(r)].ungetcpuregister(list,r);
  549. end;
  550. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  551. begin
  552. if assigned(rg[rt]) then
  553. rg[rt].alloccpuregisters(list,r)
  554. else
  555. internalerror(200310092);
  556. end;
  557. procedure tcg.allocallcpuregisters(list:TAsmList);
  558. begin
  559. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  560. {$ifndef i386}
  561. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  562. {$ifdef cpumm}
  563. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  564. {$endif cpumm}
  565. {$endif i386}
  566. end;
  567. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  568. begin
  569. if assigned(rg[rt]) then
  570. rg[rt].dealloccpuregisters(list,r)
  571. else
  572. internalerror(200310093);
  573. end;
  574. procedure tcg.deallocallcpuregisters(list:TAsmList);
  575. begin
  576. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  577. {$ifndef i386}
  578. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  579. {$ifdef cpumm}
  580. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  581. {$endif cpumm}
  582. {$endif i386}
  583. end;
  584. function tcg.uses_registers(rt:Tregistertype):boolean;
  585. begin
  586. if assigned(rg[rt]) then
  587. result:=rg[rt].uses_registers
  588. else
  589. result:=false;
  590. end;
  591. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  592. var
  593. rt : tregistertype;
  594. begin
  595. rt:=getregtype(r);
  596. { Only add it when a register allocator is configured.
  597. No IE can be generated, because the VMT is written
  598. without a valid rg[] }
  599. if assigned(rg[rt]) then
  600. rg[rt].add_reg_instruction(instr,r);
  601. end;
  602. procedure tcg.add_move_instruction(instr:Taicpu);
  603. var
  604. rt : tregistertype;
  605. begin
  606. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  607. if assigned(rg[rt]) then
  608. rg[rt].add_move_instruction(instr)
  609. else
  610. internalerror(200310095);
  611. end;
  612. procedure tcg.set_regalloc_extend_backwards(b: boolean);
  613. var
  614. rt : tregistertype;
  615. begin
  616. for rt:=low(rg) to high(rg) do
  617. begin
  618. if assigned(rg[rt]) then
  619. rg[rt].extend_live_range_backwards := b;;
  620. end;
  621. end;
  622. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  623. var
  624. rt : tregistertype;
  625. begin
  626. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  627. begin
  628. if assigned(rg[rt]) then
  629. rg[rt].do_register_allocation(list,headertai);
  630. end;
  631. { running the other register allocator passes could require addition int/addr. registers
  632. when spilling so run int/addr register allocation at the end }
  633. if assigned(rg[R_INTREGISTER]) then
  634. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  635. if assigned(rg[R_ADDRESSREGISTER]) then
  636. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  637. end;
  638. procedure tcg.translate_register(var reg : tregister);
  639. begin
  640. rg[getregtype(reg)].translate_register(reg);
  641. end;
  642. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  643. begin
  644. list.concat(tai_regalloc.alloc(r,nil));
  645. end;
  646. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  647. begin
  648. list.concat(tai_regalloc.dealloc(r,nil));
  649. end;
  650. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  651. var
  652. instr : tai;
  653. begin
  654. instr:=tai_regalloc.sync(r);
  655. list.concat(instr);
  656. add_reg_instruction(instr,r);
  657. end;
  658. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  659. begin
  660. list.concat(tai_label.create(l));
  661. end;
  662. {*****************************************************************************
  663. for better code generation these methods should be overridden
  664. ******************************************************************************}
  665. procedure tcg.a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  666. var
  667. ref : treference;
  668. begin
  669. cgpara.check_simple_location;
  670. case cgpara.location^.loc of
  671. LOC_REGISTER,LOC_CREGISTER:
  672. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  673. LOC_REFERENCE,LOC_CREFERENCE:
  674. begin
  675. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  676. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  677. end
  678. else
  679. internalerror(2002071004);
  680. end;
  681. end;
  682. procedure tcg.a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  683. var
  684. ref : treference;
  685. begin
  686. cgpara.check_simple_location;
  687. case cgpara.location^.loc of
  688. LOC_REGISTER,LOC_CREGISTER:
  689. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  690. LOC_REFERENCE,LOC_CREFERENCE:
  691. begin
  692. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  693. a_load_const_ref(list,cgpara.location^.size,a,ref);
  694. end
  695. else
  696. internalerror(2002071004);
  697. end;
  698. end;
  699. procedure tcg.a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  700. var
  701. ref : treference;
  702. begin
  703. cgpara.check_simple_location;
  704. case cgpara.location^.loc of
  705. LOC_REGISTER,LOC_CREGISTER:
  706. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  707. LOC_REFERENCE,LOC_CREFERENCE:
  708. begin
  709. reference_reset(ref);
  710. ref.base:=cgpara.location^.reference.index;
  711. ref.offset:=cgpara.location^.reference.offset;
  712. if (size <> OS_NO) and
  713. (tcgsize2size[size] < sizeof(aint)) then
  714. begin
  715. if (cgpara.size = OS_NO) or
  716. assigned(cgpara.location^.next) then
  717. internalerror(2006052401);
  718. a_load_ref_ref(list,size,cgpara.size,r,ref);
  719. end
  720. else
  721. { use concatcopy, because the parameter can be larger than }
  722. { what the OS_* constants can handle }
  723. g_concatcopy(list,r,ref,cgpara.intsize);
  724. end
  725. else
  726. internalerror(2002071004);
  727. end;
  728. end;
  729. procedure tcg.a_param_loc(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  730. begin
  731. case l.loc of
  732. LOC_REGISTER,
  733. LOC_CREGISTER :
  734. a_param_reg(list,l.size,l.register,cgpara);
  735. LOC_CONSTANT :
  736. a_param_const(list,l.size,l.value,cgpara);
  737. LOC_CREFERENCE,
  738. LOC_REFERENCE :
  739. a_param_ref(list,l.size,l.reference,cgpara);
  740. else
  741. internalerror(2002032211);
  742. end;
  743. end;
  744. procedure tcg.a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);
  745. var
  746. hr : tregister;
  747. begin
  748. cgpara.check_simple_location;
  749. hr:=getaddressregister(list);
  750. a_loadaddr_ref_reg(list,r,hr);
  751. a_param_reg(list,OS_ADDR,hr,cgpara);
  752. end;
  753. {****************************************************************************
  754. some generic implementations
  755. ****************************************************************************}
  756. {$ifopt r+}
  757. {$define rangeon}
  758. {$endif}
  759. {$ifopt q+}
  760. {$define overflowon}
  761. {$endif}
  762. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  763. var
  764. bitmask: aword;
  765. tmpreg: tregister;
  766. stopbit: byte;
  767. begin
  768. tmpreg:=getintregister(list,sreg.subsetregsize);
  769. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  770. stopbit := sreg.startbit + sreg.bitlen;
  771. // on x86(64), 1 shl 32(64) = 1 instead of 0
  772. // use aword to prevent overflow with 1 shl 31
  773. if (stopbit - sreg.startbit <> AIntBits) then
  774. bitmask := (aword(1) shl (stopbit - sreg.startbit)) - 1
  775. else
  776. bitmask := high(aword);
  777. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),tmpreg);
  778. tmpreg := makeregsize(list,tmpreg,subsetsize);
  779. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  780. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  781. end;
  782. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  783. begin
  784. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  785. end;
  786. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  787. var
  788. bitmask: aword;
  789. tmpreg: tregister;
  790. stopbit: byte;
  791. begin
  792. stopbit := sreg.startbit + sreg.bitlen;
  793. // on x86(64), 1 shl 32(64) = 1 instead of 0
  794. if (stopbit <> AIntBits) then
  795. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  796. else
  797. bitmask := not(high(aword) xor ((aword(1) shl sreg.startbit)-1));
  798. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  799. begin
  800. tmpreg:=getintregister(list,sreg.subsetregsize);
  801. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  802. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  803. if (slopt <> SL_REGNOSRCMASK) then
  804. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(not(bitmask)),tmpreg);
  805. end;
  806. if (slopt <> SL_SETMAX) then
  807. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  808. case slopt of
  809. SL_SETZERO : ;
  810. SL_SETMAX :
  811. if (sreg.bitlen <> AIntBits) then
  812. a_op_const_reg(list,OP_OR,sreg.subsetregsize,
  813. ((aword(1) shl sreg.bitlen)-1) shl sreg.startbit,
  814. sreg.subsetreg)
  815. else
  816. a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
  817. else
  818. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  819. end;
  820. end;
  821. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  822. var
  823. tmpreg: tregister;
  824. bitmask: aword;
  825. stopbit: byte;
  826. begin
  827. if (fromsreg.bitlen >= tosreg.bitlen) then
  828. begin
  829. tmpreg := getintregister(list,tosreg.subsetregsize);
  830. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  831. if (fromsreg.startbit <= tosreg.startbit) then
  832. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  833. else
  834. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  835. stopbit := tosreg.startbit + tosreg.bitlen;
  836. // on x86(64), 1 shl 32(64) = 1 instead of 0
  837. if (stopbit <> AIntBits) then
  838. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl tosreg.startbit)-1))
  839. else
  840. bitmask := (aword(1) shl tosreg.startbit) - 1;
  841. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(bitmask),tosreg.subsetreg);
  842. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(not(bitmask)),tmpreg);
  843. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  844. end
  845. else
  846. begin
  847. tmpreg := getintregister(list,tosubsetsize);
  848. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  849. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  850. end;
  851. end;
  852. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  853. var
  854. tmpreg: tregister;
  855. begin
  856. tmpreg := getintregister(list,tosize);
  857. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  858. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  859. end;
  860. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  861. var
  862. tmpreg: tregister;
  863. begin
  864. tmpreg := getintregister(list,subsetsize);
  865. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  866. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  867. end;
  868. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister);
  869. var
  870. bitmask: aword;
  871. stopbit: byte;
  872. begin
  873. stopbit := sreg.startbit + sreg.bitlen;
  874. // on x86(64), 1 shl 32(64) = 1 instead of 0
  875. if (stopbit <> AIntBits) then
  876. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  877. else
  878. bitmask := (aword(1) shl sreg.startbit) - 1;
  879. if (((a shl sreg.startbit) and not bitmask) <> not bitmask) then
  880. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  881. a_op_const_reg(list,OP_OR,sreg.subsetregsize,aint((aword(a) shl sreg.startbit) and not(bitmask)),sreg.subsetreg);
  882. end;
  883. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  884. begin
  885. case loc.loc of
  886. LOC_REFERENCE,LOC_CREFERENCE:
  887. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  888. LOC_REGISTER,LOC_CREGISTER:
  889. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  890. LOC_CONSTANT:
  891. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  892. LOC_SUBSETREG,LOC_CSUBSETREG:
  893. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  894. LOC_SUBSETREF,LOC_CSUBSETREF:
  895. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  896. else
  897. internalerror(200608053);
  898. end;
  899. end;
  900. (*
  901. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  902. in memory. They are like a regular reference, but contain an extra bit
  903. offset (either constant -startbit- or variable -bitindexreg, always OS_INT)
  904. and a bit length (always constant).
  905. Bit packed values are stored differently in memory depending on whether we
  906. are on a big or a little endian system (compatible with at least GPC). The
  907. size of the basic working unit is always the smallest power-of-2 byte size
  908. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  909. bytes, 17..32 bits -> 4 bytes etc).
  910. On a big endian, 5-bit: values are stored like this:
  911. 11111222 22333334 44445555 56666677 77788888
  912. The leftmost bit of each 5-bit value corresponds to the most significant
  913. bit.
  914. On little endian, it goes like this:
  915. 22211111 43333322 55554444 77666665 88888777
  916. In this case, per byte the left-most bit is more significant than those on
  917. the right, but the bits in the next byte are all more significant than
  918. those in the previous byte (e.g., the 222 in the first byte are the low
  919. three bits of that value, while the 22 in the second byte are the upper
  920. three bits.
  921. Big endian, 9 bit values:
  922. 11111111 12222222 22333333 33344444 ...
  923. Little endian, 9 bit values:
  924. 11111111 22222221 33333322 44444333 ...
  925. This is memory representation and the 16 bit values are byteswapped.
  926. Similarly as in the previous case, the 2222222 string contains the lower
  927. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  928. registers (two 16 bit registers in the current implementation, although a
  929. single 32 bit register would be possible too, in particular if 32 bit
  930. alignment can be guaranteed), this becomes:
  931. 22222221 11111111 44444333 33333322 ...
  932. (l)ow u l l u l u
  933. The startbit/bitindex in a subsetreference always refers to
  934. a) on big endian: the most significant bit of the value
  935. (bits counted from left to right, both memory an registers)
  936. b) on little endian: the least significant bit when the value
  937. is loaded in a register (bit counted from right to left)
  938. Although a) results in more complex code for big endian systems, it's
  939. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  940. Apple's universal interfaces which depend on these layout differences).
  941. Note: when changing the loadsize calculated in get_subsetref_load_info,
  942. make sure the appropriate alignment is guaranteed, at least in case of
  943. {$defined cpurequiresproperalignment}.
  944. *)
  945. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  946. var
  947. intloadsize: aint;
  948. begin
  949. intloadsize := packedbitsloadsize(sref.bitlen);
  950. {$ifdef cpurequiresproperalignment}
  951. { may need to be split into several smaller loads/stores }
  952. if intloadsize <> sref.ref.alignment then
  953. internalerror(2006082011);
  954. {$endif cpurequiresproperalignment}
  955. if (intloadsize = 0) then
  956. internalerror(2006081310);
  957. if (intloadsize > sizeof(aint)) then
  958. intloadsize := sizeof(aint);
  959. loadsize := int_cgsize(intloadsize);
  960. if (loadsize = OS_NO) then
  961. internalerror(2006081311);
  962. if (sref.bitlen > sizeof(aint)*8) then
  963. internalerror(2006081312);
  964. extra_load :=
  965. (intloadsize <> 1) and
  966. ((sref.bitindexreg <> NR_NO) or
  967. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  968. end;
  969. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  970. var
  971. restbits: byte;
  972. begin
  973. if (target_info.endian = endian_big) then
  974. begin
  975. { valuereg contains the upper bits, extra_value_reg the lower }
  976. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  977. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  978. { mask other bits }
  979. if (sref.bitlen <> AIntBits) then
  980. a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,valuereg);
  981. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  982. end
  983. else
  984. begin
  985. { valuereg contains the lower bits, extra_value_reg the upper }
  986. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  987. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  988. { mask other bits }
  989. if (sref.bitlen <> AIntBits) then
  990. a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,extra_value_reg);
  991. end;
  992. { merge }
  993. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  994. end;
  995. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  996. var
  997. tmpreg: tregister;
  998. begin
  999. tmpreg := getintregister(list,OS_INT);
  1000. if (target_info.endian = endian_big) then
  1001. begin
  1002. { since this is a dynamic index, it's possible that the value }
  1003. { is entirely in valuereg. }
  1004. { get the data in valuereg in the right place }
  1005. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1006. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1007. if (loadbitsize <> AIntBits) then
  1008. { mask left over bits }
  1009. a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,valuereg);
  1010. tmpreg := getintregister(list,OS_INT);
  1011. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1012. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1013. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1014. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1015. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1016. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1017. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1018. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1019. { => extra_value_reg is now 0 }
  1020. { merge }
  1021. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1022. { no need to mask, necessary masking happened earlier on }
  1023. end
  1024. else
  1025. begin
  1026. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1027. { Y-x = -(Y-x) }
  1028. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1029. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1030. { tmpreg is in the range 1..<cpu_bitsize> -> will zero extra_value_reg }
  1031. { if all bits are in valuereg }
  1032. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1033. {$ifdef x86}
  1034. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1035. if (loadbitsize = AIntBits) then
  1036. begin
  1037. { if (tmpreg >= cpu_bit_size) then tmpreg := 1 else tmpreg := 0 }
  1038. a_op_const_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpreg);
  1039. { if (tmpreg = cpu_bit_size) then tmpreg := 0 else tmpreg := -1 }
  1040. a_op_const_reg(list,OP_SUB,OS_INT,1,tmpreg);
  1041. { if (tmpreg = cpu_bit_size) then extra_value_reg := 0 }
  1042. a_op_reg_reg(list,OP_AND,OS_INT,tmpreg,extra_value_reg);
  1043. end;
  1044. {$endif x86}
  1045. { merge }
  1046. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1047. { mask other bits }
  1048. a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,valuereg);
  1049. end;
  1050. end;
  1051. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1052. var
  1053. tmpref: treference;
  1054. valuereg,extra_value_reg: tregister;
  1055. tosreg: tsubsetregister;
  1056. loadsize: tcgsize;
  1057. loadbitsize: byte;
  1058. extra_load: boolean;
  1059. begin
  1060. get_subsetref_load_info(sref,loadsize,extra_load);
  1061. loadbitsize := tcgsize2size[loadsize]*8;
  1062. { load the (first part) of the bit sequence }
  1063. valuereg := cg.getintregister(list,OS_INT);
  1064. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1065. if not extra_load then
  1066. begin
  1067. { everything is guaranteed to be in a single register of loadsize }
  1068. if (sref.bitindexreg = NR_NO) then
  1069. begin
  1070. { use subsetreg routine, it may have been overridden with an optimized version }
  1071. tosreg.subsetreg := valuereg;
  1072. tosreg.subsetregsize := OS_INT;
  1073. { subsetregs always count bits from right to left }
  1074. if (target_info.endian = endian_big) then
  1075. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1076. else
  1077. tosreg.startbit := sref.startbit;
  1078. tosreg.bitlen := sref.bitlen;
  1079. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1080. exit;
  1081. end
  1082. else
  1083. begin
  1084. if (sref.startbit <> 0) then
  1085. internalerror(2006081510);
  1086. if (target_info.endian = endian_big) then
  1087. begin
  1088. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1089. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1090. end
  1091. else
  1092. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1093. { mask other bits }
  1094. a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,valuereg);
  1095. end
  1096. end
  1097. else
  1098. begin
  1099. { load next value as well }
  1100. extra_value_reg := getintregister(list,OS_INT);
  1101. tmpref := sref.ref;
  1102. inc(tmpref.offset,loadbitsize div 8);
  1103. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1104. if (sref.bitindexreg = NR_NO) then
  1105. { can be overridden to optimize }
  1106. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1107. else
  1108. begin
  1109. if (sref.startbit <> 0) then
  1110. internalerror(2006080610);
  1111. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg);
  1112. end;
  1113. end;
  1114. { store in destination }
  1115. { (types with a negative lower bound are always a base type (8, 16, 32, 64 bits) }
  1116. if ((sref.bitlen mod 8) = 0) then
  1117. begin
  1118. { since we know all necessary bits are already masked, avoid unnecessary }
  1119. { zero-extensions }
  1120. valuereg := makeregsize(list,valuereg,tosize);
  1121. a_load_reg_reg(list,tcgsize2unsigned[tosize],tosize,valuereg,destreg)
  1122. end
  1123. else
  1124. begin
  1125. { avoid unnecessary sign extension and zeroing }
  1126. valuereg := makeregsize(list,valuereg,OS_INT);
  1127. destreg := makeregsize(list,destreg,OS_INT);
  1128. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1129. destreg := makeregsize(list,destreg,tosize);
  1130. end
  1131. end;
  1132. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1133. begin
  1134. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1135. end;
  1136. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1137. var
  1138. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1139. tosreg, fromsreg: tsubsetregister;
  1140. tmpref: treference;
  1141. loadsize: tcgsize;
  1142. loadbitsize: byte;
  1143. extra_load: boolean;
  1144. begin
  1145. { the register must be able to contain the requested value }
  1146. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1147. internalerror(2006081613);
  1148. get_subsetref_load_info(sref,loadsize,extra_load);
  1149. loadbitsize := tcgsize2size[loadsize]*8;
  1150. { load the (first part) of the bit sequence }
  1151. valuereg := cg.getintregister(list,OS_INT);
  1152. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1153. { constant offset of bit sequence? }
  1154. if not extra_load then
  1155. begin
  1156. if (sref.bitindexreg = NR_NO) then
  1157. begin
  1158. { use subsetreg routine, it may have been overridden with an optimized version }
  1159. tosreg.subsetreg := valuereg;
  1160. tosreg.subsetregsize := OS_INT;
  1161. { subsetregs always count bits from right to left }
  1162. if (target_info.endian = endian_big) then
  1163. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1164. else
  1165. tosreg.startbit := sref.startbit;
  1166. tosreg.bitlen := sref.bitlen;
  1167. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1168. end
  1169. else
  1170. begin
  1171. if (sref.startbit <> 0) then
  1172. internalerror(2006081710);
  1173. { should be handled by normal code and will give wrong result }
  1174. { on x86 for the '1 shl bitlen' below }
  1175. if (sref.bitlen = AIntBits) then
  1176. internalerror(2006081711);
  1177. { calculated correct shiftcount for big endian }
  1178. tmpindexreg := getintregister(list,OS_INT);
  1179. a_load_reg_reg(list,OS_INT,OS_INT,sref.bitindexreg,tmpindexreg);
  1180. if (target_info.endian = endian_big) then
  1181. begin
  1182. a_op_const_reg(list,OP_SUB,OS_INT,loadbitsize-sref.bitlen,tmpindexreg);
  1183. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1184. end;
  1185. { zero the bits we have to insert }
  1186. if (slopt <> SL_SETMAX) then
  1187. begin
  1188. maskreg := getintregister(list,OS_INT);
  1189. a_load_const_reg(list,OS_INT,(aword(1) shl sref.bitlen)-1,maskreg);
  1190. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1191. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1192. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1193. end;
  1194. { insert the value }
  1195. if (slopt <> SL_SETZERO) then
  1196. begin
  1197. tmpreg := getintregister(list,OS_INT);
  1198. if (slopt <> SL_SETMAX) then
  1199. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1200. else if (sref.bitlen <> AIntBits) then
  1201. a_load_const_reg(list,OS_INT,(aword(1) shl sref.bitlen) - 1, tmpreg)
  1202. else
  1203. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1204. if (slopt <> SL_REGNOSRCMASK) then
  1205. a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,tmpreg);
  1206. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg);
  1207. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1208. end;
  1209. end;
  1210. { store back to memory }
  1211. valuereg := makeregsize(list,valuereg,loadsize);
  1212. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1213. exit;
  1214. end
  1215. else
  1216. begin
  1217. { load next value }
  1218. extra_value_reg := getintregister(list,OS_INT);
  1219. tmpref := sref.ref;
  1220. inc(tmpref.offset,loadbitsize div 8);
  1221. { should maybe be taken out too, can be done more efficiently }
  1222. { on e.g. i386 with shld/shrd }
  1223. if (sref.bitindexreg = NR_NO) then
  1224. begin
  1225. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1226. fromsreg.subsetreg := fromreg;
  1227. fromsreg.subsetregsize := fromsize;
  1228. tosreg.subsetreg := valuereg;
  1229. tosreg.subsetregsize := OS_INT;
  1230. { transfer first part }
  1231. fromsreg.bitlen := loadbitsize-sref.startbit;
  1232. tosreg.bitlen := fromsreg.bitlen;
  1233. if (target_info.endian = endian_big) then
  1234. begin
  1235. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1236. { upper bits of the value ... }
  1237. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1238. { ... to bit 0 }
  1239. tosreg.startbit := 0
  1240. end
  1241. else
  1242. begin
  1243. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1244. { lower bits of the value ... }
  1245. fromsreg.startbit := 0;
  1246. { ... to startbit }
  1247. tosreg.startbit := sref.startbit;
  1248. end;
  1249. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1250. valuereg := makeregsize(list,valuereg,loadsize);
  1251. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1252. { transfer second part }
  1253. if (target_info.endian = endian_big) then
  1254. begin
  1255. { extra_value_reg must contain the lower bits of the value at bits }
  1256. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1257. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1258. { - bitlen - startbit }
  1259. fromsreg.startbit := 0;
  1260. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1261. end
  1262. else
  1263. begin
  1264. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1265. fromsreg.startbit := fromsreg.bitlen;
  1266. tosreg.startbit := 0;
  1267. end;
  1268. tosreg.subsetreg := extra_value_reg;
  1269. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1270. tosreg.bitlen := fromsreg.bitlen;
  1271. a_load_subsetreg_subsetreg(list,fromsize,subsetsize,fromsreg,tosreg);
  1272. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1273. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1274. exit;
  1275. end
  1276. else
  1277. begin
  1278. if (sref.startbit <> 0) then
  1279. internalerror(2006081812);
  1280. { should be handled by normal code and will give wrong result }
  1281. { on x86 for the '1 shl bitlen' below }
  1282. if (sref.bitlen = AIntBits) then
  1283. internalerror(2006081713);
  1284. { generate mask to zero the bits we have to insert }
  1285. if (slopt <> SL_SETMAX) then
  1286. begin
  1287. maskreg := getintregister(list,OS_INT);
  1288. if (target_info.endian = endian_big) then
  1289. begin
  1290. a_load_const_reg(list,OS_INT,((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),maskreg);
  1291. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1292. end
  1293. else
  1294. begin
  1295. a_load_const_reg(list,OS_INT,(aword(1) shl sref.bitlen)-1,maskreg);
  1296. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1297. end;
  1298. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1299. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1300. end;
  1301. { insert the value }
  1302. if (slopt <> SL_SETZERO) then
  1303. begin
  1304. tmpreg := getintregister(list,OS_INT);
  1305. if (slopt <> SL_SETMAX) then
  1306. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1307. else if (sref.bitlen <> AIntBits) then
  1308. a_load_const_reg(list,OS_INT,(aword(1) shl sref.bitlen) - 1, tmpreg)
  1309. else
  1310. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1311. if (target_info.endian = endian_big) then
  1312. begin
  1313. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1314. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) and
  1315. (loadbitsize <> AIntBits) then
  1316. { mask left over bits }
  1317. a_op_const_reg(list,OP_AND,OS_INT,((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),tmpreg);
  1318. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1319. end
  1320. else
  1321. begin
  1322. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) and
  1323. (loadbitsize <> AIntBits) then
  1324. { mask left over bits }
  1325. a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,tmpreg);
  1326. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1327. end;
  1328. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1329. end;
  1330. valuereg := makeregsize(list,valuereg,loadsize);
  1331. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1332. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1333. tmpindexreg := getintregister(list,OS_INT);
  1334. { load current array value }
  1335. if (slopt <> SL_SETZERO) then
  1336. begin
  1337. tmpreg := getintregister(list,OS_INT);
  1338. if (slopt <> SL_SETMAX) then
  1339. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1340. else if (sref.bitlen <> AIntBits) then
  1341. a_load_const_reg(list,OS_INT,(aword(1) shl sref.bitlen) - 1, tmpreg)
  1342. else
  1343. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1344. end;
  1345. { generate mask to zero the bits we have to insert }
  1346. if (slopt <> SL_SETMAX) then
  1347. begin
  1348. maskreg := getintregister(list,OS_INT);
  1349. if (target_info.endian = endian_big) then
  1350. begin
  1351. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1352. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1353. a_load_const_reg(list,OS_INT,(aword(1) shl sref.bitlen)-1,maskreg);
  1354. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1355. end
  1356. else
  1357. begin
  1358. { Y-x = -(Y-x) }
  1359. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1360. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1361. a_load_const_reg(list,OS_INT,(aword(1) shl sref.bitlen)-1,maskreg);
  1362. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1363. {$ifdef x86}
  1364. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1365. if (loadbitsize = AIntBits) then
  1366. begin
  1367. valuereg := getintregister(list,OS_INT);
  1368. { if (tmpindexreg >= cpu_bit_size) then valuereg := 1 else valuereg := 0 }
  1369. a_op_const_reg_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpindexreg,valuereg);
  1370. { if (tmpindexreg = cpu_bit_size) then valuereg := 0 else valuereg := -1 }
  1371. a_op_const_reg(list,OP_SUB,OS_INT,1,valuereg);
  1372. { if (tmpindexreg = cpu_bit_size) then tmpreg := maskreg := 0 }
  1373. if (slopt <> SL_SETZERO) then
  1374. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,tmpreg);
  1375. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,maskreg);
  1376. end;
  1377. {$endif x86}
  1378. end;
  1379. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1380. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1381. end;
  1382. if (slopt <> SL_SETZERO) then
  1383. begin
  1384. if (target_info.endian = endian_big) then
  1385. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1386. else
  1387. begin
  1388. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1389. a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,tmpreg);
  1390. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1391. end;
  1392. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1393. end;
  1394. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1395. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1396. end;
  1397. end;
  1398. end;
  1399. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1400. var
  1401. tmpreg: tregister;
  1402. begin
  1403. tmpreg := getintregister(list,tosubsetsize);
  1404. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1405. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1406. end;
  1407. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1408. var
  1409. tmpreg: tregister;
  1410. begin
  1411. tmpreg := getintregister(list,tosize);
  1412. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1413. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1414. end;
  1415. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1416. var
  1417. tmpreg: tregister;
  1418. begin
  1419. tmpreg := getintregister(list,subsetsize);
  1420. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1421. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1422. end;
  1423. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference);
  1424. var
  1425. tmpreg: tregister;
  1426. slopt: tsubsetloadopt;
  1427. begin
  1428. slopt := SL_REGNOSRCMASK;
  1429. if (
  1430. (a = (aword(1) shl sref.bitlen) -1) or
  1431. { broken x86 "x shl regbitsize = x" }
  1432. ((sref.bitlen = AIntBits) and
  1433. (a = -1))
  1434. ) then
  1435. slopt := SL_SETMAX
  1436. else if (a = 0) then
  1437. slopt := SL_SETZERO;
  1438. tmpreg := getintregister(list,subsetsize);
  1439. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1440. a_load_const_reg(list,subsetsize,a,tmpreg);
  1441. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1442. end;
  1443. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1444. begin
  1445. case loc.loc of
  1446. LOC_REFERENCE,LOC_CREFERENCE:
  1447. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1448. LOC_REGISTER,LOC_CREGISTER:
  1449. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1450. LOC_SUBSETREG,LOC_CSUBSETREG:
  1451. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1452. LOC_SUBSETREF,LOC_CSUBSETREF:
  1453. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1454. else
  1455. internalerror(200608054);
  1456. end;
  1457. end;
  1458. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1459. var
  1460. tmpreg: tregister;
  1461. begin
  1462. tmpreg := getintregister(list,tosubsetsize);
  1463. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1464. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1465. end;
  1466. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1467. var
  1468. tmpreg: tregister;
  1469. begin
  1470. tmpreg := getintregister(list,tosubsetsize);
  1471. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1472. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1473. end;
  1474. {$ifdef rangeon}
  1475. {$r+}
  1476. {$undef rangeon}
  1477. {$endif}
  1478. {$ifdef overflowon}
  1479. {$q+}
  1480. {$undef overflowon}
  1481. {$endif}
  1482. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  1483. var
  1484. tmpreg: tregister;
  1485. begin
  1486. { verify if we have the same reference }
  1487. if references_equal(sref,dref) then
  1488. exit;
  1489. tmpreg:=getintregister(list,tosize);
  1490. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  1491. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  1492. end;
  1493. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  1494. var
  1495. tmpreg: tregister;
  1496. begin
  1497. tmpreg:=getintregister(list,size);
  1498. a_load_const_reg(list,size,a,tmpreg);
  1499. a_load_reg_ref(list,size,size,tmpreg,ref);
  1500. end;
  1501. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  1502. begin
  1503. case loc.loc of
  1504. LOC_REFERENCE,LOC_CREFERENCE:
  1505. a_load_const_ref(list,loc.size,a,loc.reference);
  1506. LOC_REGISTER,LOC_CREGISTER:
  1507. a_load_const_reg(list,loc.size,a,loc.register);
  1508. LOC_SUBSETREG,LOC_CSUBSETREG:
  1509. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  1510. LOC_SUBSETREF,LOC_CSUBSETREF:
  1511. a_load_const_subsetref(list,loc.size,a,loc.sref);
  1512. else
  1513. internalerror(200203272);
  1514. end;
  1515. end;
  1516. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  1517. begin
  1518. case loc.loc of
  1519. LOC_REFERENCE,LOC_CREFERENCE:
  1520. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1521. LOC_REGISTER,LOC_CREGISTER:
  1522. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1523. LOC_SUBSETREG,LOC_CSUBSETREG:
  1524. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  1525. LOC_SUBSETREF,LOC_CSUBSETREF:
  1526. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  1527. else
  1528. internalerror(200203271);
  1529. end;
  1530. end;
  1531. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  1532. begin
  1533. case loc.loc of
  1534. LOC_REFERENCE,LOC_CREFERENCE:
  1535. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  1536. LOC_REGISTER,LOC_CREGISTER:
  1537. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  1538. LOC_CONSTANT:
  1539. a_load_const_reg(list,tosize,loc.value,reg);
  1540. LOC_SUBSETREG,LOC_CSUBSETREG:
  1541. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  1542. LOC_SUBSETREF,LOC_CSUBSETREF:
  1543. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  1544. else
  1545. internalerror(200109092);
  1546. end;
  1547. end;
  1548. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  1549. begin
  1550. case loc.loc of
  1551. LOC_REFERENCE,LOC_CREFERENCE:
  1552. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  1553. LOC_REGISTER,LOC_CREGISTER:
  1554. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  1555. LOC_CONSTANT:
  1556. a_load_const_ref(list,tosize,loc.value,ref);
  1557. LOC_SUBSETREG,LOC_CSUBSETREG:
  1558. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  1559. LOC_SUBSETREF,LOC_CSUBSETREF:
  1560. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  1561. else
  1562. internalerror(200109302);
  1563. end;
  1564. end;
  1565. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  1566. begin
  1567. case loc.loc of
  1568. LOC_REFERENCE,LOC_CREFERENCE:
  1569. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  1570. LOC_REGISTER,LOC_CREGISTER:
  1571. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  1572. LOC_CONSTANT:
  1573. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  1574. LOC_SUBSETREG,LOC_CSUBSETREG:
  1575. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  1576. LOC_SUBSETREF,LOC_CSUBSETREF:
  1577. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  1578. else
  1579. internalerror(2006052310);
  1580. end;
  1581. end;
  1582. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  1583. begin
  1584. case loc.loc of
  1585. LOC_REFERENCE,LOC_CREFERENCE:
  1586. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  1587. LOC_REGISTER,LOC_CREGISTER:
  1588. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  1589. LOC_SUBSETREG,LOC_CSUBSETREG:
  1590. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  1591. LOC_SUBSETREF,LOC_CSUBSETREF:
  1592. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  1593. else
  1594. internalerror(2006051510);
  1595. end;
  1596. end;
  1597. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  1598. var
  1599. powerval : longint;
  1600. begin
  1601. case op of
  1602. OP_OR :
  1603. begin
  1604. { or with zero returns same result }
  1605. if a = 0 then
  1606. op:=OP_NONE
  1607. else
  1608. { or with max returns max }
  1609. if a = -1 then
  1610. op:=OP_MOVE;
  1611. end;
  1612. OP_AND :
  1613. begin
  1614. { and with max returns same result }
  1615. if (a = -1) then
  1616. op:=OP_NONE
  1617. else
  1618. { and with 0 returns 0 }
  1619. if a=0 then
  1620. op:=OP_MOVE;
  1621. end;
  1622. OP_DIV :
  1623. begin
  1624. { division by 1 returns result }
  1625. if a = 1 then
  1626. op:=OP_NONE
  1627. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  1628. begin
  1629. a := powerval;
  1630. op:= OP_SHR;
  1631. end;
  1632. end;
  1633. OP_IDIV:
  1634. begin
  1635. if a = 1 then
  1636. op:=OP_NONE;
  1637. end;
  1638. OP_MUL,OP_IMUL:
  1639. begin
  1640. if a = 1 then
  1641. op:=OP_NONE
  1642. else
  1643. if a=0 then
  1644. op:=OP_MOVE
  1645. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  1646. begin
  1647. a := powerval;
  1648. op:= OP_SHL;
  1649. end;
  1650. end;
  1651. OP_ADD,OP_SUB:
  1652. begin
  1653. if a = 0 then
  1654. op:=OP_NONE;
  1655. end;
  1656. OP_SAR,OP_SHL,OP_SHR:
  1657. begin
  1658. if a = 0 then
  1659. op:=OP_NONE;
  1660. end;
  1661. end;
  1662. end;
  1663. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; const loc: tlocation; const reg: tregister);
  1664. begin
  1665. case loc.loc of
  1666. LOC_REFERENCE, LOC_CREFERENCE:
  1667. a_loadfpu_ref_reg(list,loc.size,loc.reference,reg);
  1668. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  1669. a_loadfpu_reg_reg(list,loc.size,loc.register,reg);
  1670. else
  1671. internalerror(200203301);
  1672. end;
  1673. end;
  1674. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation);
  1675. begin
  1676. case loc.loc of
  1677. LOC_REFERENCE, LOC_CREFERENCE:
  1678. a_loadfpu_reg_ref(list,size,reg,loc.reference);
  1679. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  1680. a_loadfpu_reg_reg(list,size,reg,loc.register);
  1681. else
  1682. internalerror(48991);
  1683. end;
  1684. end;
  1685. procedure tcg.a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  1686. var
  1687. ref : treference;
  1688. begin
  1689. case cgpara.location^.loc of
  1690. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1691. begin
  1692. cgpara.check_simple_location;
  1693. a_loadfpu_reg_reg(list,size,r,cgpara.location^.register);
  1694. end;
  1695. LOC_REFERENCE,LOC_CREFERENCE:
  1696. begin
  1697. cgpara.check_simple_location;
  1698. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1699. a_loadfpu_reg_ref(list,size,r,ref);
  1700. end;
  1701. LOC_REGISTER,LOC_CREGISTER:
  1702. begin
  1703. { paramfpu_ref does the check_simpe_location check here if necessary }
  1704. tg.GetTemp(list,TCGSize2Size[size],tt_normal,ref);
  1705. a_loadfpu_reg_ref(list,size,r,ref);
  1706. a_paramfpu_ref(list,size,ref,cgpara);
  1707. tg.Ungettemp(list,ref);
  1708. end;
  1709. else
  1710. internalerror(2002071004);
  1711. end;
  1712. end;
  1713. procedure tcg.a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  1714. var
  1715. href : treference;
  1716. begin
  1717. cgpara.check_simple_location;
  1718. case cgpara.location^.loc of
  1719. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1720. a_loadfpu_ref_reg(list,size,ref,cgpara.location^.register);
  1721. LOC_REFERENCE,LOC_CREFERENCE:
  1722. begin
  1723. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1724. { concatcopy should choose the best way to copy the data }
  1725. g_concatcopy(list,ref,href,tcgsize2size[size]);
  1726. end;
  1727. else
  1728. internalerror(200402201);
  1729. end;
  1730. end;
  1731. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  1732. var
  1733. tmpreg : tregister;
  1734. begin
  1735. tmpreg:=getintregister(list,size);
  1736. a_load_ref_reg(list,size,size,ref,tmpreg);
  1737. a_op_const_reg(list,op,size,a,tmpreg);
  1738. a_load_reg_ref(list,size,size,tmpreg,ref);
  1739. end;
  1740. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister);
  1741. var
  1742. tmpreg: tregister;
  1743. begin
  1744. tmpreg := cg.getintregister(list, size);
  1745. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  1746. a_op_const_reg(list,op,size,a,tmpreg);
  1747. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  1748. end;
  1749. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference);
  1750. var
  1751. tmpreg: tregister;
  1752. begin
  1753. tmpreg := cg.getintregister(list, size);
  1754. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  1755. a_op_const_reg(list,op,size,a,tmpreg);
  1756. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  1757. end;
  1758. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  1759. begin
  1760. case loc.loc of
  1761. LOC_REGISTER, LOC_CREGISTER:
  1762. a_op_const_reg(list,op,loc.size,a,loc.register);
  1763. LOC_REFERENCE, LOC_CREFERENCE:
  1764. a_op_const_ref(list,op,loc.size,a,loc.reference);
  1765. LOC_SUBSETREG, LOC_CSUBSETREG:
  1766. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  1767. LOC_SUBSETREF, LOC_CSUBSETREF:
  1768. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  1769. else
  1770. internalerror(200109061);
  1771. end;
  1772. end;
  1773. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  1774. var
  1775. tmpreg : tregister;
  1776. begin
  1777. tmpreg:=getintregister(list,size);
  1778. a_load_ref_reg(list,size,size,ref,tmpreg);
  1779. a_op_reg_reg(list,op,size,reg,tmpreg);
  1780. a_load_reg_ref(list,size,size,tmpreg,ref);
  1781. end;
  1782. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  1783. var
  1784. tmpreg: tregister;
  1785. begin
  1786. case op of
  1787. OP_NOT,OP_NEG:
  1788. { handle it as "load ref,reg; op reg" }
  1789. begin
  1790. a_load_ref_reg(list,size,size,ref,reg);
  1791. a_op_reg_reg(list,op,size,reg,reg);
  1792. end;
  1793. else
  1794. begin
  1795. tmpreg:=getintregister(list,size);
  1796. a_load_ref_reg(list,size,size,ref,tmpreg);
  1797. a_op_reg_reg(list,op,size,tmpreg,reg);
  1798. end;
  1799. end;
  1800. end;
  1801. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  1802. var
  1803. tmpreg: tregister;
  1804. begin
  1805. tmpreg := cg.getintregister(list, opsize);
  1806. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  1807. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  1808. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  1809. end;
  1810. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  1811. var
  1812. tmpreg: tregister;
  1813. begin
  1814. tmpreg := cg.getintregister(list, opsize);
  1815. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  1816. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  1817. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  1818. end;
  1819. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  1820. begin
  1821. case loc.loc of
  1822. LOC_REGISTER, LOC_CREGISTER:
  1823. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  1824. LOC_REFERENCE, LOC_CREFERENCE:
  1825. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  1826. LOC_SUBSETREG, LOC_CSUBSETREG:
  1827. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  1828. LOC_SUBSETREF, LOC_CSUBSETREF:
  1829. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  1830. else
  1831. internalerror(200109061);
  1832. end;
  1833. end;
  1834. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  1835. var
  1836. tmpreg: tregister;
  1837. begin
  1838. case loc.loc of
  1839. LOC_REGISTER,LOC_CREGISTER:
  1840. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  1841. LOC_REFERENCE,LOC_CREFERENCE:
  1842. begin
  1843. tmpreg:=getintregister(list,loc.size);
  1844. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  1845. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  1846. end;
  1847. LOC_SUBSETREG, LOC_CSUBSETREG:
  1848. begin
  1849. tmpreg:=getintregister(list,loc.size);
  1850. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1851. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  1852. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  1853. end;
  1854. LOC_SUBSETREF, LOC_CSUBSETREF:
  1855. begin
  1856. tmpreg:=getintregister(list,loc.size);
  1857. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  1858. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  1859. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  1860. end;
  1861. else
  1862. internalerror(200109061);
  1863. end;
  1864. end;
  1865. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  1866. a:aint;src,dst:Tregister);
  1867. begin
  1868. a_load_reg_reg(list,size,size,src,dst);
  1869. a_op_const_reg(list,op,size,a,dst);
  1870. end;
  1871. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  1872. size: tcgsize; src1, src2, dst: tregister);
  1873. var
  1874. tmpreg: tregister;
  1875. begin
  1876. if (dst<>src1) then
  1877. begin
  1878. a_load_reg_reg(list,size,size,src2,dst);
  1879. a_op_reg_reg(list,op,size,src1,dst);
  1880. end
  1881. else
  1882. begin
  1883. tmpreg:=getintregister(list,size);
  1884. a_load_reg_reg(list,size,size,src2,tmpreg);
  1885. a_op_reg_reg(list,op,size,src1,tmpreg);
  1886. a_load_reg_reg(list,size,size,tmpreg,dst);
  1887. end;
  1888. end;
  1889. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  1890. begin
  1891. a_op_const_reg_reg(list,op,size,a,src,dst);
  1892. ovloc.loc:=LOC_VOID;
  1893. end;
  1894. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  1895. begin
  1896. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  1897. ovloc.loc:=LOC_VOID;
  1898. end;
  1899. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  1900. l : tasmlabel);
  1901. var
  1902. tmpreg: tregister;
  1903. begin
  1904. tmpreg:=getintregister(list,size);
  1905. a_load_ref_reg(list,size,size,ref,tmpreg);
  1906. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1907. end;
  1908. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  1909. l : tasmlabel);
  1910. var
  1911. tmpreg : tregister;
  1912. begin
  1913. case loc.loc of
  1914. LOC_REGISTER,LOC_CREGISTER:
  1915. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  1916. LOC_REFERENCE,LOC_CREFERENCE:
  1917. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  1918. LOC_SUBSETREG, LOC_CSUBSETREG:
  1919. begin
  1920. tmpreg:=getintregister(list,size);
  1921. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  1922. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1923. end;
  1924. LOC_SUBSETREF, LOC_CSUBSETREF:
  1925. begin
  1926. tmpreg:=getintregister(list,size);
  1927. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  1928. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1929. end;
  1930. else
  1931. internalerror(200109061);
  1932. end;
  1933. end;
  1934. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  1935. var
  1936. tmpreg: tregister;
  1937. begin
  1938. tmpreg:=getintregister(list,size);
  1939. a_load_ref_reg(list,size,size,ref,tmpreg);
  1940. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  1941. end;
  1942. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  1943. var
  1944. tmpreg: tregister;
  1945. begin
  1946. tmpreg:=getintregister(list,size);
  1947. a_load_ref_reg(list,size,size,ref,tmpreg);
  1948. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  1949. end;
  1950. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  1951. begin
  1952. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  1953. end;
  1954. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  1955. begin
  1956. case loc.loc of
  1957. LOC_REGISTER,
  1958. LOC_CREGISTER:
  1959. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  1960. LOC_REFERENCE,
  1961. LOC_CREFERENCE :
  1962. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  1963. LOC_CONSTANT:
  1964. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  1965. LOC_SUBSETREG,
  1966. LOC_CSUBSETREG:
  1967. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  1968. LOC_SUBSETREF,
  1969. LOC_CSUBSETREF:
  1970. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  1971. else
  1972. internalerror(200203231);
  1973. end;
  1974. end;
  1975. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  1976. var
  1977. tmpreg: tregister;
  1978. begin
  1979. tmpreg:=getintregister(list, cmpsize);
  1980. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  1981. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  1982. end;
  1983. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  1984. var
  1985. tmpreg: tregister;
  1986. begin
  1987. tmpreg:=getintregister(list, cmpsize);
  1988. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  1989. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  1990. end;
  1991. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  1992. l : tasmlabel);
  1993. var
  1994. tmpreg: tregister;
  1995. begin
  1996. case loc.loc of
  1997. LOC_REGISTER,LOC_CREGISTER:
  1998. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  1999. LOC_REFERENCE,LOC_CREFERENCE:
  2000. begin
  2001. tmpreg:=getintregister(list,size);
  2002. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2003. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  2004. end;
  2005. LOC_SUBSETREG, LOC_CSUBSETREG:
  2006. begin
  2007. tmpreg:=getintregister(list, size);
  2008. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2009. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  2010. end;
  2011. LOC_SUBSETREF, LOC_CSUBSETREF:
  2012. begin
  2013. tmpreg:=getintregister(list, size);
  2014. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2015. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  2016. end;
  2017. else
  2018. internalerror(200109061);
  2019. end;
  2020. end;
  2021. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  2022. begin
  2023. case loc.loc of
  2024. LOC_MMREGISTER,LOC_CMMREGISTER:
  2025. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2026. LOC_REFERENCE,LOC_CREFERENCE:
  2027. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2028. else
  2029. internalerror(200310121);
  2030. end;
  2031. end;
  2032. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2033. begin
  2034. case loc.loc of
  2035. LOC_MMREGISTER,LOC_CMMREGISTER:
  2036. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2037. LOC_REFERENCE,LOC_CREFERENCE:
  2038. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2039. else
  2040. internalerror(200310122);
  2041. end;
  2042. end;
  2043. procedure tcg.a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2044. var
  2045. href : treference;
  2046. begin
  2047. cgpara.check_simple_location;
  2048. case cgpara.location^.loc of
  2049. LOC_MMREGISTER,LOC_CMMREGISTER:
  2050. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2051. LOC_REFERENCE,LOC_CREFERENCE:
  2052. begin
  2053. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  2054. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2055. end
  2056. else
  2057. internalerror(200310123);
  2058. end;
  2059. end;
  2060. procedure tcg.a_parammm_ref(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2061. var
  2062. hr : tregister;
  2063. hs : tmmshuffle;
  2064. begin
  2065. cgpara.check_simple_location;
  2066. hr:=getmmregister(list,cgpara.location^.size);
  2067. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2068. if realshuffle(shuffle) then
  2069. begin
  2070. hs:=shuffle^;
  2071. removeshuffles(hs);
  2072. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  2073. end
  2074. else
  2075. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  2076. end;
  2077. procedure tcg.a_parammm_loc(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2078. begin
  2079. case loc.loc of
  2080. LOC_MMREGISTER,LOC_CMMREGISTER:
  2081. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  2082. LOC_REFERENCE,LOC_CREFERENCE:
  2083. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  2084. else
  2085. internalerror(200310123);
  2086. end;
  2087. end;
  2088. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2089. var
  2090. hr : tregister;
  2091. hs : tmmshuffle;
  2092. begin
  2093. hr:=getmmregister(list,size);
  2094. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2095. if realshuffle(shuffle) then
  2096. begin
  2097. hs:=shuffle^;
  2098. removeshuffles(hs);
  2099. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2100. end
  2101. else
  2102. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2103. end;
  2104. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2105. var
  2106. hr : tregister;
  2107. hs : tmmshuffle;
  2108. begin
  2109. hr:=getmmregister(list,size);
  2110. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2111. if realshuffle(shuffle) then
  2112. begin
  2113. hs:=shuffle^;
  2114. removeshuffles(hs);
  2115. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2116. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2117. end
  2118. else
  2119. begin
  2120. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2121. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2122. end;
  2123. end;
  2124. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  2125. begin
  2126. case loc.loc of
  2127. LOC_CMMREGISTER,LOC_MMREGISTER:
  2128. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  2129. LOC_CREFERENCE,LOC_REFERENCE:
  2130. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  2131. else
  2132. internalerror(200312232);
  2133. end;
  2134. end;
  2135. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  2136. begin
  2137. g_concatcopy(list,source,dest,len);
  2138. end;
  2139. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  2140. var
  2141. cgpara1,cgpara2,cgpara3 : TCGPara;
  2142. begin
  2143. cgpara1.init;
  2144. cgpara2.init;
  2145. cgpara3.init;
  2146. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2147. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2148. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2149. paramanager.allocparaloc(list,cgpara3);
  2150. a_paramaddr_ref(list,dest,cgpara3);
  2151. paramanager.allocparaloc(list,cgpara2);
  2152. a_paramaddr_ref(list,source,cgpara2);
  2153. paramanager.allocparaloc(list,cgpara1);
  2154. a_param_const(list,OS_INT,len,cgpara1);
  2155. paramanager.freeparaloc(list,cgpara3);
  2156. paramanager.freeparaloc(list,cgpara2);
  2157. paramanager.freeparaloc(list,cgpara1);
  2158. allocallcpuregisters(list);
  2159. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  2160. deallocallcpuregisters(list);
  2161. cgpara3.done;
  2162. cgpara2.done;
  2163. cgpara1.done;
  2164. end;
  2165. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2166. var
  2167. href : treference;
  2168. incrfunc : string;
  2169. cgpara1,cgpara2 : TCGPara;
  2170. begin
  2171. cgpara1.init;
  2172. cgpara2.init;
  2173. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2174. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2175. if is_interfacecom(t) then
  2176. incrfunc:='FPC_INTF_INCR_REF'
  2177. else if is_ansistring(t) then
  2178. incrfunc:='FPC_ANSISTR_INCR_REF'
  2179. else if is_widestring(t) then
  2180. incrfunc:='FPC_WIDESTR_INCR_REF'
  2181. else if is_dynamic_array(t) then
  2182. incrfunc:='FPC_DYNARRAY_INCR_REF'
  2183. else
  2184. incrfunc:='';
  2185. { call the special incr function or the generic addref }
  2186. if incrfunc<>'' then
  2187. begin
  2188. paramanager.allocparaloc(list,cgpara1);
  2189. { widestrings aren't ref. counted on all platforms so we need the address
  2190. to create a real copy }
  2191. if is_widestring(t) then
  2192. a_paramaddr_ref(list,ref,cgpara1)
  2193. else
  2194. { these functions get the pointer by value }
  2195. a_param_ref(list,OS_ADDR,ref,cgpara1);
  2196. paramanager.freeparaloc(list,cgpara1);
  2197. allocallcpuregisters(list);
  2198. a_call_name(list,incrfunc);
  2199. deallocallcpuregisters(list);
  2200. end
  2201. else
  2202. begin
  2203. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2204. paramanager.allocparaloc(list,cgpara2);
  2205. a_paramaddr_ref(list,href,cgpara2);
  2206. paramanager.allocparaloc(list,cgpara1);
  2207. a_paramaddr_ref(list,ref,cgpara1);
  2208. paramanager.freeparaloc(list,cgpara1);
  2209. paramanager.freeparaloc(list,cgpara2);
  2210. allocallcpuregisters(list);
  2211. a_call_name(list,'FPC_ADDREF');
  2212. deallocallcpuregisters(list);
  2213. end;
  2214. cgpara2.done;
  2215. cgpara1.done;
  2216. end;
  2217. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2218. var
  2219. href : treference;
  2220. decrfunc : string;
  2221. needrtti : boolean;
  2222. cgpara1,cgpara2 : TCGPara;
  2223. tempreg1,tempreg2 : TRegister;
  2224. begin
  2225. cgpara1.init;
  2226. cgpara2.init;
  2227. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2228. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2229. needrtti:=false;
  2230. if is_interfacecom(t) then
  2231. decrfunc:='FPC_INTF_DECR_REF'
  2232. else if is_ansistring(t) then
  2233. decrfunc:='FPC_ANSISTR_DECR_REF'
  2234. else if is_widestring(t) then
  2235. decrfunc:='FPC_WIDESTR_DECR_REF'
  2236. else if is_dynamic_array(t) then
  2237. begin
  2238. decrfunc:='FPC_DYNARRAY_DECR_REF';
  2239. needrtti:=true;
  2240. end
  2241. else
  2242. decrfunc:='';
  2243. { call the special decr function or the generic decref }
  2244. if decrfunc<>'' then
  2245. begin
  2246. if needrtti then
  2247. begin
  2248. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2249. tempreg2:=getaddressregister(list);
  2250. a_loadaddr_ref_reg(list,href,tempreg2);
  2251. end;
  2252. tempreg1:=getaddressregister(list);
  2253. a_loadaddr_ref_reg(list,ref,tempreg1);
  2254. if needrtti then
  2255. begin
  2256. paramanager.allocparaloc(list,cgpara2);
  2257. a_param_reg(list,OS_ADDR,tempreg2,cgpara2);
  2258. paramanager.freeparaloc(list,cgpara2);
  2259. end;
  2260. paramanager.allocparaloc(list,cgpara1);
  2261. a_param_reg(list,OS_ADDR,tempreg1,cgpara1);
  2262. paramanager.freeparaloc(list,cgpara1);
  2263. allocallcpuregisters(list);
  2264. a_call_name(list,decrfunc);
  2265. deallocallcpuregisters(list);
  2266. end
  2267. else
  2268. begin
  2269. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2270. paramanager.allocparaloc(list,cgpara2);
  2271. a_paramaddr_ref(list,href,cgpara2);
  2272. paramanager.allocparaloc(list,cgpara1);
  2273. a_paramaddr_ref(list,ref,cgpara1);
  2274. paramanager.freeparaloc(list,cgpara1);
  2275. paramanager.freeparaloc(list,cgpara2);
  2276. allocallcpuregisters(list);
  2277. a_call_name(list,'FPC_DECREF');
  2278. deallocallcpuregisters(list);
  2279. end;
  2280. cgpara2.done;
  2281. cgpara1.done;
  2282. end;
  2283. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  2284. var
  2285. href : treference;
  2286. cgpara1,cgpara2 : TCGPara;
  2287. begin
  2288. cgpara1.init;
  2289. cgpara2.init;
  2290. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2291. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2292. if is_ansistring(t) or
  2293. is_widestring(t) or
  2294. is_interfacecom(t) or
  2295. is_dynamic_array(t) then
  2296. a_load_const_ref(list,OS_ADDR,0,ref)
  2297. else
  2298. begin
  2299. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2300. paramanager.allocparaloc(list,cgpara2);
  2301. a_paramaddr_ref(list,href,cgpara2);
  2302. paramanager.allocparaloc(list,cgpara1);
  2303. a_paramaddr_ref(list,ref,cgpara1);
  2304. paramanager.freeparaloc(list,cgpara1);
  2305. paramanager.freeparaloc(list,cgpara2);
  2306. allocallcpuregisters(list);
  2307. a_call_name(list,'FPC_INITIALIZE');
  2308. deallocallcpuregisters(list);
  2309. end;
  2310. cgpara1.done;
  2311. cgpara2.done;
  2312. end;
  2313. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  2314. var
  2315. href : treference;
  2316. cgpara1,cgpara2 : TCGPara;
  2317. begin
  2318. cgpara1.init;
  2319. cgpara2.init;
  2320. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2321. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2322. if is_ansistring(t) or
  2323. is_widestring(t) or
  2324. is_interfacecom(t) then
  2325. begin
  2326. g_decrrefcount(list,t,ref);
  2327. a_load_const_ref(list,OS_ADDR,0,ref);
  2328. end
  2329. else
  2330. begin
  2331. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2332. paramanager.allocparaloc(list,cgpara2);
  2333. a_paramaddr_ref(list,href,cgpara2);
  2334. paramanager.allocparaloc(list,cgpara1);
  2335. a_paramaddr_ref(list,ref,cgpara1);
  2336. paramanager.freeparaloc(list,cgpara1);
  2337. paramanager.freeparaloc(list,cgpara2);
  2338. allocallcpuregisters(list);
  2339. a_call_name(list,'FPC_FINALIZE');
  2340. deallocallcpuregisters(list);
  2341. end;
  2342. cgpara1.done;
  2343. cgpara2.done;
  2344. end;
  2345. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  2346. { generate range checking code for the value at location p. The type }
  2347. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  2348. { is the original type used at that location. When both defs are equal }
  2349. { the check is also insert (needed for succ,pref,inc,dec) }
  2350. const
  2351. aintmax=high(aint);
  2352. var
  2353. neglabel : tasmlabel;
  2354. hreg : tregister;
  2355. lto,hto,
  2356. lfrom,hfrom : TConstExprInt;
  2357. fromsize, tosize: cardinal;
  2358. from_signed, to_signed: boolean;
  2359. begin
  2360. { range checking on and range checkable value? }
  2361. if not(cs_check_range in current_settings.localswitches) or
  2362. not(fromdef.typ in [orddef,enumdef]) then
  2363. exit;
  2364. {$ifndef cpu64bit}
  2365. { handle 64bit rangechecks separate for 32bit processors }
  2366. if is_64bit(fromdef) or is_64bit(todef) then
  2367. begin
  2368. cg64.g_rangecheck64(list,l,fromdef,todef);
  2369. exit;
  2370. end;
  2371. {$endif cpu64bit}
  2372. { only check when assigning to scalar, subranges are different, }
  2373. { when todef=fromdef then the check is always generated }
  2374. getrange(fromdef,lfrom,hfrom);
  2375. getrange(todef,lto,hto);
  2376. from_signed := is_signed(fromdef);
  2377. to_signed := is_signed(todef);
  2378. { check the rangedef of the array, not the array itself }
  2379. { (only change now, since getrange needs the arraydef) }
  2380. if (todef.typ = arraydef) then
  2381. todef := tarraydef(todef).rangedef;
  2382. { no range check if from and to are equal and are both longint/dword }
  2383. { no range check if from and to are equal and are both longint/dword }
  2384. { (if we have a 32bit processor) or int64/qword, since such }
  2385. { operations can at most cause overflows (JM) }
  2386. { Note that these checks are mostly processor independent, they only }
  2387. { have to be changed once we introduce 64bit subrange types }
  2388. {$ifdef cpu64bit}
  2389. if (fromdef = todef) and
  2390. (fromdef.typ=orddef) and
  2391. (((((torddef(fromdef).ordtype = s64bit) and
  2392. (lfrom = low(int64)) and
  2393. (hfrom = high(int64))) or
  2394. ((torddef(fromdef).ordtype = u64bit) and
  2395. (lfrom = low(qword)) and
  2396. (hfrom = high(qword))) or
  2397. ((torddef(fromdef).ordtype = scurrency) and
  2398. (lfrom = low(int64)) and
  2399. (hfrom = high(int64)))))) then
  2400. exit;
  2401. {$else cpu64bit}
  2402. if (fromdef = todef) and
  2403. (fromdef.typ=orddef) and
  2404. (((((torddef(fromdef).ordtype = s32bit) and
  2405. (lfrom = low(longint)) and
  2406. (hfrom = high(longint))) or
  2407. ((torddef(fromdef).ordtype = u32bit) and
  2408. (lfrom = low(cardinal)) and
  2409. (hfrom = high(cardinal)))))) then
  2410. exit;
  2411. {$endif cpu64bit}
  2412. { optimize some range checks away in safe cases }
  2413. fromsize := fromdef.size;
  2414. tosize := todef.size;
  2415. if ((from_signed = to_signed) or
  2416. (not from_signed)) and
  2417. (lto<=lfrom) and (hto>=hfrom) and
  2418. (fromsize <= tosize) then
  2419. begin
  2420. { if fromsize < tosize, and both have the same signed-ness or }
  2421. { fromdef is unsigned, then all bit patterns from fromdef are }
  2422. { valid for todef as well }
  2423. if (fromsize < tosize) then
  2424. exit;
  2425. if (fromsize = tosize) and
  2426. (from_signed = to_signed) then
  2427. { only optimize away if all bit patterns which fit in fromsize }
  2428. { are valid for the todef }
  2429. begin
  2430. {$ifopt Q+}
  2431. {$define overflowon}
  2432. {$Q-}
  2433. {$endif}
  2434. if to_signed then
  2435. begin
  2436. { calculation of the low/high ranges must not overflow 64 bit
  2437. otherwise we end up comparing with zero for 64 bit data types on
  2438. 64 bit processors }
  2439. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  2440. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  2441. exit
  2442. end
  2443. else
  2444. begin
  2445. { calculation of the low/high ranges must not overflow 64 bit
  2446. otherwise we end up having all zeros for 64 bit data types on
  2447. 64 bit processors }
  2448. if (lto = 0) and
  2449. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  2450. exit
  2451. end;
  2452. {$ifdef overflowon}
  2453. {$Q+}
  2454. {$undef overflowon}
  2455. {$endif}
  2456. end
  2457. end;
  2458. { generate the rangecheck code for the def where we are going to }
  2459. { store the result }
  2460. { use the trick that }
  2461. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  2462. { To be able to do that, we have to make sure however that either }
  2463. { fromdef and todef are both signed or unsigned, or that we leave }
  2464. { the parts < 0 and > maxlongint out }
  2465. if from_signed xor to_signed then
  2466. begin
  2467. if from_signed then
  2468. { from is signed, to is unsigned }
  2469. begin
  2470. { if high(from) < 0 -> always range error }
  2471. if (hfrom < 0) or
  2472. { if low(to) > maxlongint also range error }
  2473. (lto > aintmax) then
  2474. begin
  2475. a_call_name(list,'FPC_RANGEERROR');
  2476. exit
  2477. end;
  2478. { from is signed and to is unsigned -> when looking at to }
  2479. { as an signed value, it must be < maxaint (otherwise }
  2480. { it will become negative, which is invalid since "to" is unsigned) }
  2481. if hto > aintmax then
  2482. hto := aintmax;
  2483. end
  2484. else
  2485. { from is unsigned, to is signed }
  2486. begin
  2487. if (lfrom > aintmax) or
  2488. (hto < 0) then
  2489. begin
  2490. a_call_name(list,'FPC_RANGEERROR');
  2491. exit
  2492. end;
  2493. { from is unsigned and to is signed -> when looking at to }
  2494. { as an unsigned value, it must be >= 0 (since negative }
  2495. { values are the same as values > maxlongint) }
  2496. if lto < 0 then
  2497. lto := 0;
  2498. end;
  2499. end;
  2500. hreg:=getintregister(list,OS_INT);
  2501. a_load_loc_reg(list,OS_INT,l,hreg);
  2502. a_op_const_reg(list,OP_SUB,OS_INT,aint(lto),hreg);
  2503. current_asmdata.getjumplabel(neglabel);
  2504. {
  2505. if from_signed then
  2506. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  2507. else
  2508. }
  2509. {$ifdef cpu64bit}
  2510. if qword(hto-lto)>qword(aintmax) then
  2511. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  2512. else
  2513. {$endif cpu64bit}
  2514. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(hto-lto),hreg,neglabel);
  2515. a_call_name(list,'FPC_RANGEERROR');
  2516. a_label(list,neglabel);
  2517. end;
  2518. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  2519. begin
  2520. g_overflowCheck(list,loc,def);
  2521. end;
  2522. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  2523. var
  2524. tmpreg : tregister;
  2525. begin
  2526. tmpreg:=getintregister(list,size);
  2527. g_flags2reg(list,size,f,tmpreg);
  2528. a_load_reg_ref(list,size,size,tmpreg,ref);
  2529. end;
  2530. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  2531. var
  2532. OKLabel : tasmlabel;
  2533. cgpara1 : TCGPara;
  2534. begin
  2535. if (cs_check_object in current_settings.localswitches) or
  2536. (cs_check_range in current_settings.localswitches) then
  2537. begin
  2538. current_asmdata.getjumplabel(oklabel);
  2539. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  2540. cgpara1.init;
  2541. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2542. paramanager.allocparaloc(list,cgpara1);
  2543. a_param_const(list,OS_INT,210,cgpara1);
  2544. paramanager.freeparaloc(list,cgpara1);
  2545. a_call_name(list,'FPC_HANDLEERROR');
  2546. a_label(list,oklabel);
  2547. cgpara1.done;
  2548. end;
  2549. end;
  2550. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  2551. var
  2552. hrefvmt : treference;
  2553. cgpara1,cgpara2 : TCGPara;
  2554. begin
  2555. cgpara1.init;
  2556. cgpara2.init;
  2557. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2558. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2559. if (cs_check_object in current_settings.localswitches) then
  2560. begin
  2561. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0);
  2562. paramanager.allocparaloc(list,cgpara2);
  2563. a_paramaddr_ref(list,hrefvmt,cgpara2);
  2564. paramanager.allocparaloc(list,cgpara1);
  2565. a_param_reg(list,OS_ADDR,reg,cgpara1);
  2566. paramanager.freeparaloc(list,cgpara1);
  2567. paramanager.freeparaloc(list,cgpara2);
  2568. allocallcpuregisters(list);
  2569. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  2570. deallocallcpuregisters(list);
  2571. end
  2572. else
  2573. if (cs_check_range in current_settings.localswitches) then
  2574. begin
  2575. paramanager.allocparaloc(list,cgpara1);
  2576. a_param_reg(list,OS_ADDR,reg,cgpara1);
  2577. paramanager.freeparaloc(list,cgpara1);
  2578. allocallcpuregisters(list);
  2579. a_call_name(list,'FPC_CHECK_OBJECT');
  2580. deallocallcpuregisters(list);
  2581. end;
  2582. cgpara1.done;
  2583. cgpara2.done;
  2584. end;
  2585. {*****************************************************************************
  2586. Entry/Exit Code Functions
  2587. *****************************************************************************}
  2588. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  2589. var
  2590. sizereg,sourcereg,lenreg : tregister;
  2591. cgpara1,cgpara2,cgpara3 : TCGPara;
  2592. begin
  2593. { because some abis don't support dynamic stack allocation properly
  2594. open array value parameters are copied onto the heap
  2595. }
  2596. { calculate necessary memory }
  2597. { read/write operations on one register make the life of the register allocator hard }
  2598. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  2599. begin
  2600. lenreg:=getintregister(list,OS_INT);
  2601. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  2602. end
  2603. else
  2604. lenreg:=lenloc.register;
  2605. sizereg:=getintregister(list,OS_INT);
  2606. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  2607. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  2608. { load source }
  2609. sourcereg:=getaddressregister(list);
  2610. a_loadaddr_ref_reg(list,ref,sourcereg);
  2611. { do getmem call }
  2612. cgpara1.init;
  2613. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2614. paramanager.allocparaloc(list,cgpara1);
  2615. a_param_reg(list,OS_INT,sizereg,cgpara1);
  2616. paramanager.freeparaloc(list,cgpara1);
  2617. allocallcpuregisters(list);
  2618. a_call_name(list,'FPC_GETMEM');
  2619. deallocallcpuregisters(list);
  2620. cgpara1.done;
  2621. { return the new address }
  2622. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  2623. { do move call }
  2624. cgpara1.init;
  2625. cgpara2.init;
  2626. cgpara3.init;
  2627. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2628. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2629. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2630. { load size }
  2631. paramanager.allocparaloc(list,cgpara3);
  2632. a_param_reg(list,OS_INT,sizereg,cgpara3);
  2633. { load destination }
  2634. paramanager.allocparaloc(list,cgpara2);
  2635. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  2636. { load source }
  2637. paramanager.allocparaloc(list,cgpara1);
  2638. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  2639. paramanager.freeparaloc(list,cgpara3);
  2640. paramanager.freeparaloc(list,cgpara2);
  2641. paramanager.freeparaloc(list,cgpara1);
  2642. allocallcpuregisters(list);
  2643. a_call_name(list,'FPC_MOVE');
  2644. deallocallcpuregisters(list);
  2645. cgpara3.done;
  2646. cgpara2.done;
  2647. cgpara1.done;
  2648. end;
  2649. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  2650. var
  2651. cgpara1 : TCGPara;
  2652. begin
  2653. { do move call }
  2654. cgpara1.init;
  2655. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2656. { load source }
  2657. paramanager.allocparaloc(list,cgpara1);
  2658. a_param_loc(list,l,cgpara1);
  2659. paramanager.freeparaloc(list,cgpara1);
  2660. allocallcpuregisters(list);
  2661. a_call_name(list,'FPC_FREEMEM');
  2662. deallocallcpuregisters(list);
  2663. cgpara1.done;
  2664. end;
  2665. procedure tcg.g_save_standard_registers(list:TAsmList);
  2666. var
  2667. href : treference;
  2668. size : longint;
  2669. r : integer;
  2670. begin
  2671. { Get temp }
  2672. size:=0;
  2673. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2674. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2675. inc(size,sizeof(aint));
  2676. if size>0 then
  2677. begin
  2678. tg.GetTemp(list,size,tt_noreuse,current_procinfo.save_regs_ref);
  2679. { Copy registers to temp }
  2680. href:=current_procinfo.save_regs_ref;
  2681. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2682. begin
  2683. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2684. begin
  2685. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  2686. inc(href.offset,sizeof(aint));
  2687. end;
  2688. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  2689. end;
  2690. end;
  2691. end;
  2692. procedure tcg.g_restore_standard_registers(list:TAsmList);
  2693. var
  2694. href : treference;
  2695. r : integer;
  2696. hreg : tregister;
  2697. begin
  2698. { Copy registers from temp }
  2699. href:=current_procinfo.save_regs_ref;
  2700. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2701. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2702. begin
  2703. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  2704. { Allocate register so the optimizer does not remove the load }
  2705. a_reg_alloc(list,hreg);
  2706. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  2707. inc(href.offset,sizeof(aint));
  2708. end;
  2709. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  2710. end;
  2711. procedure tcg.g_profilecode(list : TAsmList);
  2712. begin
  2713. end;
  2714. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  2715. begin
  2716. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  2717. end;
  2718. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  2719. begin
  2720. a_load_const_ref(list, OS_INT, a, href);
  2721. end;
  2722. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  2723. begin
  2724. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  2725. end;
  2726. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  2727. var
  2728. hsym : tsym;
  2729. href : treference;
  2730. paraloc : tcgparalocation;
  2731. begin
  2732. { calculate the parameter info for the procdef }
  2733. if not procdef.has_paraloc_info then
  2734. begin
  2735. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  2736. procdef.has_paraloc_info:=true;
  2737. end;
  2738. hsym:=tsym(procdef.parast.Find('self'));
  2739. if not(assigned(hsym) and
  2740. (hsym.typ=paravarsym)) then
  2741. internalerror(200305251);
  2742. paraloc:=tparavarsym(hsym).paraloc[callerside].location^;
  2743. case paraloc.loc of
  2744. LOC_REGISTER:
  2745. cg.a_op_const_reg(list,OP_SUB,paraloc.size,ioffset,paraloc.register);
  2746. LOC_REFERENCE:
  2747. begin
  2748. { offset in the wrapper needs to be adjusted for the stored
  2749. return address }
  2750. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset+sizeof(aint));
  2751. cg.a_op_const_ref(list,OP_SUB,paraloc.size,ioffset,href);
  2752. end
  2753. else
  2754. internalerror(200309189);
  2755. end;
  2756. end;
  2757. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  2758. begin
  2759. a_call_name(list,s);
  2760. end;
  2761. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string): tregister;
  2762. var
  2763. l: tasmsymbol;
  2764. ref: treference;
  2765. begin
  2766. result := NR_NO;
  2767. case target_info.system of
  2768. system_powerpc_darwin,
  2769. system_i386_darwin:
  2770. begin
  2771. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  2772. if not(assigned(l)) then
  2773. begin
  2774. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_COMMON,AT_DATA);
  2775. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  2776. current_asmdata.asmlists[al_picdata].concat(tai_const.create_indirect_sym(current_asmdata.RefAsmSymbol(symname)));
  2777. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  2778. end;
  2779. result := cg.getaddressregister(list);
  2780. reference_reset_symbol(ref,l,0);
  2781. { ref.base:=current_procinfo.got;
  2782. ref.relsymbol:=current_procinfo.CurrGOTLabel;}
  2783. cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  2784. end;
  2785. end;
  2786. end;
  2787. {*****************************************************************************
  2788. TCG64
  2789. *****************************************************************************}
  2790. {$ifndef cpu64bit}
  2791. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  2792. begin
  2793. a_load64_reg_reg(list,regsrc,regdst);
  2794. a_op64_const_reg(list,op,size,value,regdst);
  2795. end;
  2796. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  2797. var
  2798. tmpreg64 : tregister64;
  2799. begin
  2800. { when src1=dst then we need to first create a temp to prevent
  2801. overwriting src1 with src2 }
  2802. if (regsrc1.reghi=regdst.reghi) or
  2803. (regsrc1.reglo=regdst.reghi) or
  2804. (regsrc1.reghi=regdst.reglo) or
  2805. (regsrc1.reglo=regdst.reglo) then
  2806. begin
  2807. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2808. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2809. a_load64_reg_reg(list,regsrc2,tmpreg64);
  2810. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  2811. a_load64_reg_reg(list,tmpreg64,regdst);
  2812. end
  2813. else
  2814. begin
  2815. a_load64_reg_reg(list,regsrc2,regdst);
  2816. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  2817. end;
  2818. end;
  2819. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  2820. var
  2821. tmpreg64 : tregister64;
  2822. begin
  2823. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2824. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2825. a_load64_subsetref_reg(list,sref,tmpreg64);
  2826. a_op64_const_reg(list,op,size,a,tmpreg64);
  2827. a_load64_reg_subsetref(list,tmpreg64,sref);
  2828. end;
  2829. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  2830. var
  2831. tmpreg64 : tregister64;
  2832. begin
  2833. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2834. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2835. a_load64_subsetref_reg(list,sref,tmpreg64);
  2836. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  2837. a_load64_reg_subsetref(list,tmpreg64,sref);
  2838. end;
  2839. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  2840. var
  2841. tmpreg64 : tregister64;
  2842. begin
  2843. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2844. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2845. a_load64_subsetref_reg(list,sref,tmpreg64);
  2846. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  2847. a_load64_reg_subsetref(list,tmpreg64,sref);
  2848. end;
  2849. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  2850. var
  2851. tmpreg64 : tregister64;
  2852. begin
  2853. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2854. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2855. a_load64_subsetref_reg(list,ssref,tmpreg64);
  2856. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  2857. end;
  2858. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  2859. begin
  2860. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  2861. ovloc.loc:=LOC_VOID;
  2862. end;
  2863. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  2864. begin
  2865. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  2866. ovloc.loc:=LOC_VOID;
  2867. end;
  2868. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  2869. begin
  2870. case l.loc of
  2871. LOC_REFERENCE, LOC_CREFERENCE:
  2872. a_load64_ref_subsetref(list,l.reference,sref);
  2873. LOC_REGISTER,LOC_CREGISTER:
  2874. a_load64_reg_subsetref(list,l.register64,sref);
  2875. LOC_CONSTANT :
  2876. a_load64_const_subsetref(list,l.value64,sref);
  2877. LOC_SUBSETREF,LOC_CSUBSETREF:
  2878. a_load64_subsetref_subsetref(list,l.sref,sref);
  2879. else
  2880. internalerror(2006082210);
  2881. end;
  2882. end;
  2883. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  2884. begin
  2885. case l.loc of
  2886. LOC_REFERENCE, LOC_CREFERENCE:
  2887. a_load64_subsetref_ref(list,sref,l.reference);
  2888. LOC_REGISTER,LOC_CREGISTER:
  2889. a_load64_subsetref_reg(list,sref,l.register64);
  2890. LOC_SUBSETREF,LOC_CSUBSETREF:
  2891. a_load64_subsetref_subsetref(list,sref,l.sref);
  2892. else
  2893. internalerror(2006082211);
  2894. end;
  2895. end;
  2896. {$endif cpu64bit}
  2897. initialization
  2898. ;
  2899. finalization
  2900. cg.free;
  2901. {$ifndef cpu64bit}
  2902. cg64.free;
  2903. {$endif cpu64bit}
  2904. end.