daopt386.pas 96 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  3. development team
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit daopt386;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. cclasses,aasmbase,aasmtai,aasmdata,aasmcpu,cgbase,cgutils,
  25. cpubase,optbase;
  26. {******************************* Constants *******************************}
  27. const
  28. { Possible register content types }
  29. con_Unknown = 0;
  30. con_ref = 1;
  31. con_const = 2;
  32. { The contents aren't usable anymore for CSE, but they may still be }
  33. { usefull for detecting whether the result of a load is actually used }
  34. con_invalid = 3;
  35. { the reverse of the above (in case a (conditional) jump is encountered): }
  36. { CSE is still possible, but the original instruction can't be removed }
  37. con_noRemoveRef = 4;
  38. { same, but for constants }
  39. con_noRemoveConst = 5;
  40. const
  41. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  42. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  43. OS_16,OS_32,OS_64,
  44. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  45. OS_M32,
  46. OS_ADDR,OS_NO,OS_NO,
  47. OS_NO,
  48. OS_NO);
  49. {********************************* Types *********************************}
  50. type
  51. TRegEnum = RS_EAX..RS_ESP;
  52. TRegArray = Array[TRegEnum] of tsuperregister;
  53. TRegSet = Set of TRegEnum;
  54. toptreginfo = Record
  55. NewRegsEncountered, OldRegsEncountered: TRegSet;
  56. RegsLoadedForRef: TRegSet;
  57. lastReload: array[RS_EAX..RS_ESP] of tai;
  58. New2OldReg: TRegArray;
  59. end;
  60. {possible actions on an operand: read, write or modify (= read & write)}
  61. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  62. {the possible states of a flag}
  63. TFlagContents = (F_Unknown, F_notSet, F_Set);
  64. TContent = Packed Record
  65. {start and end of block instructions that defines the
  66. content of this register.}
  67. StartMod: tai;
  68. MemWrite: taicpu;
  69. {how many instructions starting with StarMod does the block consist of}
  70. NrOfMods: Word;
  71. {the type of the content of the register: unknown, memory, constant}
  72. Typ: Byte;
  73. case byte of
  74. {starts at 0, gets increased everytime the register is written to}
  75. 1: (WState: Byte;
  76. {starts at 0, gets increased everytime the register is read from}
  77. RState: Byte);
  78. { to compare both states in one operation }
  79. 2: (state: word);
  80. end;
  81. {Contents of the integer registers}
  82. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  83. {contents of the FPU registers}
  84. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  85. {$ifdef tempOpts}
  86. { linked list which allows searching/deleting based on value, no extra frills}
  87. PSearchLinkedListItem = ^TSearchLinkedListItem;
  88. TSearchLinkedListItem = object(TLinkedList_Item)
  89. constructor init;
  90. function equals(p: PSearchLinkedListItem): boolean; virtual;
  91. end;
  92. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  93. TSearchDoubleIntItem = object(TLinkedList_Item)
  94. constructor init(_int1,_int2: longint);
  95. function equals(p: PSearchLinkedListItem): boolean; virtual;
  96. private
  97. int1, int2: longint;
  98. end;
  99. PSearchLinkedList = ^TSearchLinkedList;
  100. TSearchLinkedList = object(TLinkedList)
  101. function searchByValue(p: PSearchLinkedListItem): boolean;
  102. procedure removeByValue(p: PSearchLinkedListItem);
  103. end;
  104. {$endif tempOpts}
  105. {information record with the contents of every register. Every tai object
  106. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  107. TtaiProp = Record
  108. Regs: TRegContent;
  109. { FPURegs: TRegFPUContent;} {currently not yet used}
  110. { allocated Registers }
  111. UsedRegs: TRegSet;
  112. { status of the direction flag }
  113. DirFlag: TFlagContents;
  114. {$ifdef tempOpts}
  115. { currently used temps }
  116. tempAllocs: PSearchLinkedList;
  117. {$endif tempOpts}
  118. { can this instruction be removed? }
  119. CanBeRemoved: Boolean;
  120. { are the resultflags set by this instruction used? }
  121. FlagsUsed: Boolean;
  122. end;
  123. ptaiprop = ^TtaiProp;
  124. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  125. PtaiPropBlock = ^TtaiPropBlock;
  126. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  127. TLabelTableItem = Record
  128. taiObj: tai;
  129. {$ifDef JumpAnal}
  130. InstrNr: Longint;
  131. RefsFound: Word;
  132. JmpsProcessed: Word
  133. {$endif JumpAnal}
  134. end;
  135. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  136. PLabelTable = ^TLabelTable;
  137. {*********************** procedures and functions ************************}
  138. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  139. function RefsEqual(const R1, R2: TReference): Boolean;
  140. function isgp32reg(supreg: tsuperregister): Boolean;
  141. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  142. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  143. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  144. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  145. function reginop(supreg: tsuperregister; const o:toper): boolean;
  146. function instrWritesFlags(p: tai): boolean;
  147. function instrReadsFlags(p: tai): boolean;
  148. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  149. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  150. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  151. const c: tcontent): boolean;
  152. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  153. const c: tcontent; var memwritedestroyed: boolean): boolean;
  154. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  155. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  156. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  157. procedure SkipHead(var p: tai);
  158. function labelCanBeSkipped(p: tai_label): boolean;
  159. procedure RemoveLastDeallocForFuncRes(asmL: TAsmList; p: tai);
  160. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  161. hp: tai): boolean;
  162. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  163. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  164. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  165. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  166. function sizescompatible(loadsize,newsize: topsize): boolean;
  167. function OpsEqual(const o1,o2:toper): Boolean;
  168. type
  169. tdfaobj = class
  170. constructor create(_list: TAsmList); virtual;
  171. function pass_1(_blockstart: tai): tai;
  172. function pass_generate_code: boolean;
  173. procedure clear;
  174. function getlabelwithsym(sym: tasmlabel): tai;
  175. private
  176. { Walks through the list to find the lowest and highest label number, inits the }
  177. { labeltable and fixes/optimizes some regallocs }
  178. procedure initlabeltable;
  179. function initdfapass2: boolean;
  180. procedure dodfapass2;
  181. { asm list we're working on }
  182. list: TAsmList;
  183. { current part of the asm list }
  184. blockstart, blockend: tai;
  185. { the amount of taiObjects in the current part of the assembler list }
  186. nroftaiobjs: longint;
  187. { Array which holds all TtaiProps }
  188. taipropblock: ptaipropblock;
  189. { all labels in the current block: their value mapped to their location }
  190. lolab, hilab, labdif: longint;
  191. labeltable: plabeltable;
  192. end;
  193. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  194. procedure incState(var S: Byte; amount: longint);
  195. {******************************* Variables *******************************}
  196. var
  197. dfa: tdfaobj;
  198. {*********************** end of Interface section ************************}
  199. Implementation
  200. Uses
  201. {$ifdef csdebug}
  202. cutils,
  203. {$else}
  204. {$ifdef statedebug}
  205. cutils,
  206. {$else}
  207. {$ifdef allocregdebug}
  208. cutils,
  209. {$endif}
  210. {$endif}
  211. {$endif}
  212. globals, systems, verbose, symconst, cgobj,procinfo;
  213. Type
  214. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  215. var
  216. {How many instructions are between the current instruction and the last one
  217. that modified the register}
  218. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  219. {$ifdef tempOpts}
  220. constructor TSearchLinkedListItem.init;
  221. begin
  222. end;
  223. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  224. begin
  225. equals := false;
  226. end;
  227. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  228. begin
  229. int1 := _int1;
  230. int2 := _int2;
  231. end;
  232. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  233. begin
  234. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  235. (TSearchDoubleIntItem(p).int2 = int2);
  236. end;
  237. function TSearchLinkedList.FindByValue(p: PSearchLinkedListItem): boolean;
  238. var temp: PSearchLinkedListItem;
  239. begin
  240. temp := first;
  241. while (temp <> last.next) and
  242. not(temp.equals(p)) do
  243. temp := temp.next;
  244. searchByValue := temp <> last.next;
  245. end;
  246. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  247. begin
  248. temp := first;
  249. while (temp <> last.next) and
  250. not(temp.equals(p)) do
  251. temp := temp.next;
  252. if temp <> last.next then
  253. begin
  254. remove(temp);
  255. dispose(temp,done);
  256. end;
  257. end;
  258. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  259. {updates UsedRegs with the RegAlloc Information coming after p}
  260. begin
  261. repeat
  262. while assigned(p) and
  263. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  264. ((p.typ = ait_label) and
  265. labelCanBeSkipped(tai_label(current)))) Do
  266. p := tai(p.next);
  267. while assigned(p) and
  268. (p.typ=ait_RegAlloc) Do
  269. begin
  270. case tai_regalloc(p).ratype of
  271. ra_alloc :
  272. Include(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  273. ra_dealloc :
  274. Exclude(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  275. end;
  276. p := tai(p.next);
  277. end;
  278. until not(assigned(p)) or
  279. (not(p.typ in SkipInstr) and
  280. not((p.typ = ait_label) and
  281. labelCanBeSkipped(tai_label(current))));
  282. end;
  283. {$endif tempOpts}
  284. {************************ Create the Label table ************************}
  285. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  286. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  287. { starting with Starttai and ending with the next "real" instruction }
  288. begin
  289. findregalloc := false;
  290. repeat
  291. while assigned(starttai) and
  292. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  293. ((starttai.typ = ait_label) and
  294. labelcanbeskipped(tai_label(starttai)))) do
  295. starttai := tai(starttai.next);
  296. if assigned(starttai) and
  297. (starttai.typ = ait_regalloc) then
  298. begin
  299. if (tai_regalloc(Starttai).ratype = ratyp) and
  300. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  301. begin
  302. findregalloc:=true;
  303. break;
  304. end;
  305. starttai := tai(starttai.next);
  306. end
  307. else
  308. break;
  309. until false;
  310. end;
  311. procedure RemoveLastDeallocForFuncRes(asml: TAsmList; p: tai);
  312. procedure DoRemoveLastDeallocForFuncRes(asml: TAsmList; supreg: tsuperregister);
  313. var
  314. hp2: tai;
  315. begin
  316. hp2 := p;
  317. repeat
  318. hp2 := tai(hp2.previous);
  319. if assigned(hp2) and
  320. (hp2.typ = ait_regalloc) and
  321. (tai_regalloc(hp2).ratype=ra_dealloc) and
  322. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  323. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  324. begin
  325. asml.remove(hp2);
  326. hp2.free;
  327. break;
  328. end;
  329. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  330. end;
  331. begin
  332. case current_procinfo.procdef.returndef.typ of
  333. arraydef,recorddef,pointerdef,
  334. stringdef,enumdef,procdef,objectdef,errordef,
  335. filedef,setdef,procvardef,
  336. classrefdef,forwarddef:
  337. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  338. orddef:
  339. if current_procinfo.procdef.returndef.size <> 0 then
  340. begin
  341. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  342. { for int64/qword }
  343. if current_procinfo.procdef.returndef.size = 8 then
  344. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  345. end;
  346. end;
  347. end;
  348. procedure getNoDeallocRegs(var regs: tregset);
  349. var
  350. regCounter: TSuperRegister;
  351. begin
  352. regs := [];
  353. case current_procinfo.procdef.returndef.typ of
  354. arraydef,recorddef,pointerdef,
  355. stringdef,enumdef,procdef,objectdef,errordef,
  356. filedef,setdef,procvardef,
  357. classrefdef,forwarddef:
  358. regs := [RS_EAX];
  359. orddef:
  360. if current_procinfo.procdef.returndef.size <> 0 then
  361. begin
  362. regs := [RS_EAX];
  363. { for int64/qword }
  364. if current_procinfo.procdef.returndef.size = 8 then
  365. regs := regs + [RS_EDX];
  366. end;
  367. end;
  368. for regCounter := RS_EAX to RS_EBX do
  369. { if not(regCounter in rg.usableregsint) then}
  370. include(regs,regcounter);
  371. end;
  372. procedure AddRegDeallocFor(asml: TAsmList; reg: tregister; p: tai);
  373. var
  374. hp1: tai;
  375. funcResRegs: tregset;
  376. funcResReg: boolean;
  377. begin
  378. { if not(supreg in rg.usableregsint) then
  379. exit;}
  380. { if not(supreg in [RS_EDI]) then
  381. exit;}
  382. getNoDeallocRegs(funcresregs);
  383. { funcResRegs := funcResRegs - rg.usableregsint;}
  384. { funcResRegs := funcResRegs - [RS_EDI];}
  385. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  386. funcResReg := getsupreg(reg) in funcresregs;
  387. hp1 := p;
  388. {
  389. while not(funcResReg and
  390. (p.typ = ait_instruction) and
  391. (taicpu(p).opcode = A_JMP) and
  392. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  393. getLastInstruction(p, p) and
  394. not(regInInstruction(supreg, p)) do
  395. hp1 := p;
  396. }
  397. { don't insert a dealloc for registers which contain the function result }
  398. { if they are followed by a jump to the exit label (for exit(...)) }
  399. { if not(funcResReg) or
  400. not((hp1.typ = ait_instruction) and
  401. (taicpu(hp1).opcode = A_JMP) and
  402. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  403. begin
  404. p := tai_regalloc.deAlloc(reg,nil);
  405. insertLLItem(AsmL, hp1.previous, hp1, p);
  406. end;
  407. end;
  408. {************************ Search the Label table ************************}
  409. function findlabel(l: tasmlabel; var hp: tai): boolean;
  410. {searches for the specified label starting from hp as long as the
  411. encountered instructions are labels, to be able to optimize constructs like
  412. jne l2 jmp l2
  413. jmp l3 and l1:
  414. l1: l2:
  415. l2:}
  416. var
  417. p: tai;
  418. begin
  419. p := hp;
  420. while assigned(p) and
  421. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  422. if (p.typ <> ait_Label) or
  423. (tai_label(p).labsym <> l) then
  424. GetNextInstruction(p, p)
  425. else
  426. begin
  427. hp := p;
  428. findlabel := true;
  429. exit
  430. end;
  431. findlabel := false;
  432. end;
  433. {************************ Some general functions ************************}
  434. function tch2reg(ch: tinschange): tsuperregister;
  435. {converts a TChange variable to a TRegister}
  436. const
  437. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  438. begin
  439. if (ch <= CH_REDI) then
  440. tch2reg := ch2reg[ch]
  441. else if (ch <= CH_WEDI) then
  442. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  443. else if (ch <= CH_RWEDI) then
  444. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  445. else if (ch <= CH_MEDI) then
  446. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  447. else
  448. InternalError($db)
  449. end;
  450. { inserts new_one between prev and foll }
  451. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  452. begin
  453. if assigned(prev) then
  454. if assigned(foll) then
  455. begin
  456. if assigned(new_one) then
  457. begin
  458. new_one.previous := prev;
  459. new_one.next := foll;
  460. prev.next := new_one;
  461. foll.previous := new_one;
  462. { shgould we update line information }
  463. if (not (tai(new_one).typ in SkipLineInfo)) and
  464. (not (tai(foll).typ in SkipLineInfo)) then
  465. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  466. end;
  467. end
  468. else
  469. asml.Concat(new_one)
  470. else
  471. if assigned(foll) then
  472. asml.Insert(new_one)
  473. end;
  474. {********************* Compare parts of tai objects *********************}
  475. function regssamesize(reg1, reg2: tregister): boolean;
  476. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  477. 8bit, 16bit or 32bit)}
  478. begin
  479. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  480. internalerror(2003111602);
  481. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  482. end;
  483. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  484. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  485. OldReg and NewReg have the same size (has to be chcked in advance with
  486. RegsSameSize) and that neither equals RS_INVALID}
  487. var
  488. newsupreg, oldsupreg: tsuperregister;
  489. begin
  490. if (newreg = NR_NO) or (oldreg = NR_NO) then
  491. internalerror(2003111601);
  492. newsupreg := getsupreg(newreg);
  493. oldsupreg := getsupreg(oldreg);
  494. with RegInfo Do
  495. begin
  496. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  497. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  498. New2OldReg[newsupreg] := oldsupreg;
  499. end;
  500. end;
  501. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  502. begin
  503. case o.typ Of
  504. top_reg:
  505. if (o.reg <> NR_NO) then
  506. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  507. top_ref:
  508. begin
  509. if o.ref^.base <> NR_NO then
  510. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  511. if o.ref^.index <> NR_NO then
  512. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  513. end;
  514. end;
  515. end;
  516. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  517. begin
  518. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  519. if RegsSameSize(oldreg, newreg) then
  520. with reginfo do
  521. {here we always check for the 32 bit component, because it is possible that
  522. the 8 bit component has not been set, event though NewReg already has been
  523. processed. This happens if it has been compared with a register that doesn't
  524. have an 8 bit component (such as EDI). in that case the 8 bit component is
  525. still set to RS_NO and the comparison in the else-part will fail}
  526. if (getsupreg(oldReg) in OldRegsEncountered) then
  527. if (getsupreg(NewReg) in NewRegsEncountered) then
  528. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  529. { if we haven't encountered the new register yet, but we have encountered the
  530. old one already, the new one can only be correct if it's being written to
  531. (and consequently the old one is also being written to), otherwise
  532. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  533. movl (%eax), %eax movl (%edx), %edx
  534. are considered equivalent}
  535. else
  536. if (opact = opact_write) then
  537. begin
  538. AddReg2RegInfo(oldreg, newreg, reginfo);
  539. RegsEquivalent := true
  540. end
  541. else
  542. Regsequivalent := false
  543. else
  544. if not(getsupreg(newreg) in NewRegsEncountered) and
  545. ((opact = opact_write) or
  546. ((newreg = oldreg) and
  547. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  548. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  549. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  550. begin
  551. AddReg2RegInfo(oldreg, newreg, reginfo);
  552. RegsEquivalent := true
  553. end
  554. else
  555. RegsEquivalent := false
  556. else
  557. RegsEquivalent := false
  558. else
  559. RegsEquivalent := oldreg = newreg
  560. end;
  561. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  562. begin
  563. RefsEquivalent :=
  564. (r1.offset = r2.offset) and
  565. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  566. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  567. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  568. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  569. (r1.relsymbol = r2.relsymbol);
  570. end;
  571. function refsequal(const r1, r2: treference): boolean;
  572. begin
  573. refsequal :=
  574. (r1.offset = r2.offset) and
  575. (r1.segment = r2.segment) and (r1.base = r2.base) and
  576. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  577. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  578. (r1.relsymbol = r2.relsymbol);
  579. end;
  580. {$ifdef q+}
  581. {$q-}
  582. {$define overflowon}
  583. {$endif q+}
  584. // checks whether a write to r2 of size "size" contains address r1
  585. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  586. var
  587. realsize1, realsize2: aint;
  588. begin
  589. realsize1 := tcgsize2size[size1];
  590. realsize2 := tcgsize2size[size2];
  591. refsoverlapping :=
  592. (r2.offset <= r1.offset+realsize1) and
  593. (r1.offset <= r2.offset+realsize2) and
  594. (r1.segment = r2.segment) and (r1.base = r2.base) and
  595. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  596. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  597. (r1.relsymbol = r2.relsymbol);
  598. end;
  599. {$ifdef overflowon}
  600. {$q+}
  601. {$undef overflowon}
  602. {$endif overflowon}
  603. function isgp32reg(supreg: tsuperregister): boolean;
  604. {Checks if the register is a 32 bit general purpose register}
  605. begin
  606. isgp32reg := false;
  607. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  608. isgp32reg := true
  609. end;
  610. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  611. begin {checks whether ref contains a reference to reg}
  612. reginref :=
  613. ((ref.base <> NR_NO) and
  614. (getsupreg(ref.base) = supreg)) or
  615. ((ref.index <> NR_NO) and
  616. (getsupreg(ref.index) = supreg))
  617. end;
  618. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  619. var
  620. p: taicpu;
  621. opcount: longint;
  622. begin
  623. RegReadByInstruction := false;
  624. if hp.typ <> ait_instruction then
  625. exit;
  626. p := taicpu(hp);
  627. case p.opcode of
  628. A_CALL:
  629. regreadbyinstruction := true;
  630. A_IMUL:
  631. case p.ops of
  632. 1:
  633. regReadByInstruction :=
  634. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  635. 2,3:
  636. regReadByInstruction :=
  637. reginop(supreg,p.oper[0]^) or
  638. reginop(supreg,p.oper[1]^);
  639. end;
  640. A_IDIV,A_DIV,A_MUL:
  641. begin
  642. regReadByInstruction :=
  643. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  644. end;
  645. else
  646. begin
  647. for opcount := 0 to p.ops-1 do
  648. if (p.oper[opCount]^.typ = top_ref) and
  649. reginref(supreg,p.oper[opcount]^.ref^) then
  650. begin
  651. RegReadByInstruction := true;
  652. exit
  653. end;
  654. for opcount := 1 to maxinschanges do
  655. case insprop[p.opcode].ch[opcount] of
  656. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  657. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  658. begin
  659. RegReadByInstruction := true;
  660. exit
  661. end;
  662. CH_RWOP1,CH_ROP1,CH_MOP1:
  663. if //(p.oper[0]^.typ = top_reg) and
  664. reginop(supreg,p.oper[0]^) then
  665. begin
  666. RegReadByInstruction := true;
  667. exit
  668. end;
  669. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  670. if //(p.oper[1]^.typ = top_reg) and
  671. reginop(supreg,p.oper[1]^) then
  672. begin
  673. RegReadByInstruction := true;
  674. exit
  675. end;
  676. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  677. if //(p.oper[2]^.typ = top_reg) and
  678. reginop(supreg,p.oper[2]^) then
  679. begin
  680. RegReadByInstruction := true;
  681. exit
  682. end;
  683. end;
  684. end;
  685. end;
  686. end;
  687. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  688. { Checks if reg is used by the instruction p1 }
  689. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  690. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  691. var
  692. p: taicpu;
  693. opcount: longint;
  694. begin
  695. regInInstruction := false;
  696. if p1.typ <> ait_instruction then
  697. exit;
  698. p := taicpu(p1);
  699. case p.opcode of
  700. A_CALL:
  701. regininstruction := true;
  702. A_IMUL:
  703. case p.ops of
  704. 1:
  705. regInInstruction :=
  706. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  707. 2,3:
  708. regInInstruction :=
  709. reginop(supreg,p.oper[0]^) or
  710. reginop(supreg,p.oper[1]^) or
  711. (assigned(p.oper[2]) and
  712. reginop(supreg,p.oper[2]^));
  713. end;
  714. A_IDIV,A_DIV,A_MUL:
  715. regInInstruction :=
  716. reginop(supreg,p.oper[0]^) or
  717. (supreg in [RS_EAX,RS_EDX])
  718. else
  719. begin
  720. for opcount := 0 to p.ops-1 do
  721. if (p.oper[opCount]^.typ = top_ref) and
  722. reginref(supreg,p.oper[opcount]^.ref^) then
  723. begin
  724. regInInstruction := true;
  725. exit
  726. end;
  727. for opcount := 1 to maxinschanges do
  728. case insprop[p.opcode].Ch[opCount] of
  729. CH_REAX..CH_MEDI:
  730. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  731. begin
  732. regInInstruction := true;
  733. exit;
  734. end;
  735. CH_ROp1..CH_MOp1:
  736. if reginop(supreg,p.oper[0]^) then
  737. begin
  738. regInInstruction := true;
  739. exit
  740. end;
  741. Ch_ROp2..Ch_MOp2:
  742. if reginop(supreg,p.oper[1]^) then
  743. begin
  744. regInInstruction := true;
  745. exit
  746. end;
  747. Ch_ROp3..Ch_MOp3:
  748. if reginop(supreg,p.oper[2]^) then
  749. begin
  750. regInInstruction := true;
  751. exit
  752. end;
  753. end;
  754. end;
  755. end;
  756. end;
  757. function reginop(supreg: tsuperregister; const o:toper): boolean;
  758. begin
  759. reginop := false;
  760. case o.typ Of
  761. top_reg:
  762. reginop :=
  763. (getregtype(o.reg) = R_INTREGISTER) and
  764. (supreg = getsupreg(o.reg));
  765. top_ref:
  766. reginop :=
  767. ((o.ref^.base <> NR_NO) and
  768. (supreg = getsupreg(o.ref^.base))) or
  769. ((o.ref^.index <> NR_NO) and
  770. (supreg = getsupreg(o.ref^.index)));
  771. end;
  772. end;
  773. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  774. var
  775. InstrProp: TInsProp;
  776. TmpResult: Boolean;
  777. Cnt: Word;
  778. begin
  779. TmpResult := False;
  780. if supreg = RS_INVALID then
  781. exit;
  782. if (p1.typ = ait_instruction) then
  783. case taicpu(p1).opcode of
  784. A_IMUL:
  785. With taicpu(p1) Do
  786. TmpResult :=
  787. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  788. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  789. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  790. A_DIV, A_IDIV, A_MUL:
  791. With taicpu(p1) Do
  792. TmpResult :=
  793. (supreg in [RS_EAX,RS_EDX]);
  794. else
  795. begin
  796. Cnt := 1;
  797. InstrProp := InsProp[taicpu(p1).OpCode];
  798. while (Cnt <= maxinschanges) and
  799. (InstrProp.Ch[Cnt] <> Ch_None) and
  800. not(TmpResult) Do
  801. begin
  802. case InstrProp.Ch[Cnt] Of
  803. Ch_WEAX..Ch_MEDI:
  804. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  805. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  806. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  807. reginop(supreg,taicpu(p1).oper[0]^);
  808. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  809. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  810. reginop(supreg,taicpu(p1).oper[1]^);
  811. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  812. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  813. reginop(supreg,taicpu(p1).oper[2]^);
  814. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  815. Ch_ALL: TmpResult := true;
  816. end;
  817. inc(Cnt)
  818. end
  819. end
  820. end;
  821. RegModifiedByInstruction := TmpResult
  822. end;
  823. function instrWritesFlags(p: tai): boolean;
  824. var
  825. l: longint;
  826. begin
  827. instrWritesFlags := true;
  828. case p.typ of
  829. ait_instruction:
  830. begin
  831. for l := 1 to maxinschanges do
  832. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  833. exit;
  834. end;
  835. ait_label:
  836. exit;
  837. end;
  838. instrWritesFlags := false;
  839. end;
  840. function instrReadsFlags(p: tai): boolean;
  841. var
  842. l: longint;
  843. begin
  844. instrReadsFlags := true;
  845. case p.typ of
  846. ait_instruction:
  847. begin
  848. for l := 1 to maxinschanges do
  849. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  850. exit;
  851. end;
  852. ait_label:
  853. exit;
  854. end;
  855. instrReadsFlags := false;
  856. end;
  857. {********************* GetNext and GetLastInstruction *********************}
  858. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  859. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  860. { next tai object in Next. Returns false if there isn't any }
  861. begin
  862. repeat
  863. if (Current.typ = ait_marker) and
  864. (tai_Marker(current).Kind = mark_AsmBlockStart) then
  865. begin
  866. GetNextInstruction := False;
  867. Next := Nil;
  868. Exit
  869. end;
  870. Current := tai(current.Next);
  871. while assigned(Current) and
  872. ((current.typ in skipInstr) or
  873. ((current.typ = ait_label) and
  874. labelCanBeSkipped(tai_label(current)))) do
  875. Current := tai(current.Next);
  876. { if assigned(Current) and
  877. (current.typ = ait_Marker) and
  878. (tai_Marker(current).Kind = mark_NoPropInfoStart) then
  879. begin
  880. while assigned(Current) and
  881. ((current.typ <> ait_Marker) or
  882. (tai_Marker(current).Kind <> mark_NoPropInfoEnd)) Do
  883. Current := tai(current.Next);
  884. end;}
  885. until not(assigned(Current)) or
  886. (current.typ <> ait_Marker) or
  887. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  888. Next := Current;
  889. if assigned(Current) and
  890. not((current.typ in SkipInstr) or
  891. ((current.typ = ait_label) and
  892. labelCanBeSkipped(tai_label(current))))
  893. then
  894. GetNextInstruction :=
  895. not((current.typ = ait_marker) and
  896. (tai_marker(current).kind = mark_AsmBlockStart))
  897. else
  898. begin
  899. GetNextInstruction := False;
  900. Next := nil;
  901. end;
  902. end;
  903. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  904. {skips the ait-types in SkipInstr puts the previous tai object in
  905. Last. Returns false if there isn't any}
  906. begin
  907. repeat
  908. Current := tai(current.previous);
  909. while assigned(Current) and
  910. (((current.typ = ait_Marker) and
  911. not(tai_Marker(current).Kind in [mark_AsmBlockEnd{,mark_NoPropInfoEnd}])) or
  912. (current.typ in SkipInstr) or
  913. ((current.typ = ait_label) and
  914. labelCanBeSkipped(tai_label(current)))) Do
  915. Current := tai(current.previous);
  916. { if assigned(Current) and
  917. (current.typ = ait_Marker) and
  918. (tai_Marker(current).Kind = mark_NoPropInfoEnd) then
  919. begin
  920. while assigned(Current) and
  921. ((current.typ <> ait_Marker) or
  922. (tai_Marker(current).Kind <> mark_NoPropInfoStart)) Do
  923. Current := tai(current.previous);
  924. end;}
  925. until not(assigned(Current)) or
  926. (current.typ <> ait_Marker) or
  927. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  928. if not(assigned(Current)) or
  929. (current.typ in SkipInstr) or
  930. ((current.typ = ait_label) and
  931. labelCanBeSkipped(tai_label(current))) or
  932. ((current.typ = ait_Marker) and
  933. (tai_Marker(current).Kind = mark_AsmBlockEnd))
  934. then
  935. begin
  936. Last := nil;
  937. GetLastInstruction := False
  938. end
  939. else
  940. begin
  941. Last := Current;
  942. GetLastInstruction := True;
  943. end;
  944. end;
  945. procedure SkipHead(var p: tai);
  946. var
  947. oldp: tai;
  948. begin
  949. repeat
  950. oldp := p;
  951. if (p.typ in SkipInstr) or
  952. ((p.typ = ait_marker) and
  953. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_InlineStart,mark_InlineEnd])) then
  954. GetNextInstruction(p,p)
  955. else if ((p.Typ = Ait_Marker) and
  956. (tai_Marker(p).Kind = mark_NoPropInfoStart)) then
  957. {a marker of the mark_NoPropInfoStart can't be the first instruction of a
  958. TAsmList list}
  959. GetNextInstruction(tai(p.previous),p);
  960. until p = oldp
  961. end;
  962. function labelCanBeSkipped(p: tai_label): boolean;
  963. begin
  964. labelCanBeSkipped := not(p.labsym.is_used) or (p.labsym.labeltype<>alt_jump);
  965. end;
  966. {******************* The Data Flow Analyzer functions ********************}
  967. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  968. hp: tai): boolean;
  969. { assumes reg is a 32bit register }
  970. var
  971. p: taicpu;
  972. begin
  973. if not assigned(hp) or
  974. (hp.typ <> ait_instruction) then
  975. begin
  976. regLoadedWithNewValue := false;
  977. exit;
  978. end;
  979. p := taicpu(hp);
  980. regLoadedWithNewValue :=
  981. (((p.opcode = A_MOV) or
  982. (p.opcode = A_MOVZX) or
  983. (p.opcode = A_MOVSX) or
  984. (p.opcode = A_LEA)) and
  985. (p.oper[1]^.typ = top_reg) and
  986. (getsupreg(p.oper[1]^.reg) = supreg) and
  987. (canDependOnPrevValue or
  988. (p.oper[0]^.typ = top_const) or
  989. ((p.oper[0]^.typ = top_reg) and
  990. (getsupreg(p.oper[0]^.reg) <> supreg)) or
  991. ((p.oper[0]^.typ = top_ref) and
  992. not regInRef(supreg,p.oper[0]^.ref^)))) or
  993. ((p.opcode = A_POP) and
  994. (getsupreg(p.oper[0]^.reg) = supreg));
  995. end;
  996. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  997. {updates UsedRegs with the RegAlloc Information coming after p}
  998. begin
  999. repeat
  1000. while assigned(p) and
  1001. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  1002. ((p.typ = ait_label) and
  1003. labelCanBeSkipped(tai_label(p))) or
  1004. ((p.typ = ait_marker) and
  1005. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_InlineStart,mark_InlineEnd]))) do
  1006. p := tai(p.next);
  1007. while assigned(p) and
  1008. (p.typ=ait_RegAlloc) Do
  1009. begin
  1010. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1011. begin
  1012. case tai_regalloc(p).ratype of
  1013. ra_alloc :
  1014. Include(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  1015. ra_dealloc :
  1016. Exclude(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  1017. end;
  1018. end;
  1019. p := tai(p.next);
  1020. end;
  1021. until not(assigned(p)) or
  1022. (not(p.typ in SkipInstr) and
  1023. not((p.typ = ait_label) and
  1024. labelCanBeSkipped(tai_label(p))));
  1025. end;
  1026. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  1027. { allocates register reg between (and including) instructions p1 and p2 }
  1028. { the type of p1 and p2 must not be in SkipInstr }
  1029. { note that this routine is both called from the peephole optimizer }
  1030. { where optinfo is not yet initialised) and from the cse (where it is) }
  1031. var
  1032. hp, start: tai;
  1033. removedsomething,
  1034. firstRemovedWasAlloc,
  1035. lastRemovedWasDealloc: boolean;
  1036. supreg: tsuperregister;
  1037. begin
  1038. {$ifdef EXTDEBUG}
  1039. if assigned(p1.optinfo) and
  1040. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1041. internalerror(2004101010);
  1042. {$endif EXTDEBUG}
  1043. start := p1;
  1044. if (reg = NR_ESP) or
  1045. (reg = current_procinfo.framepointer) or
  1046. not(assigned(p1)) then
  1047. { this happens with registers which are loaded implicitely, outside the }
  1048. { current block (e.g. esi with self) }
  1049. exit;
  1050. supreg := getsupreg(reg);
  1051. { make sure we allocate it for this instruction }
  1052. getnextinstruction(p2,p2);
  1053. lastRemovedWasDealloc := false;
  1054. removedSomething := false;
  1055. firstRemovedWasAlloc := false;
  1056. {$ifdef allocregdebug}
  1057. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1058. ' from here...'));
  1059. insertllitem(asml,p1.previous,p1,hp);
  1060. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1061. ' till here...'));
  1062. insertllitem(asml,p2,p2.next,hp);
  1063. {$endif allocregdebug}
  1064. if not(supreg in initialusedregs) then
  1065. begin
  1066. hp := tai_regalloc.alloc(reg,nil);
  1067. insertllItem(asmL,p1.previous,p1,hp);
  1068. end;
  1069. while assigned(p1) and
  1070. (p1 <> p2) do
  1071. begin
  1072. if assigned(p1.optinfo) then
  1073. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1074. p1 := tai(p1.next);
  1075. repeat
  1076. while assigned(p1) and
  1077. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1078. p1 := tai(p1.next);
  1079. { remove all allocation/deallocation info about the register in between }
  1080. if assigned(p1) and
  1081. (p1.typ = ait_regalloc) then
  1082. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1083. begin
  1084. if not removedSomething then
  1085. begin
  1086. firstRemovedWasAlloc := tai_regalloc(p1).ratype=ra_alloc;
  1087. removedSomething := true;
  1088. end;
  1089. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1090. hp := tai(p1.Next);
  1091. asml.Remove(p1);
  1092. p1.free;
  1093. p1 := hp;
  1094. end
  1095. else p1 := tai(p1.next);
  1096. until not(assigned(p1)) or
  1097. not(p1.typ in SkipInstr);
  1098. end;
  1099. if assigned(p1) then
  1100. begin
  1101. if firstRemovedWasAlloc then
  1102. begin
  1103. hp := tai_regalloc.Alloc(reg,nil);
  1104. insertLLItem(asmL,start.previous,start,hp);
  1105. end;
  1106. if lastRemovedWasDealloc then
  1107. begin
  1108. hp := tai_regalloc.DeAlloc(reg,nil);
  1109. insertLLItem(asmL,p1.previous,p1,hp);
  1110. end;
  1111. end;
  1112. end;
  1113. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1114. var
  1115. hp: tai;
  1116. first: boolean;
  1117. begin
  1118. findregdealloc := false;
  1119. first := true;
  1120. while assigned(p.previous) and
  1121. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1122. ((tai(p.previous).typ = ait_label) and
  1123. labelCanBeSkipped(tai_label(p.previous)))) do
  1124. begin
  1125. p := tai(p.previous);
  1126. if (p.typ = ait_regalloc) and
  1127. (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) and
  1128. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1129. if (tai_regalloc(p).ratype=ra_dealloc) then
  1130. if first then
  1131. begin
  1132. findregdealloc := true;
  1133. break;
  1134. end
  1135. else
  1136. begin
  1137. findRegDealloc :=
  1138. getNextInstruction(p,hp) and
  1139. regLoadedWithNewValue(supreg,false,hp);
  1140. break
  1141. end
  1142. else
  1143. first := false;
  1144. end
  1145. end;
  1146. procedure incState(var S: Byte; amount: longint);
  1147. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1148. errors}
  1149. begin
  1150. if (s <= $ff - amount) then
  1151. inc(s, amount)
  1152. else s := longint(s) + amount - $ff;
  1153. end;
  1154. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1155. { Content is the sequence of instructions that describes the contents of }
  1156. { seqReg. reg is being overwritten by the current instruction. if the }
  1157. { content of seqReg depends on reg (ie. because of a }
  1158. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1159. var
  1160. p: tai;
  1161. Counter: Word;
  1162. TmpResult: Boolean;
  1163. RegsChecked: TRegSet;
  1164. begin
  1165. RegsChecked := [];
  1166. p := Content.StartMod;
  1167. TmpResult := False;
  1168. Counter := 1;
  1169. while not(TmpResult) and
  1170. (Counter <= Content.NrOfMods) Do
  1171. begin
  1172. if (p.typ = ait_instruction) and
  1173. ((taicpu(p).opcode = A_MOV) or
  1174. (taicpu(p).opcode = A_MOVZX) or
  1175. (taicpu(p).opcode = A_MOVSX) or
  1176. (taicpu(p).opcode = A_LEA)) and
  1177. (taicpu(p).oper[0]^.typ = top_ref) then
  1178. With taicpu(p).oper[0]^.ref^ Do
  1179. if ((base = current_procinfo.FramePointer) or
  1180. (assigned(symbol) and (base = NR_NO))) and
  1181. (index = NR_NO) then
  1182. begin
  1183. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1184. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1185. break;
  1186. end
  1187. else
  1188. tmpResult :=
  1189. regReadByInstruction(supreg,p) and
  1190. regModifiedByInstruction(seqReg,p)
  1191. else
  1192. tmpResult :=
  1193. regReadByInstruction(supreg,p) and
  1194. regModifiedByInstruction(seqReg,p);
  1195. inc(Counter);
  1196. GetNextInstruction(p,p)
  1197. end;
  1198. sequenceDependsonReg := TmpResult
  1199. end;
  1200. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1201. var
  1202. counter: tsuperregister;
  1203. begin
  1204. for counter := RS_EAX to RS_EDI do
  1205. if counter <> supreg then
  1206. with p1^.regs[counter] Do
  1207. begin
  1208. if (typ in [con_ref,con_noRemoveRef]) and
  1209. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1210. if typ in [con_ref, con_invalid] then
  1211. typ := con_invalid
  1212. { con_noRemoveRef = con_unknown }
  1213. else
  1214. typ := con_unknown;
  1215. if assigned(memwrite) and
  1216. regInRef(counter,memwrite.oper[1]^.ref^) then
  1217. memwrite := nil;
  1218. end;
  1219. end;
  1220. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1221. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1222. contents of registers are loaded with a memory location based on reg.
  1223. doincState is false when this register has to be destroyed not because
  1224. it's contents are directly modified/overwritten, but because of an indirect
  1225. action (e.g. this register holds the contents of a variable and the value
  1226. of the variable in memory is changed) }
  1227. begin
  1228. { the following happens for fpu registers }
  1229. if (supreg < low(NrOfInstrSinceLastMod)) or
  1230. (supreg > high(NrOfInstrSinceLastMod)) then
  1231. exit;
  1232. NrOfInstrSinceLastMod[supreg] := 0;
  1233. with p1^.regs[supreg] do
  1234. begin
  1235. if doincState then
  1236. begin
  1237. incState(wstate,1);
  1238. typ := con_unknown;
  1239. startmod := nil;
  1240. end
  1241. else
  1242. if typ in [con_ref,con_const,con_invalid] then
  1243. typ := con_invalid
  1244. { con_noRemoveRef = con_unknown }
  1245. else
  1246. typ := con_unknown;
  1247. memwrite := nil;
  1248. end;
  1249. invalidateDependingRegs(p1,supreg);
  1250. end;
  1251. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1252. begin
  1253. if (p.typ = ait_instruction) then
  1254. begin
  1255. case taicpu(p).oper[0]^.typ Of
  1256. top_reg:
  1257. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1258. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1259. top_ref:
  1260. With TReference(taicpu(p).oper[0]^) Do
  1261. begin
  1262. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1263. then RegSet := RegSet + [base];
  1264. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1265. then RegSet := RegSet + [index];
  1266. end;
  1267. end;
  1268. case taicpu(p).oper[1]^.typ Of
  1269. top_reg:
  1270. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1271. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1272. top_ref:
  1273. With TReference(taicpu(p).oper[1]^) Do
  1274. begin
  1275. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1276. then RegSet := RegSet + [base];
  1277. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1278. then RegSet := RegSet + [index];
  1279. end;
  1280. end;
  1281. end;
  1282. end;}
  1283. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1284. begin {checks whether the two ops are equivalent}
  1285. OpsEquivalent := False;
  1286. if o1.typ=o2.typ then
  1287. case o1.typ Of
  1288. top_reg:
  1289. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1290. top_ref:
  1291. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1292. Top_Const:
  1293. OpsEquivalent := o1.val = o2.val;
  1294. Top_None:
  1295. OpsEquivalent := True
  1296. end;
  1297. end;
  1298. function OpsEqual(const o1,o2:toper): Boolean;
  1299. begin {checks whether the two ops are equal}
  1300. OpsEqual := False;
  1301. if o1.typ=o2.typ then
  1302. case o1.typ Of
  1303. top_reg :
  1304. OpsEqual:=o1.reg=o2.reg;
  1305. top_ref :
  1306. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1307. Top_Const :
  1308. OpsEqual:=o1.val=o2.val;
  1309. Top_None :
  1310. OpsEqual := True
  1311. end;
  1312. end;
  1313. function sizescompatible(loadsize,newsize: topsize): boolean;
  1314. begin
  1315. case loadsize of
  1316. S_B,S_BW,S_BL:
  1317. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1318. S_W,S_WL:
  1319. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1320. else
  1321. sizescompatible := newsize = S_L;
  1322. end;
  1323. end;
  1324. function opscompatible(p1,p2: taicpu): boolean;
  1325. begin
  1326. case p1.opcode of
  1327. A_MOVZX,A_MOVSX:
  1328. opscompatible :=
  1329. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1330. sizescompatible(p1.opsize,p2.opsize);
  1331. else
  1332. opscompatible :=
  1333. (p1.opcode = p2.opcode) and
  1334. (p1.ops = p2.ops) and
  1335. (p1.opsize = p2.opsize);
  1336. end;
  1337. end;
  1338. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1339. {$ifdef csdebug}
  1340. var
  1341. hp: tai;
  1342. {$endif csdebug}
  1343. begin {checks whether two taicpu instructions are equal}
  1344. if assigned(p1) and assigned(p2) and
  1345. (tai(p1).typ = ait_instruction) and
  1346. (tai(p2).typ = ait_instruction) and
  1347. opscompatible(taicpu(p1),taicpu(p2)) and
  1348. (not(assigned(taicpu(p1).oper[0])) or
  1349. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1350. (not(assigned(taicpu(p1).oper[1])) or
  1351. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1352. (not(assigned(taicpu(p1).oper[2])) or
  1353. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1354. {both instructions have the same structure:
  1355. "<operator> <operand of type1>, <operand of type 2>"}
  1356. if ((taicpu(p1).opcode = A_MOV) or
  1357. (taicpu(p1).opcode = A_MOVZX) or
  1358. (taicpu(p1).opcode = A_MOVSX) or
  1359. (taicpu(p1).opcode = A_LEA)) and
  1360. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1361. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1362. {the "old" instruction is a load of a register with a new value, not with
  1363. a value based on the contents of this register (so no "mov (reg), reg")}
  1364. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1365. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1366. {the "new" instruction is also a load of a register with a new value, and
  1367. this value is fetched from the same memory location}
  1368. begin
  1369. With taicpu(p2).oper[0]^.ref^ Do
  1370. begin
  1371. if (base <> NR_NO) and
  1372. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1373. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1374. if (index <> NR_NO) and
  1375. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1376. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1377. end;
  1378. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1379. from the reference are the same in the old and in the new instruction
  1380. sequence}
  1381. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1382. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1383. InstructionsEquivalent :=
  1384. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1385. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1386. end
  1387. {the registers are loaded with values from different memory locations. if
  1388. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1389. would be considered equivalent}
  1390. else
  1391. InstructionsEquivalent := False
  1392. else
  1393. {load register with a value based on the current value of this register}
  1394. begin
  1395. With taicpu(p2).oper[0]^.ref^ Do
  1396. begin
  1397. if (base <> NR_NO) and
  1398. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1399. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1400. {it won't do any harm if the register is already in RegsLoadedForRef}
  1401. begin
  1402. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1403. {$ifdef csdebug}
  1404. Writeln(std_regname(base), ' added');
  1405. {$endif csdebug}
  1406. end;
  1407. if (index <> NR_NO) and
  1408. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1409. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1410. begin
  1411. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1412. {$ifdef csdebug}
  1413. Writeln(std_regname(index), ' added');
  1414. {$endif csdebug}
  1415. end;
  1416. end;
  1417. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1418. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1419. begin
  1420. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1421. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1422. {$ifdef csdebug}
  1423. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1424. {$endif csdebug}
  1425. end;
  1426. InstructionsEquivalent :=
  1427. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1428. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1429. end
  1430. else
  1431. {an instruction <> mov, movzx, movsx}
  1432. begin
  1433. {$ifdef csdebug}
  1434. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1435. hp.previous := p2;
  1436. hp.next := p2.next;
  1437. p2.next.previous := hp;
  1438. p2.next := hp;
  1439. {$endif csdebug}
  1440. InstructionsEquivalent :=
  1441. (not(assigned(taicpu(p1).oper[0])) or
  1442. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1443. (not(assigned(taicpu(p1).oper[1])) or
  1444. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1445. (not(assigned(taicpu(p1).oper[2])) or
  1446. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1447. end
  1448. {the instructions haven't even got the same structure, so they're certainly
  1449. not equivalent}
  1450. else
  1451. begin
  1452. {$ifdef csdebug}
  1453. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1454. hp.previous := p2;
  1455. hp.next := p2.next;
  1456. p2.next.previous := hp;
  1457. p2.next := hp;
  1458. {$endif csdebug}
  1459. InstructionsEquivalent := False;
  1460. end;
  1461. {$ifdef csdebug}
  1462. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1463. hp.previous := p2;
  1464. hp.next := p2.next;
  1465. p2.next.previous := hp;
  1466. p2.next := hp;
  1467. {$endif csdebug}
  1468. end;
  1469. (*
  1470. function InstructionsEqual(p1, p2: tai): Boolean;
  1471. begin {checks whether two taicpu instructions are equal}
  1472. InstructionsEqual :=
  1473. assigned(p1) and assigned(p2) and
  1474. ((tai(p1).typ = ait_instruction) and
  1475. (tai(p1).typ = ait_instruction) and
  1476. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1477. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1478. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1479. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1480. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1481. end;
  1482. *)
  1483. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1484. begin
  1485. if supreg in [RS_EAX..RS_EDI] then
  1486. incState(p^.regs[supreg].rstate,1)
  1487. end;
  1488. procedure readref(p: ptaiprop; const ref: preference);
  1489. begin
  1490. if ref^.base <> NR_NO then
  1491. readreg(p, getsupreg(ref^.base));
  1492. if ref^.index <> NR_NO then
  1493. readreg(p, getsupreg(ref^.index));
  1494. end;
  1495. procedure ReadOp(p: ptaiprop;const o:toper);
  1496. begin
  1497. case o.typ Of
  1498. top_reg: readreg(p, getsupreg(o.reg));
  1499. top_ref: readref(p, o.ref);
  1500. end;
  1501. end;
  1502. function RefInInstruction(const ref: TReference; p: tai;
  1503. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1504. {checks whehter ref is used in p}
  1505. var
  1506. mysize: tcgsize;
  1507. TmpResult: Boolean;
  1508. begin
  1509. TmpResult := False;
  1510. if (p.typ = ait_instruction) then
  1511. begin
  1512. mysize := topsize2tcgsize[taicpu(p).opsize];
  1513. if (taicpu(p).ops >= 1) and
  1514. (taicpu(p).oper[0]^.typ = top_ref) then
  1515. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1516. if not(TmpResult) and
  1517. (taicpu(p).ops >= 2) and
  1518. (taicpu(p).oper[1]^.typ = top_ref) then
  1519. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1520. if not(TmpResult) and
  1521. (taicpu(p).ops >= 3) and
  1522. (taicpu(p).oper[2]^.typ = top_ref) then
  1523. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1524. end;
  1525. RefInInstruction := TmpResult;
  1526. end;
  1527. function RefInSequence(const ref: TReference; Content: TContent;
  1528. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1529. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1530. tai objects) to see whether ref is used somewhere}
  1531. var p: tai;
  1532. Counter: Word;
  1533. TmpResult: Boolean;
  1534. begin
  1535. p := Content.StartMod;
  1536. TmpResult := False;
  1537. Counter := 1;
  1538. while not(TmpResult) and
  1539. (Counter <= Content.NrOfMods) Do
  1540. begin
  1541. if (p.typ = ait_instruction) and
  1542. RefInInstruction(ref, p, RefsEq, size)
  1543. then TmpResult := True;
  1544. inc(Counter);
  1545. GetNextInstruction(p,p)
  1546. end;
  1547. RefInSequence := TmpResult
  1548. end;
  1549. {$ifdef q+}
  1550. {$q-}
  1551. {$define overflowon}
  1552. {$endif q+}
  1553. // checks whether a write to r2 of size "size" contains address r1
  1554. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1555. var
  1556. realsize1, realsize2: aint;
  1557. begin
  1558. realsize1 := tcgsize2size[size1];
  1559. realsize2 := tcgsize2size[size2];
  1560. arrayrefsoverlapping :=
  1561. (r2.offset <= r1.offset+realsize1) and
  1562. (r1.offset <= r2.offset+realsize2) and
  1563. (r1.segment = r2.segment) and
  1564. (r1.symbol=r2.symbol) and
  1565. (r1.base = r2.base)
  1566. end;
  1567. {$ifdef overflowon}
  1568. {$q+}
  1569. {$undef overflowon}
  1570. {$endif overflowon}
  1571. function isSimpleRef(const ref: treference): boolean;
  1572. { returns true if ref is reference to a local or global variable, to a }
  1573. { parameter or to an object field (this includes arrays). Returns false }
  1574. { otherwise. }
  1575. begin
  1576. isSimpleRef :=
  1577. assigned(ref.symbol) or
  1578. (ref.base = current_procinfo.framepointer);
  1579. end;
  1580. function containsPointerRef(p: tai): boolean;
  1581. { checks if an instruction contains a reference which is a pointer location }
  1582. var
  1583. hp: taicpu;
  1584. count: longint;
  1585. begin
  1586. containsPointerRef := false;
  1587. if p.typ <> ait_instruction then
  1588. exit;
  1589. hp := taicpu(p);
  1590. for count := 0 to hp.ops-1 do
  1591. begin
  1592. case hp.oper[count]^.typ of
  1593. top_ref:
  1594. if not isSimpleRef(hp.oper[count]^.ref^) then
  1595. begin
  1596. containsPointerRef := true;
  1597. exit;
  1598. end;
  1599. top_none:
  1600. exit;
  1601. end;
  1602. end;
  1603. end;
  1604. function containsPointerLoad(c: tcontent): boolean;
  1605. { checks whether the contents of a register contain a pointer reference }
  1606. var
  1607. p: tai;
  1608. count: longint;
  1609. begin
  1610. containsPointerLoad := false;
  1611. p := c.startmod;
  1612. for count := c.nrOfMods downto 1 do
  1613. begin
  1614. if containsPointerRef(p) then
  1615. begin
  1616. containsPointerLoad := true;
  1617. exit;
  1618. end;
  1619. getnextinstruction(p,p);
  1620. end;
  1621. end;
  1622. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1623. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1624. { returns whether the contents c of reg are invalid after regWritten is }
  1625. { is written to ref }
  1626. var
  1627. refsEq: trefCompare;
  1628. begin
  1629. if isSimpleRef(ref) then
  1630. begin
  1631. if (ref.index <> NR_NO) or
  1632. (assigned(ref.symbol) and
  1633. (ref.base <> NR_NO)) then
  1634. { local/global variable or parameter which is an array }
  1635. refsEq := @arrayRefsOverlapping
  1636. else
  1637. { local/global variable or parameter which is not an array }
  1638. refsEq := @refsOverlapping;
  1639. invalsmemwrite :=
  1640. assigned(c.memwrite) and
  1641. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1642. containsPointerRef(c.memwrite)) or
  1643. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1644. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1645. begin
  1646. writeToMemDestroysContents := false;
  1647. exit;
  1648. end;
  1649. { write something to a parameter, a local or global variable, so }
  1650. { * with uncertain optimizations on: }
  1651. { - destroy the contents of registers whose contents have somewhere a }
  1652. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1653. { are being written to memory) is not destroyed if it's StartMod is }
  1654. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1655. { expression based on ref) }
  1656. { * with uncertain optimizations off: }
  1657. { - also destroy registers that contain any pointer }
  1658. with c do
  1659. writeToMemDestroysContents :=
  1660. (typ in [con_ref,con_noRemoveRef]) and
  1661. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1662. containsPointerLoad(c)
  1663. ) or
  1664. (refInSequence(ref,c,refsEq,size) and
  1665. ((supreg <> regWritten) or
  1666. not((nrOfMods = 1) and
  1667. {StarMod is always of the type ait_instruction}
  1668. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1669. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1670. )
  1671. )
  1672. )
  1673. );
  1674. end
  1675. else
  1676. { write something to a pointer location, so }
  1677. { * with uncertain optimzations on: }
  1678. { - do not destroy registers which contain a local/global variable or }
  1679. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1680. { * with uncertain optimzations off: }
  1681. { - destroy every register which contains a memory location }
  1682. begin
  1683. invalsmemwrite :=
  1684. assigned(c.memwrite) and
  1685. (not(cs_opt_size in current_settings.optimizerswitches) or
  1686. containsPointerRef(c.memwrite));
  1687. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1688. begin
  1689. writeToMemDestroysContents := false;
  1690. exit;
  1691. end;
  1692. with c do
  1693. writeToMemDestroysContents :=
  1694. (typ in [con_ref,con_noRemoveRef]) and
  1695. (not(cs_opt_size in current_settings.optimizerswitches) or
  1696. { for movsl }
  1697. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1698. { don't destroy if reg contains a parameter, local or global variable }
  1699. containsPointerLoad(c)
  1700. );
  1701. end;
  1702. end;
  1703. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1704. const c: tcontent): boolean;
  1705. { returns whether the contents c of reg are invalid after destReg is }
  1706. { modified }
  1707. begin
  1708. writeToRegDestroysContents :=
  1709. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1710. sequenceDependsOnReg(c,supreg,destReg);
  1711. end;
  1712. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1713. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1714. { returns whether the contents c of reg are invalid after regWritten is }
  1715. { is written to op }
  1716. begin
  1717. memwritedestroyed := false;
  1718. case op.typ of
  1719. top_reg:
  1720. writeDestroysContents :=
  1721. (getregtype(op.reg) = R_INTREGISTER) and
  1722. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1723. top_ref:
  1724. writeDestroysContents :=
  1725. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1726. else
  1727. writeDestroysContents := false;
  1728. end;
  1729. end;
  1730. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1731. { destroys all registers which possibly contain a reference to ref, regWritten }
  1732. { is the register whose contents are being written to memory (if this proc }
  1733. { is called because of a "mov?? %reg, (mem)" instruction) }
  1734. var
  1735. counter: tsuperregister;
  1736. destroymemwrite: boolean;
  1737. begin
  1738. for counter := RS_EAX to RS_EDI Do
  1739. begin
  1740. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1741. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1742. destroyReg(ptaiprop(p.optInfo), counter, false)
  1743. else if destroymemwrite then
  1744. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1745. end;
  1746. end;
  1747. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1748. var Counter: tsuperregister;
  1749. begin {initializes/desrtoys all registers}
  1750. For Counter := RS_EAX To RS_EDI Do
  1751. begin
  1752. if read then
  1753. readreg(p, Counter);
  1754. DestroyReg(p, Counter, written);
  1755. p^.regs[counter].MemWrite := nil;
  1756. end;
  1757. p^.DirFlag := F_Unknown;
  1758. end;
  1759. procedure DestroyOp(taiObj: tai; const o:Toper);
  1760. {$ifdef statedebug}
  1761. var
  1762. hp: tai;
  1763. {$endif statedebug}
  1764. begin
  1765. case o.typ Of
  1766. top_reg:
  1767. begin
  1768. {$ifdef statedebug}
  1769. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1770. hp.next := taiobj.next;
  1771. hp.previous := taiobj;
  1772. taiobj.next := hp;
  1773. if assigned(hp.next) then
  1774. hp.next.previous := hp;
  1775. {$endif statedebug}
  1776. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1777. end;
  1778. top_ref:
  1779. begin
  1780. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1781. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1782. end;
  1783. end;
  1784. end;
  1785. procedure AddInstr2RegContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1786. p: taicpu; supreg: tsuperregister);
  1787. {$ifdef statedebug}
  1788. var
  1789. hp: tai;
  1790. {$endif statedebug}
  1791. begin
  1792. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1793. if (typ in [con_ref,con_noRemoveRef]) then
  1794. begin
  1795. incState(wstate,1);
  1796. { also store how many instructions are part of the sequence in the first }
  1797. { instructions ptaiprop, so it can be easily accessed from within }
  1798. { CheckSequence}
  1799. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1800. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1801. NrOfInstrSinceLastMod[supreg] := 0;
  1802. invalidateDependingRegs(p.optinfo,supreg);
  1803. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1804. {$ifdef StateDebug}
  1805. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1806. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1807. InsertLLItem(AsmL, p, p.next, hp);
  1808. {$endif StateDebug}
  1809. end
  1810. else
  1811. begin
  1812. {$ifdef statedebug}
  1813. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1814. insertllitem(asml,p,p.next,hp);
  1815. {$endif statedebug}
  1816. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1817. {$ifdef StateDebug}
  1818. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1819. InsertLLItem(AsmL, p, p.next, hp);
  1820. {$endif StateDebug}
  1821. end
  1822. end;
  1823. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1824. p: taicpu; const oper: TOper);
  1825. begin
  1826. if oper.typ = top_reg then
  1827. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1828. else
  1829. begin
  1830. ReadOp(ptaiprop(p.optinfo), oper);
  1831. DestroyOp(p, oper);
  1832. end
  1833. end;
  1834. {*************************************************************************************}
  1835. {************************************** TDFAOBJ **************************************}
  1836. {*************************************************************************************}
  1837. constructor tdfaobj.create(_list: TAsmList);
  1838. begin
  1839. list := _list;
  1840. blockstart := nil;
  1841. blockend := nil;
  1842. nroftaiobjs := 0;
  1843. taipropblock := nil;
  1844. lolab := 0;
  1845. hilab := 0;
  1846. labdif := 0;
  1847. labeltable := nil;
  1848. end;
  1849. procedure tdfaobj.initlabeltable;
  1850. var
  1851. labelfound: boolean;
  1852. p, prev: tai;
  1853. hp1, hp2: tai;
  1854. {$ifdef i386}
  1855. regcounter,
  1856. supreg : tsuperregister;
  1857. {$endif i386}
  1858. usedregs, nodeallocregs: tregset;
  1859. begin
  1860. labelfound := false;
  1861. lolab := maxlongint;
  1862. hilab := 0;
  1863. p := blockstart;
  1864. prev := p;
  1865. while assigned(p) do
  1866. begin
  1867. if (tai(p).typ = ait_label) then
  1868. if not labelcanbeskipped(tai_label(p)) then
  1869. begin
  1870. labelfound := true;
  1871. if (tai_Label(p).labsym.labelnr < lolab) then
  1872. lolab := tai_label(p).labsym.labelnr;
  1873. if (tai_Label(p).labsym.labelnr > hilab) then
  1874. hilab := tai_label(p).labsym.labelnr;
  1875. end;
  1876. prev := p;
  1877. getnextinstruction(p, p);
  1878. end;
  1879. if (prev.typ = ait_marker) and
  1880. (tai_marker(prev).kind = mark_AsmBlockStart) then
  1881. blockend := prev
  1882. else blockend := nil;
  1883. if labelfound then
  1884. labdif := hilab+1-lolab
  1885. else labdif := 0;
  1886. usedregs := [];
  1887. if (labdif <> 0) then
  1888. begin
  1889. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1890. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1891. end;
  1892. p := blockstart;
  1893. prev := p;
  1894. while (p <> blockend) do
  1895. begin
  1896. case p.typ of
  1897. ait_label:
  1898. if not labelcanbeskipped(tai_label(p)) then
  1899. labeltable^[tai_label(p).labsym.labelnr-lolab].taiobj := p;
  1900. {$ifdef i386}
  1901. ait_regalloc:
  1902. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1903. begin
  1904. supreg:=getsupreg(tai_regalloc(p).reg);
  1905. case tai_regalloc(p).ratype of
  1906. ra_alloc :
  1907. begin
  1908. if not(supreg in usedregs) then
  1909. include(usedregs, supreg)
  1910. else
  1911. begin
  1912. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1913. hp1 := tai(p.previous);
  1914. list.remove(p);
  1915. p.free;
  1916. p := hp1;
  1917. end;
  1918. end;
  1919. ra_dealloc :
  1920. begin
  1921. exclude(usedregs, supreg);
  1922. hp1 := p;
  1923. hp2 := nil;
  1924. while not(findregalloc(supreg,tai(hp1.next),ra_alloc)) and
  1925. getnextinstruction(hp1, hp1) and
  1926. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1927. hp2 := hp1;
  1928. if hp2 <> nil then
  1929. begin
  1930. hp1 := tai(p.previous);
  1931. list.remove(p);
  1932. insertllitem(list, hp2, tai(hp2.next), p);
  1933. p := hp1;
  1934. end
  1935. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1936. and getnextinstruction(p,hp1) then
  1937. begin
  1938. hp1 := tai(p.previous);
  1939. list.remove(p);
  1940. p.free;
  1941. p := hp1;
  1942. // don't include here, since then the allocation will be removed when it's processed
  1943. // include(usedregs,supreg);
  1944. end;
  1945. end;
  1946. end;
  1947. end;
  1948. {$endif i386}
  1949. end;
  1950. repeat
  1951. prev := p;
  1952. p := tai(p.next);
  1953. until not(assigned(p)) or
  1954. (p = blockend) or
  1955. not(p.typ in (skipinstr - [ait_regalloc]));
  1956. end;
  1957. {$ifdef i386}
  1958. { don't add deallocation for function result variable or for regvars}
  1959. getNoDeallocRegs(noDeallocRegs);
  1960. usedRegs := usedRegs - noDeallocRegs;
  1961. for regCounter := RS_EAX to RS_EDI do
  1962. if regCounter in usedRegs then
  1963. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1964. {$endif i386}
  1965. end;
  1966. function tdfaobj.pass_1(_blockstart: tai): tai;
  1967. begin
  1968. blockstart := _blockstart;
  1969. initlabeltable;
  1970. pass_1 := blockend;
  1971. end;
  1972. function tdfaobj.initdfapass2: boolean;
  1973. {reserves memory for the PtaiProps in one big memory block when not using
  1974. TP, returns False if not enough memory is available for the optimizer in all
  1975. cases}
  1976. var
  1977. p: tai;
  1978. count: Longint;
  1979. { TmpStr: String; }
  1980. begin
  1981. p := blockstart;
  1982. skiphead(p);
  1983. nroftaiobjs := 0;
  1984. while (p <> blockend) do
  1985. begin
  1986. {$ifDef JumpAnal}
  1987. case p.typ of
  1988. ait_label:
  1989. begin
  1990. if not labelcanbeskipped(tai_label(p)) then
  1991. labeltable^[tai_label(p).labsym.labelnr-lolab].instrnr := nroftaiobjs
  1992. end;
  1993. ait_instruction:
  1994. begin
  1995. if taicpu(p).is_jmp then
  1996. begin
  1997. if (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr >= lolab) and
  1998. (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr <= hilab) then
  1999. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-lolab].refsfound);
  2000. end;
  2001. end;
  2002. { ait_instruction:
  2003. begin
  2004. if (taicpu(p).opcode = A_PUSH) and
  2005. (taicpu(p).oper[0]^.typ = top_symbol) and
  2006. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  2007. begin
  2008. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  2009. if}
  2010. end;
  2011. {$endif JumpAnal}
  2012. inc(NrOftaiObjs);
  2013. getnextinstruction(p,p);
  2014. end;
  2015. if nroftaiobjs <> 0 then
  2016. begin
  2017. initdfapass2 := True;
  2018. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2019. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  2020. p := blockstart;
  2021. skiphead(p);
  2022. for count := 1 To nroftaiobjs do
  2023. begin
  2024. ptaiprop(p.optinfo) := @taipropblock^[count];
  2025. getnextinstruction(p, p);
  2026. end;
  2027. end
  2028. else
  2029. initdfapass2 := false;
  2030. end;
  2031. procedure tdfaobj.dodfapass2;
  2032. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2033. contents for the instructions starting with p. Returns the last tai which has
  2034. been processed}
  2035. var
  2036. curprop, LastFlagsChangeProp: ptaiprop;
  2037. Cnt, InstrCnt : Longint;
  2038. InstrProp: TInsProp;
  2039. UsedRegs: TRegSet;
  2040. prev,p : tai;
  2041. tmpref: TReference;
  2042. tmpsupreg: tsuperregister;
  2043. {$ifdef statedebug}
  2044. hp : tai;
  2045. {$endif}
  2046. {$ifdef AnalyzeLoops}
  2047. hp : tai;
  2048. TmpState: Byte;
  2049. {$endif AnalyzeLoops}
  2050. begin
  2051. p := BlockStart;
  2052. LastFlagsChangeProp := nil;
  2053. prev := nil;
  2054. UsedRegs := [];
  2055. UpdateUsedregs(UsedRegs, p);
  2056. SkipHead(p);
  2057. BlockStart := p;
  2058. InstrCnt := 1;
  2059. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2060. while (p <> Blockend) Do
  2061. begin
  2062. curprop := @taiPropBlock^[InstrCnt];
  2063. if assigned(prev)
  2064. then
  2065. begin
  2066. {$ifdef JumpAnal}
  2067. if (p.Typ <> ait_label) then
  2068. {$endif JumpAnal}
  2069. begin
  2070. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2071. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2072. curprop^.FlagsUsed := false;
  2073. end
  2074. end
  2075. else
  2076. begin
  2077. fillchar(curprop^, SizeOf(curprop^), 0);
  2078. { For tmpreg := RS_EAX to RS_EDI Do
  2079. curprop^.regs[tmpreg].WState := 1;}
  2080. end;
  2081. curprop^.UsedRegs := UsedRegs;
  2082. curprop^.CanBeRemoved := False;
  2083. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2084. For tmpsupreg := RS_EAX To RS_EDI Do
  2085. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2086. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2087. else
  2088. begin
  2089. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2090. curprop^.regs[tmpsupreg].typ := con_unknown;
  2091. end;
  2092. case p.typ Of
  2093. ait_marker:;
  2094. ait_label:
  2095. {$ifndef JumpAnal}
  2096. if not labelCanBeSkipped(tai_label(p)) then
  2097. DestroyAllRegs(curprop,false,false);
  2098. {$else JumpAnal}
  2099. begin
  2100. if not labelCanBeSkipped(tai_label(p)) then
  2101. With LTable^[tai_Label(p).labsym^.labelnr-LoLab] Do
  2102. {$ifDef AnalyzeLoops}
  2103. if (RefsFound = tai_Label(p).labsym^.RefCount)
  2104. {$else AnalyzeLoops}
  2105. if (JmpsProcessed = tai_Label(p).labsym^.RefCount)
  2106. {$endif AnalyzeLoops}
  2107. then
  2108. {all jumps to this label have been found}
  2109. {$ifDef AnalyzeLoops}
  2110. if (JmpsProcessed > 0)
  2111. then
  2112. {$endif AnalyzeLoops}
  2113. {we've processed at least one jump to this label}
  2114. begin
  2115. if (GetLastInstruction(p, hp) and
  2116. not(((hp.typ = ait_instruction)) and
  2117. (taicpu_labeled(hp).is_jmp))
  2118. then
  2119. {previous instruction not a JMP -> the contents of the registers after the
  2120. previous intruction has been executed have to be taken into account as well}
  2121. For tmpsupreg := RS_EAX to RS_EDI Do
  2122. begin
  2123. if (curprop^.regs[tmpsupreg].WState <>
  2124. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2125. then DestroyReg(curprop, tmpsupreg, true)
  2126. end
  2127. end
  2128. {$ifDef AnalyzeLoops}
  2129. else
  2130. {a label from a backward jump (e.g. a loop), no jump to this label has
  2131. already been processed}
  2132. if GetLastInstruction(p, hp) and
  2133. not(hp.typ = ait_instruction) and
  2134. (taicpu_labeled(hp).opcode = A_JMP))
  2135. then
  2136. {previous instruction not a jmp, so keep all the registers' contents from the
  2137. previous instruction}
  2138. begin
  2139. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2140. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2141. end
  2142. else
  2143. {previous instruction a jmp and no jump to this label processed yet}
  2144. begin
  2145. hp := p;
  2146. Cnt := InstrCnt;
  2147. {continue until we find a jump to the label or a label which has already
  2148. been processed}
  2149. while GetNextInstruction(hp, hp) and
  2150. not((hp.typ = ait_instruction) and
  2151. (taicpu(hp).is_jmp) and
  2152. (tasmlabel(taicpu(hp).oper[0]^.sym).labsymabelnr = tai_Label(p).labsym^.labelnr)) and
  2153. not((hp.typ = ait_label) and
  2154. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].RefsFound
  2155. = tai_Label(hp).labsym^.RefCount) and
  2156. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2157. inc(Cnt);
  2158. if (hp.typ = ait_label)
  2159. then
  2160. {there's a processed label after the current one}
  2161. begin
  2162. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2163. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2164. end
  2165. else
  2166. {there's no label anymore after the current one, or they haven't been
  2167. processed yet}
  2168. begin
  2169. GetLastInstruction(p, hp);
  2170. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2171. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2172. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2173. end
  2174. end
  2175. {$endif AnalyzeLoops}
  2176. else
  2177. {not all references to this label have been found, so destroy all registers}
  2178. begin
  2179. GetLastInstruction(p, hp);
  2180. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2181. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2182. DestroyAllRegs(curprop,true,true)
  2183. end;
  2184. end;
  2185. {$endif JumpAnal}
  2186. ait_stab, ait_force_line, ait_function_name:;
  2187. ait_align: ; { may destroy flags !!! }
  2188. ait_instruction:
  2189. begin
  2190. if taicpu(p).is_jmp or
  2191. (taicpu(p).opcode = A_JMP) then
  2192. begin
  2193. {$ifNDef JumpAnal}
  2194. for tmpsupreg := RS_EAX to RS_EDI do
  2195. with curprop^.regs[tmpsupreg] do
  2196. case typ of
  2197. con_ref: typ := con_noRemoveRef;
  2198. con_const: typ := con_noRemoveConst;
  2199. con_invalid: typ := con_unknown;
  2200. end;
  2201. {$else JumpAnal}
  2202. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-LoLab] Do
  2203. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2204. begin
  2205. if (InstrCnt < InstrNr)
  2206. then
  2207. {forward jump}
  2208. if (JmpsProcessed = 0) then
  2209. {no jump to this label has been processed yet}
  2210. begin
  2211. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2212. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2213. inc(JmpsProcessed);
  2214. end
  2215. else
  2216. begin
  2217. For tmpreg := RS_EAX to RS_EDI Do
  2218. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2219. curprop^.regs[tmpreg].WState) then
  2220. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2221. inc(JmpsProcessed);
  2222. end
  2223. {$ifdef AnalyzeLoops}
  2224. else
  2225. { backward jump, a loop for example}
  2226. { if (JmpsProcessed > 0) or
  2227. not(GetLastInstruction(taiObj, hp) and
  2228. (hp.typ = ait_labeled_instruction) and
  2229. (taicpu_labeled(hp).opcode = A_JMP))
  2230. then}
  2231. {instruction prior to label is not a jmp, or at least one jump to the label
  2232. has yet been processed}
  2233. begin
  2234. inc(JmpsProcessed);
  2235. For tmpreg := RS_EAX to RS_EDI Do
  2236. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2237. curprop^.regs[tmpreg].WState)
  2238. then
  2239. begin
  2240. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2241. Cnt := InstrNr;
  2242. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2243. begin
  2244. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2245. inc(Cnt);
  2246. end;
  2247. while (Cnt <= InstrCnt) Do
  2248. begin
  2249. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2250. inc(Cnt)
  2251. end
  2252. end;
  2253. end
  2254. { else }
  2255. {instruction prior to label is a jmp and no jumps to the label have yet been
  2256. processed}
  2257. { begin
  2258. inc(JmpsProcessed);
  2259. For tmpreg := RS_EAX to RS_EDI Do
  2260. begin
  2261. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2262. Cnt := InstrNr;
  2263. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2264. begin
  2265. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2266. inc(Cnt);
  2267. end;
  2268. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2269. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2270. begin
  2271. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2272. inc(Cnt);
  2273. end;
  2274. while (Cnt <= InstrCnt) Do
  2275. begin
  2276. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2277. inc(Cnt)
  2278. end
  2279. end
  2280. end}
  2281. {$endif AnalyzeLoops}
  2282. end;
  2283. {$endif JumpAnal}
  2284. end
  2285. else
  2286. begin
  2287. InstrProp := InsProp[taicpu(p).opcode];
  2288. case taicpu(p).opcode Of
  2289. A_MOV, A_MOVZX, A_MOVSX:
  2290. begin
  2291. case taicpu(p).oper[0]^.typ Of
  2292. top_ref, top_reg:
  2293. case taicpu(p).oper[1]^.typ Of
  2294. top_reg:
  2295. begin
  2296. {$ifdef statedebug}
  2297. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2298. insertllitem(list,p,p.next,hp);
  2299. {$endif statedebug}
  2300. readOp(curprop, taicpu(p).oper[0]^);
  2301. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2302. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2303. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2304. begin
  2305. with curprop^.regs[tmpsupreg] Do
  2306. begin
  2307. incState(wstate,1);
  2308. { also store how many instructions are part of the sequence in the first }
  2309. { instruction's ptaiprop, so it can be easily accessed from within }
  2310. { CheckSequence }
  2311. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2312. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2313. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2314. { Destroy the contents of the registers }
  2315. { that depended on the previous value of }
  2316. { this register }
  2317. invalidateDependingRegs(curprop,tmpsupreg);
  2318. curprop^.regs[tmpsupreg].memwrite := nil;
  2319. end;
  2320. end
  2321. else
  2322. begin
  2323. {$ifdef statedebug}
  2324. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2325. insertllitem(list,p,p.next,hp);
  2326. {$endif statedebug}
  2327. destroyReg(curprop, tmpsupreg, true);
  2328. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2329. with curprop^.regs[tmpsupreg] Do
  2330. begin
  2331. typ := con_ref;
  2332. startmod := p;
  2333. nrOfMods := 1;
  2334. end
  2335. end;
  2336. {$ifdef StateDebug}
  2337. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2338. insertllitem(list,p,p.next,hp);
  2339. {$endif StateDebug}
  2340. end;
  2341. top_ref:
  2342. begin
  2343. readref(curprop, taicpu(p).oper[1]^.ref);
  2344. if taicpu(p).oper[0]^.typ = top_reg then
  2345. begin
  2346. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2347. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2348. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2349. taicpu(p);
  2350. end
  2351. else
  2352. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2353. end;
  2354. end;
  2355. top_Const:
  2356. begin
  2357. case taicpu(p).oper[1]^.typ Of
  2358. top_reg:
  2359. begin
  2360. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2361. {$ifdef statedebug}
  2362. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2363. insertllitem(list,p,p.next,hp);
  2364. {$endif statedebug}
  2365. With curprop^.regs[tmpsupreg] Do
  2366. begin
  2367. DestroyReg(curprop, tmpsupreg, true);
  2368. typ := Con_Const;
  2369. StartMod := p;
  2370. nrOfMods := 1;
  2371. end
  2372. end;
  2373. top_ref:
  2374. begin
  2375. readref(curprop, taicpu(p).oper[1]^.ref);
  2376. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2377. end;
  2378. end;
  2379. end;
  2380. end;
  2381. end;
  2382. A_DIV, A_IDIV, A_MUL:
  2383. begin
  2384. ReadOp(curprop, taicpu(p).oper[0]^);
  2385. readreg(curprop,RS_EAX);
  2386. if (taicpu(p).OpCode = A_IDIV) or
  2387. (taicpu(p).OpCode = A_DIV) then
  2388. begin
  2389. readreg(curprop,RS_EDX);
  2390. end;
  2391. {$ifdef statedebug}
  2392. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2393. insertllitem(list,p,p.next,hp);
  2394. {$endif statedebug}
  2395. { DestroyReg(curprop, RS_EAX, true);}
  2396. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2397. taicpu(p), RS_EAX);
  2398. DestroyReg(curprop, RS_EDX, true);
  2399. LastFlagsChangeProp := curprop;
  2400. end;
  2401. A_IMUL:
  2402. begin
  2403. ReadOp(curprop,taicpu(p).oper[0]^);
  2404. if (taicpu(p).ops >= 2) then
  2405. ReadOp(curprop,taicpu(p).oper[1]^);
  2406. if (taicpu(p).ops <= 2) then
  2407. if (taicpu(p).ops=1) then
  2408. begin
  2409. readreg(curprop,RS_EAX);
  2410. {$ifdef statedebug}
  2411. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2412. insertllitem(list,p,p.next,hp);
  2413. {$endif statedebug}
  2414. { DestroyReg(curprop, RS_EAX, true); }
  2415. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2416. taicpu(p), RS_EAX);
  2417. DestroyReg(curprop,RS_EDX, true)
  2418. end
  2419. else
  2420. AddInstr2OpContents(
  2421. {$ifdef statedebug}list,{$endif}
  2422. taicpu(p), taicpu(p).oper[1]^)
  2423. else
  2424. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2425. taicpu(p), taicpu(p).oper[2]^);
  2426. LastFlagsChangeProp := curprop;
  2427. end;
  2428. A_LEA:
  2429. begin
  2430. readop(curprop,taicpu(p).oper[0]^);
  2431. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2432. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2433. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2434. else
  2435. begin
  2436. {$ifdef statedebug}
  2437. hp := tai_comment.Create(strpnew('destroying & initing'+
  2438. std_regname(taicpu(p).oper[1]^.reg)));
  2439. insertllitem(list,p,p.next,hp);
  2440. {$endif statedebug}
  2441. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2442. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2443. begin
  2444. typ := con_ref;
  2445. startmod := p;
  2446. nrOfMods := 1;
  2447. end
  2448. end;
  2449. end;
  2450. else
  2451. begin
  2452. Cnt := 1;
  2453. while (Cnt <= maxinschanges) and
  2454. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2455. begin
  2456. case InstrProp.Ch[Cnt] Of
  2457. Ch_REAX..Ch_REDI:
  2458. begin
  2459. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2460. readreg(curprop,tmpsupreg);
  2461. end;
  2462. Ch_WEAX..Ch_RWEDI:
  2463. begin
  2464. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2465. begin
  2466. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2467. readreg(curprop,tmpsupreg);
  2468. end;
  2469. {$ifdef statedebug}
  2470. hp := tai_comment.Create(strpnew('destroying '+
  2471. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2472. insertllitem(list,p,p.next,hp);
  2473. {$endif statedebug}
  2474. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2475. DestroyReg(curprop,tmpsupreg, true);
  2476. end;
  2477. Ch_MEAX..Ch_MEDI:
  2478. begin
  2479. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2480. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2481. taicpu(p),tmpsupreg);
  2482. end;
  2483. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2484. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2485. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2486. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2487. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2488. Ch_Wop1..Ch_RWop1:
  2489. begin
  2490. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2491. ReadOp(curprop, taicpu(p).oper[0]^);
  2492. DestroyOp(p, taicpu(p).oper[0]^);
  2493. end;
  2494. Ch_Mop1:
  2495. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2496. taicpu(p), taicpu(p).oper[0]^);
  2497. Ch_Wop2..Ch_RWop2:
  2498. begin
  2499. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2500. ReadOp(curprop, taicpu(p).oper[1]^);
  2501. DestroyOp(p, taicpu(p).oper[1]^);
  2502. end;
  2503. Ch_Mop2:
  2504. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2505. taicpu(p), taicpu(p).oper[1]^);
  2506. Ch_WOp3..Ch_RWOp3:
  2507. begin
  2508. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2509. ReadOp(curprop, taicpu(p).oper[2]^);
  2510. DestroyOp(p, taicpu(p).oper[2]^);
  2511. end;
  2512. Ch_Mop3:
  2513. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2514. taicpu(p), taicpu(p).oper[2]^);
  2515. Ch_WMemEDI:
  2516. begin
  2517. readreg(curprop, RS_EDI);
  2518. fillchar(tmpref, SizeOf(tmpref), 0);
  2519. tmpref.base := NR_EDI;
  2520. tmpref.index := NR_EDI;
  2521. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2522. end;
  2523. Ch_RFlags:
  2524. if assigned(LastFlagsChangeProp) then
  2525. LastFlagsChangeProp^.FlagsUsed := true;
  2526. Ch_WFlags:
  2527. LastFlagsChangeProp := curprop;
  2528. Ch_RWFlags:
  2529. begin
  2530. if assigned(LastFlagsChangeProp) then
  2531. LastFlagsChangeProp^.FlagsUsed := true;
  2532. LastFlagsChangeProp := curprop;
  2533. end;
  2534. Ch_FPU:;
  2535. else
  2536. begin
  2537. {$ifdef statedebug}
  2538. hp := tai_comment.Create(strpnew(
  2539. 'destroying all regs for prev instruction'));
  2540. insertllitem(list,p, p.next,hp);
  2541. {$endif statedebug}
  2542. DestroyAllRegs(curprop,true,true);
  2543. LastFlagsChangeProp := curprop;
  2544. end;
  2545. end;
  2546. inc(Cnt);
  2547. end
  2548. end;
  2549. end;
  2550. end;
  2551. end
  2552. else
  2553. begin
  2554. {$ifdef statedebug}
  2555. hp := tai_comment.Create(strpnew(
  2556. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2557. insertllitem(list,p, p.next,hp);
  2558. {$endif statedebug}
  2559. DestroyAllRegs(curprop,true,true);
  2560. end;
  2561. end;
  2562. inc(InstrCnt);
  2563. prev := p;
  2564. GetNextInstruction(p, p);
  2565. end;
  2566. end;
  2567. function tdfaobj.pass_generate_code: boolean;
  2568. begin
  2569. if initdfapass2 then
  2570. begin
  2571. dodfapass2;
  2572. pass_generate_code := true
  2573. end
  2574. else
  2575. pass_generate_code := false;
  2576. end;
  2577. {$ifopt r+}
  2578. {$define rangewason}
  2579. {$r-}
  2580. {$endif}
  2581. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2582. begin
  2583. if (sym.labelnr >= lolab) and
  2584. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2585. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2586. else
  2587. getlabelwithsym := nil;
  2588. end;
  2589. {$ifdef rangewason}
  2590. {$r+}
  2591. {$undef rangewason}
  2592. {$endif}
  2593. procedure tdfaobj.clear;
  2594. begin
  2595. if labdif <> 0 then
  2596. begin
  2597. freemem(labeltable);
  2598. labeltable := nil;
  2599. end;
  2600. if assigned(taipropblock) then
  2601. begin
  2602. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2603. taipropblock := nil;
  2604. end;
  2605. end;
  2606. end.