ncgset.pas 67 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Carl Eric Codere
  3. Generate generic assembler for in set/case labels
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgset;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. globtype,globals,constexp,symtype,
  22. node,nset,cpubase,cgbase,cgutils,cgobj,aasmbase,aasmtai,aasmdata;
  23. type
  24. tcgsetelementnode = class(tsetelementnode)
  25. procedure pass_generate_code;override;
  26. end;
  27. Tsetpart=record
  28. range : boolean; {Part is a range.}
  29. start,stop : byte; {Start/stop when range; Stop=element when an element.}
  30. end;
  31. Tsetparts=array[1..8] of Tsetpart;
  32. { tcginnode }
  33. tcginnode = class(tinnode)
  34. procedure in_smallset(opdef: tdef; setbase: aint); virtual;
  35. function pass_1: tnode;override;
  36. procedure pass_generate_code;override;
  37. protected
  38. function checkgenjumps(out setparts: Tsetparts; out numparts: byte; out use_small: boolean): boolean; virtual;
  39. function analizeset(const Aset:Tconstset;out setparts: Tsetparts; out numparts: byte;is_small:boolean):boolean;virtual;
  40. procedure in_reg_const(uopdef: tdef; opsize: tcgsize);virtual;
  41. end;
  42. tcgcasenode = class(tcasenode)
  43. {
  44. Emits the case node statement. Contrary to the intel
  45. 80x86 version, this version does not emit jump tables,
  46. because of portability problems.
  47. }
  48. procedure pass_generate_code;override;
  49. protected
  50. with_sign : boolean;
  51. opsize : tdef;
  52. jmp_gt,jmp_lt,jmp_le : topcmp;
  53. { register with case expression }
  54. hregister,hregister2 : tregister;
  55. endlabel,elselabel : tasmlabel;
  56. { true, if we can omit the range check of the jump table }
  57. jumptable_no_range : boolean;
  58. { has the implementation jumptable support }
  59. min_label : tconstexprint;
  60. function GetBranchLabel(Block: TNode; out _Label: TAsmLabel): Boolean;
  61. function blocklabel(id:longint):tasmlabel;
  62. procedure optimizevalues(var max_linear_list:int64;var max_dist:qword);virtual;
  63. function has_jumptable : boolean;virtual;
  64. procedure genjumptable(hp : pcaselabel;min_,max_ : int64); virtual;
  65. procedure genlinearlist(hp : pcaselabel); virtual;
  66. procedure genlinearcmplist(hp : pcaselabel); virtual;
  67. procedure genjmptreeentry(p : pcaselabel;parentvalue : TConstExprInt); virtual;
  68. procedure genjmptree(root : pcaselabel); virtual;
  69. end;
  70. implementation
  71. uses
  72. verbose,
  73. cutils,
  74. symconst,symdef,symsym,defutil,
  75. pass_2,tgobj,
  76. nbas,ncon,ncgflw,
  77. {$ifdef WASM}
  78. hlcgcpu,aasmcpu,
  79. {$endif WASM}
  80. ncgutil,hlcgobj;
  81. {*****************************************************************************
  82. TCGSETELEMENTNODE
  83. *****************************************************************************}
  84. procedure tcgsetelementnode.pass_generate_code;
  85. begin
  86. { load the set element's value }
  87. secondpass(left);
  88. { also a second value ? }
  89. if assigned(right) then
  90. internalerror(2015111106);
  91. { we don't modify the left side, we only check the location type; our
  92. parent node (an add-node) will use the resulting location to perform
  93. the set operation without creating an intermediate set }
  94. location_copy(location,left.location);
  95. end;
  96. {*****************************************************************************
  97. *****************************************************************************}
  98. function tcginnode.analizeset(const Aset:Tconstset; out setparts:tsetparts; out numparts: byte; is_small:boolean):boolean;
  99. var
  100. compares,maxcompares:word;
  101. i:byte;
  102. begin
  103. analizeset:=false;
  104. fillchar(setparts,sizeof(setparts),0);
  105. numparts:=0;
  106. compares:=0;
  107. { Lots of comparisions take a lot of time, so do not allow
  108. too much comparisions. 8 comparisions are, however, still
  109. smalller than emitting the set }
  110. if cs_opt_size in current_settings.optimizerswitches then
  111. maxcompares:=8
  112. else
  113. maxcompares:=5;
  114. { when smallset is possible allow only 3 compares the smallset
  115. code is for littlesize also smaller when more compares are used }
  116. if is_small then
  117. maxcompares:=3;
  118. for i:=0 to 255 do
  119. if i in Aset then
  120. begin
  121. if (numparts=0) or (i<>setparts[numparts].stop+1) then
  122. begin
  123. {Set element is a separate element.}
  124. inc(compares);
  125. if compares>maxcompares then
  126. exit;
  127. inc(numparts);
  128. setparts[numparts].range:=false;
  129. setparts[numparts].stop:=i;
  130. end
  131. else
  132. {Set element is part of a range.}
  133. if not setparts[numparts].range then
  134. begin
  135. {Transform an element into a range.}
  136. setparts[numparts].range:=true;
  137. setparts[numparts].start:=setparts[numparts].stop;
  138. setparts[numparts].stop:=i;
  139. { there's only one compare per range anymore. Only a }
  140. { sub is added, but that's much faster than a }
  141. { cmp/jcc combo so neglect its effect }
  142. { inc(compares);
  143. if compares>maxcompares then
  144. exit; }
  145. end
  146. else
  147. begin
  148. {Extend a range.}
  149. setparts[numparts].stop:=i;
  150. end;
  151. end;
  152. analizeset:=true;
  153. end;
  154. procedure tcginnode.in_reg_const(uopdef: tdef; opsize: tcgsize);
  155. var
  156. hr: tregister;
  157. begin
  158. { emit bit test operation -- warning: do not use
  159. location_force_reg() to force a set into a register, except
  160. to a register of the same size as the set. The reason is
  161. that on big endian systems, this would require moving the
  162. set to the most significant part of the new register,
  163. and location_force_register can't do that (it does not
  164. know the type).
  165. a_bit_test_reg_loc_reg() properly takes into account the
  166. size of the set to adjust the register index to test }
  167. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,
  168. uopdef, right.resultdef, uopdef,
  169. left.location.register, right.location, location.register);
  170. { this may have resulted in an undefined value if left.location.register
  171. was >= size of right.location, but we'll mask the value to zero below
  172. in that case -> okay }
  173. hlcg.g_undefined_ok(current_asmdata.CurrAsmList,uopdef,location.register);
  174. { now zero the result if left > nr_of_bits_in_right_register }
  175. hr := hlcg.getintregister(current_asmdata.CurrAsmList, uopdef);
  176. { if left > tcgsize2size[opsize]*8 then hr := 0 else hr := $ffffffff }
  177. { (left.location.size = location.size at this point) }
  178. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList, OP_SUB, uopdef,
  179. tcgsize2size[opsize]*8, left.location.register, hr);
  180. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SAR, uopdef, (tcgsize2size
  181. [opsize]*8)-1, hr);
  182. { if left > tcgsize2size[opsize]*8-1, then result := 0 else result := result of bit test }
  183. hlcg.a_op_reg_reg(current_asmdata.CurrAsmList, OP_AND, uopdef, hr,
  184. location.register);
  185. end;
  186. procedure tcginnode.in_smallset(opdef: tdef; setbase: aint);
  187. begin
  188. { location is always LOC_REGISTER }
  189. location_reset(location, LOC_REGISTER, def_cgsize(resultdef));
  190. { allocate a register for the result }
  191. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, resultdef);
  192. {**************************** SMALL SET **********************}
  193. if left.location.loc=LOC_CONSTANT then
  194. begin
  195. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,
  196. right.resultdef, resultdef,
  197. left.location.value-setbase, right.location,
  198. location.register);
  199. end
  200. else
  201. begin
  202. hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location,
  203. left.resultdef, opdef, true);
  204. register_maybe_adjust_setbase(current_asmdata.CurrAsmList, opdef, left.location,
  205. setbase);
  206. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList, opdef,
  207. right.resultdef, resultdef, left.location.register, right.location,
  208. location.register);
  209. end;
  210. end;
  211. function tcginnode.checkgenjumps(out setparts: Tsetparts; out numparts: byte;out use_small: boolean): boolean;
  212. begin
  213. { check if we can use smallset operation using btl which is limited
  214. to 32 bits, the left side may also not contain higher values !! }
  215. use_small:=is_smallset(right.resultdef) and
  216. not is_signed(left.resultdef) and
  217. ((left.resultdef.typ=orddef) and (torddef(left.resultdef).high<32) or
  218. (left.resultdef.typ=enumdef) and (tenumdef(left.resultdef).max<32));
  219. { Can we generate jumps? Possible for all types of sets }
  220. checkgenjumps:=(right.nodetype=setconstn) and
  221. analizeset(Tsetconstnode(right).value_set^,setparts,numparts,use_small);
  222. end;
  223. function tcginnode.pass_1: tnode;
  224. var
  225. setparts: Tsetparts;
  226. numparts: byte;
  227. use_small: boolean;
  228. begin
  229. result := inherited pass_1;
  230. if not(assigned(result)) and
  231. checkgenjumps(setparts,numparts,use_small) then
  232. expectloc := LOC_JUMP;
  233. end;
  234. procedure tcginnode.pass_generate_code;
  235. var
  236. adjustment,
  237. setbase : {$ifdef CPU8BITALU}smallint{$else}aint{$endif};
  238. l, l2 : tasmlabel;
  239. hr,
  240. pleftreg : tregister;
  241. setparts : Tsetparts;
  242. opsize : tcgsize;
  243. opdef : tdef;
  244. uopsize : tcgsize;
  245. uopdef : tdef;
  246. orgopsize : tcgsize;
  247. genjumps,
  248. use_small : boolean;
  249. i,numparts : byte;
  250. needslabel : Boolean;
  251. begin
  252. l2:=nil;
  253. { We check first if we can generate jumps, this can be done
  254. because the resultdef is already set in firstpass }
  255. genjumps := checkgenjumps(setparts,numparts,use_small);
  256. orgopsize := def_cgsize(left.resultdef);
  257. {$if defined(cpu8bitalu)}
  258. if (tsetdef(right.resultdef).setbase>=-128) and
  259. (tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase+1<=256) then
  260. begin
  261. uopsize := OS_8;
  262. uopdef := u8inttype;
  263. if is_signed(left.resultdef) then
  264. begin
  265. opsize := OS_S8;
  266. opdef := s8inttype;
  267. end
  268. else
  269. begin
  270. opsize := uopsize;
  271. opdef := uopdef;
  272. end;
  273. end
  274. {$endif defined(cpu8bitalu)}
  275. {$if defined(cpu8bitalu)}
  276. { this should be also enabled for 16 bit CPUs, however, I have no proper testing facility for 16 bit, my
  277. testing results using Dosbox are no reliable }
  278. { $if defined(cpu8bitalu) or defined(cpu16bitalu)}
  279. else if (tsetdef(right.resultdef).setbase>=-32768) and
  280. (tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase+1<=65536) then
  281. begin
  282. uopsize := OS_16;
  283. uopdef := u16inttype;
  284. if is_signed(left.resultdef) then
  285. begin
  286. opsize := OS_S16;
  287. opdef := s16inttype;
  288. end
  289. else
  290. begin
  291. opsize := uopsize;
  292. opdef := uopdef;
  293. end;
  294. end
  295. else
  296. {$endif defined(cpu8bitalu)}
  297. begin
  298. uopsize := OS_32;
  299. uopdef := u32inttype;
  300. if is_signed(left.resultdef) then
  301. begin
  302. opsize := OS_S32;
  303. opdef := s32inttype;
  304. end
  305. else
  306. begin
  307. opsize := uopsize;
  308. opdef := uopdef;
  309. end;
  310. end;
  311. needslabel := false;
  312. if not genjumps then
  313. { calculate both operators }
  314. { the complex one first }
  315. { not in case of genjumps, because then we don't secondpass }
  316. { right at all (so we have to make sure that "right" really is }
  317. { "right" and not "swapped left" in that case) }
  318. firstcomplex(self);
  319. secondpass(left);
  320. if (left.expectloc=LOC_JUMP)<>
  321. (left.location.loc=LOC_JUMP) then
  322. internalerror(2007070101);
  323. { Only process the right if we are not generating jumps }
  324. if not genjumps then
  325. secondpass(right);
  326. if codegenerror then
  327. exit;
  328. { ofcourse not commutative }
  329. if nf_swapped in flags then
  330. swapleftright;
  331. setbase:=tsetdef(right.resultdef).setbase;
  332. if genjumps then
  333. begin
  334. { location is always LOC_JUMP }
  335. current_asmdata.getjumplabel(l);
  336. current_asmdata.getjumplabel(l2);
  337. location_reset_jump(location,l,l2);
  338. { If register is used, use only lower 8 bits }
  339. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
  340. pleftreg := left.location.register;
  341. { how much have we already substracted from the x in the }
  342. { "x in [y..z]" expression }
  343. adjustment := 0;
  344. hr:=NR_NO;
  345. for i:=1 to numparts do
  346. if setparts[i].range then
  347. { use fact that a <= x <= b <=> aword(x-a) <= aword(b-a) }
  348. begin
  349. { is the range different from all legal values? }
  350. if (setparts[i].stop-setparts[i].start <> 255) or not (orgopsize = OS_8) then
  351. begin
  352. { yes, is the lower bound <> 0? }
  353. if (setparts[i].start <> 0) then
  354. { we're going to substract from the left register, }
  355. { so in case of a LOC_CREGISTER first move the value }
  356. { to edi (not done before because now we can do the }
  357. { move and substract in one instruction with LEA) }
  358. if (left.location.loc = LOC_CREGISTER) and
  359. (hr<>pleftreg) then
  360. begin
  361. { don't change this back to a_op_const_reg/a_load_reg_reg, since pleftreg must not be modified }
  362. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,opdef);
  363. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,setparts[i].start,pleftreg,hr);
  364. pleftreg:=hr;
  365. end
  366. else
  367. begin
  368. { otherwise, the value is already in a register }
  369. { that can be modified }
  370. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,
  371. setparts[i].start-adjustment,pleftreg)
  372. end;
  373. { new total value substracted from x: }
  374. { adjustment + (setparts[i].start - adjustment) }
  375. adjustment := setparts[i].start;
  376. { check if result < b-a+1 (not "result <= b-a", since }
  377. { we need a carry in case the element is in the range }
  378. { (this will never overflow since we check at the }
  379. { beginning whether stop-start <> 255) }
  380. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, uopdef, OC_B,
  381. setparts[i].stop-setparts[i].start+1,pleftreg,location.truelabel);
  382. end
  383. else
  384. { if setparts[i].start = 0 and setparts[i].stop = 255, }
  385. { it's always true since "in" is only allowed for bytes }
  386. begin
  387. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.truelabel);
  388. end;
  389. end
  390. else
  391. begin
  392. { Emit code to check if left is an element }
  393. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_EQ,
  394. setparts[i].stop-adjustment,pleftreg,location.truelabel);
  395. end;
  396. { To compensate for not doing a second pass }
  397. right.location.reference.symbol:=nil;
  398. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
  399. end
  400. else
  401. {*****************************************************************}
  402. { NO JUMP TABLE GENERATION }
  403. {*****************************************************************}
  404. begin
  405. { We will now generated code to check the set itself, no jmps,
  406. handle smallsets separate, because it allows faster checks }
  407. if use_small then
  408. begin
  409. in_smallset(opdef, setbase);
  410. end
  411. else
  412. {************************** NOT SMALL SET ********************}
  413. begin
  414. { location is always LOC_REGISTER }
  415. location_reset(location, LOC_REGISTER, uopsize{def_cgsize(resultdef)});
  416. { allocate a register for the result }
  417. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, uopdef);
  418. if (right.location.loc=LOC_CONSTANT) and
  419. (opsize < OS_S8) and { = if unsigned }
  420. (((left.resultdef.typ=orddef) and
  421. (torddef(left.resultdef).low >= int64(tsetdef(right.resultdef).setbase))) or
  422. ((left.resultdef.typ=enumdef) and
  423. (tenumdef(left.resultdef).min >= aint(tsetdef(right.resultdef).setbase)))) then
  424. begin
  425. { can it actually occur currently? CEC }
  426. { yes: "if bytevar in [1,3,5,7,9,11,13,15]" (JM) }
  427. { note: this code assumes that left in [0..255], which is a valid }
  428. { assumption (other cases will be caught by range checking) (JM) }
  429. { load left in register }
  430. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,uopdef,true);
  431. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,uopdef,left.location,setbase);
  432. in_reg_const(uopdef, opsize);
  433. end { of right.location.loc=LOC_CONSTANT }
  434. { do search in a normal set which could have >32 elements
  435. but also used if the left side contains higher values > 32 }
  436. else if (left.location.loc=LOC_CONSTANT) then
  437. begin
  438. if (left.location.value < setbase) or (((left.location.value-setbase) shr 3) >= right.resultdef.size) then
  439. {should be caught earlier }
  440. internalerror(2007020402);
  441. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,right.resultdef,uopdef,left.location.value-setbase,
  442. right.location,location.register);
  443. end
  444. else
  445. begin
  446. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
  447. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,opdef,left.location,setbase);
  448. pleftreg := left.location.register;
  449. if (opsize >= OS_S8) or { = if signed }
  450. ((left.resultdef.typ=orddef) and
  451. ((torddef(left.resultdef).low < int64(tsetdef(right.resultdef).setbase)) or
  452. (torddef(left.resultdef).high > int64(tsetdef(right.resultdef).setmax)))) or
  453. ((left.resultdef.typ=enumdef) and
  454. ((tenumdef(left.resultdef).min < aint(tsetdef(right.resultdef).setbase)) or
  455. (tenumdef(left.resultdef).max > aint(tsetdef(right.resultdef).setmax)))) then
  456. begin
  457. {$ifdef WASM}
  458. needslabel := True;
  459. thlcgwasm(hlcg).a_cmp_const_reg_stack(current_asmdata.CurrAsmList, opdef, OC_A, tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase, pleftreg);
  460. current_asmdata.CurrAsmList.concat(taicpu.op_none(a_if));
  461. thlcgwasm(hlcg).decstack(current_asmdata.CurrAsmList,1);
  462. hlcg.a_load_const_reg(current_asmdata.CurrAsmList, uopdef, 0, location.register);
  463. current_asmdata.CurrAsmList.concat(taicpu.op_none(a_else));
  464. {$else WASM}
  465. current_asmdata.getjumplabel(l);
  466. current_asmdata.getjumplabel(l2);
  467. needslabel := True;
  468. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_BE, tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase, pleftreg, l);
  469. hlcg.a_load_const_reg(current_asmdata.CurrAsmList, uopdef, 0, location.register);
  470. hlcg.a_jmp_always(current_asmdata.CurrAsmList, l2);
  471. hlcg.a_label(current_asmdata.CurrAsmList, l);
  472. {$endif WASM}
  473. end;
  474. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,opdef,right.resultdef,uopdef,
  475. pleftreg,right.location,location.register);
  476. if needslabel then
  477. begin
  478. {$ifdef WASM}
  479. current_asmdata.CurrAsmList.concat(taicpu.op_none(a_end_if));
  480. {$else WASM}
  481. hlcg.a_label(current_asmdata.CurrAsmList, l2);
  482. {$endif WASM}
  483. end
  484. end;
  485. {$ifndef cpuhighleveltarget}
  486. location.size := def_cgsize(resultdef);
  487. location.register := cg.makeregsize(current_asmdata.CurrAsmList, location.register, location.size);
  488. {$else not cpuhighleveltarget}
  489. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  490. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,uopdef,resultdef,location.register,hr);
  491. location.register:=hr;
  492. location.size := def_cgsize(resultdef);
  493. {$endif not cpuhighleveltarget}
  494. end;
  495. end;
  496. location_freetemp(current_asmdata.CurrAsmList, right.location);
  497. end;
  498. {*****************************************************************************
  499. TCGCASENODE
  500. *****************************************************************************}
  501. { Analyse the nodes following the else label - if empty, change to end label }
  502. function tcgcasenode.GetBranchLabel(Block: TNode; out _Label: TAsmLabel): Boolean;
  503. var
  504. LabelSym: TLabelSym;
  505. begin
  506. Result := True;
  507. if not Assigned(Block) then
  508. begin
  509. { Block doesn't exist / is empty }
  510. _Label := endlabel;
  511. Exit;
  512. end;
  513. { These optimisations aren't particularly debugger friendly }
  514. if not (cs_opt_level2 in current_settings.optimizerswitches) then
  515. begin
  516. Result := False;
  517. current_asmdata.getjumplabel(_Label);
  518. Exit;
  519. end;
  520. while Assigned(Block) do
  521. begin
  522. case Block.nodetype of
  523. nothingn:
  524. begin
  525. _Label := endlabel;
  526. Exit;
  527. end;
  528. goton:
  529. begin
  530. LabelSym := TCGGotoNode(Block).labelsym;
  531. if not Assigned(LabelSym) then
  532. InternalError(2018121131);
  533. _Label := TCGLabelNode(TCGGotoNode(Block).labelnode).getasmlabel;
  534. if Assigned(_Label) then
  535. { Keep tabs on the fact that an actual 'goto' was used }
  536. Include(flowcontrol,fc_gotolabel)
  537. else
  538. Break;
  539. Exit;
  540. end;
  541. blockn:
  542. begin
  543. Block := TBlockNode(Block).Left;
  544. Continue;
  545. end;
  546. statementn:
  547. begin
  548. { If the right node is assigned, then it's a compound block
  549. that can't be simplified, so fall through, set Result to
  550. False and make a new label }
  551. if Assigned(TStatementNode(Block).right) then
  552. Break;
  553. Block := TStatementNode(Block).Left;
  554. Continue;
  555. end;
  556. else
  557. ;
  558. end;
  559. Break;
  560. end;
  561. { Create unique label }
  562. Result := False;
  563. current_asmdata.getjumplabel(_Label);
  564. end;
  565. function tcgcasenode.blocklabel(id:longint):tasmlabel;
  566. begin
  567. if not assigned(blocks[id]) then
  568. internalerror(200411301);
  569. result:=pcaseblock(blocks[id])^.blocklabel;
  570. end;
  571. procedure tcgcasenode.optimizevalues(var max_linear_list:int64;var max_dist:qword);
  572. begin
  573. { no changes by default }
  574. end;
  575. function tcgcasenode.has_jumptable : boolean;
  576. begin
  577. { No jumptable support in the default implementation }
  578. has_jumptable:=false;
  579. end;
  580. procedure tcgcasenode.genjumptable(hp : pcaselabel;min_,max_ : int64);
  581. begin
  582. internalerror(200209161);
  583. end;
  584. procedure tcgcasenode.genlinearlist(hp : pcaselabel);
  585. var
  586. first : boolean;
  587. last : TConstExprInt;
  588. scratch_reg: tregister;
  589. newsize: tcgsize;
  590. newdef: tdef;
  591. procedure gensub(value:tcgint);
  592. begin
  593. { here, since the sub and cmp are separate we need
  594. to move the result before subtract to help
  595. the register allocator
  596. }
  597. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList, opsize, opsize, hregister, scratch_reg);
  598. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SUB, opsize, value, hregister);
  599. end;
  600. procedure genitem(t : pcaselabel);
  601. begin
  602. if assigned(t^.less) then
  603. genitem(t^.less);
  604. { do we need to test the first value? }
  605. if first and (t^._low>get_min_value(left.resultdef)) then
  606. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,tcgint(t^._low.svalue),hregister,elselabel);
  607. if t^._low=t^._high then
  608. begin
  609. if t^._low-last=0 then
  610. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,OC_EQ,0,hregister,blocklabel(t^.blockid))
  611. else
  612. begin
  613. gensub(tcgint(t^._low.svalue-last.svalue));
  614. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,
  615. OC_EQ,tcgint(t^._low.svalue-last.svalue),scratch_reg,blocklabel(t^.blockid));
  616. end;
  617. last:=t^._low;
  618. end
  619. else
  620. begin
  621. { it begins with the smallest label, if the value }
  622. { is even smaller then jump immediately to the }
  623. { ELSE-label }
  624. if first then
  625. begin
  626. { have we to ajust the first value ? }
  627. if (t^._low>get_min_value(left.resultdef)) or (get_min_value(left.resultdef)<>0) then
  628. gensub(tcgint(t^._low.svalue));
  629. end
  630. else
  631. begin
  632. { if there is no unused label between the last and the }
  633. { present label then the lower limit can be checked }
  634. { immediately. else check the range in between: }
  635. gensub(tcgint(t^._low.svalue-last.svalue));
  636. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize,jmp_lt,tcgint(t^._low.svalue-last.svalue),scratch_reg,elselabel);
  637. end;
  638. gensub(tcgint(t^._high.svalue-t^._low.svalue));
  639. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_le,tcgint(t^._high.svalue-t^._low.svalue),scratch_reg,blocklabel(t^.blockid));
  640. last:=t^._high;
  641. end;
  642. first:=false;
  643. if assigned(t^.greater) then
  644. genitem(t^.greater);
  645. end;
  646. begin
  647. { do we need to generate cmps? }
  648. if (with_sign and (min_label<0)) then
  649. genlinearcmplist(hp)
  650. else
  651. begin
  652. { sign/zero extend the value to a full register before starting to
  653. subtract values, so that on platforms that don't have
  654. subregisters of the same size as the value we don't generate
  655. sign/zero-extensions after every subtraction
  656. make newsize always signed, since we only do this if the size in
  657. bytes of the register is larger than the original opsize, so
  658. the value can always be represented by a larger signed type }
  659. newsize:=tcgsize2signed[reg_cgsize(hregister)];
  660. if tcgsize2size[newsize]>opsize.size then
  661. begin
  662. newdef:=cgsize_orddef(newsize);
  663. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,newdef);
  664. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,newdef,hregister,scratch_reg);
  665. hregister:=scratch_reg;
  666. opsize:=newdef;
  667. end;
  668. if (labelcnt>1) or not(cs_opt_level1 in current_settings.optimizerswitches) then
  669. begin
  670. last:=0;
  671. first:=true;
  672. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
  673. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  674. genitem(hp);
  675. end
  676. else
  677. begin
  678. { If only one label exists, we can greatly simplify the checks to a simple comparison }
  679. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  680. if hp^._low=hp^._high then
  681. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, tcgint(hp^._low.svalue), hregister, blocklabel(hp^.blockid))
  682. else
  683. begin
  684. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
  685. gensub(tcgint(hp^._low.svalue));
  686. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_BE, tcgint(hp^._high.svalue-hp^._low.svalue), hregister, blocklabel(hp^.blockid))
  687. end;
  688. end;
  689. cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  690. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  691. end;
  692. end;
  693. procedure tcgcasenode.genlinearcmplist(hp : pcaselabel);
  694. var
  695. last : TConstExprInt;
  696. lastwasrange: boolean;
  697. procedure genitem(t : pcaselabel);
  698. {$if not defined(cpu64bitalu) and not defined(cpuhighleveltarget)}
  699. var
  700. l1 : tasmlabel;
  701. {$endif not cpu64bitalu and not cpuhighleveltarget}
  702. begin
  703. if assigned(t^.less) then
  704. genitem(t^.less);
  705. if t^._low=t^._high then
  706. begin
  707. {$ifndef cpuhighleveltarget}
  708. {$if defined(cpu32bitalu)}
  709. if def_cgsize(opsize) in [OS_S64,OS_64] then
  710. begin
  711. current_asmdata.getjumplabel(l1);
  712. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_NE, aint(hi(int64(t^._low.svalue))),hregister2,l1);
  713. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_EQ, aint(lo(int64(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  714. cg.a_label(current_asmdata.CurrAsmList,l1);
  715. end
  716. else
  717. {$elseif defined(cpu16bitalu)}
  718. if def_cgsize(opsize) in [OS_S64,OS_64] then
  719. begin
  720. current_asmdata.getjumplabel(l1);
  721. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(hi(int64(t^._low.svalue)))),cg.GetNextReg(hregister2),l1);
  722. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(lo(hi(int64(t^._low.svalue)))),hregister2,l1);
  723. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(lo(int64(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
  724. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(lo(int64(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  725. cg.a_label(current_asmdata.CurrAsmList,l1);
  726. end
  727. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  728. begin
  729. current_asmdata.getjumplabel(l1);
  730. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(int32(t^._low.svalue))),cg.GetNextReg(hregister),l1);
  731. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(int32(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  732. cg.a_label(current_asmdata.CurrAsmList,l1);
  733. end
  734. else
  735. {$elseif defined(cpu8bitalu)}
  736. if def_cgsize(opsize) in [OS_S64,OS_64] then
  737. begin
  738. current_asmdata.getjumplabel(l1);
  739. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
  740. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
  741. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),l1);
  742. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  743. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  744. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  745. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),l1);
  746. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,blocklabel(t^.blockid));
  747. cg.a_label(current_asmdata.CurrAsmList,l1);
  748. end
  749. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  750. begin
  751. current_asmdata.getjumplabel(l1);
  752. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  753. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  754. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
  755. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(int32(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  756. cg.a_label(current_asmdata.CurrAsmList,l1);
  757. end
  758. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  759. begin
  760. current_asmdata.getjumplabel(l1);
  761. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),l1);
  762. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(int16(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  763. cg.a_label(current_asmdata.CurrAsmList,l1);
  764. end
  765. else
  766. {$endif}
  767. {$endif cpuhighleveltarget}
  768. begin
  769. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, tcgint(t^._low.svalue),hregister, blocklabel(t^.blockid));
  770. end;
  771. { Reset last here, because we've only checked for one value and need to compare
  772. for the next range both the lower and upper bound }
  773. lastwasrange := false;
  774. end
  775. else
  776. begin
  777. { it begins with the smallest label, if the value }
  778. { is even smaller then jump immediately to the }
  779. { ELSE-label }
  780. if not lastwasrange or (t^._low-last>1) then
  781. begin
  782. {$ifndef cpuhighleveltarget}
  783. {$if defined(cpu32bitalu)}
  784. if def_cgsize(opsize) in [OS_64,OS_S64] then
  785. begin
  786. current_asmdata.getjumplabel(l1);
  787. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._low.svalue))),
  788. hregister2, elselabel);
  789. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._low.svalue))),
  790. hregister2, l1);
  791. { the comparisation of the low dword must be always unsigned! }
  792. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_B, aint(lo(int64(t^._low.svalue))), hregister, elselabel);
  793. cg.a_label(current_asmdata.CurrAsmList,l1);
  794. end
  795. else
  796. {$elseif defined(cpu16bitalu)}
  797. if def_cgsize(opsize) in [OS_64,OS_S64] then
  798. begin
  799. current_asmdata.getjumplabel(l1);
  800. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._low.svalue)))),
  801. cg.GetNextReg(hregister2), elselabel);
  802. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._low.svalue)))),
  803. cg.GetNextReg(hregister2), l1);
  804. { the comparison of the low words must be always unsigned! }
  805. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._low.svalue)))),
  806. hregister2, elselabel);
  807. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._low.svalue)))),
  808. hregister2, l1);
  809. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._low.svalue)))),
  810. cg.GetNextReg(hregister), elselabel);
  811. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._low.svalue)))),
  812. cg.GetNextReg(hregister), l1);
  813. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(lo(int64(t^._low.svalue)))), hregister, elselabel);
  814. cg.a_label(current_asmdata.CurrAsmList,l1);
  815. end
  816. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  817. begin
  818. current_asmdata.getjumplabel(l1);
  819. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._low.svalue))),
  820. cg.GetNextReg(hregister), elselabel);
  821. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._low.svalue))),
  822. cg.GetNextReg(hregister), l1);
  823. { the comparisation of the low dword must be always unsigned! }
  824. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(int32(t^._low.svalue))), hregister, elselabel);
  825. cg.a_label(current_asmdata.CurrAsmList,l1);
  826. end
  827. else
  828. {$elseif defined(cpu8bitalu)}
  829. if def_cgsize(opsize) in [OS_64,OS_S64] then
  830. begin
  831. current_asmdata.getjumplabel(l1);
  832. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),elselabel);
  833. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
  834. { the comparison of the low words must be always unsigned! }
  835. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),elselabel);
  836. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
  837. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),elselabel);
  838. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),l1);
  839. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,elselabel);
  840. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  841. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),elselabel);
  842. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  843. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),elselabel);
  844. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  845. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),elselabel);
  846. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),l1);
  847. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,elselabel);
  848. cg.a_label(current_asmdata.CurrAsmList,l1);
  849. end
  850. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  851. begin
  852. current_asmdata.getjumplabel(l1);
  853. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),elselabel);
  854. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8,jmp_gt,aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  855. { the comparison of the low words must be always unsigned! }
  856. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),elselabel);
  857. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  858. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),elselabel);
  859. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
  860. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(int32(t^._low.svalue)))),hregister,elselabel);
  861. cg.a_label(current_asmdata.CurrAsmList,l1);
  862. end
  863. else if def_cgsize(opsize) in [OS_16,OS_S16] then
  864. begin
  865. current_asmdata.getjumplabel(l1);
  866. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),elselabel);
  867. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),l1);
  868. { the comparisation of the low dword must be always unsigned! }
  869. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(int16(t^._low.svalue))),hregister,elselabel);
  870. cg.a_label(current_asmdata.CurrAsmList,l1);
  871. end
  872. else
  873. {$endif}
  874. {$endif cpuhighleveltarget}
  875. begin
  876. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_lt, tcgint(t^._low.svalue), hregister,
  877. elselabel);
  878. end;
  879. end;
  880. {$ifndef cpuhighleveltarget}
  881. {$if defined(cpu32bitalu)}
  882. if def_cgsize(opsize) in [OS_S64,OS_64] then
  883. begin
  884. current_asmdata.getjumplabel(l1);
  885. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._high.svalue))), hregister2,
  886. blocklabel(t^.blockid));
  887. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._high.svalue))), hregister2,
  888. l1);
  889. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_BE, aint(lo(int64(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  890. cg.a_label(current_asmdata.CurrAsmList,l1);
  891. end
  892. else
  893. {$elseif defined(cpu16bitalu)}
  894. if def_cgsize(opsize) in [OS_S64,OS_64] then
  895. begin
  896. current_asmdata.getjumplabel(l1);
  897. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._high.svalue)))), cg.GetNextReg(hregister2),
  898. blocklabel(t^.blockid));
  899. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._high.svalue)))), cg.GetNextReg(hregister2),
  900. l1);
  901. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  902. blocklabel(t^.blockid));
  903. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  904. l1);
  905. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._high.svalue)))), cg.GetNextReg(hregister),
  906. blocklabel(t^.blockid));
  907. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._high.svalue)))), cg.GetNextReg(hregister),
  908. l1);
  909. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(lo(int64(t^._high.svalue)))), hregister, blocklabel(t^.blockid));
  910. cg.a_label(current_asmdata.CurrAsmList,l1);
  911. end
  912. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  913. begin
  914. current_asmdata.getjumplabel(l1);
  915. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._high.svalue))), cg.GetNextReg(hregister),
  916. blocklabel(t^.blockid));
  917. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._high.svalue))), cg.GetNextReg(hregister),
  918. l1);
  919. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(int32(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  920. cg.a_label(current_asmdata.CurrAsmList,l1);
  921. end
  922. else
  923. {$elseif defined(cpu8bitalu)}
  924. if def_cgsize(opsize) in [OS_S64,OS_64] then
  925. begin
  926. current_asmdata.getjumplabel(l1);
  927. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),blocklabel(t^.blockid));
  928. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
  929. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),blocklabel(t^.blockid));
  930. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
  931. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._high.svalue))))),cg.GetNextReg(hregister2),blocklabel(t^.blockid));
  932. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._high.svalue))))),cg.GetNextReg(hregister2),l1);
  933. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,blocklabel(t^.blockid));
  934. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,l1);
  935. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),blocklabel(t^.blockid));
  936. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  937. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),blocklabel(t^.blockid));
  938. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  939. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._high.svalue))))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
  940. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._high.svalue))))),cg.GetNextReg(hregister),l1);
  941. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(lo(int64(t^._high.svalue))))),hregister,blocklabel(t^.blockid));
  942. cg.a_label(current_asmdata.CurrAsmList,l1);
  943. end
  944. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  945. begin
  946. current_asmdata.getjumplabel(l1);
  947. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),blocklabel(t^.blockid));
  948. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  949. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),blocklabel(t^.blockid));
  950. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  951. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._high.svalue)))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
  952. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._high.svalue)))),cg.GetNextReg(hregister),l1);
  953. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(int32(t^._high.svalue)))),hregister,blocklabel(t^.blockid));
  954. cg.a_label(current_asmdata.CurrAsmList,l1);
  955. end
  956. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  957. begin
  958. current_asmdata.getjumplabel(l1);
  959. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._high.svalue))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
  960. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._high.svalue))),cg.GetNextReg(hregister),l1);
  961. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(int16(t^._high.svalue))),hregister,blocklabel(t^.blockid));
  962. cg.a_label(current_asmdata.CurrAsmList,l1);
  963. end
  964. else
  965. {$endif}
  966. {$endif cpuhighleveltarget}
  967. begin
  968. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_le, tcgint(t^._high.svalue), hregister, blocklabel(t^.blockid));
  969. end;
  970. last:=t^._high;
  971. lastwasrange := true;
  972. end;
  973. if assigned(t^.greater) then
  974. genitem(t^.greater);
  975. end;
  976. begin
  977. last:=0;
  978. lastwasrange:=false;
  979. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  980. genitem(hp);
  981. cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  982. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  983. end;
  984. procedure tcgcasenode.genjmptreeentry(p : pcaselabel;parentvalue : TConstExprInt);
  985. var
  986. lesslabel,greaterlabel : tasmlabel;
  987. begin
  988. current_asmdata.CurrAsmList.concat(cai_align.Create(current_settings.alignment.jumpalign));
  989. cg.a_label(current_asmdata.CurrAsmList,p^.labellabel);
  990. { calculate labels for left and right }
  991. if p^.less=nil then
  992. lesslabel:=elselabel
  993. else
  994. lesslabel:=p^.less^.labellabel;
  995. if p^.greater=nil then
  996. greaterlabel:=elselabel
  997. else
  998. greaterlabel:=p^.greater^.labellabel;
  999. { calculate labels for left and right }
  1000. { no range label: }
  1001. if p^._low=p^._high then
  1002. begin
  1003. if greaterlabel=lesslabel then
  1004. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_NE,p^._low,hregister, lesslabel)
  1005. else
  1006. begin
  1007. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize, jmp_lt,p^._low,hregister, lesslabel);
  1008. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize, jmp_gt,p^._low,hregister, greaterlabel);
  1009. end;
  1010. hlcg.a_jmp_always(current_asmdata.CurrAsmList,blocklabel(p^.blockid));
  1011. end
  1012. else
  1013. begin
  1014. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,p^._low, hregister, lesslabel);
  1015. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_gt,p^._high,hregister, greaterlabel);
  1016. hlcg.a_jmp_always(current_asmdata.CurrAsmList,blocklabel(p^.blockid));
  1017. end;
  1018. if assigned(p^.less) then
  1019. genjmptreeentry(p^.less,p^._low);
  1020. if assigned(p^.greater) then
  1021. genjmptreeentry(p^.greater,p^._high);
  1022. end;
  1023. procedure tcgcasenode.genjmptree(root : pcaselabel);
  1024. type
  1025. tlabelarrayentry = record
  1026. caselabel : pcaselabel;
  1027. asmlabel : TAsmLabel;
  1028. end;
  1029. tlabelarray = array of tlabelarrayentry;
  1030. var
  1031. labelarray : tlabelarray;
  1032. var
  1033. nextarrayentry : int64;
  1034. i : longint;
  1035. procedure addarrayentry(entry : pcaselabel);
  1036. begin
  1037. if assigned(entry^.less) then
  1038. addarrayentry(entry^.less);
  1039. with labelarray[nextarrayentry] do
  1040. begin
  1041. caselabel:=entry;
  1042. current_asmdata.getjumplabel(asmlabel);
  1043. end;
  1044. inc(nextarrayentry);
  1045. if assigned(entry^.greater) then
  1046. addarrayentry(entry^.greater);
  1047. end;
  1048. { rebuild the label tree balanced }
  1049. procedure rebuild(first,last : int64;var p : pcaselabel);
  1050. var
  1051. current : int64;
  1052. begin
  1053. current:=(first+last) div 2;
  1054. p:=labelarray[current].caselabel;
  1055. if first<current then
  1056. rebuild(first,current-1,p^.less)
  1057. else
  1058. p^.less:=nil;
  1059. if last>current then
  1060. rebuild(current+1,last,p^.greater)
  1061. else
  1062. p^.greater:=nil;
  1063. end;
  1064. begin
  1065. labelarray:=nil;
  1066. SetLength(labelarray,labelcnt);
  1067. nextarrayentry:=0;
  1068. addarrayentry(root);
  1069. rebuild(0,high(labelarray),root);
  1070. for i:=0 to high(labelarray) do
  1071. current_asmdata.getjumplabel(labelarray[i].caselabel^.labellabel);
  1072. genjmptreeentry(root,root^._high+10);
  1073. end;
  1074. procedure tcgcasenode.pass_generate_code;
  1075. var
  1076. oldflowcontrol: tflowcontrol;
  1077. i : longint;
  1078. dist : asizeuint;
  1079. distv,
  1080. lv,hv,
  1081. max_label: tconstexprint;
  1082. max_linear_list : int64;
  1083. max_dist : qword;
  1084. ShortcutElse: Boolean;
  1085. begin
  1086. location_reset(location,LOC_VOID,OS_NO);
  1087. oldflowcontrol := flowcontrol;
  1088. include(flowcontrol,fc_inflowcontrol);
  1089. { Allocate labels }
  1090. current_asmdata.getjumplabel(endlabel);
  1091. { Do some optimisation to deal with empty else blocks }
  1092. ShortcutElse := GetBranchLabel(elseblock, elselabel);
  1093. for i:=0 to blocks.count-1 do
  1094. with pcaseblock(blocks[i])^ do
  1095. shortcut := GetBranchLabel(statement, blocklabel);
  1096. with_sign:=is_signed(left.resultdef);
  1097. if with_sign then
  1098. begin
  1099. jmp_gt:=OC_GT;
  1100. jmp_lt:=OC_LT;
  1101. jmp_le:=OC_LTE;
  1102. end
  1103. else
  1104. begin
  1105. jmp_gt:=OC_A;
  1106. jmp_lt:=OC_B;
  1107. jmp_le:=OC_BE;
  1108. end;
  1109. secondpass(left);
  1110. if (left.expectloc=LOC_JUMP)<>
  1111. (left.location.loc=LOC_JUMP) then
  1112. internalerror(2006050501);
  1113. { determines the size of the operand }
  1114. opsize:=left.resultdef;
  1115. { copy the case expression to a register }
  1116. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opsize,false);
  1117. {$if not defined(cpu64bitalu)}
  1118. if def_cgsize(opsize) in [OS_S64,OS_64] then
  1119. begin
  1120. hregister:=left.location.register64.reglo;
  1121. hregister2:=left.location.register64.reghi;
  1122. end
  1123. else
  1124. {$endif not cpu64bitalu and not cpuhighleveltarget}
  1125. hregister:=left.location.register;
  1126. { we need the min_label always to choose between }
  1127. { cmps and subs/decs }
  1128. min_label:=case_get_min(labels);
  1129. { Generate the jumps }
  1130. {$if not defined(cpu64bitalu)}
  1131. if def_cgsize(opsize) in [OS_64,OS_S64] then
  1132. genlinearcmplist(labels)
  1133. else
  1134. {$endif not cpu64bitalu and not cpuhighleveltarget}
  1135. begin
  1136. if cs_opt_level1 in current_settings.optimizerswitches then
  1137. begin
  1138. { procedures are empirically passed on }
  1139. { consumption can also be calculated }
  1140. { but does it pay on the different }
  1141. { processors? }
  1142. { moreover can the size only be appro- }
  1143. { ximated as it is not known if rel8, }
  1144. { rel16 or rel32 jumps are used }
  1145. max_label := case_get_max(labels);
  1146. { can we omit the range check of the jump table ? }
  1147. getrange(left.resultdef,lv,hv);
  1148. jumptable_no_range:=(lv=min_label) and (hv=max_label);
  1149. distv:=max_label-min_label;
  1150. if distv>=0 then
  1151. dist:=min(distv.uvalue,high(dist))
  1152. else
  1153. dist:=min(asizeuint(-distv.svalue),high(dist));
  1154. { optimize for size ? }
  1155. if cs_opt_size in current_settings.optimizerswitches then
  1156. begin
  1157. if has_jumptable and
  1158. (min_label>=int64(low(aint))) and
  1159. (max_label<=high(aint)) and
  1160. not((labelcnt<=2) or
  1161. (distv.svalue<0) or
  1162. (dist>3*labelcnt)) then
  1163. begin
  1164. { if the labels less or more a continuum then }
  1165. genjumptable(labels,min_label.svalue,max_label.svalue);
  1166. end
  1167. else
  1168. begin
  1169. { a linear list is always smaller than a jump tree }
  1170. genlinearlist(labels);
  1171. end;
  1172. end
  1173. else
  1174. begin
  1175. max_dist:=4*labelcoverage;
  1176. { Don't allow jump tables to get too large }
  1177. if max_dist>4*labelcnt then
  1178. max_dist:=min(max_dist,2048);
  1179. if jumptable_no_range then
  1180. max_linear_list:=4
  1181. else
  1182. max_linear_list:=2;
  1183. { allow processor specific values }
  1184. optimizevalues(max_linear_list,max_dist);
  1185. if (labelcnt<=max_linear_list) then
  1186. genlinearlist(labels)
  1187. else
  1188. begin
  1189. if (has_jumptable) and
  1190. (dist<max_dist) and
  1191. (min_label>=int64(low(aint))) and
  1192. (max_label<=high(aint)) then
  1193. genjumptable(labels,min_label.svalue,max_label.svalue)
  1194. { value has been determined on an i7-4770 using a random case with random values
  1195. if more values are known, this can be handled depending on the target CPU
  1196. Testing on a Core 2 Duo E6850 as well as on a Raspi3 showed also, that 64 is
  1197. a good value }
  1198. else if labelcnt>=64 then
  1199. genjmptree(labels)
  1200. else
  1201. genlinearlist(labels);
  1202. end;
  1203. end;
  1204. end
  1205. else
  1206. { it's always not bad }
  1207. genlinearlist(labels);
  1208. end;
  1209. { generate the instruction blocks }
  1210. for i:=0 to blocks.count-1 do with pcaseblock(blocks[i])^ do
  1211. begin
  1212. { If the labels are not equal, then the block label has been shortcut to point elsewhere,
  1213. so there's no need to implement it }
  1214. if not shortcut then
  1215. begin
  1216. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1217. cg.a_label(current_asmdata.CurrAsmList,blocklabel);
  1218. secondpass(statement);
  1219. { don't come back to case line }
  1220. current_filepos:=current_asmdata.CurrAsmList.getlasttaifilepos^;
  1221. hlcg.a_jmp_always(current_asmdata.CurrAsmList,endlabel);
  1222. end;
  1223. end;
  1224. { ...and the else block }
  1225. if not ShortcutElse then
  1226. begin
  1227. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1228. hlcg.a_label(current_asmdata.CurrAsmList,elselabel);
  1229. end;
  1230. if Assigned(elseblock) then
  1231. begin
  1232. secondpass(elseblock);
  1233. end;
  1234. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1235. hlcg.a_label(current_asmdata.CurrAsmList,endlabel);
  1236. { Reset labels }
  1237. for i:=0 to blocks.count-1 do
  1238. pcaseblock(blocks[i])^.blocklabel:=nil;
  1239. flowcontrol := oldflowcontrol + (flowcontrol - [fc_inflowcontrol]);
  1240. end;
  1241. begin
  1242. csetelementnode:=tcgsetelementnode;
  1243. cinnode:=tcginnode;
  1244. ccasenode:=tcgcasenode;
  1245. end.