daopt386.pas 72 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1997-98 by Jonas Maebe
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. {$ifDef TP}
  20. {$UnDef JumpAnal}
  21. {$Endif TP}
  22. Unit DAOpt386;
  23. Interface
  24. Uses AAsm, CObjects
  25. {$ifdef i386}
  26. ,i386
  27. {$endif}
  28. ;
  29. Type
  30. TRegArray = Array[R_EAX..R_BL] of TRegister;
  31. TRegSet = Set of TRegister;
  32. TRegInfo = Record
  33. RegsEncountered: TRegSet;
  34. RegsLoadedForRef: TRegSet;
  35. SubstRegs: TRegArray;
  36. End;
  37. {*********************** Procedures and Functions ************************}
  38. Procedure InsertLLItem(AsmL: PAasmOutput; prev, foll, new_one: PLinkedList_Item);
  39. Function Reg32(Reg: TRegister): TRegister;
  40. Function RefsEquivalent(Const R1, R2: TReference; Var RegInfo: TRegInfo): Boolean;
  41. Function RefsEqual(Const R1, R2: TReference): Boolean;
  42. Function IsGP32Reg(Reg: TRegister): Boolean;
  43. Function RegInRef(Reg: TRegister; Const Ref: TReference): Boolean;
  44. Function RegInInstruction(Reg: TRegister; p1: Pai): Boolean;
  45. Function RegModifiedByInstruction(Reg: TRegister; p1: Pai): Boolean;
  46. Function GetNextInstruction(Current: Pai; Var Next: Pai): Boolean;
  47. Function GetLastInstruction(Current: Pai; Var Last: Pai): Boolean;
  48. Procedure UpdateUsedRegs(Var UsedRegs: TRegSet; p: Pai);
  49. Function RegsEquivalent(OldReg, NewReg: TRegister; Var RegInfo: TRegInfo): Boolean;
  50. Function InstructionsEquivalent(p1, p2: Pai; Var RegInfo: TRegInfo): Boolean;
  51. Procedure DFAPass1(AsmL: PAasmOutput);
  52. Function DFAPass2(AsmL: PAasmOutput): Pai;
  53. Procedure ShutDownDFA;
  54. Function FindLabel(L: PLabel; Var hp: Pai): Boolean;
  55. {Procedure FindLoHiLabels(AsmL: PAasmOutput; Var LoLab, HiLab, LabDif: Longint);}
  56. {******************************* Constants *******************************}
  57. Const
  58. {ait_* types which don't result in executable code or which don't influence
  59. the way the program runs/behaves}
  60. SkipInstr = [ait_comment
  61. {$ifdef GDB}
  62. ,ait_stabs, ait_stabn, ait_stab_function_name
  63. {$endif GDB}
  64. ,ait_regalloc, ait_regdealloc
  65. ];
  66. {the maximum number of things (registers, memory, ...) a single instruction
  67. changes}
  68. MaxCh = 3;
  69. {Possible register content types}
  70. con_Unknown = 0;
  71. con_ref = 1;
  72. con_const = 2;
  73. {********************************* Types *********************************}
  74. Type
  75. {What an instruction can change}
  76. TChange = (C_None,
  77. {Read from a register}
  78. C_REAX, C_RECX, C_REDX, C_REBX, C_RESP, C_REBP, C_RESI, C_REDI,
  79. {write from a register}
  80. C_WEAX, C_WECX, C_WEDX, C_WEBX, C_WESP, C_WEBP, C_WESI, C_WEDI,
  81. {read and write from/to a register}
  82. C_RWEAX, C_RWECX, C_RWEDX, C_RWEBX, C_RWESP, C_RWEBP, C_RWESI, C_RWEDI,
  83. C_CDirFlag {clear direction flag}, C_SDirFlag {set dir flag},
  84. C_Flags, C_FPU,
  85. C_ROp1, C_WOp1, C_RWOp1,
  86. C_ROp2, C_WOp2, C_RWOp2,
  87. C_ROp3, C_WOp3, C_RWOp3,
  88. C_MemEDI, C_All);
  89. {the possible states of a flag}
  90. TFlagContents = (F_Unknown, F_NotSet, F_Set);
  91. {the properties of a cpu instruction}
  92. TAsmInstrucProp = Record
  93. {how many things it changes}
  94. { NCh: Byte;}
  95. {and what it changes}
  96. Ch: Array[1..MaxCh] of TChange;
  97. End;
  98. TContent = Record
  99. {start and end of block instructions that defines the
  100. content of this register. If Typ = con_const, then
  101. Longint(StartMod) = value of the constant)}
  102. StartMod: Pointer;
  103. {starts at 1, gets increased everytime the register is modified}
  104. State: Word;
  105. {how many instructions starting with StarMod does the block consist of}
  106. NrOfMods: Byte;
  107. {if one register gets a block assigned from an other register,
  108. this variable holds the name of that register (so it can be
  109. substituted when checking the block afterwards)}
  110. { ModReg: TRegister; }
  111. {the type of the content of the register: constant, ...}
  112. Typ: Byte;
  113. End;
  114. {Contents of the integer registers}
  115. TRegContent = Array[R_EAX..R_EDI] Of TContent;
  116. {contents of the FPU registers}
  117. TRegFPUContent = Array[R_ST..R_ST7] Of TContent;
  118. {information record with the contents of every register. Every Pai object
  119. gets one of these assigned: a pointer to it is stored in the Line field and
  120. the original line number is stored in LineSave}
  121. TPaiProp = Record
  122. Regs: TRegContent;
  123. { FPURegs: TRegFPUContent;} {currently not yet used}
  124. LineSave: Longint;
  125. {allocated Registers}
  126. UsedRegs: TRegSet;
  127. {status of the direction flag}
  128. DirFlag: TFlagContents;
  129. {can this instruction be removed?}
  130. CanBeRemoved: Boolean;
  131. End;
  132. PPaiProp = ^TPaiProp;
  133. {$IfDef TP}
  134. TPaiPropBlock = Array[1..(65520 div (((SizeOf(TPaiProp)+1)div 2)*2))] Of TPaiProp;
  135. {$else}
  136. TPaiPropBlock = Array[1..250000] Of TPaiProp;
  137. {$EndIf TP}
  138. PPaiPropBlock = ^TPaiPropBlock;
  139. TInstrSinceLastMod = Array[R_EAX..R_EDI] Of Byte;
  140. TLabelTableItem = Record
  141. PaiObj: Pai;
  142. {$IfNDef TP}
  143. InstrNr: Longint;
  144. RefsFound: Word;
  145. JmpsProcessed: Word
  146. {$EndIf TP}
  147. End;
  148. {$IfDef tp}
  149. TLabelTable = Array[0..10000] Of TLabelTableItem;
  150. {$Else tp}
  151. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  152. {$Endif tp}
  153. PLabelTable = ^TLabelTable;
  154. TwoWords = Record
  155. Word1, Word2: Word;
  156. End;
  157. {******************************* Variables *******************************}
  158. Var
  159. {the amount of PaiObjects in the current assembler list}
  160. NrOfPaiObjs: Longint;
  161. {Array which holds all (FPC) or as much as possible (TP) PPaiProps}
  162. PaiPropBlock: PPaiPropBlock;
  163. LoLab, HiLab, LabDif: Longint;
  164. LTable: PLabelTable;
  165. {*********************** End of Interface section ************************}
  166. Implementation
  167. Uses globals, systems, strings, verbose, hcodegen,
  168. {$ifdef i386}
  169. pass_2;
  170. {$endif i386}
  171. Const AsmInstr: Array[tasmop] Of TAsmInstrucProp = (
  172. {MOV} (Ch: (C_WOp2, C_None, C_None)),
  173. {MOVZX} (Ch: (C_WOp2, C_None, C_None)),
  174. {MOVSX} (Ch: (C_WOp2, C_None, C_None)),
  175. {LABEL} (Ch: (C_All, C_None, C_None)), {don't know value of any register}
  176. {ADD} (Ch: (C_RWOp2, C_Flags, C_None)),
  177. {CALL} (Ch: (C_All, C_None, C_None)), {don't know value of any register}
  178. {IDIV} (Ch: (C_RWEAX, C_WEDX, C_Flags)),
  179. {IMUL} (Ch: (C_WEAX, C_WEDX, C_Flags)), {handled separately, because several forms exist}
  180. {JMP} (Ch: (C_None, C_None, C_None)),
  181. {LEA} (Ch: (C_WOp2, C_None, C_None)),
  182. {MUL} (Ch: (C_RWEAX, C_WEDX, C_Flags)),
  183. {NEG} (Ch: (C_WOp1, C_None, C_None)),
  184. {NOT} (Ch: (C_WOp1, C_Flags, C_None)),
  185. {POP} (Ch: (C_WOp1, C_RWESP, C_None)),
  186. {POPAD} (Ch: (C_None, C_None, C_None)), {don't know value of any register}
  187. {PUSH} (Ch: (C_RWESP, C_None, C_None)),
  188. {PUSHAD} (Ch: (C_RWESP, C_None, C_None)),
  189. {RET} (Ch: (C_None, C_None, C_None)), {don't know value of any register}
  190. {SUB} (Ch: (C_RWOp2, C_Flags, C_None)),
  191. {XCHG} (Ch: (C_RWOp1, C_RWOp2, C_None)), {(will be) handled seperately}
  192. {XOR} (Ch: (C_RWOp2, C_Flags, C_None)),
  193. {FILD} (Ch: (C_FPU, C_None, C_None)),
  194. {CMP} (Ch: (C_Flags, C_None, C_None)),
  195. {JZ} (Ch: (C_None, C_None, C_None)),
  196. {INC} (Ch: (C_RWOp1, C_Flags, C_None)),
  197. {DEC} (Ch: (C_RWOp1, C_Flags, C_None)),
  198. {SETE} (Ch: (C_WOp1, C_None, C_None)),
  199. {SETNE} (Ch: (C_WOp1, C_None, C_None)),
  200. {SETL} (Ch: (C_WOp1, C_None, C_None)),
  201. {SETG} (Ch: (C_WOp1, C_None, C_None)),
  202. {SETLE} (Ch: (C_WOp1, C_None, C_None)),
  203. {SETGE} (Ch: (C_WOp1, C_None, C_None)),
  204. {JE} (Ch: (C_None, C_None, C_None)),
  205. {JNE} (Ch: (C_None, C_None, C_None)),
  206. {JL} (Ch: (C_None, C_None, C_None)),
  207. {JG} (Ch: (C_None, C_None, C_None)),
  208. {JLE} (Ch: (C_None, C_None, C_None)),
  209. {JGE} (Ch: (C_None, C_None, C_None)),
  210. {OR} (Ch: (C_RWOp2, C_Flags, C_None)),
  211. {FLD} (Ch: (C_FPU, C_None, C_None)),
  212. {FADD} (Ch: (C_FPU, C_None, C_None)),
  213. {FMUL} (Ch: (C_FPU, C_None, C_None)),
  214. {FSUB} (Ch: (C_FPU, C_None, C_None)),
  215. {FDIV} (Ch: (C_FPU, C_None, C_None)),
  216. {FCHS} (Ch: (C_FPU, C_None, C_None)),
  217. {FLD1} (Ch: (C_FPU, C_None, C_None)),
  218. {FIDIV} (Ch: (C_FPU, C_None, C_None)),
  219. {CLTD} (Ch: (C_WEDX, C_None, C_None)),
  220. {JNZ} (Ch: (C_None, C_None, C_None)),
  221. {FSTP} (Ch: (C_WOp1, C_None, C_None)),
  222. {AND} (Ch: (C_RWOp2, C_Flags, C_None)),
  223. {JNO} (Ch: (C_None, C_None, C_None)),
  224. {NOTH} (Ch: (C_None, C_None, C_None)), {***???***}
  225. {NONE} (Ch: (C_None, C_None, C_None)),
  226. {ENTER} (Ch: (C_RWESP, C_None, C_None)),
  227. {LEAVE} (Ch: (C_RWESP, C_None, C_None)),
  228. {CLD} (Ch: (C_CDirFlag, C_None, C_None)),
  229. {MOVS} (Ch: (C_RWESI, C_RWEDI, C_MemEDI)),
  230. {REP} (Ch: (C_RWECX, C_None, C_None)),
  231. {SHL} (Ch: (C_RWOp2, C_Flags, C_None)),
  232. {SHR} (Ch: (C_RWOp2, C_Flags, C_None)),
  233. {BOUND} (Ch: (C_None, C_None, C_None)),
  234. {JNS} (Ch: (C_None, C_None, C_None)),
  235. {JS} (Ch: (C_None, C_None, C_None)),
  236. {JO} (Ch: (C_None, C_None, C_None)),
  237. {SAR} (Ch: (C_RWOp2, C_Flags, C_None)),
  238. {TEST} (Ch: (C_Flags, C_None, C_None)),
  239. {FCOM} (Ch: (C_FPU, C_None, C_None)),
  240. {FCOMP} (Ch: (C_FPU, C_None, C_None)),
  241. {FCOMPP} (Ch: (C_FPU, C_None, C_None)),
  242. {FXCH} (Ch: (C_FPU, C_None, C_None)),
  243. {FADDP} (Ch: (C_FPU, C_None, C_None)),
  244. {FMULP} (Ch: (C_FPU, C_None, C_None)),
  245. {FSUBP} (Ch: (C_FPU, C_None, C_None)),
  246. {FDIVP} (Ch: (C_FPU, C_None, C_None)),
  247. {FNSTS} (Ch: (C_WOp1, C_None, C_None)),
  248. {SAHF} (Ch: (C_Flags, C_None, C_None)),
  249. {FDIVRP} (Ch: (C_FPU, C_None, C_None)),
  250. {FSUBRP} (Ch: (C_FPU, C_None, C_None)),
  251. {SETC} (Ch: (C_WOp1, C_None, C_None)),
  252. {SETNC} (Ch: (C_WOp1, C_None, C_None)),
  253. {JC} (Ch: (C_None, C_None, C_None)),
  254. {JNC} (Ch: (C_None, C_None, C_None)),
  255. {JA} (Ch: (C_None, C_None, C_None)),
  256. {JAE} (Ch: (C_None, C_None, C_None)),
  257. {JB} (Ch: (C_None, C_None, C_None)),
  258. {JBE} (Ch: (C_None, C_None, C_None)),
  259. {SETA} (Ch: (C_WOp1, C_None, C_None)),
  260. {SETAE} (Ch: (C_WOp1, C_None, C_None)),
  261. {SETB} (Ch: (C_WOp1, C_None, C_None)),
  262. {SETBE} (Ch: (C_WOp1, C_None, C_None)),
  263. {AAA} (Ch: (C_RWEAX, C_Flags, C_None)),
  264. {AAD} (Ch: (C_RWEAX, C_Flags, C_None)),
  265. {AAM} (Ch: (C_RWEAX, C_Flags, C_None)),
  266. {AAS} (Ch: (C_RWEAX, C_Flags, C_None)),
  267. {CBW} (Ch: (C_RWEAX, C_None, C_None)),
  268. {CDQ} (Ch: (C_RWEAX, C_WEDX, C_None)),
  269. {CLC} (Ch: (C_Flags, C_None, C_None)),
  270. {CLI} (Ch: (C_Flags, C_None, C_None)),
  271. {CLTS} (Ch: (C_None, C_None, C_None)),
  272. {CMC} (Ch: (C_Flags, C_None, C_None)),
  273. {CWD} (Ch: (C_RWEAX, C_WEDX, C_None)),
  274. {CWDE} (Ch: (C_RWEAX, C_None, C_None)),
  275. {DAA} (Ch: (C_RWEAX, C_None, C_None)),
  276. {DAS} (Ch: (C_RWEAX, C_None, C_None)),
  277. {HLT} (Ch: (C_None, C_None, C_None)),
  278. {IRET} (Ch: (C_All, C_None, C_None)), {don't know value of any register}
  279. {LAHF} (Ch: (C_WEAX, C_None, C_None)),
  280. {LODS} (Ch: (C_WEAX, C_RWESI, C_None)),
  281. {LOCK} (Ch: (C_None, C_None, C_None)),
  282. {NOP} (Ch: (C_None, C_None, C_None)),
  283. {PUSHA} (Ch: (C_RWESP, C_None, C_None)),
  284. {PUSHF} (Ch: (C_RWESP, C_None, C_None)),
  285. {PUSHFD} (Ch: (C_RWESP, C_None, C_None)),
  286. {STC} (Ch: (C_Flags, C_None, C_None)),
  287. {STD} (Ch: (C_SDirFlag, C_None, C_None)),
  288. {STI} (Ch: (C_Flags, C_None, C_None)),
  289. {STOS} (Ch: (C_MemEDI, C_RWEDI, C_None)),
  290. {WAIT} (Ch: (C_None, C_None, C_None)),
  291. {XLAT} (Ch: (C_WEAX, C_None, C_None)),
  292. {XLATB} (Ch: (C_WEAX, C_None, C_None)),
  293. {MOVSB} (Ch: (C_WOp2, C_None, C_None)),
  294. {MOVSBL} (Ch: (C_WOp2, C_None, C_None)),
  295. {MOVSBW} (Ch: (C_WOp2, C_None, C_None)),
  296. {MOVSWL} (Ch: (C_WOp2, C_None, C_None)),
  297. {MOVZB} (Ch: (C_WOp2, C_None, C_None)),
  298. {MOVZWL} (Ch: (C_WOp2, C_None, C_None)),
  299. {POPA} (Ch: (C_None, C_None, C_None)), {don't know value of any register}
  300. {IN} (Ch: (C_WOp2, C_None, C_None)),
  301. {OUT} (Ch: (C_None, C_None, C_None)),
  302. {LDS} (Ch: (C_WOp2, C_None, C_None)),
  303. {LCS} (Ch: (C_WOp2, C_None, C_None)),
  304. {LES} (Ch: (C_WOp2, C_None, C_None)),
  305. {LFS} (Ch: (C_WOp2, C_None, C_None)),
  306. {LGS} (Ch: (C_WOp2, C_None, C_None)),
  307. {LSS} (Ch: (C_WOp2, C_None, C_None)),
  308. {POPF} (Ch: (C_RWESP, C_Flags, C_None)),
  309. {SBB} (Ch: (C_RWOp2, C_Flags, C_None)),
  310. {ADC} (Ch: (C_RWOp2, C_Flags, C_None)),
  311. {DIV} (Ch: (C_RWEAX, C_WEDX, C_Flags)),
  312. {ROR} (Ch: (C_RWOp2, C_Flags, C_None)),
  313. {ROL} (Ch: (C_RWOp2, C_Flags, C_None)),
  314. {RCL} (Ch: (C_RWOp2, C_Flags, C_None)),
  315. {RCR} (Ch: (C_RWOp2, C_Flags, C_None)),
  316. {SAL} (Ch: (C_RWOp2, C_Flags, C_None)),
  317. {SHLD} (Ch: (C_RWOp3, C_Flags, C_None)),
  318. {SHRD} (Ch: (C_RWOp3, C_Flags, C_None)),
  319. {LCALL} (Ch: (C_All, C_None, C_None)), {don't know value of any register}
  320. {LJMP} (Ch: (C_All, C_None, C_None)), {don't know value of any register}
  321. {LRET} (Ch: (C_All, C_None, C_None)), {don't know value of any register}
  322. {JNAE} (Ch: (C_None, C_None, C_None)),
  323. {JNB} (Ch: (C_None, C_None, C_None)),
  324. {JNA} (Ch: (C_None, C_None, C_None)),
  325. {JNBE} (Ch: (C_None, C_None, C_None)),
  326. {JP} (Ch: (C_None, C_None, C_None)),
  327. {JNP} (Ch: (C_None, C_None, C_None)),
  328. {JPE} (Ch: (C_None, C_None, C_None)),
  329. {JPO} (Ch: (C_None, C_None, C_None)),
  330. {JNGE} (Ch: (C_None, C_None, C_None)),
  331. {JNG} (Ch: (C_None, C_None, C_None)),
  332. {JNL} (Ch: (C_None, C_None, C_None)),
  333. {JNLE} (Ch: (C_None, C_None, C_None)),
  334. {JCXZ} (Ch: (C_None, C_None, C_None)),
  335. {JECXZ} (Ch: (C_None, C_None, C_None)),
  336. {LOOP} (Ch: (C_RWECX, C_None, C_None)),
  337. {CMPS} (Ch: (C_RWESI, C_RWEDI, C_Flags)),
  338. {INS} (Ch: (C_RWEDI, C_MemEDI, C_None)),
  339. {OUTS} (Ch: (C_RWESI, C_None, C_None)),
  340. {SCAS} (Ch: (C_RWEDI, C_Flags, C_None)),
  341. {BSF} (Ch: (C_WOp2, C_Flags, C_None)),
  342. {BSR} (Ch: (C_WOp2, C_Flags, C_None)),
  343. {BT} (Ch: (C_Flags, C_None, C_None)),
  344. {BTC} (Ch: (C_RWOp2, C_Flags, C_None)),
  345. {BTR} (Ch: (C_RWOp2, C_Flags, C_None)),
  346. {BTS} (Ch: (C_RWOp2, C_Flags, C_None)),
  347. {INT} (Ch: (C_All, C_None, C_None)), {don't know value of any register}
  348. {INT3} (Ch: (C_None, C_None, C_None)),
  349. {INTO} (Ch: (C_All, C_None, C_None)), {don't know value of any register}
  350. {BOUNDL} (Ch: (C_None, C_None, C_None)),
  351. {BOUNDW} (Ch: (C_None, C_None, C_None)),
  352. {LOOPZ} (Ch: (C_RWECX, C_None, C_None)),
  353. {LOOPE} (Ch: (C_RWECX, C_None, C_None)),
  354. {LOOPNZ} (Ch: (C_RWECX, C_None, C_None)),
  355. {LOOPNE} (Ch: (C_RWECX, C_None, C_None)),
  356. {SETO} (Ch: (C_WOp1, C_None, C_None)),
  357. {SETNO} (Ch: (C_WOp1, C_None, C_None)),
  358. {SETNAE} (Ch: (C_WOp1, C_None, C_None)),
  359. {SETNB} (Ch: (C_WOp1, C_None, C_None)),
  360. {SETZ} (Ch: (C_WOp1, C_None, C_None)),
  361. {SETNZ} (Ch: (C_WOp1, C_None, C_None)),
  362. {SETNA} (Ch: (C_WOp1, C_None, C_None)),
  363. {SETNBE} (Ch: (C_WOp1, C_None, C_None)),
  364. {SETS} (Ch: (C_WOp1, C_None, C_None)),
  365. {SETNS} (Ch: (C_WOp1, C_None, C_None)),
  366. {SETP} (Ch: (C_WOp1, C_None, C_None)),
  367. {SETPE} (Ch: (C_WOp1, C_None, C_None)),
  368. {SETNP} (Ch: (C_WOp1, C_None, C_None)),
  369. {SETPO} (Ch: (C_WOp1, C_None, C_None)),
  370. {SETNGE} (Ch: (C_WOp1, C_None, C_None)),
  371. {SETNL} (Ch: (C_WOp1, C_None, C_None)),
  372. {SETNG} (Ch: (C_WOp1, C_None, C_None)),
  373. {SETNLE} (Ch: (C_WOp1, C_None, C_None)),
  374. {ARPL} (Ch: (C_Flags, C_None, C_None)),
  375. {LAR} (Ch: (C_WOp2, C_None, C_None)),
  376. {LGDT} (Ch: (C_None, C_None, C_None)),
  377. {LIDT} (Ch: (C_None, C_None, C_None)),
  378. {LLDT} (Ch: (C_None, C_None, C_None)),
  379. {LMSW} (Ch: (C_None, C_None, C_None)),
  380. {LSL} (Ch: (C_WOp2, C_Flags, C_None)),
  381. {LTR} (Ch: (C_None, C_None, C_None)),
  382. {SGDT} (Ch: (C_WOp1, C_None, C_None)),
  383. {SIDT} (Ch: (C_WOp1, C_None, C_None)),
  384. {SLDT} (Ch: (C_WOp1, C_None, C_None)),
  385. {SMSW} (Ch: (C_WOp1, C_None, C_None)),
  386. {STR} (Ch: (C_WOp1, C_None, C_None)),
  387. {VERR} (Ch: (C_Flags, C_None, C_None)),
  388. {VERW} (Ch: (C_Flags, C_None, C_None)),
  389. {FABS} (Ch: (C_FPU, C_None, C_None)),
  390. {FBLD} (Ch: (C_FPU, C_None, C_None)),
  391. {FBSTP} (Ch: (C_WOp1, C_None, C_None)),
  392. {FCLEX} (Ch: (C_FPU, C_None, C_None)),
  393. {FNCLEX} (Ch: (C_FPU, C_None, C_None)),
  394. {FCOS} (Ch: (C_FPU, C_None, C_None)),
  395. {FDECSTP}(Ch: (C_FPU, C_None, C_None)),
  396. {FDISI} (Ch: (C_FPU, C_None, C_None)),
  397. {FNDISI} (Ch: (C_FPU, C_None, C_None)),
  398. {FDIVR} (Ch: (C_FPU, C_None, C_None)),
  399. {FENI} (Ch: (C_FPU, C_None, C_None)),
  400. {FNENI} (Ch: (C_FPU, C_None, C_None)),
  401. {FFREE} (Ch: (C_FPU, C_None, C_None)),
  402. {FIADD} (Ch: (C_FPU, C_None, C_None)),
  403. {FICOM} (Ch: (C_FPU, C_None, C_None)),
  404. {FICOMP} (Ch: (C_FPU, C_None, C_None)),
  405. {FIDIVR} (Ch: (C_FPU, C_None, C_None)),
  406. {FIMUL} (Ch: (C_FPU, C_None, C_None)),
  407. {FINCSTP}(Ch: (C_FPU, C_None, C_None)),
  408. {FINIT} (Ch: (C_FPU, C_None, C_None)),
  409. {FNINIT} (Ch: (C_FPU, C_None, C_None)),
  410. {FIST} (Ch: (C_WOp1, C_None, C_None)),
  411. {FISTP} (Ch: (C_WOp1, C_None, C_None)),
  412. {FISUB} (Ch: (C_FPU, C_None, C_None)),
  413. {FSUBR} (Ch: (C_FPU, C_None, C_None)),
  414. {FLDCW} (Ch: (C_FPU, C_None, C_None)),
  415. {FLDENV} (Ch: (C_FPU, C_None, C_None)),
  416. {FLDLG2} (Ch: (C_FPU, C_None, C_None)),
  417. {FLDLN2} (Ch: (C_FPU, C_None, C_None)),
  418. {FLDL2E} (Ch: (C_FPU, C_None, C_None)),
  419. {FLDL2T} (Ch: (C_FPU, C_None, C_None)),
  420. {FLDPI} (Ch: (C_FPU, C_None, C_None)),
  421. {FLDS} (Ch: (C_FPU, C_None, C_None)),
  422. {FLDZ} (Ch: (C_FPU, C_None, C_None)),
  423. {FNOP} (Ch: (C_FPU, C_None, C_None)),
  424. {FPATAN} (Ch: (C_FPU, C_None, C_None)),
  425. {FPREM} (Ch: (C_FPU, C_None, C_None)),
  426. {FPREM1} (Ch: (C_FPU, C_None, C_None)),
  427. {FPTAN} (Ch: (C_FPU, C_None, C_None)),
  428. {FRNDINT}(Ch: (C_FPU, C_None, C_None)),
  429. {FRSTOR} (Ch: (C_FPU, C_None, C_None)),
  430. {FSAVE} (Ch: (C_WOp1, C_None, C_None)),
  431. {FNSAVE} (Ch: (C_FPU, C_None, C_None)),
  432. {FSCALE} (Ch: (C_FPU, C_None, C_None)),
  433. {FSETPM} (Ch: (C_FPU, C_None, C_None)),
  434. {FSIN} (Ch: (C_FPU, C_None, C_None)),
  435. {FSINCOS}(Ch: (C_FPU, C_None, C_None)),
  436. {FSQRT} (Ch: (C_FPU, C_None, C_None)),
  437. {FST} (Ch: (C_WOp1, C_None, C_None)),
  438. {FSTCW} (Ch: (C_WOp1, C_None, C_None)),
  439. {FNSTCW} (Ch: (C_WOp1, C_None, C_None)),
  440. {FSTENV} (Ch: (C_WOp1, C_None, C_None)),
  441. {FNSTENV}(Ch: (C_WOp1, C_None, C_None)),
  442. {FSTSW} (Ch: (C_WOp1, C_None, C_None)),
  443. {FNSTSW} (Ch: (C_WOp1, C_None, C_None)),
  444. {FTST} (Ch: (C_FPU, C_None, C_None)),
  445. {FUCOM} (Ch: (C_FPU, C_None, C_None)),
  446. {FUCOMP} (Ch: (C_FPU, C_None, C_None)),
  447. {FUCOMPP}(Ch: (C_FPU, C_None, C_None)),
  448. {FWAIT} (Ch: (C_FPU, C_None, C_None)),
  449. {FXAM} (Ch: (C_FPU, C_None, C_None)),
  450. {FXTRACT}(Ch: (C_FPU, C_None, C_None)),
  451. {FYL2X} (Ch: (C_FPU, C_None, C_None)),
  452. {FYL2XP1}(Ch: (C_FPU, C_None, C_None)),
  453. {F2XM1} (Ch: (C_FPU, C_None, C_None)),
  454. {FILDQ} (Ch: (C_FPU, C_None, C_None)),
  455. {FILDS} (Ch: (C_FPU, C_None, C_None)),
  456. {FILDL} (Ch: (C_FPU, C_None, C_None)),
  457. {FLDL} (Ch: (C_FPU, C_None, C_None)),
  458. {FLDT} (Ch: (C_FPU, C_None, C_None)),
  459. {FISTQ} (Ch: (C_WOp1, C_None, C_None)),
  460. {FISTS} (Ch: (C_WOp1, C_None, C_None)),
  461. {FISTL} (Ch: (C_WOp1, C_None, C_None)),
  462. {FSTL} (Ch: (C_WOp1, C_None, C_None)),
  463. {FSTS} (Ch: (C_WOp1, C_None, C_None)),
  464. {FSTPS} (Ch: (C_WOp1, C_None, C_None)),
  465. {FISTPL} (Ch: (C_WOp1, C_None, C_None)),
  466. {FSTPL} (Ch: (C_WOp1, C_None, C_None)),
  467. {FISTPS} (Ch: (C_WOp1, C_None, C_None)),
  468. {FISTPQ} (Ch: (C_WOp1, C_None, C_None)),
  469. {FSTPT} (Ch: (C_WOp1, C_None, C_None)),
  470. {FCOMPS} (Ch: (C_FPU, C_None, C_None)),
  471. {FICOMPL}(Ch: (C_FPU, C_None, C_None)),
  472. {FCOMPL} (Ch: (C_FPU, C_None, C_None)),
  473. {FICOMPS}(Ch: (C_FPU, C_None, C_None)),
  474. {FCOMS} (Ch: (C_FPU, C_None, C_None)),
  475. {FICOML} (Ch: (C_FPU, C_None, C_None)),
  476. {FCOML} (Ch: (C_FPU, C_None, C_None)),
  477. {FICOMS} (Ch: (C_FPU, C_None, C_None)),
  478. {FIADDL} (Ch: (C_FPU, C_None, C_None)),
  479. {FADDL} (Ch: (C_FPU, C_None, C_None)),
  480. {FIADDS} (Ch: (C_FPU, C_None, C_None)),
  481. {FISUBL} (Ch: (C_FPU, C_None, C_None)),
  482. {FSUBL} (Ch: (C_FPU, C_None, C_None)),
  483. {FISUBS} (Ch: (C_FPU, C_None, C_None)),
  484. {FSUBS} (Ch: (C_FPU, C_None, C_None)),
  485. {FSUBR} (Ch: (C_FPU, C_None, C_None)),
  486. {FSUBRS} (Ch: (C_FPU, C_None, C_None)),
  487. {FISUBRL}(Ch: (C_FPU, C_None, C_None)),
  488. {FSUBRL} (Ch: (C_FPU, C_None, C_None)),
  489. {FISUBRS}(Ch: (C_FPU, C_None, C_None)),
  490. {FMULS} (Ch: (C_FPU, C_None, C_None)),
  491. {FIMUL} (Ch: (C_FPU, C_None, C_None)),
  492. {FMULL} (Ch: (C_FPU, C_None, C_None)),
  493. {FIMULS} (Ch: (C_FPU, C_None, C_None)),
  494. {FIDIVS} (Ch: (C_FPU, C_None, C_None)),
  495. {FIDIVL} (Ch: (C_FPU, C_None, C_None)),
  496. {FDIVL} (Ch: (C_FPU, C_None, C_None)),
  497. {FIDIVS} (Ch: (C_FPU, C_None, C_None)),
  498. {FDIVRS} (Ch: (C_FPU, C_None, C_None)),
  499. {FIDIVRL}(Ch: (C_FPU, C_None, C_None)),
  500. {FDIVRL} (Ch: (C_FPU, C_None, C_None)),
  501. {FIDIVRS}(Ch: (C_FPU, C_None, C_None)),
  502. {REPE} (Ch: (C_RWECX, C_None, C_None)),
  503. {REPNE} (Ch: (C_RWECX, C_None, C_None)),
  504. {FADDS} (Ch: (C_FPU, C_None, C_None)),
  505. {POPFD} (Ch: (C_RWESP, C_Flags, C_None)),
  506. {below are the MMX instructions}
  507. {A_EMMS} (Ch: (C_FPU, C_None, C_None)),
  508. {A_MOVD} (Ch: (C_WOp2, C_None, C_None)),
  509. {A_MOVQ} (Ch: (C_WOp2, C_None, C_None)),
  510. {A_PACKSSDW} (Ch: (C_All, C_None, C_None)),
  511. {A_PACKSSWB} (Ch: (C_All, C_None, C_None)),
  512. {A_PACKUSWB} (Ch: (C_All, C_None, C_None)),
  513. {A_PADDB} (Ch: (C_RWOp2, C_None, C_None)),
  514. {A_PADDD} (Ch: (C_RWOp2, C_None, C_None)),
  515. {A_PADDSB} (Ch: (C_RWOp2, C_None, C_None)),
  516. {A_PADDSW} (Ch: (C_RWOp2, C_None, C_None)),
  517. {A_PADDUSB} (Ch: (C_RWOp2, C_None, C_None)),
  518. {A_PADDUSW} (Ch: (C_RWOp2, C_None, C_None)),
  519. {A_PADDW} (Ch: (C_RWOp2, C_None, C_None)),
  520. {A_PAND} (Ch: (C_RWOp2, C_None, C_None)),
  521. {A_PANDN} (Ch: (C_RWOp2, C_None, C_None)),
  522. {A_PCMPEQB} (Ch: (C_All, C_None, C_None)),
  523. {A_PCMPEQD} (Ch: (C_All, C_None, C_None)),
  524. {A_PCMPEQW} (Ch: (C_All, C_None, C_None)),
  525. {A_PCMPGTB} (Ch: (C_All, C_None, C_None)),
  526. {A_PCMPGTD} (Ch: (C_All, C_None, C_None)),
  527. {A_PCMPGTW} (Ch: (C_All, C_None, C_None)),
  528. {A_PMADDWD} (Ch: (C_RWOp2, C_None, C_None)),
  529. {A_PMULHW} (Ch: (C_All, C_None, C_None)),
  530. {A_PMULLW} (Ch: (C_All, C_None, C_None)),
  531. {A_POR} (Ch: (C_RWOp2, C_None, C_None)),
  532. {A_PSLLD} (Ch: (C_RWOp2, C_None, C_None)),
  533. {A_PSLLQ} (Ch: (C_RWOp2, C_None, C_None)),
  534. {A_PSLLW} (Ch: (C_RWOp2, C_None, C_None)),
  535. {A_PSRAD} (Ch: (C_RWOp2, C_None, C_None)),
  536. {A_PSRAW} (Ch: (C_RWOp2, C_None, C_None)),
  537. {A_PSRLD} (Ch: (C_RWOp2, C_None, C_None)),
  538. {A_PSRLQ} (Ch: (C_RWOp2, C_None, C_None)),
  539. {A_PSRLW} (Ch: (C_RWOp2, C_None, C_None)),
  540. {A_PSUBB} (Ch: (C_RWOp2, C_None, C_None)),
  541. {A_PSUBD} (Ch: (C_RWOp2, C_None, C_None)),
  542. {A_PSUBSB} (Ch: (C_RWOp2, C_None, C_None)),
  543. {A_PSUBSW} (Ch: (C_RWOp2, C_None, C_None)),
  544. {A_PSUBUSB} (Ch: (C_RWOp2, C_None, C_None)),
  545. {A_PSUBUSW} (Ch: (C_RWOp2, C_None, C_None)),
  546. {A_PSUBW} (Ch: (C_RWOp2, C_None, C_None)),
  547. {A_PUNPCKHBW} (Ch: (C_All, C_None, C_None)),
  548. {A_PUNPCKHDQ} (Ch: (C_All, C_None, C_None)),
  549. {A_PUNPCKHWD} (Ch: (C_All, C_None, C_None)),
  550. {A_PUNPCKLBW} (Ch: (C_All, C_None, C_None)),
  551. {A_PUNPCKLDQ} (Ch: (C_All, C_None, C_None)),
  552. {A_PUNPCKLWD} (Ch: (C_All, C_None, C_None)),
  553. {A_PXOR} (Ch: (C_RWOp2, C_None, C_None)));
  554. Var
  555. {How many instructions are between the current instruction and the last one
  556. that modified the register}
  557. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  558. {************************ Create the Label table ************************}
  559. Procedure FindLoHiLabels(AsmL: PAasmOutput; Var LowLabel, HighLabel, LabelDif: Longint);
  560. {Walks through the paasmlist to find the lowest and highest label number;
  561. Since 0.9.3: also removes unused labels}
  562. Var LabelFound: Boolean;
  563. P, hp1: Pai;
  564. Begin
  565. LabelFound := False;
  566. LowLabel := MaxLongint;
  567. HighLabel := 0;
  568. P := Pai(AsmL^.first);
  569. While Assigned(p) Do
  570. Begin
  571. If (Pai(p)^.typ = ait_label) Then
  572. If (Pai_Label(p)^.l^.is_used)
  573. Then
  574. Begin
  575. LabelFound := True;
  576. If (Pai_Label(p)^.l^.nb < LowLabel) Then
  577. LowLabel := Pai_Label(p)^.l^.nb;
  578. If (Pai_Label(p)^.l^.nb > HighLabel) Then
  579. HighLabel := Pai_Label(p)^.l^.nb;
  580. End
  581. { Else
  582. Begin
  583. hp1 := pai(p^.next);
  584. AsmL^.Remove(p);
  585. Dispose(p, Done);
  586. p := hp1;
  587. continue;
  588. End};
  589. GetNextInstruction(p, p);
  590. End;
  591. If LabelFound
  592. Then LabelDif := HighLabel+1-LowLabel
  593. Else LabelDif := 0;
  594. End;
  595. Procedure BuildLabelTable(AsmL: PAasmOutput; Var LabelTable: PLabelTable; LowLabel: Longint; Var LabelDif: Longint);
  596. {Builds a table with the locations of the labels in the paasmoutput}
  597. Var p: Pai;
  598. Begin
  599. If (LabelDif <> 0) Then
  600. Begin
  601. {$IfDef TP}
  602. If (MaxAvail >= LabelDif*SizeOf(Pai))
  603. Then
  604. Begin
  605. {$EndIf TP}
  606. GetMem(LabelTable, LabelDif*SizeOf(TLabelTableItem));
  607. FillChar(LabelTable^, LabelDif*SizeOf(TLabelTableItem), 0);
  608. p := pai(AsmL^.first);
  609. While Assigned(p) Do
  610. Begin
  611. If (Pai(p)^.typ = ait_label) And
  612. (Pai_Label(p)^.l^.is_used) Then
  613. LabelTable^[Pai_Label(p)^.l^.nb-LowLabel].PaiObj := p;
  614. GetNextInstruction(p, p);
  615. End;
  616. {$IfDef TP}
  617. End
  618. Else LabelDif := 0;
  619. {$EndIf TP}
  620. End;
  621. End;
  622. {************************ Search the Label table ************************}
  623. Function FindLabel(L: PLabel; Var hp: Pai): Boolean;
  624. {searches for the specified label starting from hp as long as the
  625. encountered instructions are labels, to be able to optimize constructs like
  626. jne l2 jmp l2
  627. jmp l3 and l1:
  628. l1: l2:
  629. l2:}
  630. Var TempP: Pai;
  631. Begin
  632. TempP := hp;
  633. While Assigned(TempP) and
  634. (TempP^.typ In SkipInstr + [ait_label]) Do
  635. If (TempP^.typ <> ait_Label) Or
  636. (pai_label(TempP)^.l <> L)
  637. Then GetNextInstruction(TempP, TempP)
  638. Else
  639. Begin
  640. hp := TempP;
  641. FindLabel := True;
  642. exit
  643. End;
  644. FindLabel := False;
  645. End;
  646. {************************ Some general functions ************************}
  647. Function Reg32(Reg: TRegister): TRegister;
  648. {Returns the 32 bit component of Reg if it exists, otherwise Reg is returned}
  649. Begin
  650. Reg32 := Reg;
  651. If (Reg >= R_AX)
  652. Then
  653. If (Reg <= R_DI)
  654. Then Reg32 := Reg16ToReg32(Reg)
  655. Else
  656. If (Reg <= R_BL)
  657. Then Reg32 := Reg8toReg32(Reg);
  658. End;
  659. { inserts new_one between prev and foll }
  660. Procedure InsertLLItem(AsmL: PAasmOutput; prev, foll, new_one: PLinkedList_Item);
  661. Begin
  662. If Assigned(prev) Then
  663. If Assigned(foll) Then
  664. Begin
  665. If Assigned(new_one) Then
  666. Begin
  667. new_one^.previous := prev;
  668. new_one^.next := foll;
  669. prev^.next := new_one;
  670. foll^.previous := new_one;
  671. End;
  672. End
  673. Else AsmL^.Concat(new_one)
  674. Else If Assigned(Foll) Then AsmL^.Insert(new_one)
  675. End;
  676. {********************* Compare parts of Pai objects *********************}
  677. Function RegsSameSize(Reg1, Reg2: TRegister): Boolean;
  678. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  679. 8bit, 16bit or 32bit)}
  680. Begin
  681. If (Reg1 <= R_EDI)
  682. Then RegsSameSize := (Reg2 <= R_EDI)
  683. Else
  684. If (Reg1 <= R_DI)
  685. Then RegsSameSize := (Reg2 in [R_AX..R_DI])
  686. Else
  687. If (Reg1 <= R_BL)
  688. Then RegsSameSize := (Reg2 in [R_AL..R_BL])
  689. Else RegsSameSize := False
  690. End;
  691. Procedure AddReg2RegInfo(OldReg, NewReg: TRegister; Var RegInfo: TRegInfo);
  692. {updates the RegsEncountered and SubstRegs fields of RegInfo. Assumes that
  693. OldReg and NewReg have the same size (has to be chcked in advance with
  694. RegsSameSize) and that neither equals R_NO}
  695. Begin
  696. With RegInfo Do
  697. Begin
  698. RegsEncountered := RegsEncountered + [NewReg];
  699. SubstRegs[NewReg] := OldReg;
  700. Case OldReg Of
  701. R_EAX..R_EDI:
  702. Begin
  703. RegsEncountered := RegsEncountered + [Reg32toReg16(NewReg)];
  704. SubstRegs[Reg32toReg16(NewReg)] := Reg32toReg16(OldReg);
  705. If (NewReg in [R_EAX..R_EBX]) And
  706. (OldReg in [R_EAX..R_EBX]) Then
  707. Begin
  708. RegsEncountered := RegsEncountered + [Reg32toReg8(NewReg)];
  709. SubstRegs[Reg32toReg8(NewReg)] := Reg32toReg8(OldReg);
  710. End;
  711. End;
  712. R_AX..R_DI:
  713. Begin
  714. RegsEncountered := RegsEncountered + [Reg16toReg32(NewReg)];
  715. SubstRegs[Reg16toReg32(NewReg)] := Reg16toReg32(OldReg);
  716. If (NewReg in [R_AX..R_BX]) And
  717. (OldReg in [R_AX..R_BX]) Then
  718. Begin
  719. RegsEncountered := RegsEncountered + [Reg16toReg8(NewReg)];
  720. SubstRegs[Reg16toReg8(NewReg)] := Reg16toReg8(OldReg);
  721. End;
  722. End;
  723. R_AL..R_BL:
  724. Begin
  725. RegsEncountered := RegsEncountered + [Reg8toReg32(NewReg)]
  726. + [Reg8toReg16(NewReg)];
  727. SubstRegs[Reg8toReg32(NewReg)] := Reg8toReg32(OldReg);
  728. SubstRegs[Reg8toReg16(NewReg)] := Reg8toReg16(OldReg);
  729. End;
  730. End;
  731. End;
  732. End;
  733. Procedure AddOp2RegInfo(typ: Longint; Op: Pointer; Var RegInfo: TRegInfo);
  734. Begin
  735. Case typ Of
  736. Top_Reg:
  737. If (TRegister(op) <> R_NO) Then
  738. AddReg2RegInfo(TRegister(op), TRegister(op), RegInfo);
  739. Top_Ref:
  740. Begin
  741. If TReference(op^).base <> R_NO Then
  742. AddReg2RegInfo(TReference(op^).base, TReference(op^).base, RegInfo);
  743. If TReference(op^).index <> R_NO Then
  744. AddReg2RegInfo(TReference(op^).index, TReference(op^).index, RegInfo);
  745. End;
  746. End;
  747. End;
  748. Function RegsEquivalent(OldReg, NewReg: TRegister; Var RegInfo: TRegInfo): Boolean;
  749. Begin
  750. If Not((OldReg = R_NO) Or (NewReg = R_NO)) Then
  751. If RegsSameSize(OldReg, NewReg) Then
  752. With RegInfo Do
  753. {here we always check for the 32 bit component, because it is possible that
  754. the 8 bit component has not been set, event though NewReg already has been
  755. processed. This happens if it has been compared with a register that doesn't
  756. have an 8 bit component (such as EDI). In that case the 8 bit component is
  757. still set to R_NO and the comparison in the Else-part will fail}
  758. If Not(Reg32(NewReg) in RegsEncountered) Then
  759. Begin
  760. AddReg2RegInfo(OldReg, NewReg, RegInfo);
  761. RegsEquivalent := True
  762. End
  763. Else RegsEquivalent := OldReg = SubstRegs[NewReg]
  764. Else RegsEquivalent := False
  765. Else RegsEquivalent := OldReg = NewReg
  766. End;
  767. Function RefsEquivalent(Const R1, R2: TReference; var RegInfo: TRegInfo): Boolean;
  768. Begin
  769. If R1.IsIntValue
  770. Then RefsEquivalent := R2.IsIntValue and (R1.Offset = R2.Offset)
  771. Else If (R1.Offset = R2.Offset) And
  772. RegsEquivalent(R1.Base, R2.Base, RegInfo) And
  773. RegsEquivalent(R1.Index, R2.Index, RegInfo) And
  774. (R1.Segment = R2.Segment) And (R1.ScaleFactor = R2.ScaleFactor)
  775. Then
  776. Begin
  777. If Assigned(R1.Symbol)
  778. Then RefsEquivalent := Assigned(R2.Symbol) And (R1.Symbol^=R2.Symbol^)
  779. Else RefsEquivalent := Not(Assigned(R2.Symbol));
  780. End
  781. Else RefsEquivalent := False;
  782. End;
  783. Function RefsEqual(Const R1, R2: TReference): Boolean;
  784. Begin
  785. If R1.IsIntValue
  786. Then RefsEqual := R2.IsIntValue and (R1.Offset = R2.Offset)
  787. Else If (R1.Offset = R2.Offset) And (R1.Base = R2.Base) And
  788. (R1.Index = R2.Index) And (R1.Segment = R2.Segment) And
  789. (R1.ScaleFactor = R2.ScaleFactor)
  790. Then
  791. Begin
  792. If Assigned(R1.Symbol)
  793. Then RefsEqual := Assigned(R2.Symbol) And (R1.Symbol^=R2.Symbol^)
  794. Else RefsEqual := Not(Assigned(R2.Symbol));
  795. End
  796. Else RefsEqual := False;
  797. End;
  798. Function IsGP32Reg(Reg: TRegister): Boolean;
  799. {Checks if the register is a 32 bit general purpose register}
  800. Begin
  801. If (Reg >= R_EAX) and (Reg <= R_EBX)
  802. Then IsGP32Reg := True
  803. Else IsGP32reg := False
  804. End;
  805. Function RegInRef(Reg: TRegister; Const Ref: TReference): Boolean;
  806. Begin {checks whether Ref contains a reference to Reg}
  807. Reg := Reg32(Reg);
  808. RegInRef := (Ref.Base = Reg) Or (Ref.Index = Reg)
  809. End;
  810. Function RegInInstruction(Reg: TRegister; p1: Pai): Boolean;
  811. {checks if Reg is used by the instruction p1}
  812. Var TmpResult: Boolean;
  813. Begin
  814. TmpResult := False;
  815. If (Pai(p1)^.typ = ait_instruction) Then
  816. Begin
  817. Case Pai386(p1)^.op1t Of
  818. Top_Reg: TmpResult := Reg = TRegister(Pai386(p1)^.op1);
  819. Top_Ref: TmpResult := RegInRef(Reg, TReference(Pai386(p1)^.op1^))
  820. End;
  821. If Not(TmpResult) Then
  822. Case Pai386(p1)^.op2t Of
  823. Top_Reg:
  824. if Pai386(p1)^.op3t<>Top_reg
  825. then TmpResult := Reg = TRegister(Pai386(p1)^.op2)
  826. else TmpResult := longint(Reg) = twowords(Pai386(p1)^.op2).word1;
  827. Top_Ref: TmpResult := RegInRef(Reg, TReference(Pai386(p1)^.op2^))
  828. End;
  829. If Not(TmpResult) Then
  830. Case Pai386(p1)^.op3t Of
  831. Top_Reg: TmpResult := longint(Reg) =twowords(Pai386(p1)^.op2).word2;
  832. Top_none:;
  833. else
  834. internalerror($Da);
  835. End
  836. End;
  837. RegInInstruction := TmpResult
  838. End;
  839. {Function RegInOp(Reg: TRegister; opt: Longint; op: Pointer): Boolean;
  840. Begin
  841. RegInOp := False;
  842. Case opt Of
  843. top_reg: RegInOp := Reg = TRegister(Pointer);
  844. top_ref: RegInOp := (Reg = TReference(op^).Base) Or
  845. (Reg = TReference(op^).Index);
  846. End;
  847. End;}
  848. Function RegModifiedByInstruction(Reg: TRegister; p1: Pai): Boolean;
  849. {returns true if Reg is modified by the instruction p1. P1 is assumed to be
  850. of the type ait_instruction}
  851. Var hp: Pai;
  852. Begin
  853. If GetLastInstruction(p1, hp)
  854. Then
  855. RegModifiedByInstruction :=
  856. PPAiProp(p1^.fileinfo.line)^.Regs[Reg].State <>
  857. PPAiProp(hp^.fileinfo.line)^.Regs[Reg].State
  858. Else RegModifiedByInstruction := True;
  859. End;
  860. {********************* GetNext and GetLastInstruction *********************}
  861. Function GetNextInstruction(Current: Pai; Var Next: Pai): Boolean;
  862. {skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the
  863. next pai object in Next. Returns false if there isn't any}
  864. Begin
  865. Repeat
  866. Current := Pai(Current^.Next);
  867. While Assigned(Current) And
  868. ((Current^.typ In SkipInstr) or
  869. ((Current^.typ = ait_label) And
  870. Not(Pai_Label(Current)^.l^.is_used))) Do
  871. Current := Pai(Current^.Next);
  872. If Assigned(Current) And
  873. (Current^.typ = ait_Marker) And
  874. (Pai_Marker(Current)^.Kind = NoPropInfoStart) Then
  875. Begin
  876. While Assigned(Current) And
  877. Not((Current^.typ = ait_Marker) And
  878. (Pai_Marker(Current)^.Kind = NoPropInfoEnd)) Do
  879. Current := Pai(Current^.Next)
  880. End;
  881. Until Not(Assigned(Current)) Or
  882. (Current^.typ <> ait_Marker);
  883. Next := Current;
  884. If Assigned(Current) And
  885. Not((Current^.typ In SkipInstr) or
  886. ((Current^.typ = ait_label) And
  887. Not(Pai_Label(Current)^.l^.is_used)))
  888. Then GetNextInstruction := True
  889. Else
  890. Begin
  891. Next := Nil;
  892. GetNextInstruction := False;
  893. End;
  894. End;
  895. Function GetLastInstruction(Current: Pai; Var Last: Pai): Boolean;
  896. {skips the ait-types in SkipInstr puts the previous pai object in
  897. Last. Returns false if there isn't any}
  898. Begin
  899. Repeat
  900. Current := Pai(Current^.previous);
  901. While Assigned(Current) And
  902. ((Pai(Current)^.typ In SkipInstr) or
  903. ((Pai(Current)^.typ = ait_label) And
  904. Not(Pai_Label(Current)^.l^.is_used))) Do
  905. Current := Pai(Current^.previous);
  906. If Assigned(Current) And
  907. (Current^.typ = ait_Marker) And
  908. (Pai_Marker(Current)^.Kind = NoPropInfoEnd) Then
  909. Begin
  910. While Assigned(Current) And
  911. Not((Current^.typ = ait_Marker) And
  912. (Pai_Marker(Current)^.Kind = NoPropInfoStart)) Do
  913. Current := Pai(Current^.previous);
  914. End;
  915. Until Not(Assigned(Current)) Or
  916. (Current^.typ <> ait_Marker);
  917. Last := Current;
  918. If Assigned(Current) And
  919. Not((Current^.typ In SkipInstr) or
  920. ((Current^.typ = ait_label) And
  921. Not(Pai_Label(Current)^.l^.is_used)))
  922. Then GetLastInstruction := True
  923. Else
  924. Begin
  925. Last := Nil;
  926. GetLastInstruction := False
  927. End;
  928. End;
  929. {******************* The Data Flow Analyzer functions ********************}
  930. Procedure UpdateUsedRegs(Var UsedRegs: TRegSet; p: Pai);
  931. {updates UsedRegs with the RegAlloc Information coming after P}
  932. Begin
  933. { p := Pai(p^.next);}
  934. Repeat
  935. While Assigned(p) And
  936. ((p^.typ in (SkipInstr - [ait_RegAlloc, ait_RegDealloc])) or
  937. ((p^.typ = ait_label) And
  938. Not(Pai_Label(p)^.l^.is_used))) Do
  939. p := Pai(p^.next);
  940. While Assigned(p) And
  941. (p^.typ in [ait_RegAlloc, ait_RegDealloc]) Do
  942. Begin
  943. Case p^.typ Of
  944. ait_RegAlloc: UsedRegs := UsedRegs + [PaiRegAlloc(p)^.Reg];
  945. ait_regdealloc: UsedRegs := UsedRegs - [PaiRegAlloc(p)^.Reg];
  946. End;
  947. p := pai(p^.next);
  948. End;
  949. Until Not(Assigned(p)) Or
  950. (Not(p^.typ in SkipInstr) And
  951. Not((p^.typ = ait_label) And
  952. Not(Pai_Label(p)^.l^.is_used)));
  953. End;
  954. (*Function FindZeroreg(p: Pai; Var Result: TRegister): Boolean;
  955. {Finds a register which contains the constant zero}
  956. Var Counter: TRegister;
  957. Begin
  958. Counter := R_EAX;
  959. FindZeroReg := True;
  960. While (Counter <= R_EDI) And
  961. ((PPaiProp(p^.fileinfo.line)^.Regs[Counter].Typ <> Con_Const) or
  962. (PPaiProp(p^.fileinfo.line)^.Regs[Counter].StartMod <> Pointer(0))) Do
  963. Inc(Byte(Counter));
  964. If (PPaiProp(p^.fileinfo.line)^.Regs[Counter].Typ = Con_Const) And
  965. (PPaiProp(p^.fileinfo.line)^.Regs[Counter].StartMod = Pointer(0))
  966. Then Result := Counter
  967. Else FindZeroReg := False;
  968. End;*)
  969. Function TCh2Reg(Ch: TChange): TRegister;
  970. {converts a TChange variable to a TRegister}
  971. Begin
  972. If (Ch <= C_REDI) Then
  973. TCh2Reg := TRegister(Byte(Ch))
  974. Else
  975. If (Ch <= C_WEDI) Then
  976. TCh2Reg := TRegister(Byte(Ch) - Byte(C_REDI))
  977. Else
  978. If (Ch <= C_RWEDI) Then
  979. TCh2Reg := TRegister(Byte(Ch) - Byte(C_WEDI))
  980. Else InternalError($db)
  981. End;
  982. Procedure IncState(Var S: Word);
  983. {Increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  984. errors}
  985. Begin
  986. If (s <> $ffff)
  987. Then Inc(s)
  988. Else s := 0
  989. End;
  990. Function RegInSequence(Reg: TRegister; Const Content: TContent): Boolean;
  991. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  992. Pai objects) to see whether Reg is used somewhere, without it being loaded
  993. with something else first}
  994. Var p: Pai;
  995. Counter: Byte;
  996. TmpResult: Boolean;
  997. RegsChecked: TRegSet;
  998. Begin
  999. RegsChecked := [];
  1000. p := Content.StartMod;
  1001. TmpResult := False;
  1002. Counter := 1;
  1003. While Not(TmpResult) And
  1004. (Counter <= Content.NrOfMods) Do
  1005. Begin
  1006. If (p^.typ = ait_instruction) and
  1007. (Pai386(p)^._operator in [A_MOV, A_MOVZX, A_MOVSX])
  1008. Then
  1009. If (Pai386(p)^.op1t = top_ref)
  1010. Then
  1011. With TReference(Pai386(p)^.op1^) Do
  1012. If (Base = ProcInfo.FramePointer) And
  1013. (Index = R_NO)
  1014. Then RegsChecked := RegsChecked + [Reg32(TRegister(Pai386(p)^.op2))]
  1015. Else
  1016. Begin
  1017. If (Base = Reg) And
  1018. Not(Base In RegsChecked)
  1019. Then TmpResult := True;
  1020. If Not(TmpResult) And
  1021. (Index = Reg) And
  1022. Not(Index In RegsChecked)
  1023. Then TmpResult := True;
  1024. End;
  1025. Inc(Counter);
  1026. GetNextInstruction(p,p)
  1027. End;
  1028. RegInSequence := TmpResult
  1029. End;
  1030. Procedure DestroyReg(p1: PPaiProp; Reg: TRegister);
  1031. {Destroys the contents of the register Reg in the PPaiProp p1, as well as the
  1032. contents of registers are loaded with a memory location based on Reg}
  1033. Var TmpState: Longint;
  1034. Counter: TRegister;
  1035. Begin
  1036. Reg := Reg32(Reg);
  1037. NrOfInstrSinceLastMod[Reg] := 0;
  1038. If (Reg >= R_EAX) And (Reg <= R_EDI)
  1039. Then
  1040. Begin
  1041. With p1^.Regs[Reg] Do
  1042. Begin
  1043. IncState(State);
  1044. TmpState := State;
  1045. FillChar(p1^.Regs[Reg], SizeOf(TContent), 0);
  1046. State := TmpState;
  1047. End;
  1048. For Counter := R_EAX to R_EDI Do
  1049. With p1^.Regs[Counter] Do
  1050. If (Typ = Con_Ref) And
  1051. RegInSequence(Reg, p1^.Regs[Counter])
  1052. Then
  1053. Begin
  1054. IncState(State);
  1055. TmpState := State;
  1056. FillChar(p1^.Regs[Counter], SizeOf(TContent), 0);
  1057. State := TmpState;
  1058. End;
  1059. End;
  1060. End;
  1061. {Procedure AddRegsToSet(p: Pai; Var RegSet: TRegSet);
  1062. Begin
  1063. If (p^.typ = ait_instruction) Then
  1064. Begin
  1065. Case Pai386(p)^.op1t Of
  1066. top_reg:
  1067. If Not(TRegister(Pai386(p)^.op1) in [R_NO,R_ESP,ProcInfo.FramePointer]) Then
  1068. RegSet := RegSet + [TRegister(Pai386(p)^.op1)];
  1069. top_ref:
  1070. With TReference(Pai386(p)^.op1^) Do
  1071. Begin
  1072. If Not(Base in [ProcInfo.FramePointer,R_NO,R_ESP])
  1073. Then RegSet := RegSet + [Base];
  1074. If Not(Index in [ProcInfo.FramePointer,R_NO,R_ESP])
  1075. Then RegSet := RegSet + [Index];
  1076. End;
  1077. End;
  1078. Case Pai386(p)^.op2t Of
  1079. top_reg:
  1080. If Not(TRegister(Pai386(p)^.op2) in [R_NO,R_ESP,ProcInfo.FramePointer]) Then
  1081. RegSet := RegSet + [TRegister(Pai386(p)^.op2)];
  1082. top_ref:
  1083. With TReference(Pai386(p)^.op2^) Do
  1084. Begin
  1085. If Not(Base in [ProcInfo.FramePointer,R_NO,R_ESP])
  1086. Then RegSet := RegSet + [Base];
  1087. If Not(Index in [ProcInfo.FramePointer,R_NO,R_ESP])
  1088. Then RegSet := RegSet + [Index];
  1089. End;
  1090. End;
  1091. End;
  1092. End;}
  1093. Function OpsEquivalent(typ: Longint; OldOp, NewOp: Pointer; Var RegInfo: TRegInfo): Boolean;
  1094. Begin {checks whether the two ops are equivalent}
  1095. Case typ Of
  1096. Top_Reg: OpsEquivalent := RegsEquivalent(TRegister(OldOp), TRegister(NewOp), RegInfo);
  1097. Top_Const: OpsEquivalent := OldOp = NewOp;
  1098. Top_Ref: OpsEquivalent := RefsEquivalent(TReference(OldOp^), TReference(NewOp^), RegInfo);
  1099. Top_None: OpsEquivalent := True
  1100. Else OpsEquivalent := False
  1101. End;
  1102. End;
  1103. (*Function OpsEqual(typ: Longint; op1, op2: Pointer): Boolean;
  1104. Begin {checks whether the two ops are equal}
  1105. Case typ Of
  1106. Top_Reg, Top_Const: OpsEqual := op1 = op2;
  1107. Top_Ref: OpsEqual := RefsEqual(TReference(op1^), TReference(op2^));
  1108. Top_None: OpsEqual := True
  1109. Else OpsEqual := False
  1110. End;
  1111. End; *)
  1112. (* Function RegsSameContent(p1, p2: Pai; Reg: TRegister): Boolean;
  1113. {checks whether Reg has the same content in the PPaiProp of p1 and p2}
  1114. Begin
  1115. Reg := Reg32(Reg);
  1116. RegsSameContent :=
  1117. PPaiProp(p1^.fileinfo.line)^.Regs[Reg].State =
  1118. PPaiProp(p2^.fileinfo.line)^.Regs[Reg].State;
  1119. End; *)
  1120. Function InstructionsEquivalent(p1, p2: Pai; Var RegInfo: TRegInfo): Boolean;
  1121. Begin {checks whether two Pai386 instructions are equal}
  1122. If Assigned(p1) And Assigned(p2) And
  1123. (Pai(p1)^.typ = ait_instruction) And
  1124. (Pai(p1)^.typ = ait_instruction) And
  1125. (Pai386(p1)^._operator = Pai386(p2)^._operator) And
  1126. (Pai386(p1)^.op1t = Pai386(p2)^.op1t) And
  1127. (Pai386(p1)^.op2t = Pai386(p2)^.op2t)
  1128. Then
  1129. {both instructions have the same structure:
  1130. "<operator> <operand of type1>, <operand of type 2>"}
  1131. If (Pai386(p1)^._operator in [A_MOV, A_MOVZX, A_MOVSX]) And
  1132. (Pai386(p1)^.op1t = top_ref) {then op2t = top_reg} Then
  1133. If Not(RegInRef(TRegister(Pai386(p1)^.op2), TReference(Pai386(p1)^.op1^))) Then
  1134. {the "old" instruction is a load of a register with a new value, not with
  1135. a value based on the contents of this register (so no "mov (reg), reg")}
  1136. If Not(RegInRef(TRegister(Pai386(p2)^.op2), TReference(Pai386(p2)^.op1^))) And
  1137. RefsEqual(TReference(Pai386(p1)^.op1^), TReference(Pai386(p2)^.op1^))
  1138. Then
  1139. {the "new" instruction is also a load of a register with a new value, and
  1140. this value is fetched from the same memory location}
  1141. Begin
  1142. With TReference(Pai386(p2)^.op1^) Do
  1143. Begin
  1144. If Not(Base in [ProcInfo.FramePointer, R_NO, R_ESP])
  1145. {it won't do any harm if the register is already in RegsLoadedForRef}
  1146. Then RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Base];
  1147. If Not(Index in [ProcInfo.FramePointer, R_NO, R_ESP])
  1148. Then RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Index];
  1149. End;
  1150. {add the registers from the reference (op1) to the RegInfo, all registers
  1151. from the reference are the same in the old and in the new instruction
  1152. sequence}
  1153. AddOp2RegInfo(Pai386(p1)^.op1t, Pai386(p1)^.op1, RegInfo);
  1154. {the registers from op2 have to be equivalent, but not necessarily equal}
  1155. InstructionsEquivalent :=
  1156. RegsEquivalent(TRegister(Pai386(p1)^.op2), TRegister(Pai386(p2)^.op2),
  1157. RegInfo);
  1158. End
  1159. {the registers are loaded with values from different memory locations. If
  1160. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1161. would be considered equivalent}
  1162. Else InstructionsEquivalent := False
  1163. Else
  1164. {load register with a value based on the current value of this register}
  1165. Begin
  1166. With TReference(Pai386(p2)^.op1^) Do
  1167. Begin
  1168. If Not(Base in [ProcInfo.FramePointer,
  1169. Reg32(TRegister(Pai386(p2)^.op2)),R_NO,R_ESP])
  1170. {it won't do any harm if the register is already in RegsLoadedForRef}
  1171. Then
  1172. {$ifdef csdebug}
  1173. Begin
  1174. {$endif csdebug}
  1175. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Base];
  1176. {$ifdef csdebug}
  1177. Writeln(att_reg2str[base], ' added');
  1178. end;
  1179. {$endif csdebug}
  1180. If Not(Index in [ProcInfo.FramePointer,
  1181. Reg32(TRegister(Pai386(p2)^.op2)),R_NO,R_ESP])
  1182. Then
  1183. {$ifdef csdebug}
  1184. Begin
  1185. {$endif csdebug}
  1186. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Index];
  1187. {$ifdef csdebug}
  1188. Writeln(att_reg2str[index], ' added');
  1189. end;
  1190. {$endif csdebug}
  1191. End;
  1192. If Not(Reg32(TRegister(Pai386(p2)^.op2)) In [ProcInfo.FramePointer,
  1193. R_NO,R_ESP])
  1194. Then
  1195. {$ifdef csdebug}
  1196. Begin
  1197. {$endif csdebug}
  1198. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1199. [Reg32(TRegister(Pai386(p2)^.op2))];
  1200. {$ifdef csdebug}
  1201. Writeln(att_reg2str[Reg32(TRegister(Pai386(p2)^.op2))], ' removed');
  1202. end;
  1203. {$endif csdebug}
  1204. InstructionsEquivalent :=
  1205. OpsEquivalent(Pai386(p1)^.op1t, Pai386(p1)^.op1, Pai386(p2)^.op1, RegInfo) And
  1206. OpsEquivalent(Pai386(p1)^.op2t, Pai386(p1)^.op2, Pai386(p2)^.op2, RegInfo)
  1207. End
  1208. Else
  1209. {an instruction <> mov, movzx, movsx}
  1210. InstructionsEquivalent :=
  1211. OpsEquivalent(Pai386(p1)^.op1t, Pai386(p1)^.op1, Pai386(p2)^.op1, RegInfo) And
  1212. OpsEquivalent(Pai386(p1)^.op2t, Pai386(p1)^.op2, Pai386(p2)^.op2, RegInfo)
  1213. {the instructions haven't even got the same structure, so they're certainly
  1214. not equivalent}
  1215. Else InstructionsEquivalent := False;
  1216. End;
  1217. (*
  1218. Function InstructionsEqual(p1, p2: Pai): Boolean;
  1219. Begin {checks whether two Pai386 instructions are equal}
  1220. InstructionsEqual :=
  1221. Assigned(p1) And Assigned(p2) And
  1222. ((Pai(p1)^.typ = ait_instruction) And
  1223. (Pai(p1)^.typ = ait_instruction) And
  1224. (Pai386(p1)^._operator = Pai386(p2)^._operator) And
  1225. (Pai386(p1)^.op1t = Pai386(p2)^.op1t) And
  1226. (Pai386(p1)^.op2t = Pai386(p2)^.op2t) And
  1227. OpsEqual(Pai386(p1)^.op1t, Pai386(p1)^.op1, Pai386(p2)^.op1) And
  1228. OpsEqual(Pai386(p1)^.op2t, Pai386(p1)^.op2, Pai386(p2)^.op2))
  1229. End;
  1230. *)
  1231. Function RefInInstruction(Const Ref: TReference; p: Pai): Boolean;
  1232. {checks whehter Ref is used in P}
  1233. Var TmpResult: Boolean;
  1234. Begin
  1235. TmpResult := False;
  1236. If (p^.typ = ait_instruction) Then
  1237. Begin
  1238. If (Pai386(p)^.op1t = Top_Ref)
  1239. Then TmpResult := RefsEqual(Ref, TReference(Pai386(p)^.op1^));
  1240. If Not(TmpResult) And
  1241. (Pai386(p)^.op2t = Top_Ref)
  1242. Then TmpResult := RefsEqual(Ref, TReference(Pai386(p)^.op2^));
  1243. End;
  1244. RefInInstruction := TmpResult;
  1245. End;
  1246. Function RefInSequence(Const Ref: TReference; Content: TContent): Boolean;
  1247. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1248. Pai objects) to see whether Ref is used somewhere}
  1249. Var p: Pai;
  1250. Counter: Byte;
  1251. TmpResult: Boolean;
  1252. Begin
  1253. p := Content.StartMod;
  1254. TmpResult := False;
  1255. Counter := 1;
  1256. While Not(TmpResult) And
  1257. (Counter <= Content.NrOfMods) Do
  1258. Begin
  1259. If (p^.typ = ait_instruction) And
  1260. RefInInstruction(Ref, p)
  1261. Then TmpResult := True;
  1262. Inc(Counter);
  1263. GetNextInstruction(p,p)
  1264. End;
  1265. RefInSequence := TmpResult
  1266. End;
  1267. Procedure DestroyRefs(p: pai; Const Ref: TReference; WhichReg: TRegister);
  1268. {destroys all registers which possibly contain a reference to Ref, WhichReg
  1269. is the register whose contents are being written to memory (if this proc
  1270. is called because of a "mov?? %reg, (mem)" instruction)}
  1271. Var Counter: TRegister;
  1272. Begin
  1273. WhichReg := Reg32(WhichReg);
  1274. If ((Ref.base = ProcInfo.FramePointer) And
  1275. (Ref.Index = R_NO)) Or
  1276. Assigned(Ref.Symbol)
  1277. Then
  1278. {write something to a parameter, a local or global variable, so
  1279. * with uncertzain optimizations on:
  1280. - destroy the contents of registers whose contents have somewhere a
  1281. "mov?? (Ref), %reg". WhichReg (this is the register whose contents
  1282. are being written to memory) is not destroyed if it's StartMod is
  1283. of that form and NrOfMods = 1 (so if it holds ref, but is not a
  1284. pointer based on Ref)
  1285. * with uncertain optimizations off:
  1286. - also destroy registers that contain any pointer}
  1287. For Counter := R_EAX to R_EDI Do
  1288. With PPaiProp(p^.fileinfo.line)^.Regs[Counter] Do
  1289. Begin
  1290. If (typ = Con_Ref) And
  1291. (Not(cs_UncertainOpts in aktglobalswitches) And
  1292. (NrOfMods <> 1)
  1293. ) Or
  1294. (RefInSequence(Ref,PPaiProp(p^.fileinfo.line)^.Regs[Counter]) And
  1295. ((Counter <> WhichReg) Or
  1296. ((NrOfMods = 1) And
  1297. {StarMod is always of the type ait_instruction}
  1298. (Pai386(StartMod)^.op1t = top_ref) And
  1299. RefsEqual(TReference(Pai386(StartMod)^.op1^), Ref)
  1300. )
  1301. )
  1302. )
  1303. Then DestroyReg(PPaiProp(p^.fileinfo.line), Counter)
  1304. End
  1305. Else
  1306. {write something to a pointer location, so
  1307. * with uncertain optimzations on:
  1308. - do not destroy registers which contain a local/global variable or a
  1309. parameter, except if DestroyRefs is called because of a "movsl"
  1310. * with uncertain optimzations off:
  1311. - destroy every register which contains a memory location
  1312. }
  1313. For Counter := R_EAX to R_EDI Do
  1314. With PPaiProp(p^.fileinfo.line)^.Regs[Counter] Do
  1315. If (typ = Con_Ref) And
  1316. (Not(cs_UncertainOpts in aktglobalswitches) Or
  1317. {for movsl}
  1318. (Ref.Base = R_EDI) Or
  1319. {don't destroy if reg contains a parameter, local or global variable}
  1320. Not((NrOfMods = 1) And
  1321. (Pai386(StartMod)^.op1t = top_ref) And
  1322. ((PReference(Pai386(StartMod)^.op1)^.base = ProcInfo.FramePointer) Or
  1323. Assigned(PReference(Pai386(StartMod)^.op1)^.Symbol)
  1324. )
  1325. )
  1326. )
  1327. Then DestroyReg(PPaiProp(p^.FileInfo.Line), Counter)
  1328. End;
  1329. Procedure DestroyAllRegs(p: PPaiProp);
  1330. Var Counter: TRegister;
  1331. Begin {initializes/desrtoys all registers}
  1332. For Counter := R_EAX To R_EDI Do
  1333. DestroyReg(p, Counter);
  1334. p^.DirFlag := F_Unknown;
  1335. End;
  1336. Procedure Destroy(PaiObj: Pai; opt: Longint; Op: Pointer);
  1337. Begin
  1338. Case opt Of
  1339. top_reg: DestroyReg(PPaiProp(PaiObj^.fileinfo.line), TRegister(Op));
  1340. top_ref: DestroyRefs(PaiObj, TReference(Op^), R_NO);
  1341. top_symbol:;
  1342. End;
  1343. End;
  1344. Procedure DFAPass1(AsmL: PAasmOutput);
  1345. {gathers the RegAlloc data... still need to think about where to store it}
  1346. Begin
  1347. FindLoHiLabels(AsmL, LoLab, HiLab, LabDif);
  1348. BuildLabelTable(AsmL, LTable, LoLab, LabDif);
  1349. End;
  1350. Function DoDFAPass2(
  1351. {$Ifdef StateDebug}
  1352. AsmL: PAasmOutput;
  1353. {$endif statedebug}
  1354. First: Pai): Pai;
  1355. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  1356. contents for the instructions starting with p. Returns the last pai which has
  1357. been processed}
  1358. Var
  1359. CurProp: PPaiProp;
  1360. {$ifdef AnalyzeLoops}
  1361. TmpState,
  1362. {$endif AnalyzeLoops}
  1363. Cnt, InstrCnt : Longint;
  1364. InstrProp: TAsmInstrucProp;
  1365. UsedRegs: TRegSet;
  1366. p, hp : Pai;
  1367. TmpRef: TReference;
  1368. TmpReg: TRegister;
  1369. Begin
  1370. p := First;
  1371. UsedRegs := [];
  1372. UpdateUsedregs(UsedRegs, p);
  1373. If (First^.typ in SkipInstr) Then
  1374. GetNextInstruction(p, p);
  1375. First := p;
  1376. InstrCnt := 1;
  1377. FillChar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  1378. While Assigned(p) Do
  1379. Begin
  1380. DoDFAPass2 := p;
  1381. {$IfDef TP}
  1382. New(CurProp);
  1383. {$Else TP}
  1384. CurProp := @PaiPropBlock^[InstrCnt];
  1385. {$EndIf TP}
  1386. If (p <> First)
  1387. Then
  1388. Begin
  1389. {$ifdef JumpAnal}
  1390. If (p^.Typ <> ait_label) Then
  1391. {$endif JumpAnal}
  1392. Begin
  1393. GetLastInstruction(p, hp);
  1394. CurProp^.Regs := PPaiProp(hp^.fileinfo.line)^.Regs;
  1395. CurProp^.DirFlag := PPaiProp(hp^.fileinfo.line)^.DirFlag;
  1396. End
  1397. End
  1398. Else
  1399. Begin
  1400. FillChar(CurProp^, SizeOf(CurProp^), 0);
  1401. { For TmpReg := R_EAX to R_EDI Do
  1402. CurProp^.Regs[TmpReg].State := 1;}
  1403. End;
  1404. CurProp^.UsedRegs := UsedRegs;
  1405. CurProp^.CanBeRemoved := False;
  1406. UpdateUsedRegs(UsedRegs, Pai(p^.Next));
  1407. {$ifdef csdebug}
  1408. If R_EAX in usedregs then
  1409. begin
  1410. hp := new(pai_asm_comment,init(strpnew('eax in set')));
  1411. InsertLLItem(AsmL, p, p^.next, hp);
  1412. end;
  1413. {$endif csdebug}
  1414. {$ifdef TP}
  1415. CurProp^.linesave := p^.fileinfo.line;
  1416. PPaiProp(p^.fileinfo.line) := CurProp;
  1417. {$Endif TP}
  1418. For TmpReg := R_EAX To R_EDI Do
  1419. Inc(NrOfInstrSinceLastMod[TmpReg]);
  1420. Case p^.typ Of
  1421. ait_label:
  1422. {$Ifndef JumpAnal}
  1423. If (Pai_label(p)^.l^.is_used) Then
  1424. DestroyAllRegs(CurProp);
  1425. {$Else JumpAnal}
  1426. Begin
  1427. If (Pai_Label(p)^.is_used) Then
  1428. With LTable^[Pai_Label(p)^.l^.nb-LoLab] Do
  1429. {$IfDef AnalyzeLoops}
  1430. If (RefsFound = Pai_Label(p)^.l^.RefCount)
  1431. {$Else AnalyzeLoops}
  1432. If (JmpsProcessed = Pai_Label(p)^.l^.RefCount)
  1433. {$EndIf AnalyzeLoops}
  1434. Then
  1435. {all jumps to this label have been found}
  1436. {$IfDef AnalyzeLoops}
  1437. If (JmpsProcessed > 0)
  1438. Then
  1439. {$EndIf AnalyzeLoops}
  1440. {we've processed at least one jump to this label}
  1441. Begin
  1442. If (GetLastInstruction(p, hp) And
  1443. Not(((hp^.typ = ait_labeled_instruction) or
  1444. (hp^.typ = ait_instruction)) And
  1445. (Pai_Labeled(hp)^._operator = A_JMP))
  1446. Then
  1447. {previous instruction not a JMP -> the contents of the registers after the
  1448. previous intruction has been executed have to be taken into account as well}
  1449. For TmpReg := R_EAX to R_EDI Do
  1450. Begin
  1451. If (CurProp^.Regs[TmpReg].State <>
  1452. PPaiProp(hp^.FileInfo.Line)^.Regs[TmpReg].State)
  1453. Then DestroyReg(CurProp, TmpReg)
  1454. End
  1455. End
  1456. {$IfDef AnalyzeLoops}
  1457. Else
  1458. {a label from a backward jump (e.g. a loop), no jump to this label has
  1459. already been processed}
  1460. If GetLastInstruction(p, hp) And
  1461. Not(hp^.typ = ait_labeled_instruction) And
  1462. (Pai_Labeled(hp)^._operator = A_JMP))
  1463. Then
  1464. {previous instruction not a jmp, so keep all the registers' contents from the
  1465. previous instruction}
  1466. Begin
  1467. CurProp^.Regs := PPaiProp(hp^.FileInfo.Line)^.Regs;
  1468. CurProp^.DirFlag := PPaiProp(hp^.FileInfo.Line)^.DirFlag;
  1469. End
  1470. Else
  1471. {previous instruction a jmp and no jump to this label processed yet}
  1472. Begin
  1473. hp := p;
  1474. Cnt := InstrCnt;
  1475. {continue until we find a jump to the label or a label which has already
  1476. been processed}
  1477. While GetNextInstruction(hp, hp) And
  1478. Not((hp^.typ = ait_labeled_instruction) And
  1479. (Pai_Labeled(hp)^.lab^.nb = Pai_Label(p)^.l^.nb)) And
  1480. Not((hp^.typ = ait_label) And
  1481. (LTable^[Pai_Label(hp)^.l^.nb-LoLab].RefsFound
  1482. = Pai_Label(hp)^.l^.RefCount) And
  1483. (LTable^[Pai_Label(hp)^.l^.nb-LoLab].JmpsProcessed > 0)) Do
  1484. Inc(Cnt);
  1485. If (hp^.typ = ait_label)
  1486. Then
  1487. {there's a processed label after the current one}
  1488. Begin
  1489. CurProp^.Regs := PaiPropBlock^[Cnt].Regs;
  1490. CurProp^.DirFlag := PaiPropBlock^[Cnt].DirFlag;
  1491. End
  1492. Else
  1493. {there's no label anymore after the current one, or they haven't been
  1494. processed yet}
  1495. Begin
  1496. GetLastInstruction(p, hp);
  1497. CurProp^.Regs := PPaiProp(hp^.FileInfo.Line)^.Regs;
  1498. CurProp^.DirFlag := PPaiProp(hp^.FileInfo.Line)^.DirFlag;
  1499. DestroyAllRegs(PPaiProp(hp^.FileInfo.Line))
  1500. End
  1501. End
  1502. {$EndIf AnalyzeLoops}
  1503. Else
  1504. {not all references to this label have been found, so destroy all registers}
  1505. Begin
  1506. GetLastInstruction(p, hp);
  1507. CurProp^.Regs := PPaiProp(hp^.FileInfo.Line)^.Regs;
  1508. CurProp^.DirFlag := PPaiProp(hp^.FileInfo.Line)^.DirFlag;
  1509. DestroyAllRegs(CurProp)
  1510. End;
  1511. End;
  1512. {$EndIf JumpAnal}
  1513. ait_labeled_instruction:
  1514. {$IfNDef JumpAnal}
  1515. ;
  1516. {$Else JumpAnal}
  1517. With LTable^[Pai_Labeled(p)^.lab^.nb-LoLab] Do
  1518. If (RefsFound = Pai_Labeled(p)^.lab^.RefCount) Then
  1519. Begin
  1520. If (InstrCnt < InstrNr)
  1521. Then
  1522. {forward jump}
  1523. If (JmpsProcessed = 0) Then
  1524. {no jump to this label has been processed yet}
  1525. Begin
  1526. PaiPropBlock^[InstrNr].Regs := CurProp^.Regs;
  1527. PaiPropBlock^[InstrNr].DirFlag := CurProp^.DirFlag;
  1528. Inc(JmpsProcessed);
  1529. End
  1530. Else
  1531. Begin
  1532. For TmpReg := R_EAX to R_EDI Do
  1533. If (PaiPropBlock^[InstrNr].Regs[TmpReg].State <>
  1534. CurProp^.Regs[TmpReg].State) Then
  1535. DestroyReg(@PaiPropBlock^[InstrNr], TmpReg);
  1536. Inc(JmpsProcessed);
  1537. End
  1538. {$ifdef AnalyzeLoops}
  1539. Else
  1540. { backward jump, a loop for example}
  1541. { If (JmpsProcessed > 0) Or
  1542. Not(GetLastInstruction(PaiObj, hp) And
  1543. (hp^.typ = ait_labeled_instruction) And
  1544. (Pai_Labeled(hp)^._operator = A_JMP))
  1545. Then}
  1546. {instruction prior to label is not a jmp, or at least one jump to the label
  1547. has yet been processed}
  1548. Begin
  1549. Inc(JmpsProcessed);
  1550. For TmpReg := R_EAX to R_EDI Do
  1551. If (PaiPropBlock^[InstrNr].Regs[TmpReg].State <>
  1552. CurProp^.Regs[TmpReg].State)
  1553. Then
  1554. Begin
  1555. TmpState := PaiPropBlock^[InstrNr].Regs[TmpReg].State;
  1556. Cnt := InstrNr;
  1557. While (TmpState = PaiPropBlock^[Cnt].Regs[TmpReg].State) Do
  1558. Begin
  1559. DestroyReg(@PaiPropBlock^[Cnt], TmpReg);
  1560. Inc(Cnt);
  1561. End;
  1562. While (Cnt <= InstrCnt) Do
  1563. Begin
  1564. Inc(PaiPropBlock^[Cnt].Regs[TmpReg].State);
  1565. Inc(Cnt)
  1566. End
  1567. End;
  1568. End
  1569. { Else }
  1570. {instruction prior to label is a jmp and no jumps to the label have yet been
  1571. processed}
  1572. { Begin
  1573. Inc(JmpsProcessed);
  1574. For TmpReg := R_EAX to R_EDI Do
  1575. Begin
  1576. TmpState := PaiPropBlock^[InstrNr].Regs[TmpReg].State;
  1577. Cnt := InstrNr;
  1578. While (TmpState = PaiPropBlock^[Cnt].Regs[TmpReg].State) Do
  1579. Begin
  1580. PaiPropBlock^[Cnt].Regs[TmpReg] := CurProp^.Regs[TmpReg];
  1581. Inc(Cnt);
  1582. End;
  1583. TmpState := PaiPropBlock^[InstrNr].Regs[TmpReg].State;
  1584. While (TmpState = PaiPropBlock^[Cnt].Regs[TmpReg].State) Do
  1585. Begin
  1586. DestroyReg(@PaiPropBlock^[Cnt], TmpReg);
  1587. Inc(Cnt);
  1588. End;
  1589. While (Cnt <= InstrCnt) Do
  1590. Begin
  1591. Inc(PaiPropBlock^[Cnt].Regs[TmpReg].State);
  1592. Inc(Cnt)
  1593. End
  1594. End
  1595. End}
  1596. {$endif AnalyzeLoops}
  1597. End;
  1598. {$EndIf JumpAnal}
  1599. {$ifdef GDB}
  1600. ait_stabs, ait_stabn, ait_stab_function_name:;
  1601. {$endif GDB}
  1602. ait_instruction:
  1603. Begin
  1604. InstrProp := AsmInstr[Pai386(p)^._operator];
  1605. Case Pai386(p)^._operator Of
  1606. A_MOV, A_MOVZX, A_MOVSX:
  1607. Begin
  1608. Case Pai386(p)^.op1t Of
  1609. Top_Reg:
  1610. Case Pai386(p)^.op2t Of
  1611. Top_Reg:
  1612. Begin
  1613. DestroyReg(CurProp, TRegister(Pai386(p)^.op2));
  1614. { CurProp^.Regs[TRegister(Pai386(p)^.op2)] :=
  1615. CurProp^.Regs[TRegister(Pai386(p)^.op1)];
  1616. If (CurProp^.Regs[TRegister(Pai386(p)^.op2)].ModReg = R_NO) Then
  1617. CurProp^.Regs[TRegister(Pai386(p)^.op2)].ModReg :=
  1618. Tregister(Pai386(p)^.op1);}
  1619. End;
  1620. Top_Ref: DestroyRefs(p, TReference(Pai386(p)^.op2^), TRegister(Pai386(p)^.op1));
  1621. End;
  1622. Top_Ref:
  1623. Begin {destination is always a register in this case}
  1624. TmpReg := Reg32(TRegister(Pai386(p)^.op2));
  1625. If RegInRef(TmpReg, TReference(Pai386(p)^.op1^)) And
  1626. (CurProp^.Regs[TmpReg].Typ = Con_Ref)
  1627. Then
  1628. Begin
  1629. With CurProp^.Regs[TmpReg] Do
  1630. Begin
  1631. IncState(State);
  1632. {also store how many instructions are part of the sequence in the first
  1633. instructions PPaiProp, so it can be easily accessed from within
  1634. CheckSequence}
  1635. Inc(NrOfMods, NrOfInstrSinceLastMod[TmpReg]);
  1636. PPaiProp(Pai(StartMod)^.fileinfo.line)^.Regs[TmpReg].NrOfMods := NrOfMods;
  1637. NrOfInstrSinceLastMod[TmpReg] := 0;
  1638. End;
  1639. End
  1640. Else
  1641. Begin
  1642. DestroyReg(CurProp, TmpReg);
  1643. With CurProp^.Regs[TmpReg] Do
  1644. Begin
  1645. Typ := Con_Ref;
  1646. StartMod := p;
  1647. NrOfMods := 1;
  1648. End;
  1649. End;
  1650. {$ifdef StateDebug}
  1651. hp := new(pai_asm_comment,init(strpnew(att_reg2str[TmpReg]+': '+tostr(CurProp^.Regs[TmpReg].State))));
  1652. InsertLLItem(AsmL, p, p^.next, hp);
  1653. {$endif StateDebug}
  1654. End;
  1655. Top_Const:
  1656. Begin
  1657. Case Pai386(p)^.op2t Of
  1658. Top_Reg:
  1659. Begin
  1660. TmpReg := Reg32(TRegister(Pai386(p)^.op2));
  1661. With CurProp^.Regs[TmpReg] Do
  1662. Begin
  1663. {it doesn't matter that the state is changed,
  1664. it isn't looked at when removing constant reloads}
  1665. DestroyReg(CurProp, TmpReg);
  1666. typ := Con_Const;
  1667. StartMod := Pai386(p)^.op1;
  1668. End
  1669. End;
  1670. Top_Ref: DestroyRefs(P, TReference(Pai386(p)^.op2^), R_NO);
  1671. End;
  1672. End;
  1673. End;
  1674. End;
  1675. A_IMUL:
  1676. Begin
  1677. If (Pai386(p)^.Op3t = top_none)
  1678. Then
  1679. If (Pai386(p)^.Op2t = top_none)
  1680. Then
  1681. Begin
  1682. DestroyReg(CurProp, R_EAX);
  1683. DestroyReg(CurProp, R_EDX)
  1684. End
  1685. Else
  1686. Begin
  1687. If (Pai386(p)^.Op2t = top_reg) Then
  1688. DestroyReg(CurProp, TRegister(Pai386(p)^.Op2));
  1689. End
  1690. Else If (Pai386(p)^.Op3t = top_reg) Then
  1691. DestroyReg(CurProp, TRegister(longint(twowords(Pai386(p)^.Op2).word2)));
  1692. End;
  1693. A_XOR:
  1694. Begin
  1695. If (Pai386(p)^.op1t = top_reg) And
  1696. (Pai386(p)^.op2t = top_reg) And
  1697. (Pai386(p)^.op1 = Pai386(p)^.op2)
  1698. Then
  1699. Begin
  1700. DestroyReg(CurProp, Tregister(Pai386(p)^.op1));
  1701. CurProp^.Regs[Reg32(Tregister(Pai386(p)^.op1))].typ := Con_Const;
  1702. CurProp^.Regs[Reg32(Tregister(Pai386(p)^.op1))].StartMod := Pointer(0)
  1703. End
  1704. Else Destroy(p, Pai386(p)^.op2t, Pai386(p)^.op2);
  1705. End
  1706. Else
  1707. Begin
  1708. Cnt := 1;
  1709. While (Cnt <= MaxCh) And
  1710. (InstrProp.Ch[Cnt] <> C_None) Do
  1711. Begin
  1712. Case InstrProp.Ch[Cnt] Of
  1713. C_WEAX..C_RWEDI: DestroyReg(CurProp, TCh2Reg(InstrProp.Ch[Cnt]));
  1714. C_CDirFlag: CurProp^.DirFlag := F_NotSet;
  1715. C_SDirFlag: CurProp^.DirFlag := F_Set;
  1716. C_WOp1..C_RWOp1: Destroy(p, Pai386(p)^.op1t, Pai386(p)^.op1);
  1717. C_WOp2..C_RWOp2: Destroy(p, Pai386(p)^.op2t, Pai386(p)^.op2);
  1718. C_WOp3..C_RWOp3: Destroy(p, Pai386(p)^.op3t, Pointer(Longint(TwoWords(Pai386(p)^.op2).word2)));
  1719. C_MemEDI:
  1720. Begin
  1721. FillChar(TmpRef, SizeOf(TmpRef), 0);
  1722. TmpRef.Base := R_EDI;
  1723. DestroyRefs(p, TmpRef, R_NO)
  1724. End;
  1725. C_Flags, C_FPU:
  1726. Else
  1727. Begin
  1728. DestroyAllRegs(CurProp);
  1729. End;
  1730. End;
  1731. Inc(Cnt);
  1732. End
  1733. End;
  1734. End;
  1735. End
  1736. Else
  1737. Begin
  1738. DestroyAllRegs(CurProp);
  1739. End;
  1740. End;
  1741. Inc(InstrCnt);
  1742. GetNextInstruction(p, p);
  1743. End;
  1744. End;
  1745. Function InitDFAPass2(AsmL: PAasmOutput): Boolean;
  1746. {reserves memory for the PPaiProps in one big memory block when not using
  1747. TP, returns False if not enough memory is available for the optimizer in all
  1748. cases}
  1749. Var p: Pai;
  1750. Count: Longint;
  1751. { TmpStr: String; }
  1752. Begin
  1753. P := Pai(AsmL^.First);
  1754. If (p^.typ in SkipInstr) Then
  1755. GetNextInstruction(p, p);
  1756. NrOfPaiObjs := 0;
  1757. While Assigned(P) Do
  1758. Begin
  1759. {$IfNDef TP}
  1760. Case P^.Typ Of
  1761. ait_labeled_instruction:
  1762. begin
  1763. If (Pai_Labeled(P)^.lab^.nb >= LoLab) And
  1764. (Pai_Labeled(P)^.lab^.nb <= HiLab) Then
  1765. Inc(LTable^[Pai_Labeled(P)^.lab^.nb-LoLab].RefsFound);
  1766. end;
  1767. ait_label:
  1768. Begin
  1769. If (Pai_Label(p)^.l^.is_used) Then
  1770. LTable^[Pai_Label(P)^.l^.nb-LoLab].InstrNr := NrOfPaiObjs
  1771. End;
  1772. { ait_instruction:
  1773. Begin
  1774. If (Pai386(p)^._operator = A_PUSH) And
  1775. (Pai386(p)^.op1t = top_symbol) And
  1776. (PCSymbol(Pai386(p)^.op1)^.offset = 0) Then
  1777. Begin
  1778. TmpStr := StrPas(PCSymbol(Pai386(p)^.op1)^.symbol);
  1779. If}
  1780. End;
  1781. {$EndIf TP}
  1782. Inc(NrOfPaiObjs);
  1783. GetNextInstruction(p, p);
  1784. End;
  1785. {$IfDef TP}
  1786. If (MemAvail < (SizeOf(TPaiProp)*NrOfPaiObjs))
  1787. Or (NrOfPaiObjs = 0)
  1788. {this doesn't have to be one contiguous block}
  1789. Then InitDFAPass2 := False
  1790. Else InitDFAPass2 := True;
  1791. {$Else}
  1792. {Uncomment the next line to see how much memory the reloading optimizer needs}
  1793. { Writeln((NrOfPaiObjs*(((SizeOf(TPaiProp)+3)div 4)*4)));}
  1794. {no need to check mem/maxavail, we've got as much virtual memory as we want}
  1795. If NrOfPaiObjs <> 0 Then
  1796. Begin
  1797. InitDFAPass2 := True;
  1798. GetMem(PaiPropBlock, NrOfPaiObjs*(((SizeOf(TPaiProp)+3)div 4)*4));
  1799. p := Pai(AsmL^.First);
  1800. If (p^.typ in SkipInstr) Then
  1801. GetNextInstruction(p, p);
  1802. For Count := 1 To NrOfPaiObjs Do
  1803. Begin
  1804. PaiPropBlock^[Count].LineSave := p^.fileinfo.line;
  1805. PPaiProp(p^.fileinfo.line) := @PaiPropBlock^[Count];
  1806. GetNextInstruction(p, p);
  1807. End;
  1808. End
  1809. Else InitDFAPass2 := False;
  1810. {$EndIf TP}
  1811. End;
  1812. Function DFAPass2(AsmL: PAasmOutPut): Pai;
  1813. Begin
  1814. If InitDFAPass2(AsmL)
  1815. Then DFAPass2 := DoDFAPass2(
  1816. {$ifdef statedebug}
  1817. asml,
  1818. {$endif statedebug}
  1819. Pai(AsmL^.First))
  1820. Else DFAPass2 := Nil;
  1821. End;
  1822. Procedure ShutDownDFA;
  1823. Begin
  1824. If LabDif <> 0 Then
  1825. FreeMem(LTable, LabDif*SizeOf(TLabelTableItem));
  1826. End;
  1827. End.
  1828. {
  1829. $Log$
  1830. Revision 1.16 1998-10-01 20:21:47 jonas
  1831. * inter-register CSE, still requires some tweaks (peepholeoptpass2, better RegAlloc)
  1832. Revision 1.15 1998/09/20 18:00:20 florian
  1833. * small compiling problems fixed
  1834. Revision 1.14 1998/09/20 17:12:36 jonas
  1835. * small fix for uncertain optimizations & more cleaning up
  1836. Revision 1.12 1998/09/16 18:00:01 jonas
  1837. * optimizer now completely dependant on GetNext/GetLast instruction, works again with -dRegAlloc
  1838. Revision 1.11 1998/09/15 14:05:27 jonas
  1839. * fixed optimizer incompatibilities with freelabel code in psub
  1840. Revision 1.10 1998/09/09 15:33:58 peter
  1841. * removed warnings
  1842. Revision 1.9 1998/09/03 16:24:51 florian
  1843. * bug of type conversation from dword to real fixed
  1844. * bug fix of Jonas applied
  1845. Revision 1.8 1998/08/28 10:56:59 peter
  1846. * removed warnings
  1847. Revision 1.7 1998/08/19 16:07:44 jonas
  1848. * changed optimizer switches + cleanup of DestroyRefs in daopt386.pas
  1849. Revision 1.6 1998/08/10 14:49:57 peter
  1850. + localswitches, moduleswitches, globalswitches splitting
  1851. Revision 1.5 1998/08/09 13:56:24 jonas
  1852. * small bugfix for uncertain optimizations in DestroyRefs
  1853. Revision 1.4 1998/08/06 19:40:25 jonas
  1854. * removed $ before and after Log in comment
  1855. Revision 1.3 1998/08/05 16:00:14 florian
  1856. * some fixes for ansi strings
  1857. * log to Log changed
  1858. }