florian 515774b864 * merged armthum branch 16 years ago
..
aoptcpu.pas 790a4fe2d3 * log and id tags removed 20 years ago
aoptcpub.pas 790a4fe2d3 * log and id tags removed 20 years ago
aoptcpud.pas 790a4fe2d3 * log and id tags removed 20 years ago
cgcpu.pas 515774b864 * merged armthum branch 16 years ago
cpubase.inc 00d6a03b2c + default code now preserves mm registers 18 years ago
cpuinfo.pas f32831c44a * fixed assembling of fisttp of sse3 instruction set 18 years ago
cpunode.pas ebcb69478f * fixed a lot of stuff for fpu/mm register variables 20 years ago
cpupara.pas cc5aeb09de * fixed handling the result value of functions where the result type is 16 years ago
cpupi.pas e002e6b9f4 * Also execute setfirsttemp on non-Windows platforms. Fixes -O2 cycle on Linux. 18 years ago
cputarg.pas 23e67ee289 + intel assembler reader for x86-64 19 years ago
nx64add.pas 53e52ac6a9 * implementation of 32x32->64 multiplication for i386 based on patch 17 years ago
nx64cal.pas 6118c3e477 * fixed assembling of movd with 64 bit registers 18 years ago
nx64cnv.pas 7d459cf12a * the compiler now explicitly keeps track of the minimally guaranteed 16 years ago
nx64inl.pas 790a4fe2d3 * log and id tags removed 20 years ago
nx64mat.pas 444ba107f8 * fixed location.size for divmodn (in particular the sign) 17 years ago
r8664ari.inc b1c8bfc478 + x86_64 pic draft 20 years ago
r8664att.inc b1c8bfc478 + x86_64 pic draft 20 years ago
r8664con.inc b1c8bfc478 + x86_64 pic draft 20 years ago
r8664dwrf.inc b1c8bfc478 + x86_64 pic draft 20 years ago
r8664int.inc 21ae782854 * fixed more xmm stuff 20 years ago
r8664iri.inc f378d688d4 * fixed reading of registers in intel assembler mode on x86-64 19 years ago
r8664nor.inc b1c8bfc478 + x86_64 pic draft 20 years ago
r8664num.inc b1c8bfc478 + x86_64 pic draft 20 years ago
r8664op.inc 5d243f665a * fixed <instr> reg,reg with regs>=r8 19 years ago
r8664ot.inc b1c8bfc478 + x86_64 pic draft 20 years ago
r8664rni.inc b1c8bfc478 + x86_64 pic draft 20 years ago
r8664sri.inc b1c8bfc478 + x86_64 pic draft 20 years ago
r8664stab.inc b1c8bfc478 + x86_64 pic draft 20 years ago
r8664std.inc b1c8bfc478 + x86_64 pic draft 20 years ago
rax64att.pas 2adb00ac45 * enabled operand size checking (don't know why it was disabled, 17 years ago
rax64int.pas f726e1691b * Fixed warnings and notes. 16 years ago
rgcpu.pas c6253d5bd7 * Added missing override directive in trgcpu.add_constraints method for x86_64 CPU. It was missing for years and I am not sure that this code is really needed. Please review. 16 years ago
x8664ats.inc defe46ef42 * added missing size suffixes for several sse2 opcodes 18 years ago
x8664att.inc 0e96eda236 + some sse4 instructions supported, resolves #9046 18 years ago
x8664int.inc 0e96eda236 + some sse4 instructions supported, resolves #9046 18 years ago
x8664nop.inc 447276c5bb * Jcc reads the flags, this was not in the dat yet, resolves #9278 18 years ago
x8664op.inc 0e96eda236 + some sse4 instructions supported, resolves #9046 18 years ago
x8664pro.inc 447276c5bb * Jcc reads the flags, this was not in the dat yet, resolves #9278 18 years ago
x8664tab.inc 694f563079 * fixed assembler tables for sse4 instructions, resolves #13186 16 years ago