thumb2.inc 14 KB

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  1. {
  2. This file is part of the Free Pascal run time library.
  3. Copyright (c) 2003 by the Free Pascal development team.
  4. Processor dependent implementation for the system unit for
  5. ARM
  6. See the file COPYING.FPC, included in this distribution,
  7. for details about the copyright.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  11. **********************************************************************}
  12. {$asmmode gas}
  13. {$ifndef FPC_SYSTEM_HAS_MOVE}
  14. {$define FPC_SYSTEM_FPC_MOVE}
  15. {$endif FPC_SYSTEM_HAS_MOVE}
  16. {$ifdef FPC_SYSTEM_FPC_MOVE}
  17. const
  18. cpu_has_edsp : boolean = false;
  19. in_edsp_test : boolean = false;
  20. {$endif FPC_SYSTEM_FPC_MOVE}
  21. {$if not(defined(wince)) and not(defined(gba)) and not(defined(nds)) and not(defined(FPUSOFT)) and not(defined(FPULIBGCC))}
  22. {$define FPC_SYSTEM_HAS_SYSINITFPU}
  23. Procedure SysInitFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  24. begin
  25. { Enable FPU exceptions, but disable INEXACT, UNDERFLOW, DENORMAL }
  26. asm
  27. rfs r0
  28. and r0,r0,#0xffe0ffff
  29. orr r0,r0,#0x00070000
  30. wfs r0
  31. end;
  32. end;
  33. {$endif}
  34. procedure fpc_cpuinit;
  35. begin
  36. SysInitFPU;
  37. end;
  38. {$ifdef wince}
  39. function _controlfp(new: DWORD; mask: DWORD): DWORD; cdecl; external 'coredll';
  40. {$define FPC_SYSTEM_HAS_SYSRESETFPU}
  41. Procedure SysResetFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  42. begin
  43. softfloat_exception_flags:=0;
  44. end;
  45. {$define FPC_SYSTEM_HAS_SYSINITFPU}
  46. Procedure SysInitFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  47. begin
  48. softfloat_exception_mask:=float_flag_underflow or float_flag_inexact or float_flag_denormal;
  49. { Enable FPU exceptions, but disable INEXACT, UNDERFLOW, DENORMAL }
  50. { FPU precision 64 bit, rounding to nearest, affine infinity }
  51. _controlfp($000C0003, $030F031F);
  52. end;
  53. {$endif wince}
  54. {****************************************************************************
  55. stack frame related stuff
  56. ****************************************************************************}
  57. {$IFNDEF INTERNAL_BACKTRACE}
  58. {$define FPC_SYSTEM_HAS_GET_FRAME}
  59. function get_frame:pointer;assembler;nostackframe;
  60. asm
  61. mov r0,r11
  62. end;
  63. {$ENDIF not INTERNAL_BACKTRACE}
  64. {$define FPC_SYSTEM_HAS_GET_CALLER_ADDR}
  65. function get_caller_addr(framebp:pointer):pointer;assembler;
  66. asm
  67. movs r0,r0
  68. beq .Lg_a_null
  69. ldr r0,[r0,#-4]
  70. .Lg_a_null:
  71. end;
  72. {$define FPC_SYSTEM_HAS_GET_CALLER_FRAME}
  73. function get_caller_frame(framebp:pointer):pointer;assembler;
  74. asm
  75. movs r0,r0
  76. beq .Lgnf_null
  77. ldr r0,[r0,#-12]
  78. .Lgnf_null:
  79. end;
  80. {$define FPC_SYSTEM_HAS_SPTR}
  81. Function Sptr : pointer;assembler;
  82. asm
  83. mov r0,sp
  84. end;
  85. {$ifndef FPC_SYSTEM_HAS_FILLCHAR}
  86. {$define FPC_SYSTEM_HAS_FILLCHAR}
  87. Procedure FillChar(var x;count:longint;value:byte);assembler;nostackframe;
  88. asm
  89. // less than 0?
  90. cmp r1,#0
  91. it lt
  92. movlt pc,lr
  93. mov r3,r0
  94. cmp r1,#8 // at least 8 bytes to do?
  95. blt .LFillchar2
  96. orr r2,r2,r2,lsl #8
  97. orr r2,r2,r2,lsl #16
  98. .LFillchar0:
  99. tst r3,#3 // aligned yet?
  100. itt ne
  101. strneb r2,[r3],#1
  102. subne r1,r1,#1
  103. bne .LFillchar0
  104. mov ip,r2
  105. .LFillchar1:
  106. cmp r1,#8 // 8 bytes still to do?
  107. blt .LFillchar2
  108. stmia r3!,{r2,ip}
  109. sub r1,r1,#8
  110. cmp r1,#8 // 8 bytes still to do?
  111. blt .LFillchar2
  112. stmia r3!,{r2,ip}
  113. sub r1,r1,#8
  114. cmp r1,#8 // 8 bytes still to do?
  115. blt .LFillchar2
  116. stmia r3!,{r2,ip}
  117. sub r1,r1,#8
  118. cmp r1,#8 // 8 bytes still to do?
  119. itt ge
  120. stmgeia r3!,{r2,ip}
  121. subge r1,r1,#8
  122. bge .LFillchar1
  123. .LFillchar2:
  124. movs r1,r1 // anything left?
  125. it eq
  126. moveq pc,lr
  127. rsb r1,r1,#7
  128. add pc,pc,r1,lsl #2
  129. mov r0,r0
  130. strb r2,[r3],#1
  131. strb r2,[r3],#1
  132. strb r2,[r3],#1
  133. strb r2,[r3],#1
  134. strb r2,[r3],#1
  135. strb r2,[r3],#1
  136. strb r2,[r3],#1
  137. mov pc,lr
  138. end;
  139. {$endif FPC_SYSTEM_HAS_FILLCHAR}
  140. {$ifndef FPC_SYSTEM_HAS_MOVE}
  141. {$define FPC_SYSTEM_HAS_MOVE}
  142. procedure Move_pld(const source;var dest;count:longint);assembler;nostackframe;
  143. asm
  144. pld [r0]
  145. pld [r1]
  146. // count <=0 ?
  147. cmp r2,#0
  148. it le
  149. movle pc,lr
  150. // overlap?
  151. cmp r1,r0
  152. bls .Lnooverlap
  153. add r3,r0,r2
  154. cmp r3,r1
  155. bls .Lnooverlap
  156. // overlap, copy backward
  157. .Loverlapped:
  158. subs r2,r2,#1
  159. ldrb r3,[r0,r2]
  160. strb r3,[r1,r2]
  161. bne .Loverlapped
  162. mov pc,lr
  163. .Lnooverlap:
  164. // less then 16 bytes to copy?
  165. cmp r2,#8
  166. // yes, the forget about the whole optimizations
  167. // and do a bytewise copy
  168. blt .Lbyteloop
  169. // both aligned?
  170. orr r3,r0,r1
  171. tst r3,#3
  172. bne .Lbyteloop
  173. (*
  174. // yes, then align
  175. // alignment to 4 byte boundries is enough
  176. ldrb ip,[r0],#1
  177. sub r2,r2,#1
  178. stb ip,[r1],#1
  179. tst r3,#2
  180. bne .Ldifferentaligned
  181. ldrh ip,[r0],#2
  182. sub r2,r2,#2
  183. sth ip,[r1],#2
  184. .Ldifferentaligned
  185. // qword aligned?
  186. orrs r3,r0,r1
  187. tst r3,#7
  188. bne .Ldwordloop
  189. *)
  190. pld [r0,#32]
  191. pld [r1,#32]
  192. .Ldwordloop:
  193. sub r2,r2,#4
  194. ldr r3,[r0],#4
  195. // preload
  196. pld [r0,#64]
  197. pld [r1,#64]
  198. cmp r2,#4
  199. str r3,[r1],#4
  200. bcs .Ldwordloop
  201. cmp r2,#0
  202. it eq
  203. moveq pc,lr
  204. .Lbyteloop:
  205. subs r2,r2,#1
  206. ldrb r3,[r0],#1
  207. strb r3,[r1],#1
  208. bne .Lbyteloop
  209. mov pc,lr
  210. end;
  211. procedure Move_blended(const source;var dest;count:longint);assembler;nostackframe;
  212. asm
  213. // count <=0 ?
  214. cmp r2,#0
  215. it le
  216. movle pc,lr
  217. // overlap?
  218. cmp r1,r0
  219. bls .Lnooverlap
  220. add r3,r0,r2
  221. cmp r3,r1
  222. bls .Lnooverlap
  223. // overlap, copy backward
  224. .Loverlapped:
  225. subs r2,r2,#1
  226. ldrb r3,[r0,r2]
  227. strb r3,[r1,r2]
  228. bne .Loverlapped
  229. mov pc,lr
  230. .Lnooverlap:
  231. // less then 16 bytes to copy?
  232. cmp r2,#8
  233. // yes, the forget about the whole optimizations
  234. // and do a bytewise copy
  235. blt .Lbyteloop
  236. // both aligned?
  237. orr r3,r0,r1
  238. tst r3,#3
  239. bne .Lbyteloop
  240. (*
  241. // yes, then align
  242. // alignment to 4 byte boundries is enough
  243. ldrb ip,[r0],#1
  244. sub r2,r2,#1
  245. stb ip,[r1],#1
  246. tst r3,#2
  247. bne .Ldifferentaligned
  248. ldrh ip,[r0],#2
  249. sub r2,r2,#2
  250. sth ip,[r1],#2
  251. .Ldifferentaligned
  252. // qword aligned?
  253. orrs r3,r0,r1
  254. tst r3,#7
  255. bne .Ldwordloop
  256. *)
  257. .Ldwordloop:
  258. sub r2,r2,#4
  259. ldr r3,[r0],#4
  260. cmp r2,#4
  261. str r3,[r1],#4
  262. bcs .Ldwordloop
  263. cmp r2,#0
  264. it eq
  265. moveq pc,lr
  266. .Lbyteloop:
  267. subs r2,r2,#1
  268. ldrb r3,[r0],#1
  269. strb r3,[r1],#1
  270. bne .Lbyteloop
  271. mov pc,lr
  272. end;
  273. const
  274. moveproc : pointer = @move_blended;
  275. procedure Move(const source;var dest;count:longint);[public, alias: 'FPC_MOVE'];assembler;nostackframe;
  276. asm
  277. ldr ip,.Lmoveproc
  278. ldr pc,[ip]
  279. .Lmoveproc:
  280. .long moveproc
  281. end;
  282. {$endif FPC_SYSTEM_HAS_MOVE}
  283. {****************************************************************************
  284. String
  285. ****************************************************************************}
  286. {$ifndef FPC_SYSTEM_HAS_FPC_SHORTSTR_ASSIGN}
  287. {$define FPC_SYSTEM_HAS_FPC_SHORTSTR_ASSIGN}
  288. {$ifndef FPC_STRTOSHORTSTRINGPROC}
  289. function fpc_shortstr_to_shortstr(len:longint;const sstr:shortstring):shortstring;assembler;nostackframe;[public,alias: 'FPC_SHORTSTR_TO_SHORTSTR'];compilerproc;
  290. {$else}
  291. procedure fpc_shortstr_to_shortstr(out res:shortstring;const sstr:shortstring);assembler;nostackframe;[public,alias: 'FPC_SHORTSTR_TO_SHORTSTR'];compilerproc;
  292. {$endif}
  293. {r0: __RESULT
  294. r1: len
  295. r2: sstr}
  296. asm
  297. ldrb r12,[r2],#1
  298. cmp r12,r1
  299. it gt
  300. movgt r12,r1
  301. strb r12,[r0],#1
  302. cmp r12,#6 (* 6 seems to be the break even point. *)
  303. blt .LStartTailCopy
  304. (* Align destination on 32bits. This is the only place where unrolling
  305. really seems to help, since in the common case, sstr is aligned on
  306. 32 bits, therefore in the common case we need to copy 3 bytes to
  307. align, i.e. in the case of a loop, you wouldn't branch out early.*)
  308. rsb r3,r0,#0
  309. ands r3,r3,#3
  310. sub r12,r12,r3
  311. itttt ne
  312. ldrneb r1,[r2],#1
  313. strneb r1,[r0],#1
  314. subnes r3,r3,#1
  315. ldrneb r1,[r2],#1
  316. itttt ne
  317. strneb r1,[r0],#1
  318. subnes r3,r3,#1
  319. ldrneb r1,[r2],#1
  320. strneb r1,[r0],#1
  321. it ne
  322. subnes r3,r3,#1
  323. .LDoneAlign:
  324. (* Destination should be aligned now, but source might not be aligned,
  325. if this is the case, do a byte-per-byte copy. *)
  326. tst r2,#3
  327. bne .LStartTailCopy
  328. (* Start the main copy, 32 bit at a time. *)
  329. movs r3,r12,lsr #2
  330. and r12,r12,#3
  331. beq .LStartTailCopy
  332. .LNext4bytes:
  333. (* Unrolling this loop would save a little bit of time for long strings
  334. (>20 chars), but alas, it hurts for short strings and they are the
  335. common case.*)
  336. ittt ne
  337. ldrne r1,[r2],#4
  338. strne r1,[r0],#4
  339. subnes r3,r3,#1
  340. bne .LNext4bytes
  341. .LStartTailCopy:
  342. (* Do remaining bytes. *)
  343. cmp r12,#0
  344. beq .LDoneTail
  345. .LNextChar3:
  346. ldrb r1,[r2],#1
  347. strb r1,[r0],#1
  348. subs r12,r12,#1
  349. bne .LNextChar3
  350. .LDoneTail:
  351. end;
  352. procedure fpc_shortstr_assign(len:longint;sstr,dstr:pointer);assembler;nostackframe;[public,alias:'FPC_SHORTSTR_ASSIGN'];compilerproc;
  353. {r0: len
  354. r1: sstr
  355. r2: dstr}
  356. asm
  357. ldrb r12,[r1],#1
  358. cmp r12,r0
  359. it gt
  360. movgt r12,r0
  361. strb r12,[r2],#1
  362. cmp r12,#6 (* 6 seems to be the break even point. *)
  363. blt .LStartTailCopy
  364. (* Align destination on 32bits. This is the only place where unrolling
  365. really seems to help, since in the common case, sstr is aligned on
  366. 32 bits, therefore in the common case we need to copy 3 bytes to
  367. align, i.e. in the case of a loop, you wouldn't branch out early.*)
  368. rsb r3,r2,#0
  369. ands r3,r3,#3
  370. sub r12,r12,r3
  371. itttt ne
  372. ldrneb r0,[r1],#1
  373. strneb r0,[r2],#1
  374. subnes r3,r3,#1
  375. ldrneb r0,[r1],#1
  376. itttt ne
  377. strneb r0,[r2],#1
  378. subnes r3,r3,#1
  379. ldrneb r0,[r1],#1
  380. strneb r0,[r2],#1
  381. it ne
  382. subnes r3,r3,#1
  383. .LDoneAlign:
  384. (* Destination should be aligned now, but source might not be aligned,
  385. if this is the case, do a byte-per-byte copy. *)
  386. tst r1,#3
  387. bne .LStartTailCopy
  388. (* Start the main copy, 32 bit at a time. *)
  389. movs r3,r12,lsr #2
  390. and r12,r12,#3
  391. beq .LStartTailCopy
  392. .LNext4bytes:
  393. (* Unrolling this loop would save a little bit of time for long strings
  394. (>20 chars), but alas, it hurts for short strings and they are the
  395. common case.*)
  396. ittt ne
  397. ldrne r0,[r1],#4
  398. strne r0,[r2],#4
  399. subnes r3,r3,#1
  400. bne .LNext4bytes
  401. .LStartTailCopy:
  402. (* Do remaining bytes. *)
  403. cmp r12,#0
  404. beq .LDoneTail
  405. .LNextChar3:
  406. ldrb r0,[r1],#1
  407. strb r0,[r2],#1
  408. subs r12,r12,#1
  409. bne .LNextChar3
  410. .LDoneTail:
  411. end;
  412. {$endif FPC_SYSTEM_HAS_FPC_SHORTSTR_ASSIGN}
  413. {$ifndef FPC_SYSTEM_HAS_FPC_PCHAR_LENGTH}
  414. {$define FPC_SYSTEM_HAS_FPC_PCHAR_LENGTH}
  415. function fpc_Pchar_length(p:Pchar):longint;assembler;nostackframe;[public,alias:'FPC_PCHAR_LENGTH'];compilerproc;
  416. asm
  417. cmp r0,#0
  418. mov r1,r0
  419. beq .Ldone
  420. .Lnextchar:
  421. (*Are we aligned?*)
  422. tst r1,#3
  423. bne .Ltest_unaligned (*No, do byte per byte.*)
  424. ldr r3,.L01010101
  425. .Ltest_aligned:
  426. (*Aligned, load 4 bytes at a time.*)
  427. ldr r12,[r1],#4
  428. (*Check wether r12 contains a 0 byte.*)
  429. sub r2,r12,r3
  430. mvn r12,r12
  431. and r2,r2,r12
  432. ands r2,r2,r3,lsl #7 (*r3 lsl 7 = $80808080*)
  433. beq .Ltest_aligned (*No 0 byte, repeat.*)
  434. sub r1,r1,#4
  435. .Ltest_unaligned:
  436. ldrb r12,[r1],#1
  437. cmp r12,#1 (*r12<1 same as r12=0, but result in carry flag*)
  438. bcs .Lnextchar
  439. (*Dirty trick: we need to subtract 1 extra because we have counted the
  440. terminating 0, due to the known carry flag sbc can do this.*)
  441. sbc r0,r1,r0
  442. .Ldone:
  443. mov pc,lr
  444. .L01010101:
  445. .long 0x01010101
  446. end;
  447. {$endif}
  448. var
  449. fpc_system_lock: longint; export name 'fpc_system_lock';
  450. function InterLockedDecrement (var Target: longint) : longint; assembler; nostackframe;
  451. asm
  452. // lock
  453. ldr r3, .Lfpc_system_lock
  454. mov r1, #1
  455. .Lloop:
  456. ldrex r2, [r3]
  457. cmp r2, #0
  458. itt eq
  459. strexeq r2, r1, [r3]
  460. cmpeq r2, #0
  461. bne .Lloop
  462. // do the job
  463. ldr r1, [r0]
  464. sub r1, r1, #1
  465. str r1, [r0]
  466. mov r0, r1
  467. // unlock and return
  468. str r2, [r3]
  469. mov pc, lr
  470. .Lfpc_system_lock:
  471. .long fpc_system_lock
  472. end;
  473. function InterLockedIncrement (var Target: longint) : longint; assembler; nostackframe;
  474. asm
  475. // lock
  476. ldr r3, .Lfpc_system_lock
  477. mov r1, #1
  478. .Lloop:
  479. ldrex r2, [r3]
  480. cmp r2, #0
  481. itt eq
  482. strexeq r2, r1, [r3]
  483. cmpeq r2, #0
  484. bne .Lloop
  485. // do the job
  486. ldr r1, [r0]
  487. add r1, r1, #1
  488. str r1, [r0]
  489. mov r0, r1
  490. // unlock and return
  491. str r2, [r3]
  492. mov pc, lr
  493. .Lfpc_system_lock:
  494. .long fpc_system_lock
  495. end;
  496. function InterLockedExchange (var Target: longint;Source : longint) : longint; assembler; nostackframe;
  497. asm
  498. // lock
  499. ldr r3, .Lfpc_system_lock
  500. mov r2, #1
  501. .Lloop:
  502. ldrex r2, [r3]
  503. cmp r2, #0
  504. itt eq
  505. strexeq r2, r12, [r3]
  506. cmpeq r2, #0
  507. bne .Lloop
  508. // do the job
  509. ldr r2, [r0]
  510. str r1, [r0]
  511. mov r0, r2
  512. // unlock and return
  513. mov r2, #0
  514. str r2, [r3]
  515. mov pc, lr
  516. .Lfpc_system_lock:
  517. .long fpc_system_lock
  518. end;
  519. function InterLockedExchangeAdd (var Target: longint;Source : longint) : longint; assembler; nostackframe;
  520. asm
  521. // lock
  522. ldr r3, .Lfpc_system_lock
  523. mov r2, #1
  524. .Lloop:
  525. ldrex r2, [r3]
  526. cmp r2, #0
  527. itt eq
  528. strexeq r2, r12, [r3]
  529. cmpeq r2, #0
  530. bne .Lloop
  531. // do the job
  532. ldr r2, [r0]
  533. add r1, r1, r2
  534. str r1, [r0]
  535. mov r0, r2
  536. // unlock and return
  537. mov r2, #0
  538. str r2, [r3]
  539. mov pc, lr
  540. .Lfpc_system_lock:
  541. .long fpc_system_lock
  542. end;
  543. function InterlockedCompareExchange(var Target: longint; NewValue: longint; Comperand: longint): longint; assembler; nostackframe;
  544. asm
  545. // lock
  546. ldr r12, .Lfpc_system_lock
  547. mov r3, #1
  548. .Lloop:
  549. ldrex r2, [r12]
  550. cmp r2, #0
  551. itt eq
  552. strexeq r2, r1, [r12]
  553. cmpeq r2, #0
  554. bne .Lloop
  555. // do the job
  556. ldr r3, [r0]
  557. cmp r3, r2
  558. it eq
  559. streq r1, [r0]
  560. mov r0, r3
  561. // unlock and return
  562. mov r3, #0
  563. str r3, [r12]
  564. mov pc, lr
  565. .Lfpc_system_lock:
  566. .long fpc_system_lock
  567. end;
  568. {$define FPC_SYSTEM_HAS_DECLOCKED_LONGINT}
  569. function declocked(var l: longint) : boolean; inline;
  570. begin
  571. Result:=InterLockedDecrement(l) = 0;
  572. end;
  573. {$define FPC_SYSTEM_HAS_INCLOCKED_LONGINT}
  574. procedure inclocked(var l: longint); inline;
  575. begin
  576. InterLockedIncrement(l);
  577. end;
  578. procedure fpc_cpucodeinit;
  579. begin
  580. {$ifdef FPC_SYSTEM_FPC_MOVE}
  581. cpu_has_edsp:=true;
  582. in_edsp_test:=true;
  583. asm
  584. bic r0,sp,#7
  585. ldrd r0,[r0]
  586. end;
  587. in_edsp_test:=false;
  588. if cpu_has_edsp then
  589. moveproc:=@move_pld
  590. else
  591. moveproc:=@move_blended;
  592. {$endif FPC_SYSTEM_FPC_MOVE}
  593. end;
  594. {include hand-optimized assembler division code}
  595. {$i divide.inc}