Jeppe Johansen f3273fa87d Optimize Add/Sub+Ldr/Str by using preindexed references il y a 12 ans
..
aasmcpu.pas 4056194e7c * don't ignore by accident the next instruction after a newly inserted constant pool il y a 12 ans
agarmgas.pas 07762e5c25 + proper assembler command line parameters for arm thumb il y a 12 ans
aoptcpu.pas f3273fa87d Optimize Add/Sub+Ldr/Str by using preindexed references il y a 12 ans
aoptcpub.pas 7e5b8584cf * set MaxOps to 4 for the optimizer because fpc generates now mla instructions il y a 13 ans
aoptcpuc.pas 790a4fe2d3 * log and id tags removed il y a 20 ans
aoptcpud.pas 790a4fe2d3 * log and id tags removed il y a 20 ans
armatt.inc ac4a6accd3 + SVC instruction il y a 12 ans
armatts.inc ac4a6accd3 + SVC instruction il y a 12 ans
armins.dat ac4a6accd3 + SVC instruction il y a 12 ans
armnop.inc 666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) il y a 13 ans
armop.inc ac4a6accd3 + SVC instruction il y a 12 ans
armreg.dat 7150832ec9 + Cortex-M3 special registers, resolves #23185 il y a 13 ans
armtab.inc 666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) il y a 13 ans
cgcpu.pas 0bb8d24e24 Add some immediate forms of shift instructions to tcgthumb.a_op_const_reg il y a 12 ans
cpubase.pas 086ae4b999 Merge r22905 and r22906 il y a 12 ans
cpuelf.pas 32ffddaad8 + ELF linker back-ends for ARM and MIPS. il y a 12 ans
cpuinfo.pas 0e9b8adb7a patch by Michael Ring: il y a 12 ans
cpunode.pas 638d0d49c0 + take advantage of the mla instruction when calculating array offsets il y a 13 ans
cpupara.pas 9938169d2c * don't use the paracgsize in get_paraloc_def(), because it generally il y a 12 ans
cpupi.pas 7ba197a221 * fix stack parameter handling for arm thumb il y a 12 ans
cputarg.pas d26f0552a0 * Sync with trunk r23404. il y a 12 ans
hlcgcpu.pas 72e9cfee24 * create/destroy also the high level code generator for all architectures, il y a 14 ans
itcpugas.pas 47d43750e4 * remove unused units from uses statements il y a 12 ans
narmadd.pas 3a393f839e * do not reuse register locations on arm fpa/vfp il y a 12 ans
narmcal.pas 8b8a786823 * moved ARM/x86 ifdef'ed code from ncgcal to virtual methods il y a 12 ans
narmcnv.pas 5051453806 + support for LOC_(C)MMREGISTER in hlcg il y a 12 ans
narmcon.pas 47d43750e4 * remove unused units from uses statements il y a 12 ans
narminl.pas 5051453806 + support for LOC_(C)MMREGISTER in hlcg il y a 12 ans
narmmat.pas 570b40faed Signed modulus by 2 on ARM with no division is optimized to a series of instructions instead of calling fpc_mod_longint. il y a 12 ans
narmmem.pas 36a32e153d + arm thumb: tarmloadparentfpnode moves the stack pointer to a different register to avoid illegal instruction encodings il y a 12 ans
narmset.pas e5066a5f43 Update jumptabel generation for ARM Thumb il y a 12 ans
pp.lpi.template 1f032375c3 * improved template with help from Mattias Gaertner il y a 19 ans
raarm.pas 780e75bfac o patch by Jeppe Johansen to fix mantis #17472: il y a 14 ans
raarmgas.pas 47d43750e4 * remove unused units from uses statements il y a 12 ans
rarmcon.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 il y a 13 ans
rarmdwa.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 il y a 13 ans
rarmnor.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 il y a 13 ans
rarmnum.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 il y a 13 ans
rarmrni.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 il y a 13 ans
rarmsri.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 il y a 13 ans
rarmsta.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 il y a 13 ans
rarmstd.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 il y a 13 ans
rarmsup.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 il y a 13 ans
rgcpu.pas 1de40c8de7 * arm thumb: fix spilling with offsets >1020 il y a 12 ans