cgppc.pas 35 KB

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  1. {
  2. Copyright (c) 2006 by Florian Klaempfl
  3. This unit implements the common part of the code generator for the PowerPC
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit cgppc;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. globtype,symtype,symdef,
  22. cgbase,cgobj,
  23. aasmbase,aasmcpu,aasmtai,aasmdata,
  24. cpubase,cpuinfo,cgutils,rgcpu,
  25. parabase;
  26. type
  27. tcgppcgen = class(tcg)
  28. procedure a_load_const_cgpara(list: TAsmList; size: tcgsize; a: aint; const paraloc : tcgpara); override;
  29. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : tcgpara); override;
  30. procedure a_call_reg(list : TAsmList;reg: tregister); override;
  31. procedure a_call_ref(list : TAsmList;ref: treference); override;
  32. { stores the contents of register reg to the memory location described by
  33. ref }
  34. procedure a_load_reg_ref(list: TAsmList; fromsize, tosize: TCGSize;
  35. reg: tregister; const ref: treference); override;
  36. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  37. { fpu move instructions }
  38. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister); override;
  39. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); override;
  40. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); override;
  41. { overflow checking }
  42. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef);override;
  43. { entry code }
  44. procedure g_profilecode(list: TAsmList); override;
  45. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  46. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
  47. procedure g_maybe_got_init(list: TAsmList); override;
  48. protected
  49. function get_darwin_call_stub(const s: string; weak: boolean): tasmsymbol;
  50. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); override;
  51. { Make sure ref is a valid reference for the PowerPC and sets the }
  52. { base to the value of the index if (base = R_NO). }
  53. { Returns true if the reference contained a base, index and an }
  54. { offset or symbol, in which case the base will have been changed }
  55. { to a tempreg (which has to be freed by the caller) containing }
  56. { the sum of part of the original reference }
  57. function fixref(list: TAsmList; var ref: treference): boolean;
  58. { contains the common code of a_load_reg_ref and a_load_ref_reg }
  59. procedure a_load_store(list:TAsmList;op: tasmop;reg:tregister;ref: treference);virtual;
  60. { creates the correct branch instruction for a given combination }
  61. { of asmcondflags and destination addressing mode }
  62. procedure a_jmp(list: TAsmList; op: tasmop;
  63. c: tasmcondflag; crval: longint; l: tasmlabel);
  64. { returns true if the offset of the given reference can not be }
  65. { represented by a 16 bit immediate as required by some PowerPC }
  66. { instructions }
  67. function hasLargeOffset(const ref : TReference) : Boolean; inline;
  68. function save_lr_in_prologue: boolean;
  69. function load_got_symbol(list : TAsmList; symbol : string) : tregister;
  70. end;
  71. const
  72. TOpCmp2AsmCond: Array[topcmp] of TAsmCondFlag = (C_NONE,C_EQ,C_GT,
  73. C_LT,C_GE,C_LE,C_NE,C_LE,C_LT,C_GE,C_GT);
  74. {$ifdef extdebug}
  75. function ref2string(const ref : treference) : string;
  76. function cgsize2string(const size : TCgSize) : string;
  77. function cgop2string(const op : TOpCg) : String;
  78. {$endif extdebug}
  79. implementation
  80. uses
  81. {$ifdef extdebug}sysutils,{$endif}
  82. globals,verbose,systems,cutils,
  83. symconst,symsym,fmodule,
  84. rgobj,tgobj,cpupi,procinfo,paramgr;
  85. {$ifdef extdebug}
  86. function ref2string(const ref : treference) : string;
  87. begin
  88. result := 'base : ' + inttostr(ord(ref.base)) + ' index : ' + inttostr(ord(ref.index)) + ' refaddr : ' + inttostr(ord(ref.refaddr)) + ' offset : ' + inttostr(ref.offset) + ' symbol : ';
  89. if (assigned(ref.symbol)) then
  90. result := result + ref.symbol.name;
  91. end;
  92. function cgsize2string(const size : TCgSize) : string;
  93. const
  94. cgsize_strings : array[TCgSize] of string[8] = (
  95. 'OS_NO', 'OS_8', 'OS_16', 'OS_32', 'OS_64', 'OS_128', 'OS_S8', 'OS_S16', 'OS_S32',
  96. 'OS_S64', 'OS_S128', 'OS_F32', 'OS_F64', 'OS_F80', 'OS_C64', 'OS_F128',
  97. 'OS_M8', 'OS_M16', 'OS_M32', 'OS_M64', 'OS_M128', 'OS_MS8', 'OS_MS16', 'OS_MS32',
  98. 'OS_MS64', 'OS_MS128');
  99. begin
  100. result := cgsize_strings[size];
  101. end;
  102. function cgop2string(const op : TOpCg) : String;
  103. const
  104. opcg_strings : array[TOpCg] of string[6] = (
  105. 'None', 'Move', 'Add', 'And', 'Div', 'IDiv', 'IMul', 'Mul',
  106. 'Neg', 'Not', 'Or', 'Sar', 'Shl', 'Shr', 'Sub', 'Xor', 'Rol', 'Ror'
  107. );
  108. begin
  109. result := opcg_strings[op];
  110. end;
  111. {$endif extdebug}
  112. function tcgppcgen.hasLargeOffset(const ref : TReference) : Boolean;
  113. begin
  114. result := aword(ref.offset-low(smallint)) > high(smallint)-low(smallint);
  115. end;
  116. function tcgppcgen.save_lr_in_prologue: boolean;
  117. begin
  118. result:=
  119. (not (po_assembler in current_procinfo.procdef.procoptions) and
  120. ((pi_do_call in current_procinfo.flags) or
  121. (cs_profile in init_settings.moduleswitches))) or
  122. ([cs_lineinfo,cs_debuginfo] * current_settings.moduleswitches <> []);
  123. end;
  124. procedure tcgppcgen.a_load_const_cgpara(list: TAsmList; size: tcgsize; a: aint; const
  125. paraloc: tcgpara);
  126. var
  127. ref: treference;
  128. begin
  129. paraloc.check_simple_location;
  130. paramanager.allocparaloc(list,paraloc.location);
  131. case paraloc.location^.loc of
  132. LOC_REGISTER, LOC_CREGISTER:
  133. a_load_const_reg(list, size, a, paraloc.location^.register);
  134. LOC_REFERENCE:
  135. begin
  136. reference_reset(ref,paraloc.alignment);
  137. ref.base := paraloc.location^.reference.index;
  138. ref.offset := paraloc.location^.reference.offset;
  139. a_load_const_ref(list, size, a, ref);
  140. end;
  141. else
  142. internalerror(2002081101);
  143. end;
  144. end;
  145. procedure tcgppcgen.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : tcgpara);
  146. var
  147. ref: treference;
  148. tmpreg: tregister;
  149. begin
  150. paraloc.check_simple_location;
  151. paramanager.allocparaloc(list,paraloc.location);
  152. case paraloc.location^.loc of
  153. LOC_REGISTER,LOC_CREGISTER:
  154. a_loadaddr_ref_reg(list,r,paraloc.location^.register);
  155. LOC_REFERENCE:
  156. begin
  157. reference_reset(ref,paraloc.alignment);
  158. ref.base := paraloc.location^.reference.index;
  159. ref.offset := paraloc.location^.reference.offset;
  160. tmpreg := rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  161. a_loadaddr_ref_reg(list,r,tmpreg);
  162. a_load_reg_ref(list,OS_ADDR,OS_ADDR,tmpreg,ref);
  163. end;
  164. else
  165. internalerror(2002080701);
  166. end;
  167. end;
  168. procedure tcgppcgen.g_maybe_got_init(list: TAsmList);
  169. var
  170. instr: taicpu;
  171. cond: tasmcond;
  172. savedlr: boolean;
  173. begin
  174. if not(po_assembler in current_procinfo.procdef.procoptions) then
  175. begin
  176. if (cs_create_pic in current_settings.moduleswitches) and
  177. (pi_needs_got in current_procinfo.flags) then
  178. case target_info.system of
  179. system_powerpc_darwin,
  180. system_powerpc64_darwin:
  181. begin
  182. savedlr:=save_lr_in_prologue;
  183. if not savedlr then
  184. list.concat(taicpu.op_reg_reg(A_MFSPR,NR_R0,NR_LR));
  185. fillchar(cond,sizeof(cond),0);
  186. cond.simple:=false;
  187. cond.bo:=20;
  188. cond.bi:=31;
  189. instr:=taicpu.op_sym(A_BCL,current_procinfo.CurrGOTLabel);
  190. instr.setcondition(cond);
  191. list.concat(instr);
  192. a_label(list,current_procinfo.CurrGOTLabel);
  193. a_reg_alloc(list,current_procinfo.got);
  194. list.concat(taicpu.op_reg_reg(A_MFSPR,current_procinfo.got,NR_LR));
  195. if not savedlr or
  196. { in the following case lr is saved, but not restored }
  197. { (happens e.g. when generating debug info for leaf }
  198. { procedures) }
  199. not(pi_do_call in current_procinfo.flags) then
  200. list.concat(taicpu.op_reg_reg(A_MTSPR,NR_LR,NR_R0));
  201. end;
  202. end;
  203. end;
  204. end;
  205. function tcgppcgen.get_darwin_call_stub(const s: string; weak: boolean): tasmsymbol;
  206. var
  207. stubname: string;
  208. instr: taicpu;
  209. href: treference;
  210. l1: tasmsymbol;
  211. localgotlab: tasmlabel;
  212. cond: tasmcond;
  213. stubalign: byte;
  214. begin
  215. { function declared in the current unit? }
  216. { doesn't work correctly, because this will also return a hit if we }
  217. { previously took the address of an external procedure. It doesn't }
  218. { really matter, the linker will remove all unnecessary stubs. }
  219. stubname := 'L'+s+'$stub';
  220. result := current_asmdata.getasmsymbol(stubname);
  221. if assigned(result) then
  222. exit;
  223. if current_asmdata.asmlists[al_imports]=nil then
  224. current_asmdata.asmlists[al_imports]:=TAsmList.create;
  225. if (cs_create_pic in current_settings.moduleswitches) then
  226. stubalign:=32
  227. else
  228. stubalign:=16;
  229. new_section(current_asmdata.asmlists[al_imports],sec_stub,'',stubalign);
  230. result := current_asmdata.RefAsmSymbol(stubname);
  231. current_asmdata.asmlists[al_imports].concat(Tai_symbol.Create(result,0));
  232. { register as a weak symbol if necessary }
  233. if weak then
  234. current_asmdata.weakrefasmsymbol(s);
  235. current_asmdata.asmlists[al_imports].concat(tai_directive.create(asd_indirect_symbol,s));
  236. l1 := current_asmdata.RefAsmSymbol('L'+s+'$lazy_ptr');
  237. reference_reset_symbol(href,l1,0,sizeof(pint));
  238. href.refaddr := addr_higha;
  239. if (cs_create_pic in current_settings.moduleswitches) then
  240. begin
  241. current_asmdata.getjumplabel(localgotlab);
  242. href.relsymbol:=localgotlab;
  243. fillchar(cond,sizeof(cond),0);
  244. cond.simple:=false;
  245. cond.bo:=20;
  246. cond.bi:=31;
  247. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg(A_MFLR,NR_R0));
  248. instr:=taicpu.op_sym(A_BCL,localgotlab);
  249. instr.setcondition(cond);
  250. current_asmdata.asmlists[al_imports].concat(instr);
  251. a_label(current_asmdata.asmlists[al_imports],localgotlab);
  252. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg(A_MFLR,NR_R11));
  253. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg_reg_ref(A_ADDIS,NR_R11,NR_R11,href));
  254. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg(A_MTLR,NR_R0));
  255. end
  256. else
  257. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg_ref(A_LIS,NR_R11,href));
  258. href.refaddr := addr_low;
  259. href.base := NR_R11;
  260. {$ifndef cpu64bitaddr}
  261. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg_ref(A_LWZU,NR_R12,href));
  262. {$else cpu64bitaddr}
  263. { darwin/ppc64 uses a 32 bit absolute address here, strange... }
  264. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg_ref(A_LDU,NR_R12,href));
  265. {$endif cpu64bitaddr}
  266. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg(A_MTCTR,NR_R12));
  267. current_asmdata.asmlists[al_imports].concat(taicpu.op_none(A_BCTR));
  268. new_section(current_asmdata.asmlists[al_imports],sec_data_lazy,'',sizeof(pint));
  269. current_asmdata.asmlists[al_imports].concat(Tai_symbol.Create(l1,0));
  270. current_asmdata.asmlists[al_imports].concat(tai_directive.create(asd_indirect_symbol,s));
  271. current_asmdata.asmlists[al_imports].concat(tai_const.createname('dyld_stub_binding_helper',0));
  272. end;
  273. procedure tcgppcgen.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  274. var
  275. ref2, tmpref: treference;
  276. begin
  277. ref2 := ref;
  278. fixref(list,ref2);
  279. if assigned(ref2.symbol) then
  280. begin
  281. if target_info.system = system_powerpc_macos then
  282. begin
  283. if macos_direct_globals then
  284. begin
  285. reference_reset(tmpref,ref2.alignment);
  286. tmpref.offset := ref2.offset;
  287. tmpref.symbol := ref2.symbol;
  288. tmpref.base := NR_NO;
  289. list.concat(taicpu.op_reg_reg_ref(A_ADDI,r,NR_RTOC,tmpref));
  290. end
  291. else
  292. begin
  293. reference_reset(tmpref,ref2.alignment);
  294. tmpref.symbol := ref2.symbol;
  295. tmpref.offset := 0;
  296. tmpref.base := NR_RTOC;
  297. list.concat(taicpu.op_reg_ref(A_LWZ,r,tmpref));
  298. if ref2.offset <> 0 then
  299. begin
  300. reference_reset(tmpref,ref2.alignment);
  301. tmpref.offset := ref2.offset;
  302. tmpref.base:= r;
  303. list.concat(taicpu.op_reg_ref(A_LA,r,tmpref));
  304. end;
  305. end;
  306. if ref2.base <> NR_NO then
  307. list.concat(taicpu.op_reg_reg_reg(A_ADD,r,r,ref2.base));
  308. //list.concat(tai_comment.create(strpnew('*** a_loadaddr_ref_reg')));
  309. end
  310. else
  311. begin
  312. { add the symbol's value to the base of the reference, and if the }
  313. { reference doesn't have a base, create one }
  314. reference_reset(tmpref,ref2.alignment);
  315. tmpref.offset := ref2.offset;
  316. tmpref.symbol := ref2.symbol;
  317. tmpref.relsymbol := ref2.relsymbol;
  318. tmpref.refaddr := addr_higha;
  319. if ref2.base<> NR_NO then
  320. begin
  321. list.concat(taicpu.op_reg_reg_ref(A_ADDIS,r,
  322. ref2.base,tmpref));
  323. end
  324. else
  325. list.concat(taicpu.op_reg_ref(A_LIS,r,tmpref));
  326. tmpref.base := NR_NO;
  327. tmpref.refaddr := addr_low;
  328. { can be folded with one of the next instructions by the }
  329. { optimizer probably }
  330. list.concat(taicpu.op_reg_reg_ref(A_ADDI,r,r,tmpref));
  331. end
  332. end
  333. else if ref2.offset <> 0 Then
  334. if ref2.base <> NR_NO then
  335. a_op_const_reg_reg(list,OP_ADD,OS_ADDR,ref2.offset,ref2.base,r)
  336. { FixRef makes sure that "(ref.index <> R_NO) and (ref.offset <> 0)" never}
  337. { occurs, so now only ref.offset has to be loaded }
  338. else
  339. a_load_const_reg(list,OS_ADDR,ref2.offset,r)
  340. else if ref2.index <> NR_NO Then
  341. list.concat(taicpu.op_reg_reg_reg(A_ADD,r,ref2.base,ref2.index))
  342. else if (ref2.base <> NR_NO) and
  343. (r <> ref2.base) then
  344. a_load_reg_reg(list,OS_ADDR,OS_ADDR,ref2.base,r)
  345. else
  346. list.concat(taicpu.op_reg_const(A_LI,r,0));
  347. end;
  348. { calling a procedure by address }
  349. procedure tcgppcgen.a_call_reg(list : TAsmList;reg: tregister);
  350. begin
  351. list.concat(taicpu.op_reg(A_MTCTR,reg));
  352. list.concat(taicpu.op_none(A_BCTRL));
  353. include(current_procinfo.flags,pi_do_call);
  354. end;
  355. procedure tcgppcgen.a_call_ref(list : TAsmList;ref: treference);
  356. var
  357. tempreg : TRegister;
  358. begin
  359. tempreg := getintregister(list, OS_ADDR);
  360. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,tempreg);
  361. a_call_reg(list,tempreg);
  362. end;
  363. procedure tcgppcgen.a_load_reg_ref(list: TAsmList; fromsize, tosize: TCGSize;
  364. reg: tregister; const ref: treference);
  365. const
  366. StoreInstr: array[OS_8..OS_INT, boolean, boolean] of TAsmOp =
  367. { indexed? updating?}
  368. (((A_STB, A_STBU), (A_STBX, A_STBUX)),
  369. ((A_STH, A_STHU), (A_STHX, A_STHUX)),
  370. ((A_STW, A_STWU), (A_STWX, A_STWUX))
  371. {$ifdef cpu64bitalu}
  372. ,
  373. ((A_STD, A_STDU), (A_STDX, A_STDUX))
  374. {$endif cpu64bitalu}
  375. );
  376. var
  377. ref2: TReference;
  378. tmpreg: tregister;
  379. op: TAsmOp;
  380. begin
  381. if not (fromsize in [OS_8..OS_INT,OS_S8..OS_SINT]) then
  382. internalerror(2002090903);
  383. if not (tosize in [OS_8..OS_INT,OS_S8..OS_SINT]) then
  384. internalerror(2002090905);
  385. if tosize in [OS_S8..OS_SINT] then
  386. { storing is the same for signed and unsigned values }
  387. tosize := tcgsize(ord(tosize) - (ord(OS_S8) - ord(OS_8)));
  388. ref2 := ref;
  389. fixref(list, ref2);
  390. op := storeinstr[tcgsize2unsigned[tosize], ref2.index <> NR_NO, false];
  391. a_load_store(list, op, reg, ref2);
  392. end;
  393. procedure tcgppcgen.a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister);
  394. var
  395. op: tasmop;
  396. instr: taicpu;
  397. begin
  398. if not(fromsize in [OS_F32,OS_F64]) or
  399. not(tosize in [OS_F32,OS_F64]) then
  400. internalerror(2006123110);
  401. if (tosize < fromsize) then
  402. op:=A_FRSP
  403. else
  404. op:=A_FMR;
  405. instr := taicpu.op_reg_reg(op,reg2,reg1);
  406. list.concat(instr);
  407. if (op = A_FMR) then
  408. rg[R_FPUREGISTER].add_move_instruction(instr);
  409. end;
  410. procedure tcgppcgen.a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister);
  411. const
  412. FpuLoadInstr: Array[OS_F32..OS_F64,boolean, boolean] of TAsmOp =
  413. { indexed? updating?}
  414. (((A_LFS,A_LFSU),(A_LFSX,A_LFSUX)),
  415. ((A_LFD,A_LFDU),(A_LFDX,A_LFDUX)));
  416. var
  417. op: tasmop;
  418. ref2: treference;
  419. begin
  420. if not(fromsize in [OS_F32,OS_F64]) or
  421. not(tosize in [OS_F32,OS_F64]) then
  422. internalerror(200201121);
  423. ref2 := ref;
  424. fixref(list,ref2);
  425. op := fpuloadinstr[fromsize,ref2.index <> NR_NO,false];
  426. a_load_store(list,op,reg,ref2);
  427. if (fromsize > tosize) then
  428. a_loadfpu_reg_reg(list,fromsize,tosize,reg,reg);
  429. end;
  430. procedure tcgppcgen.a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference);
  431. const
  432. FpuStoreInstr: Array[OS_F32..OS_F64,boolean, boolean] of TAsmOp =
  433. { indexed? updating?}
  434. (((A_STFS,A_STFSU),(A_STFSX,A_STFSUX)),
  435. ((A_STFD,A_STFDU),(A_STFDX,A_STFDUX)));
  436. var
  437. op: tasmop;
  438. ref2: treference;
  439. reg2: tregister;
  440. begin
  441. if not(fromsize in [OS_F32,OS_F64]) or
  442. not(tosize in [OS_F32,OS_F64]) then
  443. internalerror(200201122);
  444. ref2 := ref;
  445. fixref(list,ref2);
  446. op := fpustoreinstr[tosize,ref2.index <> NR_NO,false];
  447. { some PPCs have a bug whereby storing a double to memory }
  448. { as single corrupts the value -> convert double to single }
  449. { first (bug confirmed on some G4s, but not on G5s) }
  450. if (tosize < fromsize) and
  451. (current_settings.cputype < cpu_PPC970) then
  452. begin
  453. reg2:=getfpuregister(list,tosize);
  454. a_loadfpu_reg_reg(list,fromsize,tosize,reg,reg2);
  455. reg:=reg2;
  456. end;
  457. a_load_store(list,op,reg,ref2);
  458. end;
  459. procedure tcgppcgen.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  460. var
  461. fromsreg, tosreg: tsubsetregister;
  462. restbits: byte;
  463. begin
  464. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  465. if (subsetsize in [OS_S8..OS_S128]) then
  466. begin
  467. { sign extend }
  468. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
  469. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  470. end
  471. else
  472. begin
  473. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  474. { mask other bits }
  475. if (sref.bitlen <> AIntBits) then
  476. a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,valuereg);
  477. end;
  478. { use subsetreg routine, it may have been overridden with an optimized version }
  479. fromsreg.subsetreg := extra_value_reg;
  480. fromsreg.subsetregsize := OS_INT;
  481. { subsetregs always count bits from right to left }
  482. fromsreg.startbit := loadbitsize-restbits;
  483. fromsreg.bitlen := restbits;
  484. tosreg.subsetreg := valuereg;
  485. tosreg.subsetregsize := OS_INT;
  486. tosreg.startbit := 0;
  487. tosreg.bitlen := restbits;
  488. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  489. end;
  490. procedure tcgppcgen.g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef);
  491. var
  492. hl : tasmlabel;
  493. flags : TResFlags;
  494. begin
  495. if not(cs_check_overflow in current_settings.localswitches) then
  496. exit;
  497. current_asmdata.getjumplabel(hl);
  498. if not ((def.typ=pointerdef) or
  499. ((def.typ=orddef) and
  500. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,pasbool]))) then
  501. begin
  502. if (current_settings.optimizecputype >= cpu_ppc970) or
  503. (current_settings.cputype >= cpu_ppc970) then
  504. begin
  505. { ... instructions setting overflow flag ...
  506. mfxerf R0
  507. mtcrf 128, R0
  508. ble cr0, label }
  509. list.concat(taicpu.op_reg(A_MFXER, NR_R0));
  510. list.concat(taicpu.op_const_reg(A_MTCRF, 128, NR_R0));
  511. flags.cr := RS_CR0;
  512. flags.flag := F_LE;
  513. a_jmp_flags(list, flags, hl);
  514. end
  515. else
  516. begin
  517. list.concat(taicpu.op_reg(A_MCRXR,NR_CR7));
  518. a_jmp(list,A_BC,C_NO,7,hl)
  519. end;
  520. end
  521. else
  522. a_jmp_cond(list,OC_AE,hl);
  523. a_call_name(list,'FPC_OVERFLOW',false);
  524. a_label(list,hl);
  525. end;
  526. procedure tcgppcgen.g_profilecode(list: TAsmList);
  527. var
  528. paraloc1 : tcgpara;
  529. begin
  530. if (target_info.system in [system_powerpc_darwin]) then
  531. begin
  532. paraloc1.init;
  533. paramanager.getintparaloc(pocall_cdecl,1,paraloc1);
  534. a_load_reg_cgpara(list,OS_ADDR,NR_R0,paraloc1);
  535. paramanager.freecgpara(list,paraloc1);
  536. paraloc1.done;
  537. allocallcpuregisters(list);
  538. a_call_name(list,'mcount',false);
  539. deallocallcpuregisters(list);
  540. a_reg_dealloc(list,NR_R0);
  541. end;
  542. end;
  543. procedure tcgppcgen.a_jmp_cond(list : TAsmList;cond : TOpCmp; l: tasmlabel);
  544. begin
  545. a_jmp(list,A_BC,TOpCmp2AsmCond[cond],0,l);
  546. end;
  547. procedure tcgppcgen.a_jmp(list: TAsmList; op: tasmop; c: tasmcondflag;
  548. crval: longint; l: tasmlabel);
  549. var
  550. p: taicpu;
  551. begin
  552. p := taicpu.op_sym(op,l);
  553. if op <> A_B then
  554. create_cond_norm(c,crval,p.condition);
  555. p.is_jmp := true;
  556. list.concat(p)
  557. end;
  558. procedure tcgppcgen.g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);
  559. procedure loadvmttor11;
  560. var
  561. href : treference;
  562. begin
  563. reference_reset_base(href,NR_R3,0,sizeof(pint));
  564. cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_R11);
  565. end;
  566. procedure op_onr11methodaddr;
  567. var
  568. href : treference;
  569. begin
  570. if (procdef.extnumber=$ffff) then
  571. Internalerror(200006139);
  572. { call/jmp vmtoffs(%eax) ; method offs }
  573. reference_reset_base(href,NR_R11,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),sizeof(pint));
  574. if hasLargeOffset(href) then
  575. begin
  576. {$ifdef cpu64}
  577. if (longint(href.offset) <> href.offset) then
  578. { add support for offsets > 32 bit }
  579. internalerror(200510201);
  580. {$endif cpu64}
  581. list.concat(taicpu.op_reg_reg_const(A_ADDIS,NR_R11,NR_R11,
  582. smallint((href.offset shr 16)+ord(smallint(href.offset and $ffff) < 0))));
  583. href.offset := smallint(href.offset and $ffff);
  584. end;
  585. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_R11);
  586. if (target_info.system = system_powerpc64_linux) then
  587. begin
  588. reference_reset_base(href, NR_R11, 0, sizeof(pint));
  589. a_load_ref_reg(list, OS_ADDR, OS_ADDR, href, NR_R11);
  590. end;
  591. list.concat(taicpu.op_reg(A_MTCTR,NR_R11));
  592. list.concat(taicpu.op_none(A_BCTR));
  593. if (target_info.system = system_powerpc64_linux) then
  594. list.concat(taicpu.op_none(A_NOP));
  595. end;
  596. var
  597. make_global : boolean;
  598. begin
  599. if not(procdef.proctypeoption in [potype_function,potype_procedure]) then
  600. Internalerror(200006137);
  601. if not assigned(procdef.struct) or
  602. (procdef.procoptions*[po_classmethod, po_staticmethod,
  603. po_methodpointer, po_interrupt, po_iocheck]<>[]) then
  604. Internalerror(200006138);
  605. if procdef.owner.symtabletype<>ObjectSymtable then
  606. Internalerror(200109191);
  607. make_global:=false;
  608. if (not current_module.is_unit) or
  609. create_smartlink or
  610. (procdef.owner.defowner.owner.symtabletype=globalsymtable) then
  611. make_global:=true;
  612. if make_global then
  613. List.concat(Tai_symbol.Createname_global(labelname,AT_FUNCTION,0))
  614. else
  615. List.concat(Tai_symbol.Createname(labelname,AT_FUNCTION,0));
  616. { set param1 interface to self }
  617. g_adjust_self_value(list,procdef,ioffset);
  618. { case 4 }
  619. if po_virtualmethod in procdef.procoptions then
  620. begin
  621. loadvmttor11;
  622. op_onr11methodaddr;
  623. end
  624. { case 0 }
  625. else
  626. case target_info.system of
  627. system_powerpc_darwin,
  628. system_powerpc64_darwin:
  629. list.concat(taicpu.op_sym(A_B,get_darwin_call_stub(procdef.mangledname,false)));
  630. system_powerpc64_linux:
  631. {$note ts:todo add GOT change?? - think not needed :) }
  632. list.concat(taicpu.op_sym(A_B,current_asmdata.RefAsmSymbol('.' + procdef.mangledname)));
  633. else
  634. list.concat(taicpu.op_sym(A_B,current_asmdata.RefAsmSymbol(procdef.mangledname)))
  635. end;
  636. List.concat(Tai_symbol_end.Createname(labelname));
  637. end;
  638. function tcgppcgen.load_got_symbol(list: TAsmList; symbol : string) : tregister;
  639. var
  640. l: tasmsymbol;
  641. ref: treference;
  642. begin
  643. if (target_info.system <> system_powerpc64_linux) then
  644. internalerror(2007102010);
  645. l:=current_asmdata.getasmsymbol(symbol);
  646. reference_reset_symbol(ref,l,0,sizeof(pint));
  647. ref.base := NR_R2;
  648. ref.refaddr := addr_pic;
  649. result := rg[R_INTREGISTER].getregister(list, R_SUBWHOLE);
  650. {$IFDEF EXTDEBUG}
  651. list.concat(tai_comment.create(strpnew('loading got reference for ' + symbol)));
  652. {$ENDIF EXTDEBUG}
  653. // cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  654. {$ifdef cpu64bitaddr}
  655. list.concat(taicpu.op_reg_ref(A_LD, result, ref));
  656. {$else cpu64bitaddr}
  657. list.concat(taicpu.op_reg_ref(A_LWZ, result, ref));
  658. {$endif cpu64bitaddr}
  659. end;
  660. function tcgppcgen.fixref(list: TAsmList; var ref: treference): boolean;
  661. var
  662. tmpreg: tregister;
  663. begin
  664. result := false;
  665. { Avoid recursion. }
  666. if (ref.refaddr = addr_pic) then
  667. exit;
  668. {$IFDEF EXTDEBUG}
  669. list.concat(tai_comment.create(strpnew('fixref0 ' + ref2string(ref))));
  670. {$ENDIF EXTDEBUG}
  671. if (target_info.system in [system_powerpc_darwin,system_powerpc64_darwin]) and
  672. assigned(ref.symbol) and
  673. not assigned(ref.relsymbol) and
  674. ((ref.symbol.bind in [AB_EXTERNAL,AB_WEAK_EXTERNAL]) or
  675. (cs_create_pic in current_settings.moduleswitches))then
  676. begin
  677. if (ref.symbol.bind in [AB_EXTERNAL,AB_WEAK_EXTERNAL]) or
  678. ((cs_create_pic in current_settings.moduleswitches) and
  679. (ref.symbol.bind in [AB_COMMON,AB_GLOBAL,AB_PRIVATE_EXTERN])) then
  680. begin
  681. tmpreg := g_indirect_sym_load(list,ref.symbol.name,ref.symbol.bind=AB_WEAK_EXTERNAL);
  682. ref.symbol:=nil;
  683. end
  684. else
  685. begin
  686. include(current_procinfo.flags,pi_needs_got);
  687. tmpreg := current_procinfo.got;
  688. if assigned(ref.relsymbol) then
  689. internalerror(2007093501);
  690. ref.relsymbol := current_procinfo.CurrGOTLabel;
  691. end;
  692. if (ref.base = NR_NO) then
  693. ref.base := tmpreg
  694. else if (ref.index = NR_NO) then
  695. ref.index := tmpreg
  696. else
  697. begin
  698. list.concat(taicpu.op_reg_reg_reg(A_ADD,tmpreg,ref.base,tmpreg));
  699. ref.base := tmpreg;
  700. end;
  701. end;
  702. { if we have to create PIC, add the symbol to the TOC/GOT }
  703. if (target_info.system = system_powerpc64_linux) and
  704. (cs_create_pic in current_settings.moduleswitches) and
  705. (assigned(ref.symbol)) then
  706. begin
  707. tmpreg := load_got_symbol(list, ref.symbol.name);
  708. if (ref.base = NR_NO) then
  709. ref.base := tmpreg
  710. else if (ref.index = NR_NO) then
  711. ref.index := tmpreg
  712. else begin
  713. a_op_reg_reg_reg(list, OP_ADD, OS_ADDR, ref.base, tmpreg, tmpreg);
  714. ref.base := tmpreg;
  715. end;
  716. ref.symbol := nil;
  717. {$IFDEF EXTDEBUG}
  718. list.concat(tai_comment.create(strpnew('fixref-pic ' + ref2string(ref))));
  719. {$ENDIF EXTDEBUG}
  720. end;
  721. if (ref.base = NR_NO) then
  722. begin
  723. ref.base := ref.index;
  724. ref.index := NR_NO;
  725. end;
  726. if (ref.base <> NR_NO) then
  727. begin
  728. if (ref.index <> NR_NO) and
  729. ((ref.offset <> 0) or assigned(ref.symbol)) then
  730. begin
  731. result := true;
  732. tmpreg := rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  733. list.concat(taicpu.op_reg_reg_reg(
  734. A_ADD,tmpreg,ref.base,ref.index));
  735. ref.index := NR_NO;
  736. ref.base := tmpreg;
  737. end
  738. end;
  739. if (ref.index <> NR_NO) and
  740. (assigned(ref.symbol) or
  741. (ref.offset <> 0)) then
  742. internalerror(200208102);
  743. {$IFDEF EXTDEBUG}
  744. list.concat(tai_comment.create(strpnew('fixref1 ' + ref2string(ref))));
  745. {$ENDIF EXTDEBUG}
  746. end;
  747. procedure tcgppcgen.a_load_store(list:TAsmList;op: tasmop;reg:tregister;
  748. ref: treference);
  749. var
  750. tmpreg: tregister;
  751. tmpref: treference;
  752. largeOffset: Boolean;
  753. begin
  754. tmpreg := NR_NO;
  755. largeOffset:= hasLargeOffset(ref);
  756. if target_info.system = system_powerpc_macos then
  757. begin
  758. if assigned(ref.symbol) then
  759. begin {Load symbol's value}
  760. tmpreg := rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  761. reference_reset(tmpref,sizeof(pint));
  762. tmpref.symbol := ref.symbol;
  763. tmpref.base := NR_RTOC;
  764. if macos_direct_globals then
  765. list.concat(taicpu.op_reg_ref(A_LA,tmpreg,tmpref))
  766. else
  767. list.concat(taicpu.op_reg_ref(A_LWZ,tmpreg,tmpref));
  768. end;
  769. if largeOffset then
  770. begin {Add hi part of offset}
  771. reference_reset(tmpref,ref.alignment);
  772. if Smallint(Lo(ref.offset)) < 0 then
  773. tmpref.offset := Hi(ref.offset) + 1 {Compensate when lo part is negative}
  774. else
  775. tmpref.offset := Hi(ref.offset);
  776. if (tmpreg <> NR_NO) then
  777. list.concat(taicpu.op_reg_reg_ref(A_ADDIS,tmpreg, tmpreg,tmpref))
  778. else
  779. begin
  780. tmpreg := rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  781. list.concat(taicpu.op_reg_ref(A_LIS,tmpreg,tmpref));
  782. end;
  783. end;
  784. if (tmpreg <> NR_NO) then
  785. begin
  786. {Add content of base register}
  787. if ref.base <> NR_NO then
  788. list.concat(taicpu.op_reg_reg_reg(A_ADD,tmpreg,
  789. ref.base,tmpreg));
  790. {Make ref ready to be used by op}
  791. ref.symbol:= nil;
  792. ref.base:= tmpreg;
  793. if largeOffset then
  794. ref.offset := Smallint(Lo(ref.offset));
  795. list.concat(taicpu.op_reg_ref(op,reg,ref));
  796. //list.concat(tai_comment.create(strpnew('*** a_load_store indirect global')));
  797. end
  798. else
  799. list.concat(taicpu.op_reg_ref(op,reg,ref));
  800. end
  801. else {if target_info.system <> system_powerpc_macos}
  802. begin
  803. if assigned(ref.symbol) or
  804. largeOffset then
  805. begin
  806. tmpreg := rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  807. reference_reset(tmpref,ref.alignment);
  808. tmpref.symbol := ref.symbol;
  809. tmpref.relsymbol := ref.relsymbol;
  810. tmpref.offset := ref.offset;
  811. tmpref.refaddr := addr_higha;
  812. if ref.base <> NR_NO then
  813. list.concat(taicpu.op_reg_reg_ref(A_ADDIS,tmpreg,
  814. ref.base,tmpref))
  815. else
  816. list.concat(taicpu.op_reg_ref(A_LIS,tmpreg,tmpref));
  817. ref.base := tmpreg;
  818. ref.refaddr := addr_low;
  819. list.concat(taicpu.op_reg_ref(op,reg,ref));
  820. end
  821. else
  822. list.concat(taicpu.op_reg_ref(op,reg,ref));
  823. end;
  824. end;
  825. end.