ncgmem.pas 49 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cpuinfo,cpubase,
  23. node,nmem;
  24. type
  25. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  26. procedure pass_generate_code;override;
  27. end;
  28. tcgloadparentfpnode = class(tloadparentfpnode)
  29. procedure pass_generate_code;override;
  30. end;
  31. tcgaddrnode = class(taddrnode)
  32. procedure pass_generate_code;override;
  33. end;
  34. tcgderefnode = class(tderefnode)
  35. procedure pass_generate_code;override;
  36. end;
  37. tcgsubscriptnode = class(tsubscriptnode)
  38. procedure pass_generate_code;override;
  39. end;
  40. tcgwithnode = class(twithnode)
  41. procedure pass_generate_code;override;
  42. end;
  43. tcgvecnode = class(tvecnode)
  44. function get_mul_size : aint;
  45. private
  46. procedure rangecheck_array;
  47. procedure rangecheck_string;
  48. protected
  49. {# This routine is used to calculate the address of the reference.
  50. On entry reg contains the index in the array,
  51. and l contains the size of each element in the array.
  52. This routine should update location.reference correctly,
  53. so it points to the correct address.
  54. }
  55. procedure update_reference_reg_mul(maybe_const_reg:tregister;l:aint);virtual;
  56. procedure update_reference_reg_packed(maybe_const_reg:tregister;l:aint);virtual;
  57. procedure second_wideansistring;virtual;
  58. procedure second_dynamicarray;virtual;
  59. public
  60. procedure pass_generate_code;override;
  61. end;
  62. implementation
  63. uses
  64. systems,
  65. cutils,cclasses,verbose,globals,constexp,
  66. symconst,symbase,symtype,symdef,symsym,symcpu,symtable,defutil,paramgr,
  67. aasmbase,aasmtai,aasmdata,
  68. procinfo,pass_2,parabase,
  69. pass_1,nld,ncon,nadd,ncnv,nutils,
  70. cgutils,cgobj,hlcgobj,
  71. tgobj,ncgutil,objcgutl,
  72. defcmp
  73. ;
  74. {*****************************************************************************
  75. TCGLOADVMTADDRNODE
  76. *****************************************************************************}
  77. procedure tcgloadvmtaddrnode.pass_generate_code;
  78. var
  79. href : treference;
  80. pool : THashSet;
  81. entry : PHashSetItem;
  82. begin
  83. location_reset(location,LOC_REGISTER,def_cgsize(voidpointertype));
  84. if (left.nodetype=typen) then
  85. begin
  86. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,voidpointertype);
  87. if not is_objcclass(left.resultdef) then
  88. begin
  89. reference_reset_symbol(href,
  90. current_asmdata.RefAsmSymbol(tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname,AT_DATA),0,
  91. voidpointertype.size);
  92. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,href,location.register);
  93. end
  94. else
  95. begin
  96. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  97. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  98. if (target_info.system in systems_objc_nfabi) then
  99. begin
  100. { find/add necessary classref/classname pool entries }
  101. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  102. end
  103. else
  104. begin
  105. { find/add necessary classref/classname pool entries }
  106. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  107. end;
  108. reference_reset_symbol(href,tasmlabel(entry^.Data),0,voidpointertype.size);
  109. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,href,location.register);
  110. end;
  111. end
  112. else
  113. begin
  114. { left contains self, load vmt from self }
  115. secondpass(left);
  116. gen_load_vmt_register(current_asmdata.CurrAsmList,tobjectdef(left.resultdef),left.location,location.register);
  117. end;
  118. end;
  119. {*****************************************************************************
  120. TCGLOADPARENTFPNODE
  121. *****************************************************************************}
  122. procedure tcgloadparentfpnode.pass_generate_code;
  123. var
  124. currpi : tprocinfo;
  125. hsym : tparavarsym;
  126. href : treference;
  127. begin
  128. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  129. begin
  130. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  131. location.register:=current_procinfo.framepointer;
  132. end
  133. else
  134. begin
  135. currpi:=current_procinfo;
  136. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  137. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,parentfpvoidpointertype);
  138. { load framepointer of current proc }
  139. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  140. if not assigned(hsym) then
  141. internalerror(200309281);
  142. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,hsym.localloc,location.register);
  143. { walk parents }
  144. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  145. begin
  146. currpi:=currpi.parent;
  147. if not assigned(currpi) then
  148. internalerror(200311201);
  149. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  150. if not assigned(hsym) then
  151. internalerror(200309282);
  152. if hsym.localloc.loc<>LOC_REFERENCE then
  153. internalerror(200309283);
  154. hlcg.reference_reset_base(href,parentfpvoidpointertype,location.register,hsym.localloc.reference.offset,sizeof(pint));
  155. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,href,location.register);
  156. end;
  157. end;
  158. end;
  159. {*****************************************************************************
  160. TCGADDRNODE
  161. *****************************************************************************}
  162. procedure tcgaddrnode.pass_generate_code;
  163. begin
  164. secondpass(left);
  165. location_reset(location,LOC_REGISTER,int_cgsize(resultdef.size));
  166. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,resultdef);
  167. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  168. { on x86_64-win64, array of chars can be returned in registers, however,
  169. when passing these arrays to other functions, the compiler wants to take
  170. the address of the array so when the addrnode has been created internally,
  171. we have to force the data into memory, see also tw14388.pp
  172. }
  173. if nf_internal in flags then
  174. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  175. else
  176. internalerror(2006111510);
  177. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.resultdef,resultdef,left.location.reference,location.register);
  178. end;
  179. {*****************************************************************************
  180. TCGDEREFNODE
  181. *****************************************************************************}
  182. procedure tcgderefnode.pass_generate_code;
  183. var
  184. paraloc1 : tcgpara;
  185. pd : tprocdef;
  186. sym : tsym;
  187. st : tsymtable;
  188. hp : pnode;
  189. hp2 : tnode;
  190. extraoffset : tcgint;
  191. begin
  192. sym:=nil;
  193. { assume natural alignment, except for packed records }
  194. if not(resultdef.typ in [recorddef,objectdef]) or
  195. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  196. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment)
  197. else
  198. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
  199. { can we fold an add/sub node into the offset of the deref node? }
  200. extraoffset:=0;
  201. hp:=actualtargetnode(@left);
  202. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  203. begin
  204. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  205. replacenode(hp^,taddnode(hp^).left);
  206. end
  207. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  208. begin
  209. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  210. replacenode(hp^,taddnode(hp^).left);
  211. end
  212. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  213. begin
  214. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  215. replacenode(hp^,taddnode(hp^).right);
  216. end;
  217. secondpass(left);
  218. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  219. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  220. case left.location.loc of
  221. LOC_CREGISTER,
  222. LOC_REGISTER:
  223. begin
  224. hlcg.maybe_change_load_node_reg(current_asmdata.CurrAsmList,left,true);
  225. {$ifdef cpu_uses_separate_address_registers}
  226. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  227. begin
  228. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  229. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  230. location.reference.base);
  231. end
  232. else
  233. {$endif}
  234. location.reference.base := left.location.register;
  235. end;
  236. LOC_CREFERENCE,
  237. LOC_REFERENCE:
  238. begin
  239. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  240. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  241. end;
  242. LOC_CONSTANT:
  243. begin
  244. location.reference.offset:=left.location.value;
  245. end;
  246. else
  247. internalerror(200507031);
  248. end;
  249. location.reference.offset:=location.reference.offset+extraoffset;
  250. if (cs_use_heaptrc in current_settings.globalswitches) and
  251. (cs_checkpointer in current_settings.localswitches) and
  252. not(cs_compilesystem in current_settings.moduleswitches) and
  253. {$ifdef x86}
  254. (tcpupointerdef(left.resultdef).x86pointertyp = tcpupointerdefclass(cpointerdef).default_x86_data_pointer_type) and
  255. {$endif x86}
  256. not(nf_no_checkpointer in flags) and
  257. { can be NR_NO in case of LOC_CONSTANT }
  258. (location.reference.base<>NR_NO) then
  259. begin
  260. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  261. (sym.typ<>procsym) then
  262. internalerror(2012010601);
  263. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  264. paraloc1.init;
  265. paramanager.getintparaloc(pd,1,paraloc1);
  266. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  267. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  268. paraloc1.done;
  269. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  270. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',nil,false);
  271. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  272. end;
  273. end;
  274. {*****************************************************************************
  275. TCGSUBSCRIPTNODE
  276. *****************************************************************************}
  277. procedure tcgsubscriptnode.pass_generate_code;
  278. var
  279. asmsym: tasmsymbol;
  280. paraloc1 : tcgpara;
  281. tmpref: treference;
  282. sref: tsubsetreference;
  283. offsetcorrection : aint;
  284. pd : tprocdef;
  285. sym : tsym;
  286. st : tsymtable;
  287. begin
  288. sym:=nil;
  289. secondpass(left);
  290. if codegenerror then
  291. exit;
  292. paraloc1.init;
  293. { several object types must be dereferenced implicitly }
  294. if is_implicit_pointer_object_type(left.resultdef) then
  295. begin
  296. if (not is_managed_type(left.resultdef)) or
  297. (target_info.system in systems_garbage_collected_managed_types) then
  298. begin
  299. { the contents of a class are aligned to a sizeof(pointer) }
  300. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),voidpointertype.size);
  301. case left.location.loc of
  302. LOC_CREGISTER,
  303. LOC_REGISTER:
  304. begin
  305. {$ifdef cpu_uses_separate_address_registers}
  306. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  307. begin
  308. location.reference.base:=rg.getaddressregister(current_asmdata.CurrAsmList);
  309. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  310. left.location.register,location.reference.base);
  311. end
  312. else
  313. {$endif}
  314. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  315. end;
  316. LOC_CREFERENCE,
  317. LOC_REFERENCE,
  318. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  319. LOC_SUBSETREG,
  320. LOC_CSUBSETREG,
  321. LOC_SUBSETREF,
  322. LOC_CSUBSETREF:
  323. begin
  324. hlcg.reference_reset_base(location.reference,left.resultdef,
  325. hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  326. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  327. end;
  328. LOC_CONSTANT:
  329. begin
  330. { can happen with @classtype(pointerconst).field }
  331. location.reference.offset:=left.location.value;
  332. end;
  333. else
  334. internalerror(2009092401);
  335. end;
  336. { implicit deferencing }
  337. if (cs_use_heaptrc in current_settings.globalswitches) and
  338. (cs_checkpointer in current_settings.localswitches) and
  339. not(cs_compilesystem in current_settings.moduleswitches) then
  340. begin
  341. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  342. (sym.typ<>procsym) then
  343. internalerror(2012010602);
  344. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  345. paramanager.getintparaloc(pd,1,paraloc1);
  346. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  347. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  348. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  349. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',nil,false);
  350. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  351. end;
  352. end
  353. else
  354. { reference-counted implicit pointer object types don't have
  355. fields -> cannot be subscripted (calls are handled via call
  356. nodes) }
  357. internalerror(2011011901);
  358. end
  359. else
  360. begin
  361. location_copy(location,left.location);
  362. { some abi's require that functions return (some) records in }
  363. { registers }
  364. case location.loc of
  365. LOC_REFERENCE,
  366. LOC_CREFERENCE:
  367. ;
  368. LOC_CONSTANT,
  369. LOC_REGISTER,
  370. LOC_CREGISTER,
  371. { if a floating point value is casted into a record, it
  372. can happen that we get here an fpu or mm register }
  373. LOC_MMREGISTER,
  374. LOC_FPUREGISTER,
  375. LOC_CMMREGISTER,
  376. LOC_CFPUREGISTER:
  377. begin
  378. { in case the result is not something that can be put
  379. into an integer register (e.g.
  380. function_returning_record().non_regable_field, or
  381. a function returning a value > sizeof(intreg))
  382. -> force to memory
  383. }
  384. if not tstoreddef(left.resultdef).is_intregable or
  385. not tstoreddef(resultdef).is_intregable or
  386. { if the field spans multiple registers, we must force the record into
  387. memory as well }
  388. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  389. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  390. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER,LOC_CMMREGISTER,LOC_CFPUREGISTER,
  391. { actually, we should be able to "subscript" a constant, but this would require some code
  392. which enables dumping and reading constants from a temporary memory buffer. This
  393. must be done a CPU dependent way, so it is not easy and probably not worth the effort (FK)
  394. }
  395. LOC_CONSTANT]) then
  396. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  397. else
  398. begin
  399. if (left.location.loc = LOC_REGISTER) then
  400. location.loc := LOC_SUBSETREG
  401. else
  402. location.loc := LOC_CSUBSETREG;
  403. location.size:=def_cgsize(resultdef);
  404. offsetcorrection:=0;
  405. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  406. begin
  407. if (vs.fieldoffset>=sizeof(aword)) xor (target_info.endian=endian_big) then
  408. location.sreg.subsetreg := left.location.registerhi
  409. else
  410. location.sreg.subsetreg := left.location.register;
  411. if (vs.fieldoffset>=sizeof(aword)) then
  412. offsetcorrection:=sizeof(aword)*8;
  413. location.sreg.subsetregsize := OS_INT;
  414. end
  415. else
  416. begin
  417. location.sreg.subsetreg := left.location.register;
  418. location.sreg.subsetregsize := left.location.size;
  419. end;
  420. if not is_packed_record_or_object(left.resultdef) then
  421. begin
  422. if (target_info.endian = ENDIAN_BIG) then
  423. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  424. else
  425. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  426. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  427. end
  428. else
  429. begin
  430. location.sreg.bitlen := resultdef.packedbitsize;
  431. if (target_info.endian = ENDIAN_BIG) then
  432. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  433. else
  434. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  435. end;
  436. end;
  437. end;
  438. LOC_SUBSETREG,
  439. LOC_CSUBSETREG:
  440. begin
  441. location.size:=def_cgsize(resultdef);
  442. if not is_packed_record_or_object(left.resultdef) then
  443. begin
  444. if (target_info.endian = ENDIAN_BIG) then
  445. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  446. else
  447. inc(location.sreg.startbit, vs.fieldoffset * 8);
  448. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  449. end
  450. else
  451. begin
  452. location.sreg.bitlen := resultdef.packedbitsize;
  453. if (target_info.endian = ENDIAN_BIG) then
  454. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  455. else
  456. inc(location.sreg.startbit, vs.fieldoffset);
  457. end;
  458. end;
  459. else
  460. internalerror(2006031901);
  461. end;
  462. end;
  463. if is_objc_class_or_protocol(left.resultdef) and
  464. (target_info.system in systems_objc_nfabi) then
  465. begin
  466. if (location.loc<>LOC_REFERENCE) or
  467. (location.reference.index<>NR_NO) then
  468. internalerror(2009092402);
  469. { the actual field offset is stored in memory (to solve the
  470. "fragile base class" problem: this way the layout of base
  471. classes can be changed without breaking programs compiled against
  472. earlier versions)
  473. }
  474. asmsym:=current_asmdata.RefAsmSymbol(vs.mangledname);
  475. reference_reset_symbol(tmpref,asmsym,0,sizeof(pint));
  476. location.reference.index:=cg.getaddressregister(current_asmdata.CurrAsmList);
  477. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,tmpref,location.reference.index);
  478. { always packrecords C -> natural alignment }
  479. location.reference.alignment:=vs.vardef.alignment;
  480. end
  481. else if is_java_class_or_interface(left.resultdef) or
  482. ((target_info.system in systems_jvm) and
  483. (left.resultdef.typ=recorddef)) then
  484. begin
  485. if (location.loc<>LOC_REFERENCE) or
  486. (location.reference.index<>NR_NO) or
  487. assigned(location.reference.symbol) then
  488. internalerror(2011011301);
  489. location.reference.symbol:=current_asmdata.RefAsmSymbol(vs.mangledname);
  490. end
  491. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  492. begin
  493. if not is_packed_record_or_object(left.resultdef) then
  494. begin
  495. inc(location.reference.offset,vs.fieldoffset);
  496. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  497. end
  498. else if (vs.fieldoffset mod 8 = 0) and
  499. (resultdef.packedbitsize mod 8 = 0) and
  500. { is different in case of e.g. packenum 2 and an enum }
  501. { which fits in 8 bits }
  502. (resultdef.size*8 = resultdef.packedbitsize) then
  503. begin
  504. inc(location.reference.offset,vs.fieldoffset div 8);
  505. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  506. end
  507. else
  508. begin
  509. sref.ref:=location.reference;
  510. sref.ref.alignment:=1;
  511. sref.bitindexreg:=NR_NO;
  512. inc(sref.ref.offset,vs.fieldoffset div 8);
  513. sref.startbit:=vs.fieldoffset mod 8;
  514. sref.bitlen:=resultdef.packedbitsize;
  515. if (left.location.loc=LOC_REFERENCE) then
  516. location.loc:=LOC_SUBSETREF
  517. else
  518. location.loc:=LOC_CSUBSETREF;
  519. location.sref:=sref;
  520. end;
  521. { also update the size of the location }
  522. location.size:=def_cgsize(resultdef);
  523. end;
  524. paraloc1.done;
  525. end;
  526. {*****************************************************************************
  527. TCGWITHNODE
  528. *****************************************************************************}
  529. procedure tcgwithnode.pass_generate_code;
  530. begin
  531. location_reset(location,LOC_VOID,OS_NO);
  532. if assigned(left) then
  533. secondpass(left);
  534. end;
  535. {*****************************************************************************
  536. TCGVECNODE
  537. *****************************************************************************}
  538. function tcgvecnode.get_mul_size : aint;
  539. begin
  540. if nf_memindex in flags then
  541. get_mul_size:=1
  542. else
  543. begin
  544. if (left.resultdef.typ=arraydef) then
  545. if not is_packed_array(left.resultdef) then
  546. get_mul_size:=tarraydef(left.resultdef).elesize
  547. else
  548. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  549. else
  550. get_mul_size:=resultdef.size;
  551. end
  552. end;
  553. { this routine must, like any other routine, not change the contents }
  554. { of base/index registers of references, as these may be regvars. }
  555. { The register allocator can coalesce one LOC_REGISTER being moved }
  556. { into another (as their live ranges won't overlap), but not a }
  557. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  558. { the live range of the LOC_CREGISTER will most likely overlap the }
  559. { the live range of the target LOC_(C)REGISTER) }
  560. { The passed register may be a LOC_CREGISTER as well. }
  561. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg:tregister;l:aint);
  562. var
  563. hreg: tregister;
  564. begin
  565. if l<>1 then
  566. begin
  567. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  568. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  569. maybe_const_reg:=hreg;
  570. end;
  571. if location.reference.base=NR_NO then
  572. location.reference.base:=maybe_const_reg
  573. else if location.reference.index=NR_NO then
  574. location.reference.index:=maybe_const_reg
  575. else
  576. begin
  577. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  578. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  579. reference_reset_base(location.reference,hreg,0,location.reference.alignment);
  580. { insert new index register }
  581. location.reference.index:=maybe_const_reg;
  582. end;
  583. { update alignment }
  584. if (location.reference.alignment=0) then
  585. internalerror(2009020704);
  586. location.reference.alignment:=newalignment(location.reference.alignment,l);
  587. end;
  588. { see remarks for tcgvecnode.update_reference_reg_mul above }
  589. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg:tregister;l:aint);
  590. var
  591. sref: tsubsetreference;
  592. offsetreg, hreg: tregister;
  593. alignpower: aint;
  594. temp : longint;
  595. begin
  596. { only orddefs are bitpacked. Even then we only need special code in }
  597. { case the bitpacked *byte size* is not a power of two, otherwise }
  598. { everything can be handled using the the regular array code. }
  599. if ((l mod 8) = 0) and
  600. (ispowerof2(l div 8,temp) or
  601. not is_ordinal(resultdef)
  602. {$ifndef cpu64bitalu}
  603. or is_64bitint(resultdef)
  604. {$endif not cpu64bitalu}
  605. ) then
  606. begin
  607. update_reference_reg_mul(maybe_const_reg,l div 8);
  608. exit;
  609. end;
  610. if (l > 8*sizeof(aint)) then
  611. internalerror(200608051);
  612. sref.ref := location.reference;
  613. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  614. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_INT,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  615. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_INT,l,hreg);
  616. { keep alignment for index }
  617. sref.ref.alignment := left.resultdef.alignment;
  618. if not ispowerof2(sref.ref.alignment,temp) then
  619. internalerror(2006081201);
  620. alignpower:=temp;
  621. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  622. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  623. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  624. if (sref.ref.base = NR_NO) then
  625. sref.ref.base := offsetreg
  626. else if (sref.ref.index = NR_NO) then
  627. sref.ref.index := offsetreg
  628. else
  629. begin
  630. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  631. sref.ref.base := offsetreg;
  632. end;
  633. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,hreg);
  634. sref.bitindexreg := hreg;
  635. sref.startbit := 0;
  636. sref.bitlen := resultdef.packedbitsize;
  637. if (left.location.loc = LOC_REFERENCE) then
  638. location.loc := LOC_SUBSETREF
  639. else
  640. location.loc := LOC_CSUBSETREF;
  641. location.sref := sref;
  642. end;
  643. procedure tcgvecnode.second_wideansistring;
  644. begin
  645. end;
  646. procedure tcgvecnode.second_dynamicarray;
  647. begin
  648. end;
  649. procedure tcgvecnode.rangecheck_array;
  650. var
  651. hightree : tnode;
  652. poslabel,
  653. neglabel : tasmlabel;
  654. hreg : tregister;
  655. paraloc1,paraloc2 : tcgpara;
  656. pd : tprocdef;
  657. begin
  658. { omit range checking when this is an array access to a pointer which has been
  659. typecasted from an array }
  660. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  661. exit;
  662. paraloc1.init;
  663. paraloc2.init;
  664. if is_open_array(left.resultdef) or
  665. is_array_of_const(left.resultdef) then
  666. begin
  667. { cdecl functions don't have high() so we can not check the range }
  668. { (can't use current_procdef, since it may be a nested procedure) }
  669. if not(tprocdef(tparasymtable(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry).owner).defowner).proccalloption in cdecl_pocalls) then
  670. begin
  671. { Get high value }
  672. hightree:=load_high_value_node(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry));
  673. { it must be available }
  674. if not assigned(hightree) then
  675. internalerror(200212201);
  676. firstpass(hightree);
  677. secondpass(hightree);
  678. { generate compares }
  679. if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  680. hreg:=cg.makeregsize(current_asmdata.CurrAsmList,right.location.register,OS_INT)
  681. else
  682. begin
  683. hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  684. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,hreg);
  685. end;
  686. current_asmdata.getjumplabel(neglabel);
  687. current_asmdata.getjumplabel(poslabel);
  688. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_LT,0,hreg,poslabel);
  689. cg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_BE,hightree.location,hreg,neglabel);
  690. cg.a_label(current_asmdata.CurrAsmList,poslabel);
  691. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_RANGEERROR',false);
  692. cg.a_label(current_asmdata.CurrAsmList,neglabel);
  693. { release hightree }
  694. hightree.free;
  695. end;
  696. end
  697. else
  698. if is_dynamic_array(left.resultdef) then
  699. begin
  700. pd:=search_system_proc('fpc_dynarray_rangecheck');
  701. paramanager.getintparaloc(pd,1,paraloc1);
  702. paramanager.getintparaloc(pd,2,paraloc2);
  703. if pd.is_pushleftright then
  704. begin
  705. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  706. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  707. end
  708. else
  709. begin
  710. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  711. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  712. end;
  713. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  714. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  715. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  716. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_DYNARRAY_RANGECHECK',false);
  717. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  718. end;
  719. { for regular arrays, we don't have to do anything because the index has been
  720. type converted to the index type, which already inserted a range check if
  721. necessary }
  722. paraloc1.done;
  723. paraloc2.done;
  724. end;
  725. procedure tcgvecnode.rangecheck_string;
  726. var
  727. paraloc1,
  728. paraloc2: tcgpara;
  729. helpername: TIDString;
  730. pd: tprocdef;
  731. begin
  732. paraloc1.init;
  733. paraloc2.init;
  734. case tstringdef(left.resultdef).stringtype of
  735. { it's the same for ansi- and wide strings }
  736. st_unicodestring,
  737. st_widestring,
  738. st_ansistring:
  739. begin
  740. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  741. pd:=search_system_proc(helpername);
  742. paramanager.getintparaloc(pd,1,paraloc1);
  743. paramanager.getintparaloc(pd,2,paraloc2);
  744. if pd.is_pushleftright then
  745. begin
  746. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  747. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  748. end
  749. else
  750. begin
  751. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  752. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  753. end;
  754. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  755. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  756. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  757. cg.a_call_name(current_asmdata.CurrAsmList,helpername,false);
  758. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  759. end;
  760. st_shortstring:
  761. begin
  762. {!!!!!!!!!!!!!!!!!}
  763. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  764. end;
  765. st_longstring:
  766. begin
  767. {!!!!!!!!!!!!!!!!!}
  768. end;
  769. end;
  770. paraloc1.done;
  771. paraloc2.done;
  772. end;
  773. procedure tcgvecnode.pass_generate_code;
  774. var
  775. offsetdec,
  776. extraoffset : aint;
  777. rightp : pnode;
  778. otl,ofl : tasmlabel;
  779. newsize : tcgsize;
  780. mulsize,
  781. bytemulsize,
  782. alignpow : aint;
  783. isjump : boolean;
  784. paraloc1,
  785. paraloc2 : tcgpara;
  786. subsetref : tsubsetreference;
  787. temp : longint;
  788. begin
  789. paraloc1.init;
  790. paraloc2.init;
  791. mulsize:=get_mul_size;
  792. if not is_packed_array(left.resultdef) then
  793. bytemulsize:=mulsize
  794. else
  795. bytemulsize:=mulsize div 8;
  796. newsize:=def_cgsize(resultdef);
  797. secondpass(left);
  798. if left.location.loc=LOC_CREFERENCE then
  799. location_reset_ref(location,LOC_CREFERENCE,newsize,left.location.reference.alignment)
  800. else
  801. location_reset_ref(location,LOC_REFERENCE,newsize,left.location.reference.alignment);
  802. { an ansistring needs to be dereferenced }
  803. if is_ansistring(left.resultdef) or
  804. is_wide_or_unicode_string(left.resultdef) then
  805. begin
  806. if nf_callunique in flags then
  807. internalerror(200304236);
  808. {DM!!!!!}
  809. case left.location.loc of
  810. LOC_REGISTER,
  811. LOC_CREGISTER :
  812. begin
  813. {$ifdef m68k}
  814. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  815. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.reference.base);
  816. {$else m68k}
  817. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  818. {$endif m68k}
  819. end;
  820. LOC_CREFERENCE,
  821. LOC_REFERENCE :
  822. begin
  823. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  824. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location.reference,location.reference.base);
  825. end;
  826. LOC_CONSTANT:
  827. begin
  828. hlcg.reference_reset_base(location.reference,left.resultdef,NR_NO,left.location.value,location.reference.alignment);
  829. end;
  830. else
  831. internalerror(2002032218);
  832. end;
  833. if is_ansistring(left.resultdef) then
  834. offsetdec:=1
  835. else
  836. offsetdec:=2;
  837. location.reference.alignment:=offsetdec;
  838. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  839. if not(cs_zerobasedstrings in current_settings.localswitches) then
  840. dec(location.reference.offset,offsetdec);
  841. end
  842. else if is_dynamic_array(left.resultdef) then
  843. begin
  844. case left.location.loc of
  845. LOC_REGISTER,
  846. LOC_CREGISTER :
  847. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  848. LOC_REFERENCE,
  849. LOC_CREFERENCE :
  850. begin
  851. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  852. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  853. left.location.reference,location.reference.base);
  854. end;
  855. else
  856. internalerror(2002032219);
  857. end;
  858. { a dynarray points to the start of a memory block, which
  859. we assume to be always aligned to a multiple of the
  860. pointer size
  861. }
  862. location.reference.alignment:=voidpointertype.size;
  863. end
  864. else
  865. begin
  866. { may happen in case of function results }
  867. case left.location.loc of
  868. LOC_CREGISTER,
  869. LOC_CMMREGISTER,
  870. LOC_REGISTER,
  871. LOC_MMREGISTER:
  872. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  873. end;
  874. location_copy(location,left.location);
  875. end;
  876. { location must be memory }
  877. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  878. internalerror(200411013);
  879. { offset can only differ from 0 if arraydef }
  880. if (left.resultdef.typ=arraydef) and
  881. not(is_dynamic_array(left.resultdef)) and
  882. (not(is_packed_array(left.resultdef)) or
  883. ((mulsize mod 8 = 0) and
  884. ispowerof2(mulsize div 8,temp)) or
  885. { only orddefs are bitpacked }
  886. not is_ordinal(resultdef)
  887. {$ifndef cpu64bitalu}
  888. or is_64bitint(resultdef)
  889. {$endif not cpu64bitalu}
  890. ) then
  891. dec(location.reference.offset,bytemulsize*tarraydef(left.resultdef).lowrange);
  892. if right.nodetype=ordconstn then
  893. begin
  894. { offset can only differ from 0 if arraydef }
  895. if cs_check_range in current_settings.localswitches then
  896. begin
  897. secondpass(right);
  898. case left.resultdef.typ of
  899. arraydef :
  900. rangecheck_array;
  901. stringdef :
  902. rangecheck_string;
  903. end;
  904. end;
  905. if not(is_packed_array(left.resultdef)) or
  906. ((mulsize mod 8 = 0) and
  907. (ispowerof2(mulsize div 8,temp) or
  908. { only orddefs are bitpacked }
  909. not is_ordinal(resultdef))) then
  910. begin
  911. extraoffset:=bytemulsize*tordconstnode(right).value.svalue;
  912. inc(location.reference.offset,extraoffset);
  913. { adjust alignment after to this change }
  914. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset);
  915. { don't do this for floats etc.; needed to properly set the }
  916. { size for bitpacked arrays (e.g. a bitpacked array of }
  917. { enums who are size 2 but fit in one byte -> in the array }
  918. { they will be one byte and have to be stored like that) }
  919. if is_packed_array(left.resultdef) and
  920. (tcgsize2size[newsize] <> bytemulsize) then
  921. newsize:=int_cgsize(bytemulsize);
  922. end
  923. else
  924. begin
  925. subsetref.ref := location.reference;
  926. subsetref.ref.alignment := left.resultdef.alignment;
  927. if not ispowerof2(subsetref.ref.alignment,temp) then
  928. internalerror(2006081212);
  929. alignpow:=temp;
  930. inc(subsetref.ref.offset,((mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow)) shl alignpow);
  931. subsetref.bitindexreg := NR_NO;
  932. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  933. subsetref.bitlen := resultdef.packedbitsize;
  934. if (left.location.loc = LOC_REFERENCE) then
  935. location.loc := LOC_SUBSETREF
  936. else
  937. location.loc := LOC_CSUBSETREF;
  938. location.sref := subsetref;
  939. end;
  940. end
  941. else
  942. { not nodetype=ordconstn }
  943. begin
  944. if (cs_opt_level1 in current_settings.optimizerswitches) and
  945. { if we do range checking, we don't }
  946. { need that fancy code (it would be }
  947. { buggy) }
  948. not(cs_check_range in current_settings.localswitches) and
  949. (left.resultdef.typ=arraydef) and
  950. not is_packed_array(left.resultdef) then
  951. begin
  952. extraoffset:=0;
  953. rightp:=actualtargetnode(@right);
  954. if rightp^.nodetype=addn then
  955. begin
  956. if taddnode(rightp^).right.nodetype=ordconstn then
  957. begin
  958. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  959. replacenode(rightp^,taddnode(rightp^).left);
  960. end
  961. else if taddnode(rightp^).left.nodetype=ordconstn then
  962. begin
  963. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  964. replacenode(rightp^,taddnode(rightp^).right);
  965. end;
  966. end
  967. else if rightp^.nodetype=subn then
  968. begin
  969. if taddnode(rightp^).right.nodetype=ordconstn then
  970. begin
  971. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  972. replacenode(rightp^,taddnode(rightp^).left);
  973. end;
  974. end;
  975. inc(location.reference.offset,
  976. mulsize*extraoffset);
  977. end;
  978. { calculate from left to right }
  979. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  980. internalerror(200304237);
  981. isjump:=(right.expectloc=LOC_JUMP);
  982. otl:=nil;
  983. ofl:=nil;
  984. if isjump then
  985. begin
  986. otl:=current_procinfo.CurrTrueLabel;
  987. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  988. ofl:=current_procinfo.CurrFalseLabel;
  989. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  990. end;
  991. secondpass(right);
  992. { if mulsize = 1, we won't have to modify the index }
  993. if not(right.location.loc in [LOC_CREGISTER,LOC_REGISTER]) or (right.location.size<>OS_ADDR) then
  994. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,ptruinttype,true);
  995. if isjump then
  996. begin
  997. current_procinfo.CurrTrueLabel:=otl;
  998. current_procinfo.CurrFalseLabel:=ofl;
  999. end
  1000. else if (right.location.loc = LOC_JUMP) then
  1001. internalerror(2006010801);
  1002. { produce possible range check code: }
  1003. if cs_check_range in current_settings.localswitches then
  1004. begin
  1005. if left.resultdef.typ=arraydef then
  1006. rangecheck_array
  1007. else if (left.resultdef.typ=stringdef) then
  1008. rangecheck_string;
  1009. end;
  1010. { insert the register and the multiplication factor in the
  1011. reference }
  1012. if not is_packed_array(left.resultdef) then
  1013. update_reference_reg_mul(right.location.register,mulsize)
  1014. else
  1015. update_reference_reg_packed(right.location.register,mulsize);
  1016. end;
  1017. location.size:=newsize;
  1018. paraloc1.done;
  1019. paraloc2.done;
  1020. end;
  1021. begin
  1022. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1023. cloadparentfpnode:=tcgloadparentfpnode;
  1024. caddrnode:=tcgaddrnode;
  1025. cderefnode:=tcgderefnode;
  1026. csubscriptnode:=tcgsubscriptnode;
  1027. cwithnode:=tcgwithnode;
  1028. cvecnode:=tcgvecnode;
  1029. end.