cgbase.pas 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664
  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Florian Klaempfl
  4. Some basic types and constants for the code generation
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# This unit exports some types which are used across the code generator }
  19. unit cgbase;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. cpuinfo,
  24. symconst;
  25. type
  26. { Location types where value can be stored }
  27. TCGLoc=(
  28. LOC_INVALID, { added for tracking problems}
  29. LOC_VOID, { no value is available }
  30. LOC_CONSTANT, { constant value }
  31. LOC_JUMP, { boolean results only, jump to false or true label }
  32. LOC_FLAGS, { boolean results only, flags are set }
  33. LOC_CREFERENCE, { in memory constant value reference (cannot change) }
  34. LOC_REFERENCE, { in memory value }
  35. LOC_REGISTER, { in a processor register }
  36. LOC_CREGISTER, { Constant register which shouldn't be modified }
  37. LOC_FPUREGISTER, { FPU stack }
  38. LOC_CFPUREGISTER, { if it is a FPU register variable on the fpu stack }
  39. LOC_MMXREGISTER, { MMX register }
  40. { MMX register variable }
  41. LOC_CMMXREGISTER,
  42. { multimedia register }
  43. LOC_MMREGISTER,
  44. { Constant multimedia reg which shouldn't be modified }
  45. LOC_CMMREGISTER
  46. );
  47. {# Generic opcodes, which must be supported by all processors
  48. }
  49. topcg =
  50. (
  51. OP_NONE,
  52. OP_ADD, { simple addition }
  53. OP_AND, { simple logical and }
  54. OP_DIV, { simple unsigned division }
  55. OP_IDIV, { simple signed division }
  56. OP_IMUL, { simple signed multiply }
  57. OP_MUL, { simple unsigned multiply }
  58. OP_NEG, { simple negate }
  59. OP_NOT, { simple logical not }
  60. OP_OR, { simple logical or }
  61. OP_SAR, { arithmetic shift-right }
  62. OP_SHL, { logical shift left }
  63. OP_SHR, { logical shift right }
  64. OP_SUB, { simple subtraction }
  65. OP_XOR { simple exclusive or }
  66. );
  67. {# Generic flag values - used for jump locations }
  68. TOpCmp =
  69. (
  70. OC_NONE,
  71. OC_EQ, { equality comparison }
  72. OC_GT, { greater than (signed) }
  73. OC_LT, { less than (signed) }
  74. OC_GTE, { greater or equal than (signed) }
  75. OC_LTE, { less or equal than (signed) }
  76. OC_NE, { not equal }
  77. OC_BE, { less or equal than (unsigned) }
  78. OC_B, { less than (unsigned) }
  79. OC_AE, { greater or equal than (unsigned) }
  80. OC_A { greater than (unsigned) }
  81. );
  82. { OS_NO is also used memory references with large data that can
  83. not be loaded in a register directly }
  84. TCgSize = (OS_NO,
  85. { integer registers }
  86. OS_8,OS_16,OS_32,OS_64,OS_S8,OS_S16,OS_S32,OS_S64,
  87. { single,double,extended,comp,float128 }
  88. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  89. { multi-media sizes: split in byte, word, dword, ... }
  90. { entities, then the signed counterparts }
  91. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_MS8,OS_MS16,OS_MS32,
  92. OS_MS64,OS_MS128);
  93. { Register types }
  94. TRegisterType = (
  95. R_INVALIDREGISTER, { = 0 }
  96. R_INTREGISTER, { = 1 }
  97. R_FPUREGISTER, { = 2 }
  98. { used by Intel only }
  99. R_MMXREGISTER, { = 3 }
  100. R_MMREGISTER, { = 4 }
  101. R_SPECIALREGISTER, { = 5 }
  102. R_ADDRESSREGISTER { = 6 }
  103. );
  104. { Sub registers }
  105. TSubRegister = (
  106. R_SUBNONE, { = 0; no sub register possible }
  107. R_SUBL, { = 1; 8 bits, Like AL }
  108. R_SUBH, { = 2; 8 bits, Like AH }
  109. R_SUBW, { = 3; 16 bits, Like AX }
  110. R_SUBD, { = 4; 32 bits, Like EAX }
  111. R_SUBQ, { = 5; 64 bits, Like RAX }
  112. { For Sparc floats that use F0:F1 to store doubles }
  113. R_SUBFS, { = 6; Float that allocates 1 FPU register }
  114. R_SUBFD { = 7; Float that allocates 2 FPU registers }
  115. );
  116. TSuperRegister = type word;
  117. {
  118. The new register coding:
  119. SuperRegister (bits 0..15)
  120. Subregister (bits 16..23)
  121. Register type (bits 24..31)
  122. TRegister is defined as an enum to make it incompatible
  123. with TSuperRegister to avoid mixing them
  124. }
  125. TRegister = (
  126. TRegisterLowEnum := Low(longint),
  127. TRegisterHighEnum := High(longint)
  128. );
  129. TRegisterRec=packed record
  130. {$ifdef FPC_BIG_ENDIAN}
  131. regtype : Tregistertype;
  132. subreg : Tsubregister;
  133. supreg : Tsuperregister;
  134. {$else FPC_BIG_ENDIAN}
  135. supreg : Tsuperregister;
  136. subreg : Tsubregister;
  137. regtype : Tregistertype;
  138. {$endif FPC_BIG_ENDIAN}
  139. end;
  140. { A type to store register locations for 64 Bit values. }
  141. {$ifdef cpu64bit}
  142. tregister64 = tregister;
  143. {$else cpu64bit}
  144. tregister64 = packed record
  145. reglo,reghi : tregister;
  146. end;
  147. {$endif cpu64bit}
  148. Tregistermmxset = packed record
  149. reg0,reg1,reg2,reg3:Tregister
  150. end;
  151. { Set type definition for registers }
  152. tcpuregisterset = set of byte;
  153. tsuperregisterset = array[byte] of set of byte;
  154. { Temp types }
  155. ttemptype = (tt_none,
  156. tt_free,tt_normal,tt_persistent,
  157. tt_noreuse,tt_freenoreuse);
  158. pmmshuffle = ^tmmshuffle;
  159. { this record describes shuffle operations for mm operations; if a pointer a shuffle record
  160. passed to an mm operation is nil, it means that the whole location is moved }
  161. tmmshuffle = record
  162. { describes how many shuffles are actually described, if len=0 then
  163. moving the scalar with index 0 to the scalar with index 0 is meant }
  164. len : byte;
  165. { lower nibble of each entry of this array describes index of the source data index while
  166. the upper nibble describes the destination index }
  167. shuffles : array[1..1] of byte;
  168. end;
  169. Tsuperregisterarray=array[0..$ff] of Tsuperregister;
  170. Psuperregisterarray=^Tsuperregisterarray;
  171. Tsuperregisterworklist=object
  172. buflength,
  173. buflengthinc,
  174. length:word;
  175. buf:Psuperregisterarray;
  176. constructor init;
  177. constructor copyfrom(const x:Tsuperregisterworklist);
  178. destructor done;
  179. procedure clear;
  180. procedure add(s:tsuperregister);
  181. function get:tsuperregister;
  182. procedure deleteidx(i:word);
  183. function delete(s:tsuperregister):boolean;
  184. end;
  185. psuperregisterworklist=^tsuperregisterworklist;
  186. const
  187. { alias for easier understanding }
  188. R_SSEREGISTER = R_MMREGISTER;
  189. { Invalid register number }
  190. RS_INVALID = high(tsuperregister);
  191. { Maximum number of cpu registers per register type,
  192. this must fit in tcpuregisterset }
  193. maxcpuregister = 32;
  194. tcgsize2size : Array[tcgsize] of integer =
  195. { integer values }
  196. (0,1,2,4,8,1,2,4,8,
  197. { floating point values }
  198. 4,8,EXTENDED_SIZE,8,16,
  199. { multimedia values }
  200. 1,2,4,8,16,1,2,4,8,16);
  201. tfloat2tcgsize: array[tfloattype] of tcgsize =
  202. (OS_F32,OS_F64,OS_F80,OS_C64,OS_C64,OS_F128);
  203. tcgsize2tfloat: array[OS_F32..OS_C64] of tfloattype =
  204. (s32real,s64real,s80real,s64comp);
  205. { Table to convert tcgsize variables to the correspondending
  206. unsigned types }
  207. tcgsize2unsigned : array[tcgsize] of tcgsize = (OS_NO,
  208. OS_8,OS_16,OS_32,OS_64,OS_8,OS_16,OS_32,OS_64,
  209. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  210. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M8,OS_M16,OS_M32,
  211. OS_M64,OS_M128);
  212. tcgloc2str : array[TCGLoc] of string[11] = (
  213. 'LOC_INVALID',
  214. 'LOC_VOID',
  215. 'LOC_CONST',
  216. 'LOC_JUMP',
  217. 'LOC_FLAGS',
  218. 'LOC_CREF',
  219. 'LOC_REF',
  220. 'LOC_REG',
  221. 'LOC_CREG',
  222. 'LOC_FPUREG',
  223. 'LOC_CFPUREG',
  224. 'LOC_MMXREG',
  225. 'LOC_CMMXREG',
  226. 'LOC_MMREG',
  227. 'LOC_CMMREG');
  228. var
  229. mms_movescalar : pmmshuffle;
  230. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean);{$ifdef USEINLINE}inline;{$endif}
  231. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  232. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  233. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  234. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  235. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  236. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  237. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  238. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  239. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  240. function generic_regname(r:tregister):string;
  241. {# From a constant numeric value, return the abstract code generator
  242. size.
  243. }
  244. function int_cgsize(const a: aword): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  245. { return the inverse condition of opcmp }
  246. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  247. { return whether op is commutative }
  248. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  249. { returns true, if shuffle describes a real shuffle operation and not only a move }
  250. function realshuffle(shuffle : pmmshuffle) : boolean;
  251. { returns true, if the shuffle describes only a move of the scalar at index 0 }
  252. function shufflescalar(shuffle : pmmshuffle) : boolean;
  253. { removes shuffling from shuffle, this means that the destenation index of each shuffle is copied to
  254. the source }
  255. procedure removeshuffles(var shuffle : tmmshuffle);
  256. implementation
  257. uses
  258. verbose;
  259. {******************************************************************************
  260. tsuperregisterworklist
  261. ******************************************************************************}
  262. constructor tsuperregisterworklist.init;
  263. begin
  264. length:=0;
  265. buflength:=0;
  266. buflengthinc:=16;
  267. buf:=nil;
  268. end;
  269. constructor Tsuperregisterworklist.copyfrom(const x:Tsuperregisterworklist);
  270. begin
  271. self:=x;
  272. if x.buf<>nil then
  273. begin
  274. getmem(buf,buflength*sizeof(Tsuperregister));
  275. move(x.buf^,buf^,length*sizeof(Tsuperregister));
  276. end;
  277. end;
  278. destructor tsuperregisterworklist.done;
  279. begin
  280. if assigned(buf) then
  281. freemem(buf);
  282. end;
  283. procedure tsuperregisterworklist.add(s:tsuperregister);
  284. begin
  285. inc(length);
  286. { Need to increase buffer length? }
  287. if length>=buflength then
  288. begin
  289. inc(buflength,buflengthinc);
  290. buflengthinc:=buflengthinc*2;
  291. if buflengthinc>256 then
  292. buflengthinc:=256;
  293. reallocmem(buf,buflength*sizeof(Tsuperregister));
  294. end;
  295. buf^[length-1]:=s;
  296. end;
  297. procedure tsuperregisterworklist.clear;
  298. begin
  299. length:=0;
  300. end;
  301. procedure tsuperregisterworklist.deleteidx(i:word);
  302. begin
  303. if length=0 then
  304. internalerror(200310144);
  305. buf^[i]:=buf^[length-1];
  306. dec(length);
  307. end;
  308. function tsuperregisterworklist.get:tsuperregister;
  309. begin
  310. if length=0 then
  311. internalerror(200310142);
  312. get:=buf^[0];
  313. buf^[0]:=buf^[length-1];
  314. dec(length);
  315. end;
  316. function tsuperregisterworklist.delete(s:tsuperregister):boolean;
  317. var i:word;
  318. begin
  319. delete:=false;
  320. for i:=1 to length do
  321. if buf^[i-1]=s then
  322. begin
  323. deleteidx(i-1);
  324. delete:=true;
  325. break;
  326. end;
  327. end;
  328. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean);{$ifdef USEINLINE}inline;{$endif}
  329. var
  330. b : byte;
  331. begin
  332. if setall then
  333. b:=$ff
  334. else
  335. b:=0;
  336. fillchar(regs,sizeof(regs),b);
  337. end;
  338. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  339. begin
  340. include(regs[s shr 8],(s and $ff));
  341. end;
  342. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  343. begin
  344. exclude(regs[s shr 8],(s and $ff));
  345. end;
  346. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  347. begin
  348. result:=(s and $ff) in regs[s shr 8];
  349. end;
  350. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  351. begin
  352. tregisterrec(result).regtype:=rt;
  353. tregisterrec(result).supreg:=sr;
  354. tregisterrec(result).subreg:=sb;
  355. end;
  356. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  357. begin
  358. result:=tregisterrec(r).subreg;
  359. end;
  360. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  361. begin
  362. result:=tregisterrec(r).supreg;
  363. end;
  364. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  365. begin
  366. result:=tregisterrec(r).regtype;
  367. end;
  368. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  369. begin
  370. tregisterrec(r).subreg:=sr;
  371. end;
  372. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  373. begin
  374. tregisterrec(r).supreg:=sr;
  375. end;
  376. function generic_regname(r:tregister):string;
  377. var
  378. nr : string[12];
  379. begin
  380. str(getsupreg(r),nr);
  381. case getregtype(r) of
  382. R_INTREGISTER:
  383. result:='ireg'+nr;
  384. R_FPUREGISTER:
  385. result:='freg'+nr;
  386. R_MMREGISTER:
  387. result:='mreg'+nr;
  388. R_MMXREGISTER:
  389. result:='xreg'+nr;
  390. else
  391. begin
  392. result:='INVALID';
  393. exit;
  394. end;
  395. end;
  396. case getsubreg(r) of
  397. R_SUBNONE:
  398. ;
  399. R_SUBL:
  400. result:=result+'l';
  401. R_SUBH:
  402. result:=result+'h';
  403. R_SUBW:
  404. result:=result+'w';
  405. R_SUBD:
  406. result:=result+'d';
  407. R_SUBQ:
  408. result:=result+'q';
  409. R_SUBFS:
  410. result:=result+'fs';
  411. R_SUBFD:
  412. result:=result+'fd';
  413. else
  414. internalerror(200308252);
  415. end;
  416. end;
  417. function int_cgsize(const a: aword): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  418. const
  419. size2cgsize : array[0..8] of tcgsize = (
  420. OS_NO,OS_8,OS_16,OS_32,OS_32,OS_64,OS_64,OS_64,OS_64
  421. );
  422. begin
  423. if a>8 then
  424. result:=OS_NO
  425. else
  426. result:=size2cgsize[a];
  427. end;
  428. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  429. const
  430. list: array[TOpCmp] of TOpCmp =
  431. (OC_NONE,OC_NE,OC_LTE,OC_GTE,OC_LT,OC_GT,OC_EQ,OC_A,OC_AE,
  432. OC_B,OC_BE);
  433. begin
  434. inverse_opcmp := list[opcmp];
  435. end;
  436. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  437. const
  438. list: array[topcg] of boolean =
  439. (true,true,true,false,false,true,true,false,false,
  440. true,false,false,false,false,true);
  441. begin
  442. commutativeop := list[op];
  443. end;
  444. function realshuffle(shuffle : pmmshuffle) : boolean;
  445. var
  446. i : longint;
  447. begin
  448. realshuffle:=true;
  449. if (shuffle=nil) or (shuffle^.len=0) then
  450. realshuffle:=false
  451. else
  452. begin
  453. for i:=1 to shuffle^.len do
  454. begin
  455. if (shuffle^.shuffles[i] and $f)<>((shuffle^.shuffles[i] and $f0) shr 8) then
  456. exit;
  457. end;
  458. realshuffle:=false;
  459. end;
  460. end;
  461. function shufflescalar(shuffle : pmmshuffle) : boolean;
  462. begin
  463. result:=shuffle^.len=0;
  464. end;
  465. procedure removeshuffles(var shuffle : tmmshuffle);
  466. var
  467. i : longint;
  468. begin
  469. if shuffle.len=0 then
  470. exit;
  471. for i:=1 to shuffle.len do
  472. shuffle.shuffles[i]:=(shuffle.shuffles[i] and $f0) or ((shuffle.shuffles[i] and $f0) shr 8);
  473. end;
  474. initialization
  475. new(mms_movescalar);
  476. mms_movescalar^.len:=0;
  477. finalization
  478. dispose(mms_movescalar);
  479. end.
  480. {
  481. $Log$
  482. Revision 1.85 2004-01-12 16:35:05 peter
  483. * R_SUB_FS added to make a difference between double and single
  484. floats, required for sparc only
  485. Revision 1.84 2004/01/09 22:02:29 daniel
  486. * Degree=0 problem fixed
  487. * Degree to high problem fixed
  488. Revision 1.83 2003/12/25 01:07:09 florian
  489. + $fputype directive support
  490. + single data type operations with sse unit
  491. * fixed more x86-64 stuff
  492. Revision 1.82 2003/12/22 23:10:21 peter
  493. * use low(longint) instead of $8000000
  494. Revision 1.81 2003/12/21 19:42:42 florian
  495. * fixed ppc inlining stuff
  496. * fixed wrong unit writing
  497. + added some sse stuff
  498. Revision 1.80 2003/12/19 22:08:44 daniel
  499. * Some work to restore the MMX capabilities
  500. Revision 1.79 2003/12/15 21:25:48 peter
  501. * reg allocations for imaginary register are now inserted just
  502. before reg allocation
  503. * tregister changed to enum to allow compile time check
  504. * fixed several tregister-tsuperregister errors
  505. Revision 1.78 2003/12/14 20:24:28 daniel
  506. * Register allocator speed optimizations
  507. - Worklist no longer a ringbuffer
  508. - No find operations are left
  509. - Simplify now done in constant time
  510. - unusedregs is now a Tsuperregisterworklist
  511. - Microoptimizations
  512. Revision 1.77 2003/11/04 15:35:13 peter
  513. * fix for referencecounted temps
  514. Revision 1.76 2003/11/03 17:48:04 peter
  515. * int_cgsize returned garbage for a=0
  516. Revision 1.75 2003/10/31 15:51:11 peter
  517. * USEINLINE directive added (not enabled yet)
  518. Revision 1.74 2003/10/30 14:56:40 mazen
  519. + add support for double float register vars
  520. Revision 1.73 2003/10/29 15:07:01 mazen
  521. * 32 registers are available
  522. Revision 1.72 2003/10/24 15:21:31 peter
  523. * renamed R_SUBF64 to R_SUBFD
  524. Revision 1.71 2003/10/17 14:38:32 peter
  525. * 64k registers supported
  526. * fixed some memory leaks
  527. Revision 1.70 2003/10/13 01:10:01 florian
  528. * some ideas for mm support implemented
  529. Revision 1.69 2003/10/11 16:06:42 florian
  530. * fixed some MMX<->SSE
  531. * started to fix ppc, needs an overhaul
  532. + stabs info improve for spilling, not sure if it works correctly/completly
  533. - MMX_SUPPORT removed from Makefile.fpc
  534. Revision 1.68 2003/10/09 21:31:37 daniel
  535. * Register allocator splitted, ans abstract now
  536. Revision 1.67 2003/10/01 20:34:48 peter
  537. * procinfo unit contains tprocinfo
  538. * cginfo renamed to cgbase
  539. * moved cgmessage to verbose
  540. * fixed ppc and sparc compiles
  541. }