cpuinfo.pas 4.0 KB

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  1. {
  2. Copyright (c) 1998-2000 by Florian Klaempfl
  3. Basic Processor information
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. Unit cpuinfo;
  18. {$i fpcdefs.inc}
  19. Interface
  20. uses
  21. globtype;
  22. Type
  23. bestreal = extended;
  24. ts32real = single;
  25. ts64real = double;
  26. ts80real = extended;
  27. ts128real = type extended;
  28. ts64comp = type extended;
  29. pbestreal=^bestreal;
  30. tcputype =
  31. (cpu_none,
  32. cpu_athlon64,
  33. cpu_core_i,
  34. cpu_core_avx,
  35. cpu_core_avx2
  36. );
  37. tfputype =
  38. (fpu_none,
  39. // fpu_soft, { generic }
  40. fpu_sse64,
  41. fpu_sse3,
  42. fpu_ssse3,
  43. fpu_sse41,
  44. fpu_sse42,
  45. fpu_avx,
  46. fpu_avx2
  47. );
  48. Const
  49. { Size of native extended type }
  50. extended_size = 10;
  51. { Size of a multimedia register }
  52. mmreg_size = 16;
  53. { target cpu string (used by compiler options) }
  54. target_cpu_string = 'x86_64';
  55. { calling conventions supported by the code generator }
  56. supported_calling_conventions : tproccalloptions = [
  57. pocall_internproc,
  58. { pocall_compilerproc,
  59. pocall_inline,}
  60. pocall_register,
  61. pocall_safecall,
  62. pocall_stdcall,
  63. pocall_cdecl,
  64. pocall_cppdecl,
  65. pocall_mwpascal
  66. ];
  67. cputypestr : array[tcputype] of string[10] = ('',
  68. 'ATHLON64',
  69. 'COREI',
  70. 'COREAVX',
  71. 'COREAVX2'
  72. );
  73. fputypestr : array[tfputype] of string[6] = ('',
  74. // 'SOFT',
  75. 'SSE64',
  76. 'SSE3',
  77. 'SSSE3',
  78. 'SSE41',
  79. 'SSE42',
  80. 'AVX',
  81. 'AVX2'
  82. );
  83. sse_singlescalar = [fpu_sse64..fpu_avx2];
  84. sse_doublescalar = [fpu_sse64..fpu_avx2];
  85. fpu_avx_instructionsets = [fpu_avx,fpu_avx2];
  86. { Supported optimizations, only used for information }
  87. supported_optimizerswitches = genericlevel1optimizerswitches+
  88. genericlevel2optimizerswitches+
  89. genericlevel3optimizerswitches-
  90. { no need to write info about those }
  91. [cs_opt_level1,cs_opt_level2,cs_opt_level3]+
  92. [cs_opt_regvar,cs_opt_loopunroll,cs_opt_stackframe,cs_userbp,
  93. cs_opt_tailrecursion,cs_opt_nodecse,cs_opt_reorder_fields,cs_opt_fastmath];
  94. level1optimizerswitches = genericlevel1optimizerswitches;
  95. level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches +
  96. [cs_opt_regvar,cs_opt_stackframe,cs_opt_tailrecursion,cs_opt_nodecse];
  97. level3optimizerswitches = genericlevel3optimizerswitches + level2optimizerswitches + [{,cs_opt_loopunroll}];
  98. level4optimizerswitches = genericlevel4optimizerswitches + level3optimizerswitches + [cs_userbp];
  99. type
  100. tcpuflags =
  101. (CPUX86_HAS_SSEUNIT,
  102. CPUX86_HAS_BMI1,
  103. CPUX86_HAS_BMI2,
  104. CPUX86_HAS_POPCNT,
  105. CPUX86_HAS_AVXUNIT,
  106. CPUX86_HAS_LZCNT,
  107. CPUX86_HAS_MOVBE,
  108. CPUX86_HAS_FMA,
  109. CPUX86_HAS_FMA4
  110. );
  111. const
  112. cpu_capabilities : array[tcputype] of set of tcpuflags = (
  113. { cpu_none } [],
  114. { Athlon64 } [CPUX86_HAS_SSEUNIT],
  115. { cpu_core_i } [CPUX86_HAS_SSEUNIT,CPUX86_HAS_POPCNT],
  116. { cpu_core_avx } [CPUX86_HAS_SSEUNIT,CPUX86_HAS_POPCNT,CPUX86_HAS_AVXUNIT],
  117. { cpu_core_avx2 } [CPUX86_HAS_SSEUNIT,CPUX86_HAS_POPCNT,CPUX86_HAS_AVXUNIT,CPUX86_HAS_BMI1,CPUX86_HAS_BMI2,CPUX86_HAS_LZCNT,CPUX86_HAS_MOVBE,CPUX86_HAS_FMA]
  118. );
  119. Implementation
  120. end.