cpubase.pas 14 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Peter Vreman
  3. Contains the base types for the i386 and x86-64 architecture
  4. * This code was inspired by the NASM sources
  5. The Netwide Assembler is Copyright (c) 1996 Simon Tatham and
  6. Julian Hall. All rights reserved.
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. ****************************************************************************
  19. }
  20. {# Base unit for processor information. This unit contains
  21. enumerations of registers, opcodes, sizes, and other
  22. such things which are processor specific.
  23. }
  24. unit cpubase;
  25. {$i fpcdefs.inc}
  26. interface
  27. uses
  28. cutils,cclasses,
  29. globtype,
  30. cgbase
  31. ;
  32. {*****************************************************************************
  33. Assembler Opcodes
  34. *****************************************************************************}
  35. type
  36. {$ifdef x86_64}
  37. TAsmOp={$i x8664op.inc}
  38. {$else x86_64}
  39. TAsmOp={$i i386op.inc}
  40. {$endif x86_64}
  41. { This should define the array of instructions as string }
  42. op2strtable=array[tasmop] of string[15];
  43. const
  44. { First value of opcode enumeration }
  45. firstop = low(tasmop);
  46. { Last value of opcode enumeration }
  47. lastop = high(tasmop);
  48. {*****************************************************************************
  49. Registers
  50. *****************************************************************************}
  51. const
  52. { Integer Super registers }
  53. RS_RAX = $00; {EAX}
  54. RS_RCX = $01; {ECX}
  55. RS_RDX = $02; {EDX}
  56. RS_RBX = $03; {EBX}
  57. RS_RSI = $04; {ESI}
  58. RS_RDI = $05; {EDI}
  59. RS_RBP = $06; {EBP}
  60. RS_RSP = $07; {ESP}
  61. RS_R8 = $08; {R8}
  62. RS_R9 = $09; {R9}
  63. RS_R10 = $0a; {R10}
  64. RS_R11 = $0b; {R11}
  65. RS_R12 = $0c; {R12}
  66. RS_R13 = $0d; {R13}
  67. RS_R14 = $0e; {R14}
  68. RS_R15 = $0f; {R15}
  69. { create aliases to allow code sharing between x86-64 and i386 }
  70. RS_EAX = RS_RAX;
  71. RS_EBX = RS_RBX;
  72. RS_ECX = RS_RCX;
  73. RS_EDX = RS_RDX;
  74. RS_ESI = RS_RSI;
  75. RS_EDI = RS_RDI;
  76. RS_EBP = RS_RBP;
  77. RS_ESP = RS_RSP;
  78. { Number of first imaginary register }
  79. first_int_imreg = $10;
  80. { Float Super registers }
  81. RS_ST0 = $00;
  82. RS_ST1 = $01;
  83. RS_ST2 = $02;
  84. RS_ST3 = $03;
  85. RS_ST4 = $04;
  86. RS_ST5 = $05;
  87. RS_ST6 = $06;
  88. RS_ST7 = $07;
  89. { Number of first imaginary register }
  90. first_fpu_imreg = $08;
  91. { MM Super registers }
  92. RS_XMM0 = $00;
  93. RS_XMM1 = $01;
  94. RS_XMM2 = $02;
  95. RS_XMM3 = $03;
  96. RS_XMM4 = $04;
  97. RS_XMM5 = $05;
  98. RS_XMM6 = $06;
  99. RS_XMM7 = $07;
  100. RS_XMM8 = $08;
  101. RS_XMM9 = $09;
  102. RS_XMM10 = $0a;
  103. RS_XMM11 = $0b;
  104. RS_XMM12 = $0c;
  105. RS_XMM13 = $0d;
  106. RS_XMM14 = $0e;
  107. RS_XMM15 = $0f;
  108. RS_FLAGS = $07;
  109. { Number of first imaginary register }
  110. {$ifdef x86_64}
  111. first_mm_imreg = $10;
  112. {$else x86_64}
  113. first_mm_imreg = $08;
  114. {$endif x86_64}
  115. { The subregister that specifies the entire register and an address }
  116. {$ifdef x86_64}
  117. { Hammer }
  118. R_SUBWHOLE = R_SUBQ;
  119. R_SUBADDR = R_SUBQ;
  120. {$else x86_64}
  121. { i386 }
  122. R_SUBWHOLE = R_SUBD;
  123. R_SUBADDR = R_SUBD;
  124. {$endif x86_64}
  125. { Available Registers }
  126. {$ifdef x86_64}
  127. {$i r8664con.inc}
  128. {$else x86_64}
  129. {$i r386con.inc}
  130. {$endif x86_64}
  131. type
  132. { Number of registers used for indexing in tables }
  133. {$ifdef x86_64}
  134. tregisterindex=0..{$i r8664nor.inc}-1;
  135. {$else x86_64}
  136. tregisterindex=0..{$i r386nor.inc}-1;
  137. {$endif x86_64}
  138. const
  139. { TODO: Calculate bsstart}
  140. regnumber_count_bsstart = 64;
  141. regnumber_table : array[tregisterindex] of tregister = (
  142. {$ifdef x86_64}
  143. {$i r8664num.inc}
  144. {$else x86_64}
  145. {$i r386num.inc}
  146. {$endif x86_64}
  147. );
  148. regstabs_table : array[tregisterindex] of shortint = (
  149. {$ifdef x86_64}
  150. {$i r8664stab.inc}
  151. {$else x86_64}
  152. {$i r386stab.inc}
  153. {$endif x86_64}
  154. );
  155. regdwarf_table : array[tregisterindex] of shortint = (
  156. {$ifdef x86_64}
  157. {$i r8664dwrf.inc}
  158. {$else x86_64}
  159. {$i r386dwrf.inc}
  160. {$endif x86_64}
  161. );
  162. RS_DEFAULTFLAGS = RS_FLAGS;
  163. NR_DEFAULTFLAGS = NR_FLAGS;
  164. type
  165. totherregisterset = set of tregisterindex;
  166. {*****************************************************************************
  167. Conditions
  168. *****************************************************************************}
  169. type
  170. TAsmCond=(C_None,
  171. C_A,C_AE,C_B,C_BE,C_C,C_E,C_G,C_GE,C_L,C_LE,C_NA,C_NAE,
  172. C_NB,C_NBE,C_NC,C_NE,C_NG,C_NGE,C_NL,C_NLE,C_NO,C_NP,
  173. C_NS,C_NZ,C_O,C_P,C_PE,C_PO,C_S,C_Z
  174. );
  175. const
  176. cond2str:array[TAsmCond] of string[3]=('',
  177. 'a','ae','b','be','c','e','g','ge','l','le','na','nae',
  178. 'nb','nbe','nc','ne','ng','nge','nl','nle','no','np',
  179. 'ns','nz','o','p','pe','po','s','z'
  180. );
  181. {*****************************************************************************
  182. Flags
  183. *****************************************************************************}
  184. type
  185. TResFlags = (F_E,F_NE,F_G,F_L,F_GE,F_LE,F_C,F_NC,
  186. F_A,F_AE,F_B,F_BE,
  187. F_S,F_NS,F_O,F_NO);
  188. {*****************************************************************************
  189. Constants
  190. *****************************************************************************}
  191. const
  192. { declare aliases }
  193. LOC_SSEREGISTER = LOC_MMREGISTER;
  194. LOC_CSSEREGISTER = LOC_CMMREGISTER;
  195. max_operands = 4;
  196. maxfpuregs = 8;
  197. {*****************************************************************************
  198. CPU Dependent Constants
  199. *****************************************************************************}
  200. {$i cpubase.inc}
  201. {*****************************************************************************
  202. Helpers
  203. *****************************************************************************}
  204. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  205. function reg2opsize(r:Tregister):topsize;
  206. function reg_cgsize(const reg: tregister): tcgsize;
  207. function is_calljmp(o:tasmop):boolean;
  208. procedure inverse_flags(var f: TResFlags);
  209. function flags_to_cond(const f: TResFlags) : TAsmCond;
  210. function is_segment_reg(r:tregister):boolean;
  211. function findreg_by_number(r:Tregister):tregisterindex;
  212. function std_regnum_search(const s:string):Tregister;
  213. function std_regname(r:Tregister):string;
  214. function dwarf_reg(r:tregister):shortint;
  215. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  216. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  217. implementation
  218. uses
  219. rgbase,verbose;
  220. const
  221. {$ifdef x86_64}
  222. std_regname_table : array[tregisterindex] of string[7] = (
  223. {$i r8664std.inc}
  224. );
  225. regnumber_index : array[tregisterindex] of tregisterindex = (
  226. {$i r8664rni.inc}
  227. );
  228. std_regname_index : array[tregisterindex] of tregisterindex = (
  229. {$i r8664sri.inc}
  230. );
  231. {$else x86_64}
  232. std_regname_table : array[tregisterindex] of string[7] = (
  233. {$i r386std.inc}
  234. );
  235. regnumber_index : array[tregisterindex] of tregisterindex = (
  236. {$i r386rni.inc}
  237. );
  238. std_regname_index : array[tregisterindex] of tregisterindex = (
  239. {$i r386sri.inc}
  240. );
  241. {$endif x86_64}
  242. {*****************************************************************************
  243. Helpers
  244. *****************************************************************************}
  245. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  246. begin
  247. case s of
  248. OS_8,OS_S8:
  249. cgsize2subreg:=R_SUBL;
  250. OS_16,OS_S16:
  251. cgsize2subreg:=R_SUBW;
  252. OS_32,OS_S32:
  253. cgsize2subreg:=R_SUBD;
  254. OS_64,OS_S64:
  255. cgsize2subreg:=R_SUBQ;
  256. OS_M64:
  257. cgsize2subreg:=R_SUBNONE;
  258. OS_F32,OS_F64,OS_C64:
  259. case regtype of
  260. R_FPUREGISTER:
  261. cgsize2subreg:=R_SUBWHOLE;
  262. R_MMREGISTER:
  263. case s of
  264. OS_F32:
  265. cgsize2subreg:=R_SUBMMS;
  266. OS_F64:
  267. cgsize2subreg:=R_SUBMMD;
  268. else
  269. internalerror(2009071901);
  270. end;
  271. else
  272. internalerror(2009071902);
  273. end;
  274. OS_M128,OS_MS128:
  275. cgsize2subreg:=R_SUBMMWHOLE;
  276. else
  277. internalerror(200301231);
  278. end;
  279. end;
  280. function reg_cgsize(const reg: tregister): tcgsize;
  281. const subreg2cgsize:array[Tsubregister] of Tcgsize =
  282. (OS_NO,OS_8,OS_8,OS_16,OS_32,OS_64,OS_NO,OS_NO,OS_NO,OS_F32,OS_F64,OS_M128);
  283. begin
  284. case getregtype(reg) of
  285. R_INTREGISTER :
  286. reg_cgsize:=subreg2cgsize[getsubreg(reg)];
  287. R_FPUREGISTER :
  288. reg_cgsize:=OS_F80;
  289. R_MMXREGISTER:
  290. reg_cgsize:=OS_M64;
  291. R_MMREGISTER:
  292. reg_cgsize:=subreg2cgsize[getsubreg(reg)];
  293. R_SPECIALREGISTER :
  294. case reg of
  295. NR_CS,NR_DS,NR_ES,NR_SS,NR_FS,NR_GS:
  296. reg_cgsize:=OS_16;
  297. {$ifdef x86_64}
  298. NR_DR0..NR_TR7:
  299. reg_cgsize:=OS_64;
  300. {$endif x86_64}
  301. else
  302. reg_cgsize:=OS_32
  303. end
  304. else
  305. internalerror(2003031801);
  306. end;
  307. end;
  308. function reg2opsize(r:Tregister):topsize;
  309. const
  310. subreg2opsize : array[tsubregister] of topsize =
  311. (S_NO,S_B,S_B,S_W,S_L,S_Q,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO);
  312. begin
  313. reg2opsize:=S_L;
  314. case getregtype(r) of
  315. R_INTREGISTER :
  316. reg2opsize:=subreg2opsize[getsubreg(r)];
  317. R_FPUREGISTER :
  318. reg2opsize:=S_FL;
  319. R_MMXREGISTER,
  320. R_MMREGISTER :
  321. reg2opsize:=S_MD;
  322. R_SPECIALREGISTER :
  323. begin
  324. case r of
  325. NR_CS,NR_DS,NR_ES,
  326. NR_SS,NR_FS,NR_GS :
  327. reg2opsize:=S_W;
  328. end;
  329. end;
  330. else
  331. internalerror(200303181);
  332. end;
  333. end;
  334. function is_calljmp(o:tasmop):boolean;
  335. begin
  336. case o of
  337. A_CALL,
  338. {$ifdef i386}
  339. A_JCXZ,
  340. {$endif i386}
  341. A_JECXZ,
  342. {$ifdef x86_64}
  343. A_JRCXZ,
  344. {$endif x86_64}
  345. A_JMP,
  346. A_LOOP,
  347. A_LOOPE,
  348. A_LOOPNE,
  349. A_LOOPNZ,
  350. A_LOOPZ,
  351. A_LCALL,
  352. A_LJMP,
  353. A_Jcc :
  354. is_calljmp:=true;
  355. else
  356. is_calljmp:=false;
  357. end;
  358. end;
  359. procedure inverse_flags(var f: TResFlags);
  360. const
  361. inv_flags: array[TResFlags] of TResFlags =
  362. (F_NE,F_E,F_LE,F_GE,F_L,F_G,F_NC,F_C,
  363. F_BE,F_B,F_AE,F_A,
  364. F_NS,F_S,F_NO,F_O);
  365. begin
  366. f:=inv_flags[f];
  367. end;
  368. function flags_to_cond(const f: TResFlags) : TAsmCond;
  369. const
  370. flags_2_cond : array[TResFlags] of TAsmCond =
  371. (C_E,C_NE,C_G,C_L,C_GE,C_LE,C_C,C_NC,C_A,C_AE,C_B,C_BE,C_S,C_NS,C_O,C_NO);
  372. begin
  373. result := flags_2_cond[f];
  374. end;
  375. function is_segment_reg(r:tregister):boolean;
  376. begin
  377. result:=false;
  378. case r of
  379. NR_CS,NR_DS,NR_ES,
  380. NR_SS,NR_FS,NR_GS :
  381. result:=true;
  382. end;
  383. end;
  384. function findreg_by_number(r:Tregister):tregisterindex;
  385. var
  386. hr : tregister;
  387. begin
  388. { for the name the sub reg doesn't matter }
  389. hr:=r;
  390. case getsubreg(hr) of
  391. R_SUBMMS,R_SUBMMD,R_SUBMMWHOLE:
  392. setsubreg(hr,R_SUBNONE);
  393. end;
  394. result:=findreg_by_number_table(hr,regnumber_index);
  395. end;
  396. function std_regnum_search(const s:string):Tregister;
  397. begin
  398. result:=regnumber_table[findreg_by_name_table(s,std_regname_table,std_regname_index)];
  399. end;
  400. function std_regname(r:Tregister):string;
  401. var
  402. p : tregisterindex;
  403. begin
  404. if getregtype(r) in [R_MMREGISTER,R_MMXREGISTER] then
  405. r:=newreg(getregtype(r),getsupreg(r),R_SUBNONE);
  406. p:=findreg_by_number_table(r,regnumber_index);
  407. if p<>0 then
  408. result:=std_regname_table[p]
  409. else
  410. result:=generic_regname(r);
  411. end;
  412. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  413. const
  414. inverse: array[TAsmCond] of TAsmCond=(C_None,
  415. C_NA,C_NAE,C_NB,C_NBE,C_NC,C_NE,C_NG,C_NGE,C_NL,C_NLE,C_A,C_AE,
  416. C_B,C_BE,C_C,C_E,C_G,C_GE,C_L,C_LE,C_O,C_P,
  417. C_S,C_Z,C_NO,C_NP,C_NP,C_P,C_NS,C_NZ
  418. );
  419. begin
  420. result := inverse[c];
  421. end;
  422. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  423. begin
  424. result := c1 = c2;
  425. end;
  426. function dwarf_reg(r:tregister):shortint;
  427. begin
  428. result:=regdwarf_table[findreg_by_number(r)];
  429. if result=-1 then
  430. internalerror(200603251);
  431. end;
  432. end.