m68k.inc 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846
  1. {
  2. This file is part of the Free Pascal run time library.
  3. Copyright (c) 1999-2000 by Carl-Eric Codere,
  4. member of the Free Pascal development team.
  5. See the file COPYING.FPC, included in this distribution,
  6. for details about the copyright.
  7. This program is distributed in the hope that it will be useful,
  8. but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  10. **********************************************************************}
  11. {****************************************************************************
  12. m68k.inc : Processor dependent implementation of system unit
  13. For Motorola 680x0 Processor.
  14. *****************************************************************************}
  15. {****************************************************************************}
  16. { Credit where credit is due: }
  17. { -Some of the copy routines taken from the Atari dlib source code: }
  18. { Dale Schumacher (alias: Dalnefre') [email protected] }
  19. { 399 Beacon Ave. St. Paul, MN 55104,USA }
  20. { -Some of the routines taken from the freeware ATARI Sozobon C compiler }
  21. { 1988 by Sozobon, Limited. Author: Johann Ruegg (freeware) }
  22. { Thanks to all these people wherever they maybe today! }
  23. {****************************************************************************}
  24. {$IF DEFINED(FPU68881) OR DEFINED(FPUCOLDFIRE)}
  25. function GetFPCR: DWord; assembler; nostackframe;
  26. asm
  27. fmove.l fpcr,d0
  28. end;
  29. function GetFPSR: DWord; assembler; nostackframe;
  30. asm
  31. fmove.l fpsr, d0
  32. end;
  33. procedure SetFPCR(x: DWord); assembler; nostackframe;
  34. asm
  35. fmove.l x, fpcr
  36. end;
  37. procedure SetFPSR(x: DWord); assembler; nostackframe;
  38. asm
  39. fmove.l x, fpsr
  40. end;
  41. {$DEFINE FPC_SYSTEM_HAS_SYSRESETFPU}
  42. procedure SysResetFPU;
  43. begin
  44. SetFPCR(Default68KFPCR);
  45. SetFPSR(0);
  46. end;
  47. {$DEFINE FPC_SYSTEM_HAS_SYSINITFPU}
  48. procedure SysInitFPU;
  49. begin
  50. end;
  51. procedure fpc_cpuinit;
  52. begin
  53. if IsLibrary then
  54. begin
  55. Default68kFPCR:=GetFPCR;
  56. end;
  57. SysResetFPU;
  58. end;
  59. {$ELSE}
  60. procedure fpc_cpuinit;
  61. begin
  62. {$IFNDEF FPUNONE}
  63. SysResetFPU;
  64. if (not IsLibrary) then
  65. SysInitFPU;
  66. {$ENDIF}
  67. end;
  68. {$ENDIF}
  69. {$ifndef INTERNAL_BACKTRACE}
  70. {$define FPC_SYSTEM_HAS_GET_FRAME}
  71. function get_frame : pointer; assembler;nostackframe;
  72. asm
  73. move.l fp,d0
  74. end;
  75. {$endif not INTERNAL_BACKTRACE}
  76. {$define FPC_SYSTEM_HAS_GET_CALLER_ADDR}
  77. function get_caller_addr(framebp : pointer;addr:pointer=nil) : pointer; assembler;
  78. asm
  79. move.l framebp,d0
  80. tst.l d0
  81. beq @Lnul_address
  82. move.l d0,a0
  83. move.l 4(a0),d0
  84. @Lnul_address:
  85. end;
  86. {$define FPC_SYSTEM_HAS_GET_CALLER_FRAME}
  87. function get_caller_frame(framebp : pointer;addr:pointer=nil) : pointer; assembler;
  88. asm
  89. move.l framebp,d0
  90. tst.l d0
  91. beq @Lnul_frame
  92. move.l d0,a0
  93. move.l (a0),d0
  94. @Lnul_frame:
  95. end;
  96. {$define FPC_SYSTEM_HAS_SPTR}
  97. function Sptr : pointer; assembler;nostackframe;
  98. asm
  99. move.l sp,d0
  100. end;
  101. {$define FPC_SYSTEM_HAS_GET_PC_ADDR}
  102. function get_pc_addr : pointer;assembler;nostackframe;
  103. asm
  104. move.l (sp),d0
  105. end;
  106. {$ifndef FPC_SYSTEM_HAS_FILLCHAR}
  107. {$define FPC_SYSTEM_HAS_FILLCHAR}
  108. procedure FillChar(var x; count : longint; value : byte); assembler; register; nostackframe;
  109. asm
  110. {$ifdef VER3_0}
  111. move.l x,a0
  112. move.l count,d0
  113. clr.l d1
  114. move.b value,d1
  115. {$endif VER3_0}
  116. { a0 is x, d0 is count, d1 is value }
  117. tst.l d0 { anything to fill at all? }
  118. ble @Lquit
  119. cmp.l #32,d0 { limits were tested against real hardware on various CPU }
  120. blt @LfillByte
  121. cmp.l #128,d0 { limits were tested against real hardware on various CPU }
  122. blt @LfillWord
  123. bra @LfillDWord
  124. {$ifndef CPUM68K_HAS_DBRA}
  125. @LfillByte:
  126. {$endif}
  127. @LfillByteLoop:
  128. move.b d1,(a0)+
  129. {$ifdef CPUM68K_HAS_DBRA}
  130. @LfillByte:
  131. dbra d0,@LfillByteLoop
  132. {$else}
  133. subq.l #1,d0
  134. bne @LfillByteLoop
  135. {$endif}
  136. rts
  137. @LfillWord:
  138. move.l d2,-(sp)
  139. move.l a0,d2
  140. btst #0,d2
  141. beq @Leven
  142. subq.l #1,d0
  143. move.b d1,(a0)+
  144. @Leven:
  145. move.b d1,d2 // copy value to upper byte
  146. {$ifdef CPUCOLDFIRE}
  147. lsl.l #8,d1
  148. {$else}
  149. lsl.w #8,d1
  150. {$endif}
  151. move.b d2,d1
  152. move.l d0,d2 // adjust d0 for leftover copy
  153. bclr #0,d2
  154. sub.l d2,d0
  155. lsr.l #1,d2
  156. {$ifdef CPUM68K_HAS_DBRA}
  157. subq.l #1,d2
  158. {$endif}
  159. @LfillWordLoop:
  160. move.w d1,(a0)+
  161. {$ifdef CPUM68K_HAS_DBRA}
  162. dbra d2,@LFillWordLoop
  163. {$else}
  164. subq.l #1,d2
  165. bne @LfillWordLoop
  166. {$endif}
  167. move.l (sp)+,d2
  168. tst.l d0
  169. bne @LfillByte
  170. rts
  171. @LfillDWord:
  172. move.l d2,-(sp)
  173. move.b d1,d2 // copy value to upper bytes
  174. {$ifdef CPUCOLDFIRE}
  175. lsl.l #8,d1
  176. {$else}
  177. lsl.w #8,d1
  178. {$endif}
  179. move.b d2,d1
  180. move.w d1,d2
  181. swap d1
  182. move.w d2,d1
  183. move.l a0,d2 // do initial byte and word fill, if the address is unaligned
  184. btst #0,d2
  185. beq @Ldeven
  186. subq.l #1,d0
  187. move.b d1,(a0)+
  188. @Ldeven:
  189. move.l a0,d2
  190. btst #1,d2
  191. beq @Ldquad
  192. subq.l #2,d0
  193. move.w d1,(a0)+
  194. @Ldquad:
  195. move.l d0,d2 // adjust d0 for leftover copy
  196. {$ifdef CPUCOLDFIRE}
  197. and.l #$fffffffc,d2
  198. {$else}
  199. and.b #$fc,d2
  200. {$endif}
  201. sub.l d2,d0
  202. lsr.l #2,d2
  203. bra @LfillLongLoopStart
  204. @LfillLongLoop:
  205. move.l d1,(a0)+
  206. move.l d1,(a0)+
  207. move.l d1,(a0)+
  208. move.l d1,(a0)+
  209. subq.l #4,d2
  210. @LfillLongLoopStart:
  211. cmp.l #4,d2
  212. bgt @LfillLongLoop
  213. {$ifdef CPUM68K_HAS_DBRA}
  214. subq.l #1,d2
  215. {$endif}
  216. @LfillDWordLoop:
  217. move.l d1,(a0)+
  218. {$ifdef CPUM68K_HAS_DBRA}
  219. dbra d2,@LFillDWordLoop
  220. {$else}
  221. subq.l #1,d2
  222. bne @LfillDWordLoop
  223. {$endif}
  224. move.l (sp)+,d2
  225. tst.l d0
  226. bne @LfillByte
  227. @Lquit:
  228. end;
  229. {$endif ndef FPC_SYSTEM_HAS_FILLCHAR}
  230. {$ifdef dummy}
  231. { procedure strcopy(dstr,sstr : pointer;len : longint);[public,alias: 'STRCOPY'];}
  232. procedure strcopy; assembler;[public,alias: 'FPC_STRCOPY'];
  233. {---------------------------------------------------}
  234. { Low-level routine to copy a string to another }
  235. { string with maximum length. Never call directly! }
  236. { On Entry: }
  237. { a1.l = string to copy to }
  238. { a0.l = source string }
  239. { d0.l = maximum length of copy }
  240. { registers destroyed: a0,a1,d0,d1 }
  241. {---------------------------------------------------}
  242. asm
  243. { move.l sstr,a0
  244. move.l dstr,a1
  245. move.l len,d1 }
  246. move.l d0,d1
  247. move.b (a0)+,d0 { Get source length }
  248. and.w #$ff,d0
  249. cmp.w d1,d0 { This is a signed comparison! }
  250. ble @LM4
  251. move.b d1,d0 { If longer than maximum size of target, cut
  252. source length }
  253. @LM4:
  254. andi.l #$ff,d0 { zero extend d0-byte }
  255. move.l d0,d1 { save length to copy }
  256. move.b d0,(a1)+ { save new length }
  257. { Check if copying length is zero - if so then }
  258. { exit without copying anything. }
  259. tst.b d1
  260. beq @Lend
  261. bra @LMSTRCOPY55
  262. @LMSTRCOPY56: { 68010 Fast loop mode }
  263. move.b (a0)+,(a1)+
  264. @LMSTRCOPY55:
  265. {$ifndef CPUM68K_HAS_DBRA}
  266. sub.l #1,d1
  267. bpl @LMSTRCOPY56
  268. {$else CPUM68K_HAS_DBRA}
  269. dbra d1,@LMSTRCOPY56
  270. {$endif CPUM68K_HAS_DBRA}
  271. @Lend:
  272. end;
  273. { Concatenate Strings }
  274. { PARAMETERS ARE REVERSED COMPARED TO NORMAL! }
  275. { therefore online assembler may not parse the params as normal }
  276. procedure strconcat(s1,s2 : pointer);[public,alias: 'STRCONCAT'];
  277. begin
  278. asm
  279. move.b #255,d0
  280. move.l s1,a0 { a0 = destination }
  281. move.l s2,a1 { a1 = source }
  282. sub.b (a0),d0 { copyl:= 255 -length(s1) }
  283. move.b (a1),d6
  284. and.w #$ff,d0 { Sign flags are checked! }
  285. and.w #$ff,d6
  286. cmp.w d6,d0 { if copyl > length(s2) then }
  287. ble @Lcontinue
  288. move.b (a1),d0 { copyl:=length(s2) }
  289. @Lcontinue:
  290. move.b (a0),d6
  291. and.l #$ff,d6
  292. lea 1(a0,d6),a0 { s1[length(s1)+1] }
  293. add.l #1,a1 { s2[1] }
  294. move.b d0,d6
  295. { Check if copying length is zero - if so then }
  296. { exit without copying anything. }
  297. tst.b d6
  298. beq @Lend
  299. bra @ALoop
  300. @Loop:
  301. move.b (a1)+,(a0)+ { s1[i] := s2[i]; }
  302. @ALoop:
  303. {$ifndef CPUM68K_HAS_DBRA}
  304. sub.l #1,d6
  305. bpl @Loop
  306. {$else CPUM68K_HAS_DBRA}
  307. dbra d6,@Loop
  308. {$endif CPUM68K_HAS_DBRA}
  309. move.l s1,a0
  310. add.b d0,(a0) { change to new string length }
  311. @Lend:
  312. end ['d0','d1','a0','a1','d6'];
  313. end;
  314. { Compares strings }
  315. { DO NOT CALL directly. }
  316. { a0 = pointer to first string to compare }
  317. { a1 = pointer to second string to compare }
  318. { ALL FLAGS are set appropriately. }
  319. { ZF = strings are equal }
  320. { REGISTERS DESTROYED: a0, a1, d0, d1, d6 }
  321. procedure strcmp; assembler;[public,alias:'FPC_STRCMP'];
  322. asm
  323. move.b (a0)+,d0 { Get length of first string }
  324. move.b (a1)+,d6 { Get length of 2nd string }
  325. move.b d6,d1 { Save length of string for final compare }
  326. cmp.b d0,d6 { Get shortest string length }
  327. ble @LSTRCONCAT1
  328. move.b d0,d6 { Set length to shortest string }
  329. @LSTRCONCAT1:
  330. tst.b d6 { Both strings have a length of zero, exit }
  331. beq @LSTRCONCAT2
  332. andi.l #$ff,d6
  333. subq.l #1,d6 { subtract first attempt }
  334. { if value is -1 then don't loop and just compare lengths of }
  335. { both strings before exiting. }
  336. bmi @LSTRCONCAT2
  337. or.l d0,d0 { Make sure to set Zerfo flag to 0 }
  338. @LSTRCONCAT5:
  339. { Workaroung for GAS v.134 bug }
  340. { old: cmp.b (a1)+,(a0)+ }
  341. cmpm.b (a1)+,(a0)+
  342. @LSTRCONCAT4:
  343. dbne d6,@LSTRCONCAT5 { Repeat until not equal }
  344. bne @LSTRCONCAT3
  345. @LSTRCONCAT2:
  346. { If length of both string are equal }
  347. { Then set zero flag }
  348. cmp.b d1,d0 { Compare length - set flag if equal length strings }
  349. @LSTRCONCAT3:
  350. end;
  351. {$endif dummy}
  352. {$ifndef FPC_SYSTEM_HAS_MOVE}
  353. {$define FPC_SYSTEM_HAS_MOVE}
  354. procedure move(const source;var dest;count : longint); assembler;
  355. { base pointer+8 = source }
  356. { base pointer+12 = destination }
  357. { base pointer+16 = number of bytes to move}
  358. asm
  359. move.l count, d0 { number of bytes }
  360. ble @LMOVE5 { anything to copy at all? }
  361. move.l dest, a1 { destination }
  362. move.l source, a0 { source }
  363. {$ifdef CPUM68K_HAS_DBRA}
  364. cmpi.l #65535, d0 { check, if this is a word move }
  365. ble @LMEMSET00 { use fast dbra mode 68010+ }
  366. {$endif CPUM68K_HAS_DBRA}
  367. cmp.l a0,a1 { check copy direction }
  368. bls @LMOVE3
  369. add.l d0,a0 { move pointers to end }
  370. add.l d0,a1
  371. @LMOVE1:
  372. move.b -(a0),-(a1) { (s < d) copy loop }
  373. subq.l #1,d0
  374. bne @LMOVE1
  375. bra @LMOVE5
  376. @LMOVE3:
  377. move.b (a0)+,(a1)+ { (s >= d) copy loop }
  378. subq.l #1,d0
  379. bne @LMOVE3
  380. bra @LMOVE5
  381. {$ifdef CPUM68K_HAS_DBRA}
  382. @LMEMSET00: { use fast loop mode 68010+ }
  383. cmp.l a0,a1 { check copy direction }
  384. bls @LMOVE04
  385. add.l d0,a0 { move pointers to end }
  386. add.l d0,a1
  387. bra @LMOVE02
  388. @LMOVE01:
  389. move.b -(a0),-(a1) { (s < d) copy loop }
  390. @LMOVE02:
  391. dbra d0,@LMOVE01
  392. bra @LMOVE5
  393. @LMOVE03:
  394. move.b (a0)+,(a1)+ { (s >= d) copy loop }
  395. @LMOVE04:
  396. dbra d0,@LMOVE03
  397. {$endif CPUM68K_HAS_DBRA}
  398. { end fast loop mode }
  399. @LMOVE5:
  400. end;
  401. {$endif ndef FPC_SYSTEM_HAS_MOVE}
  402. {$ifdef CPUM68K_HAS_UNALIGNED}
  403. {$define FPC_SYSTEM_HAS_FILLWORD}
  404. procedure FillWord(var x; count : longint; value : word); assembler;
  405. asm
  406. move.l x, a0 { destination }
  407. move.w value, d1 { fill data }
  408. move.l count, d0 { number of bytes to fill }
  409. ble @LMEMSET3 { anything to fill at all? }
  410. bra @LMEMSET21
  411. @LMEMSET11:
  412. move.w d1,(a0)+
  413. @LMEMSET21:
  414. subq.l #1,d0
  415. bpl @LMEMSET11
  416. @LMEMSET3:
  417. end;
  418. {$endif}
  419. {$IFNDEF FPC_SYSTEM_HAS_INTERLOCKEDFUNCS}
  420. function InterLockedDecrement (var Target: longint) : longint;
  421. {$IFDEF CPUM68K_HAS_CAS}
  422. register; assembler;
  423. asm
  424. move.l (a0), d0
  425. @loop:
  426. move.l d0, d1
  427. subq.l #1, d1
  428. cas.l d0, d1, (a0)
  429. bne @loop
  430. move.l d1, d0
  431. end;
  432. {$ELSE}
  433. begin
  434. {$warning FIX ME}
  435. Dec(Target);
  436. Result := Target;
  437. end;
  438. {$ENDIF}
  439. function InterLockedIncrement (var Target: longint) : longint;
  440. {$IFDEF CPUM68K_HAS_CAS}
  441. register; assembler;
  442. asm
  443. move.l (a0), d0
  444. @loop:
  445. move.l d0, d1
  446. addq.l #1, d1
  447. cas.l d0, d1, (a0)
  448. bne @loop
  449. move.l d1, d0
  450. end;
  451. {$ELSE}
  452. begin
  453. {$warning FIX ME}
  454. Inc(Target);
  455. Result := Target;
  456. end;
  457. {$ENDIF}
  458. function InterLockedExchange (var Target: longint;Source : longint) : longint;
  459. {$IFDEF CPUM68K_HAS_CAS}
  460. register; assembler;
  461. asm
  462. move.l Source, d1
  463. move.l (a0), d0
  464. @loop:
  465. cas.l d0, d1, (a0)
  466. bne @loop
  467. end;
  468. {$ELSE}
  469. begin
  470. {$warning FIX ME}
  471. Result := Target;
  472. Target := Source;
  473. end;
  474. {$ENDIF}
  475. function InterLockedExchangeAdd (var Target: longint;Source : longint) : longint;
  476. {$IFDEF CPUM68K_HAS_CAS}
  477. register; assembler;
  478. asm
  479. move.l Source, a1
  480. move.l (a0), d0
  481. @loop:
  482. move.l a1, d1
  483. add.l d0, d1
  484. cas.l d0, d1, (a0)
  485. bne @loop
  486. end;
  487. {$ELSE}
  488. begin
  489. {$warning FIX ME}
  490. Result := Target;
  491. Target := Target + Source;
  492. end;
  493. {$ENDIF}
  494. function InterlockedCompareExchange(var Target: longint; NewValue: longint; Comperand: longint): longint;
  495. {$IFDEF CPUM68K_HAS_CAS}
  496. register; assembler;
  497. asm
  498. // Target = a0, NewValue = d0, Comperand = d1
  499. exg.l d0, d1
  500. cas.l d0, d1, (a0)
  501. end;
  502. {$ELSE}
  503. begin
  504. {$warning FIX ME}
  505. Result := Target;
  506. if Target = Comperand then
  507. Target := NewValue;
  508. end;
  509. {$ENDIF}
  510. {$ENDIF FPC_SYSTEM_HAS_INTERLOCKEDFUNCS}
  511. {$ifndef FPC_SYSTEM_HAS_TEST68K}
  512. procedure Test68k(var CPU: byte; var FPU: byte);
  513. begin
  514. {$warning Implement me!}
  515. CPU:=0;
  516. FPU:=0;
  517. end;
  518. {$endif}
  519. {$ifndef FPC_SYSTEM_HAS_SAR_QWORD}
  520. {$define FPC_SYSTEM_HAS_SAR_QWORD}
  521. function fpc_SarInt64(Const AValue : Int64;const Shift : Byte): Int64; [Public,Alias:'FPC_SARINT64']; compilerproc; assembler; nostackframe;
  522. asm
  523. // d0 = shift
  524. lea.l 4(sp),a0
  525. move.l d2,-(sp)
  526. move.l d0,d2
  527. {$ifndef CPUCOLDFIRE}
  528. and.w #63,d2
  529. cmp.w #32,d2
  530. {$else}
  531. and.l #63,d2
  532. cmp.l #32,d2
  533. {$endif}
  534. bge.s @longshift
  535. move.l (a0)+,d0
  536. move.l (a0),d1
  537. {$ifdef CPUM68K_HAS_ROLROR}
  538. cmp.w #1,d2
  539. beq.s @oneshift
  540. {$endif}
  541. {$ifdef CPU68000}
  542. cmp.w #16,d2
  543. beq.s @sixteenshift
  544. {$endif}
  545. move.l d3,a0
  546. move.l d4,a1
  547. move.l d0,d3
  548. moveq.l #32,d4
  549. {$ifndef CPUCOLDFIRE}
  550. sub.w d2,d4
  551. {$else}
  552. sub.l d2,d4
  553. {$endif}
  554. asr.l d2,d0
  555. lsl.l d4,d3
  556. lsr.l d2,d1
  557. or.l d3,d1
  558. move.l a0,d3
  559. move.l a1,d4
  560. bra.s @quit
  561. {$ifdef CPU68000}
  562. @sixteenshift:
  563. move.w d0,d1
  564. swap d1
  565. swap d0
  566. ext.l d0
  567. bra.s @quit
  568. {$endif}
  569. {$ifdef CPUM68K_HAS_ROLROR}
  570. @oneshift:
  571. asr.l #1,d0
  572. roxr.l #1,d1
  573. bra.s @quit
  574. {$endif}
  575. @longshift:
  576. move.l (a0),d0
  577. move.l d0,d1
  578. smi d0
  579. {$if defined(CPU68020) or defined(CPUCOLDFIRE)}
  580. extb.l d0
  581. {$else}
  582. ext.w d0
  583. ext.l d0
  584. {$endif}
  585. {$ifndef CPUCOLDFIRE}
  586. sub.w #32,d2
  587. {$else}
  588. sub.l #32,d2
  589. {$endif}
  590. asr.l d2,d1
  591. @quit:
  592. move.l (sp)+,d2
  593. end;
  594. {$endif}
  595. {$if defined(CPUM68K_HAS_BYTEREV) or defined(CPUM68K_HAS_ROLROR)}
  596. { Disabled for now, because not all cases below were tested. (KB) }
  597. {.$define FPC_SYSTEM_HAS_SWAPENDIAN}
  598. {$endif}
  599. {$if defined(FPC_SYSTEM_HAS_SWAPENDIAN)}
  600. function SwapEndian(const AValue: SmallInt): SmallInt; assembler; nostackframe;
  601. asm
  602. {$if defined(CPUM68K_HAS_ROLROR)}
  603. move.w avalue, d0
  604. ror.w #8, d0
  605. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  606. move.w avalue, d0
  607. byterev d0
  608. swap d0
  609. {$else}
  610. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  611. clr.l d0
  612. move.w avalue, d0
  613. move.w d0, d1
  614. lsr.l #8, d0
  615. lsl.l #8, d1
  616. or.l d1, d0
  617. {$endif}
  618. end;
  619. function SwapEndian(const AValue: Word): Word; assembler; nostackframe;
  620. asm
  621. {$if defined(CPUM68K_HAS_ROLROR)}
  622. move.w avalue, d0
  623. ror.w #8, d0
  624. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  625. move.w avalue, d0
  626. byterev d0
  627. swap d0
  628. {$else}
  629. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  630. clr.l d0
  631. move.w avalue, d0
  632. move.w d0, d1
  633. lsr.l #8, d0
  634. lsl.l #8, d1
  635. or.l d1, d0
  636. {$endif}
  637. end;
  638. function SwapEndian(const AValue: LongInt): LongInt; assembler; nostackframe;
  639. asm
  640. {$if defined(CPUM68K_HAS_ROLROR)}
  641. move.l avalue, d0
  642. ror.w #8, d0
  643. swap d0
  644. ror.w #8, d0
  645. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  646. move.l avalue, d0
  647. byterev d0
  648. {$else}
  649. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  650. move.l avalue, d0
  651. move.l d0, d1
  652. andi.l #$ff00ff00, d0
  653. andi.l #$00ff00ff, d1
  654. lsr.l #8, d0
  655. lsl.l #8, d1
  656. or.l d1, d0
  657. swap d0
  658. {$endif}
  659. end;
  660. function SwapEndian(const AValue: DWord): DWord; assembler; nostackframe;
  661. asm
  662. {$if defined(CPUM68K_HAS_ROLROR)}
  663. move.l avalue, d0
  664. ror.w #8, d0
  665. swap d0
  666. ror.w #8, d0
  667. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  668. move.l avalue, d0
  669. byterev d0
  670. {$else}
  671. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  672. move.l avalue, d0
  673. move.l d0, d1
  674. andi.l #$ff00ff00, d0
  675. andi.l #$00ff00ff, d1
  676. lsr.l #8, d0
  677. lsl.l #8, d1
  678. or.l d1, d0
  679. swap d0
  680. {$endif}
  681. end;
  682. function SwapEndian(const AValue: Int64): Int64; assembler; nostackframe;
  683. asm
  684. {$if defined(CPUM68K_HAS_ROLROR)}
  685. move.l avalue+4, d0
  686. ror.w #8, d0
  687. swap d0
  688. ror.w #8, d0
  689. move.l avalue, d1
  690. ror.w #8, d1
  691. swap d1
  692. ror.w #8, d1
  693. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  694. move.l avalue+4, d0
  695. move.l avalue, d1
  696. byterev d0
  697. byterev d1
  698. {$else}
  699. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  700. move.l d2, -(sp)
  701. move.l avalue+4, d0
  702. move.l d0, d1
  703. andi.l #$ff00ff00, d0
  704. andi.l #$00ff00ff, d1
  705. lsr.l #8, d0
  706. lsl.l #8, d1
  707. or.l d1, d0
  708. swap d0
  709. move.l avalue, d1
  710. move.l d1, d2
  711. andi.l #$ff00ff00, d1
  712. andi.l #$00ff00ff, d2
  713. lsr.l #8, d1
  714. lsl.l #8, d2
  715. or.l d2, d1
  716. swap d1
  717. move.l (sp)+, d2
  718. {$endif}
  719. end;
  720. function SwapEndian(const AValue: QWord): QWord; assembler; nostackframe;
  721. asm
  722. {$if defined(CPUM68K_HAS_ROLROR)}
  723. move.l avalue+4, d0
  724. ror.w #8, d0
  725. swap d0
  726. ror.w #8, d0
  727. move.l avalue, d1
  728. ror.w #8, d1
  729. swap d1
  730. ror.w #8, d1
  731. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  732. move.l avalue+4, d0
  733. move.l avalue, d1
  734. byterev d0
  735. byterev d1
  736. {$else}
  737. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  738. move.l d2, -(sp)
  739. move.l avalue+4, d0
  740. move.l d0, d1
  741. andi.l #$ff00ff00, d0
  742. andi.l #$00ff00ff, d1
  743. lsr.l #8, d0
  744. lsl.l #8, d1
  745. or.l d1, d0
  746. swap d0
  747. move.l avalue, d1
  748. move.l d1, d2
  749. andi.l #$ff00ff00, d1
  750. andi.l #$00ff00ff, d2
  751. lsr.l #8, d1
  752. lsl.l #8, d2
  753. or.l d2, d1
  754. swap d1
  755. move.l (sp)+, d2
  756. {$endif}
  757. end;
  758. {$endif FPC_SYSTEM_HAS_SWAPENDIAN}
  759. procedure fpc_cpucodeinit;
  760. begin
  761. Test68k(Test68000,Test68881);
  762. end;