daopt386.pas 95 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  4. development team
  5. This unit contains the data flow analyzer and several helper procedures
  6. and functions.
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. ****************************************************************************
  19. }
  20. unit daopt386;
  21. {$i fpcdefs.inc}
  22. interface
  23. uses
  24. globtype,
  25. cclasses,aasmbase,aasmtai,aasmcpu,cgbase,cgutils,
  26. cpubase,optbase;
  27. {******************************* Constants *******************************}
  28. const
  29. { Possible register content types }
  30. con_Unknown = 0;
  31. con_ref = 1;
  32. con_const = 2;
  33. { The contents aren't usable anymore for CSE, but they may still be }
  34. { usefull for detecting whether the result of a load is actually used }
  35. con_invalid = 3;
  36. { the reverse of the above (in case a (conditional) jump is encountered): }
  37. { CSE is still possible, but the original instruction can't be removed }
  38. con_noRemoveRef = 4;
  39. { same, but for constants }
  40. con_noRemoveConst = 5;
  41. const
  42. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  43. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  44. OS_16,OS_32,OS_64,
  45. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  46. OS_M32,
  47. OS_ADDR,OS_NO,OS_NO,
  48. OS_NO);
  49. {********************************* Types *********************************}
  50. type
  51. TRegArray = Array[RS_EAX..RS_ESP] of tsuperregister;
  52. TRegSet = Set of RS_EAX..RS_ESP;
  53. toptreginfo = Record
  54. NewRegsEncountered, OldRegsEncountered: TRegSet;
  55. RegsLoadedForRef: TRegSet;
  56. lastReload: array[RS_EAX..RS_ESP] of tai;
  57. New2OldReg: TRegArray;
  58. end;
  59. {possible actions on an operand: read, write or modify (= read & write)}
  60. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  61. {the possible states of a flag}
  62. TFlagContents = (F_Unknown, F_notSet, F_Set);
  63. TContent = Packed Record
  64. {start and end of block instructions that defines the
  65. content of this register.}
  66. StartMod: tai;
  67. MemWrite: taicpu;
  68. {how many instructions starting with StarMod does the block consist of}
  69. NrOfMods: Word;
  70. {the type of the content of the register: unknown, memory, constant}
  71. Typ: Byte;
  72. case byte of
  73. {starts at 0, gets increased everytime the register is written to}
  74. 1: (WState: Byte;
  75. {starts at 0, gets increased everytime the register is read from}
  76. RState: Byte);
  77. { to compare both states in one operation }
  78. 2: (state: word);
  79. end;
  80. {Contents of the integer registers}
  81. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  82. {contents of the FPU registers}
  83. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  84. {$ifdef tempOpts}
  85. { linked list which allows searching/deleting based on value, no extra frills}
  86. PSearchLinkedListItem = ^TSearchLinkedListItem;
  87. TSearchLinkedListItem = object(TLinkedList_Item)
  88. constructor init;
  89. function equals(p: PSearchLinkedListItem): boolean; virtual;
  90. end;
  91. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  92. TSearchDoubleIntItem = object(TLinkedList_Item)
  93. constructor init(_int1,_int2: longint);
  94. function equals(p: PSearchLinkedListItem): boolean; virtual;
  95. private
  96. int1, int2: longint;
  97. end;
  98. PSearchLinkedList = ^TSearchLinkedList;
  99. TSearchLinkedList = object(TLinkedList)
  100. function searchByValue(p: PSearchLinkedListItem): boolean;
  101. procedure removeByValue(p: PSearchLinkedListItem);
  102. end;
  103. {$endif tempOpts}
  104. {information record with the contents of every register. Every tai object
  105. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  106. TtaiProp = Record
  107. Regs: TRegContent;
  108. { FPURegs: TRegFPUContent;} {currently not yet used}
  109. { allocated Registers }
  110. UsedRegs: TRegSet;
  111. { status of the direction flag }
  112. DirFlag: TFlagContents;
  113. {$ifdef tempOpts}
  114. { currently used temps }
  115. tempAllocs: PSearchLinkedList;
  116. {$endif tempOpts}
  117. { can this instruction be removed? }
  118. CanBeRemoved: Boolean;
  119. { are the resultflags set by this instruction used? }
  120. FlagsUsed: Boolean;
  121. end;
  122. ptaiprop = ^TtaiProp;
  123. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  124. PtaiPropBlock = ^TtaiPropBlock;
  125. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  126. TLabelTableItem = Record
  127. taiObj: tai;
  128. {$ifDef JumpAnal}
  129. InstrNr: Longint;
  130. RefsFound: Word;
  131. JmpsProcessed: Word
  132. {$endif JumpAnal}
  133. end;
  134. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  135. PLabelTable = ^TLabelTable;
  136. {*********************** procedures and functions ************************}
  137. procedure InsertLLItem(AsmL: TAAsmOutput; prev, foll, new_one: TLinkedListItem);
  138. function RefsEqual(const R1, R2: TReference): Boolean;
  139. function isgp32reg(supreg: tsuperregister): Boolean;
  140. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  141. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  142. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  143. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  144. function reginop(supreg: tsuperregister; const o:toper): boolean;
  145. function instrWritesFlags(p: tai): boolean;
  146. function instrReadsFlags(p: tai): boolean;
  147. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  148. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  149. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  150. const c: tcontent): boolean;
  151. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  152. const c: tcontent; var memwritedestroyed: boolean): boolean;
  153. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  154. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  155. procedure SkipHead(var p: tai);
  156. function labelCanBeSkipped(p: tai_label): boolean;
  157. procedure RemoveLastDeallocForFuncRes(asmL: TAAsmOutput; p: tai);
  158. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  159. hp: tai): boolean;
  160. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  161. procedure AllocRegBetween(asml: taasmoutput; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  162. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  163. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  164. function sizescompatible(loadsize,newsize: topsize): boolean;
  165. function OpsEqual(const o1,o2:toper): Boolean;
  166. type
  167. tdfaobj = class
  168. constructor create(_list: taasmoutput); virtual;
  169. function pass_1(_blockstart: tai): tai;
  170. function pass_2: boolean;
  171. procedure clear;
  172. function getlabelwithsym(sym: tasmlabel): tai;
  173. private
  174. { Walks through the list to find the lowest and highest label number, inits the }
  175. { labeltable and fixes/optimizes some regallocs }
  176. procedure initlabeltable;
  177. function initdfapass2: boolean;
  178. procedure dodfapass2;
  179. { asm list we're working on }
  180. list: taasmoutput;
  181. { current part of the asm list }
  182. blockstart, blockend: tai;
  183. { the amount of taiObjects in the current part of the assembler list }
  184. nroftaiobjs: longint;
  185. { Array which holds all TtaiProps }
  186. taipropblock: ptaipropblock;
  187. { all labels in the current block: their value mapped to their location }
  188. lolab, hilab, labdif: longint;
  189. labeltable: plabeltable;
  190. end;
  191. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  192. procedure incState(var S: Byte; amount: longint);
  193. {******************************* Variables *******************************}
  194. var
  195. dfa: tdfaobj;
  196. {*********************** end of Interface section ************************}
  197. Implementation
  198. Uses
  199. {$ifdef csdebug}
  200. cutils,
  201. {$else}
  202. {$ifdef statedebug}
  203. cutils,
  204. {$else}
  205. {$ifdef allocregdebug}
  206. cutils,
  207. {$endif}
  208. {$endif}
  209. {$endif}
  210. globals, systems, verbose, symconst, cgobj,procinfo;
  211. Type
  212. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  213. var
  214. {How many instructions are between the current instruction and the last one
  215. that modified the register}
  216. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  217. {$ifdef tempOpts}
  218. constructor TSearchLinkedListItem.init;
  219. begin
  220. end;
  221. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  222. begin
  223. equals := false;
  224. end;
  225. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  226. begin
  227. int1 := _int1;
  228. int2 := _int2;
  229. end;
  230. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  231. begin
  232. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  233. (TSearchDoubleIntItem(p).int2 = int2);
  234. end;
  235. function TSearchLinkedList.searchByValue(p: PSearchLinkedListItem): boolean;
  236. var temp: PSearchLinkedListItem;
  237. begin
  238. temp := first;
  239. while (temp <> last.next) and
  240. not(temp.equals(p)) do
  241. temp := temp.next;
  242. searchByValue := temp <> last.next;
  243. end;
  244. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  245. begin
  246. temp := first;
  247. while (temp <> last.next) and
  248. not(temp.equals(p)) do
  249. temp := temp.next;
  250. if temp <> last.next then
  251. begin
  252. remove(temp);
  253. dispose(temp,done);
  254. end;
  255. end;
  256. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  257. {updates UsedRegs with the RegAlloc Information coming after p}
  258. begin
  259. repeat
  260. while assigned(p) and
  261. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  262. ((p.typ = ait_label) and
  263. labelCanBeSkipped(tai_label(current)))) Do
  264. p := tai(p.next);
  265. while assigned(p) and
  266. (p.typ=ait_RegAlloc) Do
  267. begin
  268. case tai_regalloc(p).ratype of
  269. ra_alloc :
  270. UsedRegs := UsedRegs + [tai_regalloc(p).reg];
  271. ra_dealloc :
  272. UsedRegs := UsedRegs - [tai_regalloc(p).reg];
  273. end;
  274. p := tai(p.next);
  275. end;
  276. until not(assigned(p)) or
  277. (not(p.typ in SkipInstr) and
  278. not((p.typ = ait_label) and
  279. labelCanBeSkipped(tai_label(current))));
  280. end;
  281. {$endif tempOpts}
  282. {************************ Create the Label table ************************}
  283. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  284. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  285. { starting with Starttai and ending with the next "real" instruction }
  286. begin
  287. findregalloc := false;
  288. repeat
  289. while assigned(starttai) and
  290. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  291. ((starttai.typ = ait_label) and
  292. labelcanbeskipped(tai_label(starttai)))) do
  293. starttai := tai(starttai.next);
  294. if assigned(starttai) and
  295. (starttai.typ = ait_regalloc) then
  296. begin
  297. if (tai_regalloc(Starttai).ratype = ratyp) and
  298. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  299. begin
  300. findregalloc:=true;
  301. break;
  302. end;
  303. starttai := tai(starttai.next);
  304. end
  305. else
  306. break;
  307. until false;
  308. end;
  309. procedure RemoveLastDeallocForFuncRes(asml: taasmoutput; p: tai);
  310. procedure DoRemoveLastDeallocForFuncRes(asml: taasmoutput; supreg: tsuperregister);
  311. var
  312. hp2: tai;
  313. begin
  314. hp2 := p;
  315. repeat
  316. hp2 := tai(hp2.previous);
  317. if assigned(hp2) and
  318. (hp2.typ = ait_regalloc) and
  319. (tai_regalloc(hp2).ratype=ra_dealloc) and
  320. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  321. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  322. begin
  323. asml.remove(hp2);
  324. hp2.free;
  325. break;
  326. end;
  327. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  328. end;
  329. begin
  330. case current_procinfo.procdef.rettype.def.deftype of
  331. arraydef,recorddef,pointerdef,
  332. stringdef,enumdef,procdef,objectdef,errordef,
  333. filedef,setdef,procvardef,
  334. classrefdef,forwarddef:
  335. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  336. orddef:
  337. if current_procinfo.procdef.rettype.def.size <> 0 then
  338. begin
  339. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  340. { for int64/qword }
  341. if current_procinfo.procdef.rettype.def.size = 8 then
  342. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  343. end;
  344. end;
  345. end;
  346. procedure getNoDeallocRegs(var regs: tregset);
  347. var
  348. regCounter: TSuperRegister;
  349. begin
  350. regs := [];
  351. case current_procinfo.procdef.rettype.def.deftype of
  352. arraydef,recorddef,pointerdef,
  353. stringdef,enumdef,procdef,objectdef,errordef,
  354. filedef,setdef,procvardef,
  355. classrefdef,forwarddef:
  356. regs := [RS_EAX];
  357. orddef:
  358. if current_procinfo.procdef.rettype.def.size <> 0 then
  359. begin
  360. regs := [RS_EAX];
  361. { for int64/qword }
  362. if current_procinfo.procdef.rettype.def.size = 8 then
  363. regs := regs + [RS_EDX];
  364. end;
  365. end;
  366. for regCounter := RS_EAX to RS_EBX do
  367. { if not(regCounter in rg.usableregsint) then}
  368. include(regs,regcounter);
  369. end;
  370. procedure AddRegDeallocFor(asml: taasmoutput; reg: tregister; p: tai);
  371. var
  372. hp1: tai;
  373. funcResRegs: tregset;
  374. funcResReg: boolean;
  375. begin
  376. { if not(supreg in rg.usableregsint) then
  377. exit;}
  378. { if not(supreg in [RS_EDI]) then
  379. exit;}
  380. getNoDeallocRegs(funcresregs);
  381. { funcResRegs := funcResRegs - rg.usableregsint;}
  382. { funcResRegs := funcResRegs - [RS_EDI];}
  383. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  384. funcResReg := getsupreg(reg) in funcresregs;
  385. hp1 := p;
  386. {
  387. while not(funcResReg and
  388. (p.typ = ait_instruction) and
  389. (taicpu(p).opcode = A_JMP) and
  390. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  391. getLastInstruction(p, p) and
  392. not(regInInstruction(supreg, p)) do
  393. hp1 := p;
  394. }
  395. { don't insert a dealloc for registers which contain the function result }
  396. { if they are followed by a jump to the exit label (for exit(...)) }
  397. { if not(funcResReg) or
  398. not((hp1.typ = ait_instruction) and
  399. (taicpu(hp1).opcode = A_JMP) and
  400. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  401. begin
  402. p := tai_regalloc.deAlloc(reg,nil);
  403. insertLLItem(AsmL, hp1.previous, hp1, p);
  404. end;
  405. end;
  406. {************************ Search the Label table ************************}
  407. function findlabel(l: tasmlabel; var hp: tai): boolean;
  408. {searches for the specified label starting from hp as long as the
  409. encountered instructions are labels, to be able to optimize constructs like
  410. jne l2 jmp l2
  411. jmp l3 and l1:
  412. l1: l2:
  413. l2:}
  414. var
  415. p: tai;
  416. begin
  417. p := hp;
  418. while assigned(p) and
  419. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  420. if (p.typ <> ait_Label) or
  421. (tai_label(p).l <> l) then
  422. GetNextInstruction(p, p)
  423. else
  424. begin
  425. hp := p;
  426. findlabel := true;
  427. exit
  428. end;
  429. findlabel := false;
  430. end;
  431. {************************ Some general functions ************************}
  432. function tch2reg(ch: tinschange): tsuperregister;
  433. {converts a TChange variable to a TRegister}
  434. const
  435. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  436. begin
  437. if (ch <= CH_REDI) then
  438. tch2reg := ch2reg[ch]
  439. else if (ch <= CH_WEDI) then
  440. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  441. else if (ch <= CH_RWEDI) then
  442. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  443. else if (ch <= CH_MEDI) then
  444. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  445. else
  446. InternalError($db)
  447. end;
  448. { inserts new_one between prev and foll }
  449. procedure InsertLLItem(AsmL: TAAsmOutput; prev, foll, new_one: TLinkedListItem);
  450. begin
  451. if assigned(prev) then
  452. if assigned(foll) then
  453. begin
  454. if assigned(new_one) then
  455. begin
  456. new_one.previous := prev;
  457. new_one.next := foll;
  458. prev.next := new_one;
  459. foll.previous := new_one;
  460. { shgould we update line information }
  461. if (not (tai(new_one).typ in SkipLineInfo)) and
  462. (not (tai(foll).typ in SkipLineInfo)) then
  463. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  464. end;
  465. end
  466. else
  467. asml.Concat(new_one)
  468. else
  469. if assigned(foll) then
  470. asml.Insert(new_one)
  471. end;
  472. {********************* Compare parts of tai objects *********************}
  473. function regssamesize(reg1, reg2: tregister): boolean;
  474. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  475. 8bit, 16bit or 32bit)}
  476. begin
  477. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  478. internalerror(2003111602);
  479. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  480. end;
  481. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  482. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  483. OldReg and NewReg have the same size (has to be chcked in advance with
  484. RegsSameSize) and that neither equals RS_INVALID}
  485. var
  486. newsupreg, oldsupreg: tsuperregister;
  487. begin
  488. if (newreg = NR_NO) or (oldreg = NR_NO) then
  489. internalerror(2003111601);
  490. newsupreg := getsupreg(newreg);
  491. oldsupreg := getsupreg(oldreg);
  492. with RegInfo Do
  493. begin
  494. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  495. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  496. New2OldReg[newsupreg] := oldsupreg;
  497. end;
  498. end;
  499. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  500. begin
  501. case o.typ Of
  502. top_reg:
  503. if (o.reg <> NR_NO) then
  504. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  505. top_ref:
  506. begin
  507. if o.ref^.base <> NR_NO then
  508. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  509. if o.ref^.index <> NR_NO then
  510. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  511. end;
  512. end;
  513. end;
  514. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  515. begin
  516. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  517. if RegsSameSize(oldreg, newreg) then
  518. with reginfo do
  519. {here we always check for the 32 bit component, because it is possible that
  520. the 8 bit component has not been set, event though NewReg already has been
  521. processed. This happens if it has been compared with a register that doesn't
  522. have an 8 bit component (such as EDI). in that case the 8 bit component is
  523. still set to RS_NO and the comparison in the else-part will fail}
  524. if (getsupreg(oldReg) in OldRegsEncountered) then
  525. if (getsupreg(NewReg) in NewRegsEncountered) then
  526. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  527. { if we haven't encountered the new register yet, but we have encountered the
  528. old one already, the new one can only be correct if it's being written to
  529. (and consequently the old one is also being written to), otherwise
  530. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  531. movl (%eax), %eax movl (%edx), %edx
  532. are considered equivalent}
  533. else
  534. if (opact = opact_write) then
  535. begin
  536. AddReg2RegInfo(oldreg, newreg, reginfo);
  537. RegsEquivalent := true
  538. end
  539. else
  540. Regsequivalent := false
  541. else
  542. if not(getsupreg(newreg) in NewRegsEncountered) and
  543. ((opact = opact_write) or
  544. ((newreg = oldreg) and
  545. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  546. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  547. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  548. begin
  549. AddReg2RegInfo(oldreg, newreg, reginfo);
  550. RegsEquivalent := true
  551. end
  552. else
  553. RegsEquivalent := false
  554. else
  555. RegsEquivalent := false
  556. else
  557. RegsEquivalent := oldreg = newreg
  558. end;
  559. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  560. begin
  561. RefsEquivalent :=
  562. (r1.offset = r2.offset) and
  563. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  564. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  565. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  566. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  567. (r1.relsymbol = r2.relsymbol);
  568. end;
  569. function refsequal(const r1, r2: treference): boolean;
  570. begin
  571. refsequal :=
  572. (r1.offset = r2.offset) and
  573. (r1.segment = r2.segment) and (r1.base = r2.base) and
  574. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  575. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  576. (r1.relsymbol = r2.relsymbol);
  577. end;
  578. {$ifdef q+}
  579. {$q-}
  580. {$define overflowon}
  581. {$endif q+}
  582. // checks whether a write to r2 of size "size" contains address r1
  583. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  584. var
  585. realsize1, realsize2: aint;
  586. begin
  587. realsize1 := tcgsize2size[size1];
  588. realsize2 := tcgsize2size[size2];
  589. refsoverlapping :=
  590. (r2.offset <= r1.offset+realsize1) and
  591. (r1.offset <= r2.offset+realsize2) and
  592. (r1.segment = r2.segment) and (r1.base = r2.base) and
  593. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  594. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  595. (r1.relsymbol = r2.relsymbol);
  596. end;
  597. {$ifdef overflowon}
  598. {$q+}
  599. {$undef overflowon}
  600. {$endif overflowon}
  601. function isgp32reg(supreg: tsuperregister): boolean;
  602. {Checks if the register is a 32 bit general purpose register}
  603. begin
  604. isgp32reg := false;
  605. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  606. isgp32reg := true
  607. end;
  608. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  609. begin {checks whether ref contains a reference to reg}
  610. reginref :=
  611. ((ref.base <> NR_NO) and
  612. (getsupreg(ref.base) = supreg)) or
  613. ((ref.index <> NR_NO) and
  614. (getsupreg(ref.index) = supreg))
  615. end;
  616. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  617. var
  618. p: taicpu;
  619. opcount: longint;
  620. begin
  621. RegReadByInstruction := false;
  622. if hp.typ <> ait_instruction then
  623. exit;
  624. p := taicpu(hp);
  625. case p.opcode of
  626. A_CALL:
  627. regreadbyinstruction := true;
  628. A_IMUL:
  629. case p.ops of
  630. 1:
  631. regReadByInstruction :=
  632. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  633. 2,3:
  634. regReadByInstruction :=
  635. reginop(supreg,p.oper[0]^) or
  636. reginop(supreg,p.oper[1]^);
  637. end;
  638. A_IDIV,A_DIV,A_MUL:
  639. begin
  640. regReadByInstruction :=
  641. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  642. end;
  643. else
  644. begin
  645. for opcount := 0 to p.ops-1 do
  646. if (p.oper[opCount]^.typ = top_ref) and
  647. reginref(supreg,p.oper[opcount]^.ref^) then
  648. begin
  649. RegReadByInstruction := true;
  650. exit
  651. end;
  652. for opcount := 1 to maxinschanges do
  653. case insprop[p.opcode].ch[opcount] of
  654. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  655. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  656. begin
  657. RegReadByInstruction := true;
  658. exit
  659. end;
  660. CH_RWOP1,CH_ROP1,CH_MOP1:
  661. if //(p.oper[0]^.typ = top_reg) and
  662. reginop(supreg,p.oper[0]^) then
  663. begin
  664. RegReadByInstruction := true;
  665. exit
  666. end;
  667. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  668. if //(p.oper[1]^.typ = top_reg) and
  669. reginop(supreg,p.oper[1]^) then
  670. begin
  671. RegReadByInstruction := true;
  672. exit
  673. end;
  674. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  675. if //(p.oper[2]^.typ = top_reg) and
  676. reginop(supreg,p.oper[2]^) then
  677. begin
  678. RegReadByInstruction := true;
  679. exit
  680. end;
  681. end;
  682. end;
  683. end;
  684. end;
  685. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  686. { Checks if reg is used by the instruction p1 }
  687. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  688. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  689. var
  690. p: taicpu;
  691. opcount: Word;
  692. begin
  693. regInInstruction := false;
  694. if p1.typ <> ait_instruction then
  695. exit;
  696. p := taicpu(p1);
  697. case p.opcode of
  698. A_CALL:
  699. regininstruction := true;
  700. A_IMUL:
  701. case p.ops of
  702. 1:
  703. regInInstruction :=
  704. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  705. 2,3:
  706. regInInstruction :=
  707. reginop(supreg,p.oper[0]^) or
  708. reginop(supreg,p.oper[1]^) or
  709. (assigned(p.oper[2]) and
  710. reginop(supreg,p.oper[2]^));
  711. end;
  712. A_IDIV,A_DIV,A_MUL:
  713. regInInstruction :=
  714. reginop(supreg,p.oper[0]^) or
  715. (supreg in [RS_EAX,RS_EDX])
  716. else
  717. begin
  718. for opcount := 1 to maxinschanges do
  719. case insprop[p.opcode].Ch[opCount] of
  720. CH_REAX..CH_MEDI:
  721. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  722. begin
  723. regInInstruction := true;
  724. exit;
  725. end;
  726. CH_ROp1..CH_MOp1:
  727. if reginop(supreg,p.oper[0]^) then
  728. begin
  729. regInInstruction := true;
  730. exit
  731. end;
  732. Ch_ROp2..Ch_MOp2:
  733. if reginop(supreg,p.oper[1]^) then
  734. begin
  735. regInInstruction := true;
  736. exit
  737. end;
  738. Ch_ROp3..Ch_MOp3:
  739. if reginop(supreg,p.oper[2]^) then
  740. begin
  741. regInInstruction := true;
  742. exit
  743. end;
  744. end;
  745. end;
  746. end;
  747. end;
  748. function reginop(supreg: tsuperregister; const o:toper): boolean;
  749. begin
  750. reginop := false;
  751. case o.typ Of
  752. top_reg:
  753. reginop :=
  754. (getregtype(o.reg) = R_INTREGISTER) and
  755. (supreg = getsupreg(o.reg));
  756. top_ref:
  757. reginop :=
  758. ((o.ref^.base <> NR_NO) and
  759. (supreg = getsupreg(o.ref^.base))) or
  760. ((o.ref^.index <> NR_NO) and
  761. (supreg = getsupreg(o.ref^.index)));
  762. end;
  763. end;
  764. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  765. var
  766. InstrProp: TInsProp;
  767. TmpResult: Boolean;
  768. Cnt: Word;
  769. begin
  770. TmpResult := False;
  771. if supreg = RS_INVALID then
  772. exit;
  773. if (p1.typ = ait_instruction) then
  774. case taicpu(p1).opcode of
  775. A_IMUL:
  776. With taicpu(p1) Do
  777. TmpResult :=
  778. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  779. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  780. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  781. A_DIV, A_IDIV, A_MUL:
  782. With taicpu(p1) Do
  783. TmpResult :=
  784. (supreg in [RS_EAX,RS_EDX]);
  785. else
  786. begin
  787. Cnt := 1;
  788. InstrProp := InsProp[taicpu(p1).OpCode];
  789. while (Cnt <= maxinschanges) and
  790. (InstrProp.Ch[Cnt] <> Ch_None) and
  791. not(TmpResult) Do
  792. begin
  793. case InstrProp.Ch[Cnt] Of
  794. Ch_WEAX..Ch_MEDI:
  795. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  796. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  797. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  798. reginop(supreg,taicpu(p1).oper[0]^);
  799. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  800. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  801. reginop(supreg,taicpu(p1).oper[1]^);
  802. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  803. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  804. reginop(supreg,taicpu(p1).oper[2]^);
  805. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  806. Ch_ALL: TmpResult := true;
  807. end;
  808. inc(Cnt)
  809. end
  810. end
  811. end;
  812. RegModifiedByInstruction := TmpResult
  813. end;
  814. function instrWritesFlags(p: tai): boolean;
  815. var
  816. l: longint;
  817. begin
  818. instrWritesFlags := true;
  819. case p.typ of
  820. ait_instruction:
  821. begin
  822. for l := 1 to maxinschanges do
  823. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  824. exit;
  825. end;
  826. ait_label:
  827. exit;
  828. end;
  829. instrWritesFlags := false;
  830. end;
  831. function instrReadsFlags(p: tai): boolean;
  832. var
  833. l: longint;
  834. begin
  835. instrReadsFlags := true;
  836. case p.typ of
  837. ait_instruction:
  838. begin
  839. for l := 1 to maxinschanges do
  840. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  841. exit;
  842. end;
  843. ait_label:
  844. exit;
  845. end;
  846. instrReadsFlags := false;
  847. end;
  848. {********************* GetNext and GetLastInstruction *********************}
  849. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  850. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  851. { next tai object in Next. Returns false if there isn't any }
  852. begin
  853. repeat
  854. if (Current.typ = ait_marker) and
  855. (tai_Marker(current).Kind = AsmBlockStart) then
  856. begin
  857. GetNextInstruction := False;
  858. Next := Nil;
  859. Exit
  860. end;
  861. Current := tai(current.Next);
  862. while assigned(Current) and
  863. ((current.typ in skipInstr) or
  864. ((current.typ = ait_label) and
  865. labelCanBeSkipped(tai_label(current)))) do
  866. Current := tai(current.Next);
  867. { if assigned(Current) and
  868. (current.typ = ait_Marker) and
  869. (tai_Marker(current).Kind = NoPropInfoStart) then
  870. begin
  871. while assigned(Current) and
  872. ((current.typ <> ait_Marker) or
  873. (tai_Marker(current).Kind <> NoPropInfoend)) Do
  874. Current := tai(current.Next);
  875. end;}
  876. until not(assigned(Current)) or
  877. (current.typ <> ait_Marker) or
  878. not(tai_Marker(current).Kind in [NoPropInfoStart,NoPropInfoend]);
  879. Next := Current;
  880. if assigned(Current) and
  881. not((current.typ in SkipInstr) or
  882. ((current.typ = ait_label) and
  883. labelCanBeSkipped(tai_label(current))))
  884. then
  885. GetNextInstruction :=
  886. not((current.typ = ait_marker) and
  887. (tai_marker(current).kind = asmBlockStart))
  888. else
  889. begin
  890. GetNextInstruction := False;
  891. Next := nil;
  892. end;
  893. end;
  894. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  895. {skips the ait-types in SkipInstr puts the previous tai object in
  896. Last. Returns false if there isn't any}
  897. begin
  898. repeat
  899. Current := tai(current.previous);
  900. while assigned(Current) and
  901. (((current.typ = ait_Marker) and
  902. not(tai_Marker(current).Kind in [AsmBlockend{,NoPropInfoend}])) or
  903. (current.typ in SkipInstr) or
  904. ((current.typ = ait_label) and
  905. labelCanBeSkipped(tai_label(current)))) Do
  906. Current := tai(current.previous);
  907. { if assigned(Current) and
  908. (current.typ = ait_Marker) and
  909. (tai_Marker(current).Kind = NoPropInfoend) then
  910. begin
  911. while assigned(Current) and
  912. ((current.typ <> ait_Marker) or
  913. (tai_Marker(current).Kind <> NoPropInfoStart)) Do
  914. Current := tai(current.previous);
  915. end;}
  916. until not(assigned(Current)) or
  917. (current.typ <> ait_Marker) or
  918. not(tai_Marker(current).Kind in [NoPropInfoStart,NoPropInfoend]);
  919. if not(assigned(Current)) or
  920. (current.typ in SkipInstr) or
  921. ((current.typ = ait_label) and
  922. labelCanBeSkipped(tai_label(current))) or
  923. ((current.typ = ait_Marker) and
  924. (tai_Marker(current).Kind = AsmBlockend))
  925. then
  926. begin
  927. Last := nil;
  928. GetLastInstruction := False
  929. end
  930. else
  931. begin
  932. Last := Current;
  933. GetLastInstruction := True;
  934. end;
  935. end;
  936. procedure SkipHead(var p: tai);
  937. var
  938. oldp: tai;
  939. begin
  940. repeat
  941. oldp := p;
  942. if (p.typ in SkipInstr) or
  943. ((p.typ = ait_marker) and
  944. (tai_Marker(p).Kind in [AsmBlockend,inlinestart,inlineend])) then
  945. GetNextInstruction(p,p)
  946. else if ((p.Typ = Ait_Marker) and
  947. (tai_Marker(p).Kind = nopropinfostart)) then
  948. {a marker of the NoPropInfoStart can't be the first instruction of a
  949. TAAsmoutput list}
  950. GetNextInstruction(tai(p.previous),p);
  951. until p = oldp
  952. end;
  953. function labelCanBeSkipped(p: tai_label): boolean;
  954. begin
  955. labelCanBeSkipped := not(p.l.is_used) or p.l.is_addr;
  956. end;
  957. {******************* The Data Flow Analyzer functions ********************}
  958. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  959. hp: tai): boolean;
  960. { assumes reg is a 32bit register }
  961. var
  962. p: taicpu;
  963. begin
  964. if not assigned(hp) or
  965. (hp.typ <> ait_instruction) then
  966. begin
  967. regLoadedWithNewValue := false;
  968. exit;
  969. end;
  970. p := taicpu(hp);
  971. regLoadedWithNewValue :=
  972. (((p.opcode = A_MOV) or
  973. (p.opcode = A_MOVZX) or
  974. (p.opcode = A_MOVSX) or
  975. (p.opcode = A_LEA)) and
  976. (p.oper[1]^.typ = top_reg) and
  977. (getsupreg(p.oper[1]^.reg) = supreg) and
  978. (canDependOnPrevValue or
  979. (p.oper[0]^.typ <> top_ref) or
  980. not regInRef(supreg,p.oper[0]^.ref^)) or
  981. ((p.opcode = A_POP) and
  982. (getsupreg(p.oper[0]^.reg) = supreg)));
  983. end;
  984. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  985. {updates UsedRegs with the RegAlloc Information coming after p}
  986. begin
  987. repeat
  988. while assigned(p) and
  989. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  990. ((p.typ = ait_label) and
  991. labelCanBeSkipped(tai_label(p)))) Do
  992. p := tai(p.next);
  993. while assigned(p) and
  994. (p.typ=ait_RegAlloc) Do
  995. begin
  996. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  997. begin
  998. case tai_regalloc(p).ratype of
  999. ra_alloc :
  1000. UsedRegs := UsedRegs + [getsupreg(tai_regalloc(p).reg)];
  1001. ra_dealloc :
  1002. UsedRegs := UsedRegs - [getsupreg(tai_regalloc(p).reg)];
  1003. end;
  1004. end;
  1005. p := tai(p.next);
  1006. end;
  1007. until not(assigned(p)) or
  1008. (not(p.typ in SkipInstr) and
  1009. not((p.typ = ait_label) and
  1010. labelCanBeSkipped(tai_label(p))));
  1011. end;
  1012. procedure AllocRegBetween(asml: taasmoutput; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  1013. { allocates register reg between (and including) instructions p1 and p2 }
  1014. { the type of p1 and p2 must not be in SkipInstr }
  1015. { note that this routine is both called from the peephole optimizer }
  1016. { where optinfo is not yet initialised) and from the cse (where it is) }
  1017. var
  1018. hp: tai;
  1019. lastRemovedWasDealloc: boolean;
  1020. supreg: tsuperregister;
  1021. begin
  1022. {$ifdef EXTDEBUG}
  1023. if assigned(p1.optinfo) and
  1024. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1025. internalerror(2004101010);
  1026. {$endif EXTDEBUG}
  1027. supreg := getsupreg(reg);
  1028. { if not(supreg in rg.usableregsint+[RS_EDI,RS_ESI]) or
  1029. not(assigned(p1)) then}
  1030. if not(supreg in [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_EDI,RS_ESI]) or
  1031. not(assigned(p1)) then
  1032. { this happens with registers which are loaded implicitely, outside the }
  1033. { current block (e.g. esi with self) }
  1034. exit;
  1035. { make sure we allocate it for this instruction }
  1036. getnextinstruction(p2,p2);
  1037. lastRemovedWasDealloc := false;
  1038. {$ifdef allocregdebug}
  1039. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1040. ' from here...'));
  1041. insertllitem(asml,p1.previous,p1,hp);
  1042. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1043. ' till here...'));
  1044. insertllitem(asml,p2,p1.next,hp);
  1045. {$endif allocregdebug}
  1046. if not(supreg in initialusedregs) then
  1047. begin
  1048. hp := tai_regalloc.alloc(reg,nil);
  1049. insertllItem(asmL,p1.previous,p1,hp);
  1050. end;
  1051. while assigned(p1) and
  1052. (p1 <> p2) do
  1053. begin
  1054. if assigned(p1.optinfo) then
  1055. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1056. p1 := tai(p1.next);
  1057. repeat
  1058. while assigned(p1) and
  1059. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1060. p1 := tai(p1.next);
  1061. { remove all allocation/deallocation info about the register in between }
  1062. if assigned(p1) and
  1063. (p1.typ = ait_regalloc) then
  1064. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1065. begin
  1066. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1067. hp := tai(p1.Next);
  1068. asml.Remove(p1);
  1069. p1.free;
  1070. p1 := hp;
  1071. end
  1072. else p1 := tai(p1.next);
  1073. until not(assigned(p1)) or
  1074. not(p1.typ in SkipInstr);
  1075. end;
  1076. if assigned(p1) then
  1077. begin
  1078. if lastRemovedWasDealloc then
  1079. begin
  1080. hp := tai_regalloc.DeAlloc(reg,nil);
  1081. insertLLItem(asmL,p1.previous,p1,hp);
  1082. end;
  1083. end;
  1084. end;
  1085. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1086. var
  1087. hp: tai;
  1088. first: boolean;
  1089. begin
  1090. findregdealloc := false;
  1091. first := true;
  1092. while assigned(p.previous) and
  1093. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1094. ((tai(p.previous).typ = ait_label) and
  1095. labelCanBeSkipped(tai_label(p.previous)))) do
  1096. begin
  1097. p := tai(p.previous);
  1098. if (p.typ = ait_regalloc) and
  1099. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1100. if (tai_regalloc(p).ratype=ra_dealloc) then
  1101. if first then
  1102. begin
  1103. findregdealloc := true;
  1104. break;
  1105. end
  1106. else
  1107. begin
  1108. findRegDealloc :=
  1109. getNextInstruction(p,hp) and
  1110. regLoadedWithNewValue(supreg,false,hp);
  1111. break
  1112. end
  1113. else
  1114. first := false;
  1115. end
  1116. end;
  1117. procedure incState(var S: Byte; amount: longint);
  1118. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1119. errors}
  1120. begin
  1121. if (s <= $ff - amount) then
  1122. inc(s, amount)
  1123. else s := longint(s) + amount - $ff;
  1124. end;
  1125. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1126. { Content is the sequence of instructions that describes the contents of }
  1127. { seqReg. reg is being overwritten by the current instruction. if the }
  1128. { content of seqReg depends on reg (ie. because of a }
  1129. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1130. var
  1131. p: tai;
  1132. Counter: Word;
  1133. TmpResult: Boolean;
  1134. RegsChecked: TRegSet;
  1135. begin
  1136. RegsChecked := [];
  1137. p := Content.StartMod;
  1138. TmpResult := False;
  1139. Counter := 1;
  1140. while not(TmpResult) and
  1141. (Counter <= Content.NrOfMods) Do
  1142. begin
  1143. if (p.typ = ait_instruction) and
  1144. ((taicpu(p).opcode = A_MOV) or
  1145. (taicpu(p).opcode = A_MOVZX) or
  1146. (taicpu(p).opcode = A_MOVSX) or
  1147. (taicpu(p).opcode = A_LEA)) and
  1148. (taicpu(p).oper[0]^.typ = top_ref) then
  1149. With taicpu(p).oper[0]^.ref^ Do
  1150. if ((base = current_procinfo.FramePointer) or
  1151. (assigned(symbol) and (base = NR_NO))) and
  1152. (index = NR_NO) then
  1153. begin
  1154. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1155. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1156. break;
  1157. end
  1158. else
  1159. tmpResult :=
  1160. regReadByInstruction(supreg,p) and
  1161. regModifiedByInstruction(seqReg,p)
  1162. else
  1163. tmpResult :=
  1164. regReadByInstruction(supreg,p) and
  1165. regModifiedByInstruction(seqReg,p);
  1166. inc(Counter);
  1167. GetNextInstruction(p,p)
  1168. end;
  1169. sequenceDependsonReg := TmpResult
  1170. end;
  1171. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1172. var
  1173. counter: tsuperregister;
  1174. begin
  1175. for counter := RS_EAX to RS_EDI do
  1176. if counter <> supreg then
  1177. with p1^.regs[counter] Do
  1178. begin
  1179. if (typ in [con_ref,con_noRemoveRef]) and
  1180. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1181. if typ in [con_ref, con_invalid] then
  1182. typ := con_invalid
  1183. { con_noRemoveRef = con_unknown }
  1184. else
  1185. typ := con_unknown;
  1186. if assigned(memwrite) and
  1187. regInRef(counter,memwrite.oper[1]^.ref^) then
  1188. memwrite := nil;
  1189. end;
  1190. end;
  1191. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1192. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1193. contents of registers are loaded with a memory location based on reg.
  1194. doincState is false when this register has to be destroyed not because
  1195. it's contents are directly modified/overwritten, but because of an indirect
  1196. action (e.g. this register holds the contents of a variable and the value
  1197. of the variable in memory is changed) }
  1198. begin
  1199. { the following happens for fpu registers }
  1200. if (supreg < low(NrOfInstrSinceLastMod)) or
  1201. (supreg > high(NrOfInstrSinceLastMod)) then
  1202. exit;
  1203. NrOfInstrSinceLastMod[supreg] := 0;
  1204. with p1^.regs[supreg] do
  1205. begin
  1206. if doincState then
  1207. begin
  1208. incState(wstate,1);
  1209. typ := con_unknown;
  1210. startmod := nil;
  1211. end
  1212. else
  1213. if typ in [con_ref,con_const,con_invalid] then
  1214. typ := con_invalid
  1215. { con_noRemoveRef = con_unknown }
  1216. else
  1217. typ := con_unknown;
  1218. memwrite := nil;
  1219. end;
  1220. invalidateDependingRegs(p1,supreg);
  1221. end;
  1222. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1223. begin
  1224. if (p.typ = ait_instruction) then
  1225. begin
  1226. case taicpu(p).oper[0]^.typ Of
  1227. top_reg:
  1228. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1229. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1230. top_ref:
  1231. With TReference(taicpu(p).oper[0]^) Do
  1232. begin
  1233. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1234. then RegSet := RegSet + [base];
  1235. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1236. then RegSet := RegSet + [index];
  1237. end;
  1238. end;
  1239. case taicpu(p).oper[1]^.typ Of
  1240. top_reg:
  1241. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1242. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1243. top_ref:
  1244. With TReference(taicpu(p).oper[1]^) Do
  1245. begin
  1246. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1247. then RegSet := RegSet + [base];
  1248. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1249. then RegSet := RegSet + [index];
  1250. end;
  1251. end;
  1252. end;
  1253. end;}
  1254. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1255. begin {checks whether the two ops are equivalent}
  1256. OpsEquivalent := False;
  1257. if o1.typ=o2.typ then
  1258. case o1.typ Of
  1259. top_reg:
  1260. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1261. top_ref:
  1262. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1263. Top_Const:
  1264. OpsEquivalent := o1.val = o2.val;
  1265. Top_None:
  1266. OpsEquivalent := True
  1267. end;
  1268. end;
  1269. function OpsEqual(const o1,o2:toper): Boolean;
  1270. begin {checks whether the two ops are equal}
  1271. OpsEqual := False;
  1272. if o1.typ=o2.typ then
  1273. case o1.typ Of
  1274. top_reg :
  1275. OpsEqual:=o1.reg=o2.reg;
  1276. top_ref :
  1277. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1278. Top_Const :
  1279. OpsEqual:=o1.val=o2.val;
  1280. Top_None :
  1281. OpsEqual := True
  1282. end;
  1283. end;
  1284. function sizescompatible(loadsize,newsize: topsize): boolean;
  1285. begin
  1286. case loadsize of
  1287. S_B,S_BW,S_BL:
  1288. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1289. S_W,S_WL:
  1290. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1291. else
  1292. sizescompatible := newsize = S_L;
  1293. end;
  1294. end;
  1295. function opscompatible(p1,p2: taicpu): boolean;
  1296. begin
  1297. case p1.opcode of
  1298. A_MOVZX,A_MOVSX:
  1299. opscompatible :=
  1300. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1301. sizescompatible(p1.opsize,p2.opsize);
  1302. else
  1303. opscompatible :=
  1304. (p1.opcode = p2.opcode) and
  1305. (p1.ops = p2.ops) and
  1306. (p1.opsize = p2.opsize);
  1307. end;
  1308. end;
  1309. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1310. {$ifdef csdebug}
  1311. var
  1312. hp: tai;
  1313. {$endif csdebug}
  1314. begin {checks whether two taicpu instructions are equal}
  1315. if assigned(p1) and assigned(p2) and
  1316. (tai(p1).typ = ait_instruction) and
  1317. (tai(p2).typ = ait_instruction) and
  1318. opscompatible(taicpu(p1),taicpu(p2)) and
  1319. (not(assigned(taicpu(p1).oper[0])) or
  1320. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1321. (not(assigned(taicpu(p1).oper[1])) or
  1322. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1323. (not(assigned(taicpu(p1).oper[2])) or
  1324. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1325. {both instructions have the same structure:
  1326. "<operator> <operand of type1>, <operand of type 2>"}
  1327. if ((taicpu(p1).opcode = A_MOV) or
  1328. (taicpu(p1).opcode = A_MOVZX) or
  1329. (taicpu(p1).opcode = A_MOVSX) or
  1330. (taicpu(p1).opcode = A_LEA)) and
  1331. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1332. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1333. {the "old" instruction is a load of a register with a new value, not with
  1334. a value based on the contents of this register (so no "mov (reg), reg")}
  1335. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1336. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1337. {the "new" instruction is also a load of a register with a new value, and
  1338. this value is fetched from the same memory location}
  1339. begin
  1340. With taicpu(p2).oper[0]^.ref^ Do
  1341. begin
  1342. if (base <> NR_NO) and
  1343. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1344. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1345. if (index <> NR_NO) and
  1346. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1347. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1348. end;
  1349. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1350. from the reference are the same in the old and in the new instruction
  1351. sequence}
  1352. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1353. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1354. InstructionsEquivalent :=
  1355. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1356. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1357. end
  1358. {the registers are loaded with values from different memory locations. if
  1359. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1360. would be considered equivalent}
  1361. else
  1362. InstructionsEquivalent := False
  1363. else
  1364. {load register with a value based on the current value of this register}
  1365. begin
  1366. With taicpu(p2).oper[0]^.ref^ Do
  1367. begin
  1368. if (base <> NR_NO) and
  1369. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1370. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1371. {it won't do any harm if the register is already in RegsLoadedForRef}
  1372. begin
  1373. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1374. {$ifdef csdebug}
  1375. Writeln(std_regname(base), ' added');
  1376. {$endif csdebug}
  1377. end;
  1378. if (index <> NR_NO) and
  1379. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1380. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1381. begin
  1382. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1383. {$ifdef csdebug}
  1384. Writeln(std_regname(index), ' added');
  1385. {$endif csdebug}
  1386. end;
  1387. end;
  1388. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1389. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1390. begin
  1391. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1392. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1393. {$ifdef csdebug}
  1394. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1395. {$endif csdebug}
  1396. end;
  1397. InstructionsEquivalent :=
  1398. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1399. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1400. end
  1401. else
  1402. {an instruction <> mov, movzx, movsx}
  1403. begin
  1404. {$ifdef csdebug}
  1405. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1406. hp.previous := p2;
  1407. hp.next := p2.next;
  1408. p2.next.previous := hp;
  1409. p2.next := hp;
  1410. {$endif csdebug}
  1411. InstructionsEquivalent :=
  1412. (not(assigned(taicpu(p1).oper[0])) or
  1413. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1414. (not(assigned(taicpu(p1).oper[1])) or
  1415. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1416. (not(assigned(taicpu(p1).oper[2])) or
  1417. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1418. end
  1419. {the instructions haven't even got the same structure, so they're certainly
  1420. not equivalent}
  1421. else
  1422. begin
  1423. {$ifdef csdebug}
  1424. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1425. hp.previous := p2;
  1426. hp.next := p2.next;
  1427. p2.next.previous := hp;
  1428. p2.next := hp;
  1429. {$endif csdebug}
  1430. InstructionsEquivalent := False;
  1431. end;
  1432. {$ifdef csdebug}
  1433. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1434. hp.previous := p2;
  1435. hp.next := p2.next;
  1436. p2.next.previous := hp;
  1437. p2.next := hp;
  1438. {$endif csdebug}
  1439. end;
  1440. (*
  1441. function InstructionsEqual(p1, p2: tai): Boolean;
  1442. begin {checks whether two taicpu instructions are equal}
  1443. InstructionsEqual :=
  1444. assigned(p1) and assigned(p2) and
  1445. ((tai(p1).typ = ait_instruction) and
  1446. (tai(p1).typ = ait_instruction) and
  1447. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1448. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1449. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1450. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1451. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1452. end;
  1453. *)
  1454. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1455. begin
  1456. if supreg in [RS_EAX..RS_EDI] then
  1457. incState(p^.regs[supreg].rstate,1)
  1458. end;
  1459. procedure readref(p: ptaiprop; const ref: preference);
  1460. begin
  1461. if ref^.base <> NR_NO then
  1462. readreg(p, getsupreg(ref^.base));
  1463. if ref^.index <> NR_NO then
  1464. readreg(p, getsupreg(ref^.index));
  1465. end;
  1466. procedure ReadOp(p: ptaiprop;const o:toper);
  1467. begin
  1468. case o.typ Of
  1469. top_reg: readreg(p, getsupreg(o.reg));
  1470. top_ref: readref(p, o.ref);
  1471. end;
  1472. end;
  1473. function RefInInstruction(const ref: TReference; p: tai;
  1474. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1475. {checks whehter ref is used in p}
  1476. var
  1477. mysize: tcgsize;
  1478. TmpResult: Boolean;
  1479. begin
  1480. TmpResult := False;
  1481. if (p.typ = ait_instruction) then
  1482. begin
  1483. mysize := topsize2tcgsize[taicpu(p).opsize];
  1484. if (taicpu(p).ops >= 1) and
  1485. (taicpu(p).oper[0]^.typ = top_ref) then
  1486. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1487. if not(TmpResult) and
  1488. (taicpu(p).ops >= 2) and
  1489. (taicpu(p).oper[1]^.typ = top_ref) then
  1490. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1491. if not(TmpResult) and
  1492. (taicpu(p).ops >= 3) and
  1493. (taicpu(p).oper[2]^.typ = top_ref) then
  1494. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1495. end;
  1496. RefInInstruction := TmpResult;
  1497. end;
  1498. function RefInSequence(const ref: TReference; Content: TContent;
  1499. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1500. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1501. tai objects) to see whether ref is used somewhere}
  1502. var p: tai;
  1503. Counter: Word;
  1504. TmpResult: Boolean;
  1505. begin
  1506. p := Content.StartMod;
  1507. TmpResult := False;
  1508. Counter := 1;
  1509. while not(TmpResult) and
  1510. (Counter <= Content.NrOfMods) Do
  1511. begin
  1512. if (p.typ = ait_instruction) and
  1513. RefInInstruction(ref, p, RefsEq, size)
  1514. then TmpResult := True;
  1515. inc(Counter);
  1516. GetNextInstruction(p,p)
  1517. end;
  1518. RefInSequence := TmpResult
  1519. end;
  1520. {$ifdef q+}
  1521. {$q-}
  1522. {$define overflowon}
  1523. {$endif q+}
  1524. // checks whether a write to r2 of size "size" contains address r1
  1525. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1526. var
  1527. realsize1, realsize2: aint;
  1528. begin
  1529. realsize1 := tcgsize2size[size1];
  1530. realsize2 := tcgsize2size[size2];
  1531. arrayrefsoverlapping :=
  1532. (r2.offset <= r1.offset+realsize1) and
  1533. (r1.offset <= r2.offset+realsize2) and
  1534. (r1.segment = r2.segment) and
  1535. (r1.symbol=r2.symbol) and
  1536. (r1.base = r2.base)
  1537. end;
  1538. {$ifdef overflowon}
  1539. {$q+}
  1540. {$undef overflowon}
  1541. {$endif overflowon}
  1542. function isSimpleRef(const ref: treference): boolean;
  1543. { returns true if ref is reference to a local or global variable, to a }
  1544. { parameter or to an object field (this includes arrays). Returns false }
  1545. { otherwise. }
  1546. begin
  1547. isSimpleRef :=
  1548. assigned(ref.symbol) or
  1549. (ref.base = current_procinfo.framepointer);
  1550. end;
  1551. function containsPointerRef(p: tai): boolean;
  1552. { checks if an instruction contains a reference which is a pointer location }
  1553. var
  1554. hp: taicpu;
  1555. count: longint;
  1556. begin
  1557. containsPointerRef := false;
  1558. if p.typ <> ait_instruction then
  1559. exit;
  1560. hp := taicpu(p);
  1561. for count := 0 to hp.ops-1 do
  1562. begin
  1563. case hp.oper[count]^.typ of
  1564. top_ref:
  1565. if not isSimpleRef(hp.oper[count]^.ref^) then
  1566. begin
  1567. containsPointerRef := true;
  1568. exit;
  1569. end;
  1570. top_none:
  1571. exit;
  1572. end;
  1573. end;
  1574. end;
  1575. function containsPointerLoad(c: tcontent): boolean;
  1576. { checks whether the contents of a register contain a pointer reference }
  1577. var
  1578. p: tai;
  1579. count: longint;
  1580. begin
  1581. containsPointerLoad := false;
  1582. p := c.startmod;
  1583. for count := c.nrOfMods downto 1 do
  1584. begin
  1585. if containsPointerRef(p) then
  1586. begin
  1587. containsPointerLoad := true;
  1588. exit;
  1589. end;
  1590. getnextinstruction(p,p);
  1591. end;
  1592. end;
  1593. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1594. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1595. { returns whether the contents c of reg are invalid after regWritten is }
  1596. { is written to ref }
  1597. var
  1598. refsEq: trefCompare;
  1599. begin
  1600. if isSimpleRef(ref) then
  1601. begin
  1602. if (ref.index <> NR_NO) or
  1603. (assigned(ref.symbol) and
  1604. (ref.base <> NR_NO)) then
  1605. { local/global variable or parameter which is an array }
  1606. refsEq := {$ifdef fpc}@{$endif}arrayRefsOverlapping
  1607. else
  1608. { local/global variable or parameter which is not an array }
  1609. refsEq := {$ifdef fpc}@{$endif}refsOverlapping;
  1610. invalsmemwrite :=
  1611. assigned(c.memwrite) and
  1612. ((not(cs_uncertainOpts in aktglobalswitches) and
  1613. containsPointerRef(c.memwrite)) or
  1614. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1615. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1616. begin
  1617. writeToMemDestroysContents := false;
  1618. exit;
  1619. end;
  1620. { write something to a parameter, a local or global variable, so }
  1621. { * with uncertain optimizations on: }
  1622. { - destroy the contents of registers whose contents have somewhere a }
  1623. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1624. { are being written to memory) is not destroyed if it's StartMod is }
  1625. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1626. { expression based on ref) }
  1627. { * with uncertain optimizations off: }
  1628. { - also destroy registers that contain any pointer }
  1629. with c do
  1630. writeToMemDestroysContents :=
  1631. (typ in [con_ref,con_noRemoveRef]) and
  1632. ((not(cs_uncertainOpts in aktglobalswitches) and
  1633. containsPointerLoad(c)
  1634. ) or
  1635. (refInSequence(ref,c,refsEq,size) and
  1636. ((supreg <> regWritten) or
  1637. not((nrOfMods = 1) and
  1638. {StarMod is always of the type ait_instruction}
  1639. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1640. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1641. )
  1642. )
  1643. )
  1644. );
  1645. end
  1646. else
  1647. { write something to a pointer location, so }
  1648. { * with uncertain optimzations on: }
  1649. { - do not destroy registers which contain a local/global variable or }
  1650. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1651. { * with uncertain optimzations off: }
  1652. { - destroy every register which contains a memory location }
  1653. begin
  1654. invalsmemwrite :=
  1655. assigned(c.memwrite) and
  1656. (not(cs_UncertainOpts in aktglobalswitches) or
  1657. containsPointerRef(c.memwrite));
  1658. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1659. begin
  1660. writeToMemDestroysContents := false;
  1661. exit;
  1662. end;
  1663. with c do
  1664. writeToMemDestroysContents :=
  1665. (typ in [con_ref,con_noRemoveRef]) and
  1666. (not(cs_UncertainOpts in aktglobalswitches) or
  1667. { for movsl }
  1668. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1669. { don't destroy if reg contains a parameter, local or global variable }
  1670. containsPointerLoad(c)
  1671. );
  1672. end;
  1673. end;
  1674. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1675. const c: tcontent): boolean;
  1676. { returns whether the contents c of reg are invalid after destReg is }
  1677. { modified }
  1678. begin
  1679. writeToRegDestroysContents :=
  1680. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1681. sequenceDependsOnReg(c,supreg,destReg);
  1682. end;
  1683. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1684. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1685. { returns whether the contents c of reg are invalid after regWritten is }
  1686. { is written to op }
  1687. begin
  1688. memwritedestroyed := false;
  1689. case op.typ of
  1690. top_reg:
  1691. writeDestroysContents :=
  1692. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1693. top_ref:
  1694. writeDestroysContents :=
  1695. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1696. else
  1697. writeDestroysContents := false;
  1698. end;
  1699. end;
  1700. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1701. { destroys all registers which possibly contain a reference to ref, regWritten }
  1702. { is the register whose contents are being written to memory (if this proc }
  1703. { is called because of a "mov?? %reg, (mem)" instruction) }
  1704. var
  1705. counter: tsuperregister;
  1706. destroymemwrite: boolean;
  1707. begin
  1708. for counter := RS_EAX to RS_EDI Do
  1709. begin
  1710. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1711. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1712. destroyReg(ptaiprop(p.optInfo), counter, false)
  1713. else if destroymemwrite then
  1714. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1715. end;
  1716. end;
  1717. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1718. var Counter: tsuperregister;
  1719. begin {initializes/desrtoys all registers}
  1720. For Counter := RS_EAX To RS_EDI Do
  1721. begin
  1722. if read then
  1723. readreg(p, Counter);
  1724. DestroyReg(p, Counter, written);
  1725. p^.regs[counter].MemWrite := nil;
  1726. end;
  1727. p^.DirFlag := F_Unknown;
  1728. end;
  1729. procedure DestroyOp(taiObj: tai; const o:Toper);
  1730. {$ifdef statedebug}
  1731. var
  1732. hp: tai;
  1733. {$endif statedebug}
  1734. begin
  1735. case o.typ Of
  1736. top_reg:
  1737. begin
  1738. {$ifdef statedebug}
  1739. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1740. hp.next := taiobj.next;
  1741. hp.previous := taiobj;
  1742. taiobj.next := hp;
  1743. if assigned(hp.next) then
  1744. hp.next.previous := hp;
  1745. {$endif statedebug}
  1746. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1747. end;
  1748. top_ref:
  1749. begin
  1750. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1751. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1752. end;
  1753. end;
  1754. end;
  1755. procedure AddInstr2RegContents({$ifdef statedebug} asml: taasmoutput; {$endif}
  1756. p: taicpu; supreg: tsuperregister);
  1757. {$ifdef statedebug}
  1758. var
  1759. hp: tai;
  1760. {$endif statedebug}
  1761. begin
  1762. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1763. if (typ in [con_ref,con_noRemoveRef]) then
  1764. begin
  1765. incState(wstate,1);
  1766. { also store how many instructions are part of the sequence in the first }
  1767. { instructions ptaiprop, so it can be easily accessed from within }
  1768. { CheckSequence}
  1769. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1770. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1771. NrOfInstrSinceLastMod[supreg] := 0;
  1772. invalidateDependingRegs(p.optinfo,supreg);
  1773. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1774. {$ifdef StateDebug}
  1775. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1776. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1777. InsertLLItem(AsmL, p, p.next, hp);
  1778. {$endif StateDebug}
  1779. end
  1780. else
  1781. begin
  1782. {$ifdef statedebug}
  1783. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1784. insertllitem(asml,p,p.next,hp);
  1785. {$endif statedebug}
  1786. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1787. {$ifdef StateDebug}
  1788. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1789. InsertLLItem(AsmL, p, p.next, hp);
  1790. {$endif StateDebug}
  1791. end
  1792. end;
  1793. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAAsmoutput; {$endif}
  1794. p: taicpu; const oper: TOper);
  1795. begin
  1796. if oper.typ = top_reg then
  1797. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1798. else
  1799. begin
  1800. ReadOp(ptaiprop(p.optinfo), oper);
  1801. DestroyOp(p, oper);
  1802. end
  1803. end;
  1804. {*************************************************************************************}
  1805. {************************************** TDFAOBJ **************************************}
  1806. {*************************************************************************************}
  1807. constructor tdfaobj.create(_list: taasmoutput);
  1808. begin
  1809. list := _list;
  1810. blockstart := nil;
  1811. blockend := nil;
  1812. nroftaiobjs := 0;
  1813. taipropblock := nil;
  1814. lolab := 0;
  1815. hilab := 0;
  1816. labdif := 0;
  1817. labeltable := nil;
  1818. end;
  1819. procedure tdfaobj.initlabeltable;
  1820. var
  1821. labelfound: boolean;
  1822. p, prev: tai;
  1823. hp1, hp2: tai;
  1824. {$ifdef i386}
  1825. regcounter,
  1826. supreg : tsuperregister;
  1827. {$endif i386}
  1828. usedregs, nodeallocregs: tregset;
  1829. begin
  1830. labelfound := false;
  1831. lolab := maxlongint;
  1832. hilab := 0;
  1833. p := blockstart;
  1834. prev := p;
  1835. while assigned(p) do
  1836. begin
  1837. if (tai(p).typ = ait_label) then
  1838. if not labelcanbeskipped(tai_label(p)) then
  1839. begin
  1840. labelfound := true;
  1841. if (tai_Label(p).l.labelnr < lolab) then
  1842. lolab := tai_label(p).l.labelnr;
  1843. if (tai_Label(p).l.labelnr > hilab) then
  1844. hilab := tai_label(p).l.labelnr;
  1845. end;
  1846. prev := p;
  1847. getnextinstruction(p, p);
  1848. end;
  1849. if (prev.typ = ait_marker) and
  1850. (tai_marker(prev).kind = asmblockstart) then
  1851. blockend := prev
  1852. else blockend := nil;
  1853. if labelfound then
  1854. labdif := hilab+1-lolab
  1855. else labdif := 0;
  1856. usedregs := [];
  1857. if (labdif <> 0) then
  1858. begin
  1859. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1860. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1861. end;
  1862. p := blockstart;
  1863. prev := p;
  1864. while (p <> blockend) do
  1865. begin
  1866. case p.typ of
  1867. ait_label:
  1868. if not labelcanbeskipped(tai_label(p)) then
  1869. labeltable^[tai_label(p).l.labelnr-lolab].taiobj := p;
  1870. {$ifdef i386}
  1871. ait_regalloc:
  1872. begin
  1873. supreg:=getsupreg(tai_regalloc(p).reg);
  1874. case tai_regalloc(p).ratype of
  1875. ra_alloc :
  1876. begin
  1877. if not(supreg in usedregs) then
  1878. include(usedregs, supreg)
  1879. else
  1880. begin
  1881. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1882. hp1 := tai(p.previous);
  1883. list.remove(p);
  1884. p.free;
  1885. p := hp1;
  1886. end;
  1887. end;
  1888. ra_dealloc :
  1889. begin
  1890. exclude(usedregs, supreg);
  1891. hp1 := p;
  1892. hp2 := nil;
  1893. while not(findregalloc(getsupreg(tai_regalloc(p).reg), tai(hp1.next),ra_alloc)) and
  1894. getnextinstruction(hp1, hp1) and
  1895. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1896. hp2 := hp1;
  1897. if hp2 <> nil then
  1898. begin
  1899. hp1 := tai(p.previous);
  1900. list.remove(p);
  1901. insertllitem(list, hp2, tai(hp2.next), p);
  1902. p := hp1;
  1903. end
  1904. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1905. and getnextinstruction(p,hp1) then
  1906. begin
  1907. hp1 := tai(p.previous);
  1908. list.remove(p);
  1909. p.free;
  1910. p := hp1;
  1911. include(usedregs,supreg);
  1912. end;
  1913. end;
  1914. end;
  1915. end;
  1916. {$endif i386}
  1917. end;
  1918. repeat
  1919. prev := p;
  1920. p := tai(p.next);
  1921. until not(assigned(p)) or
  1922. not(p.typ in (skipinstr - [ait_regalloc]));
  1923. end;
  1924. {$ifdef i386}
  1925. { don't add deallocation for function result variable or for regvars}
  1926. getNoDeallocRegs(noDeallocRegs);
  1927. usedRegs := usedRegs - noDeallocRegs;
  1928. for regCounter := RS_EAX to RS_EDI do
  1929. if regCounter in usedRegs then
  1930. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1931. {$endif i386}
  1932. end;
  1933. function tdfaobj.pass_1(_blockstart: tai): tai;
  1934. begin
  1935. blockstart := _blockstart;
  1936. initlabeltable;
  1937. pass_1 := blockend;
  1938. end;
  1939. function tdfaobj.initdfapass2: boolean;
  1940. {reserves memory for the PtaiProps in one big memory block when not using
  1941. TP, returns False if not enough memory is available for the optimizer in all
  1942. cases}
  1943. var
  1944. p: tai;
  1945. count: Longint;
  1946. { TmpStr: String; }
  1947. begin
  1948. p := blockstart;
  1949. skiphead(p);
  1950. nroftaiobjs := 0;
  1951. while (p <> blockend) do
  1952. begin
  1953. {$ifDef JumpAnal}
  1954. case p.typ of
  1955. ait_label:
  1956. begin
  1957. if not labelcanbeskipped(tai_label(p)) then
  1958. labeltable^[tai_label(p).l.labelnr-lolab].instrnr := nroftaiobjs
  1959. end;
  1960. ait_instruction:
  1961. begin
  1962. if taicpu(p).is_jmp then
  1963. begin
  1964. if (tasmlabel(taicpu(p).oper[0]^.sym).labelnr >= lolab) and
  1965. (tasmlabel(taicpu(p).oper[0]^.sym).labelnr <= hilab) then
  1966. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labelnr-lolab].refsfound);
  1967. end;
  1968. end;
  1969. { ait_instruction:
  1970. begin
  1971. if (taicpu(p).opcode = A_PUSH) and
  1972. (taicpu(p).oper[0]^.typ = top_symbol) and
  1973. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  1974. begin
  1975. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  1976. if}
  1977. end;
  1978. {$endif JumpAnal}
  1979. inc(NrOftaiObjs);
  1980. getnextinstruction(p,p);
  1981. end;
  1982. if nroftaiobjs <> 0 then
  1983. begin
  1984. initdfapass2 := True;
  1985. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  1986. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  1987. p := blockstart;
  1988. skiphead(p);
  1989. for count := 1 To nroftaiobjs do
  1990. begin
  1991. ptaiprop(p.optinfo) := @taipropblock^[count];
  1992. getnextinstruction(p, p);
  1993. end;
  1994. end
  1995. else
  1996. initdfapass2 := false;
  1997. end;
  1998. procedure tdfaobj.dodfapass2;
  1999. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2000. contents for the instructions starting with p. Returns the last tai which has
  2001. been processed}
  2002. var
  2003. curprop, LastFlagsChangeProp: ptaiprop;
  2004. Cnt, InstrCnt : Longint;
  2005. InstrProp: TInsProp;
  2006. UsedRegs: TRegSet;
  2007. prev,p : tai;
  2008. tmpref: TReference;
  2009. tmpsupreg: tsuperregister;
  2010. {$ifdef statedebug}
  2011. hp : tai;
  2012. {$endif}
  2013. {$ifdef AnalyzeLoops}
  2014. hp : tai;
  2015. TmpState: Byte;
  2016. {$endif AnalyzeLoops}
  2017. begin
  2018. p := BlockStart;
  2019. LastFlagsChangeProp := nil;
  2020. prev := nil;
  2021. UsedRegs := [];
  2022. UpdateUsedregs(UsedRegs, p);
  2023. SkipHead(p);
  2024. BlockStart := p;
  2025. InstrCnt := 1;
  2026. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2027. while (p <> Blockend) Do
  2028. begin
  2029. curprop := @taiPropBlock^[InstrCnt];
  2030. if assigned(prev)
  2031. then
  2032. begin
  2033. {$ifdef JumpAnal}
  2034. if (p.Typ <> ait_label) then
  2035. {$endif JumpAnal}
  2036. begin
  2037. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2038. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2039. curprop^.FlagsUsed := false;
  2040. end
  2041. end
  2042. else
  2043. begin
  2044. fillchar(curprop^, SizeOf(curprop^), 0);
  2045. { For tmpreg := RS_EAX to RS_EDI Do
  2046. curprop^.regs[tmpreg].WState := 1;}
  2047. end;
  2048. curprop^.UsedRegs := UsedRegs;
  2049. curprop^.CanBeRemoved := False;
  2050. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2051. For tmpsupreg := RS_EAX To RS_EDI Do
  2052. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2053. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2054. else
  2055. begin
  2056. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2057. curprop^.regs[tmpsupreg].typ := con_unknown;
  2058. end;
  2059. case p.typ Of
  2060. ait_marker:;
  2061. ait_label:
  2062. {$ifndef JumpAnal}
  2063. if not labelCanBeSkipped(tai_label(p)) then
  2064. DestroyAllRegs(curprop,false,false);
  2065. {$else JumpAnal}
  2066. begin
  2067. if not labelCanBeSkipped(tai_label(p)) then
  2068. With LTable^[tai_Label(p).l^.labelnr-LoLab] Do
  2069. {$ifDef AnalyzeLoops}
  2070. if (RefsFound = tai_Label(p).l^.RefCount)
  2071. {$else AnalyzeLoops}
  2072. if (JmpsProcessed = tai_Label(p).l^.RefCount)
  2073. {$endif AnalyzeLoops}
  2074. then
  2075. {all jumps to this label have been found}
  2076. {$ifDef AnalyzeLoops}
  2077. if (JmpsProcessed > 0)
  2078. then
  2079. {$endif AnalyzeLoops}
  2080. {we've processed at least one jump to this label}
  2081. begin
  2082. if (GetLastInstruction(p, hp) and
  2083. not(((hp.typ = ait_instruction)) and
  2084. (taicpu_labeled(hp).is_jmp))
  2085. then
  2086. {previous instruction not a JMP -> the contents of the registers after the
  2087. previous intruction has been executed have to be taken into account as well}
  2088. For tmpsupreg := RS_EAX to RS_EDI Do
  2089. begin
  2090. if (curprop^.regs[tmpsupreg].WState <>
  2091. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2092. then DestroyReg(curprop, tmpsupreg, true)
  2093. end
  2094. end
  2095. {$ifDef AnalyzeLoops}
  2096. else
  2097. {a label from a backward jump (e.g. a loop), no jump to this label has
  2098. already been processed}
  2099. if GetLastInstruction(p, hp) and
  2100. not(hp.typ = ait_instruction) and
  2101. (taicpu_labeled(hp).opcode = A_JMP))
  2102. then
  2103. {previous instruction not a jmp, so keep all the registers' contents from the
  2104. previous instruction}
  2105. begin
  2106. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2107. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2108. end
  2109. else
  2110. {previous instruction a jmp and no jump to this label processed yet}
  2111. begin
  2112. hp := p;
  2113. Cnt := InstrCnt;
  2114. {continue until we find a jump to the label or a label which has already
  2115. been processed}
  2116. while GetNextInstruction(hp, hp) and
  2117. not((hp.typ = ait_instruction) and
  2118. (taicpu(hp).is_jmp) and
  2119. (tasmlabel(taicpu(hp).oper[0]^.sym).labelnr = tai_Label(p).l^.labelnr)) and
  2120. not((hp.typ = ait_label) and
  2121. (LTable^[tai_Label(hp).l^.labelnr-LoLab].RefsFound
  2122. = tai_Label(hp).l^.RefCount) and
  2123. (LTable^[tai_Label(hp).l^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2124. inc(Cnt);
  2125. if (hp.typ = ait_label)
  2126. then
  2127. {there's a processed label after the current one}
  2128. begin
  2129. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2130. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2131. end
  2132. else
  2133. {there's no label anymore after the current one, or they haven't been
  2134. processed yet}
  2135. begin
  2136. GetLastInstruction(p, hp);
  2137. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2138. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2139. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2140. end
  2141. end
  2142. {$endif AnalyzeLoops}
  2143. else
  2144. {not all references to this label have been found, so destroy all registers}
  2145. begin
  2146. GetLastInstruction(p, hp);
  2147. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2148. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2149. DestroyAllRegs(curprop,true,true)
  2150. end;
  2151. end;
  2152. {$endif JumpAnal}
  2153. {$ifdef GDB}
  2154. ait_stabs, ait_stabn, ait_stab_function_name:;
  2155. {$endif GDB}
  2156. ait_align: ; { may destroy flags !!! }
  2157. ait_instruction:
  2158. begin
  2159. if taicpu(p).is_jmp or
  2160. (taicpu(p).opcode = A_JMP) then
  2161. begin
  2162. {$ifNDef JumpAnal}
  2163. for tmpsupreg := RS_EAX to RS_EDI do
  2164. with curprop^.regs[tmpsupreg] do
  2165. case typ of
  2166. con_ref: typ := con_noRemoveRef;
  2167. con_const: typ := con_noRemoveConst;
  2168. con_invalid: typ := con_unknown;
  2169. end;
  2170. {$else JumpAnal}
  2171. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labelnr-LoLab] Do
  2172. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2173. begin
  2174. if (InstrCnt < InstrNr)
  2175. then
  2176. {forward jump}
  2177. if (JmpsProcessed = 0) then
  2178. {no jump to this label has been processed yet}
  2179. begin
  2180. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2181. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2182. inc(JmpsProcessed);
  2183. end
  2184. else
  2185. begin
  2186. For tmpreg := RS_EAX to RS_EDI Do
  2187. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2188. curprop^.regs[tmpreg].WState) then
  2189. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2190. inc(JmpsProcessed);
  2191. end
  2192. {$ifdef AnalyzeLoops}
  2193. else
  2194. { backward jump, a loop for example}
  2195. { if (JmpsProcessed > 0) or
  2196. not(GetLastInstruction(taiObj, hp) and
  2197. (hp.typ = ait_labeled_instruction) and
  2198. (taicpu_labeled(hp).opcode = A_JMP))
  2199. then}
  2200. {instruction prior to label is not a jmp, or at least one jump to the label
  2201. has yet been processed}
  2202. begin
  2203. inc(JmpsProcessed);
  2204. For tmpreg := RS_EAX to RS_EDI Do
  2205. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2206. curprop^.regs[tmpreg].WState)
  2207. then
  2208. begin
  2209. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2210. Cnt := InstrNr;
  2211. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2212. begin
  2213. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2214. inc(Cnt);
  2215. end;
  2216. while (Cnt <= InstrCnt) Do
  2217. begin
  2218. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2219. inc(Cnt)
  2220. end
  2221. end;
  2222. end
  2223. { else }
  2224. {instruction prior to label is a jmp and no jumps to the label have yet been
  2225. processed}
  2226. { begin
  2227. inc(JmpsProcessed);
  2228. For tmpreg := RS_EAX to RS_EDI Do
  2229. begin
  2230. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2231. Cnt := InstrNr;
  2232. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2233. begin
  2234. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2235. inc(Cnt);
  2236. end;
  2237. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2238. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2239. begin
  2240. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2241. inc(Cnt);
  2242. end;
  2243. while (Cnt <= InstrCnt) Do
  2244. begin
  2245. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2246. inc(Cnt)
  2247. end
  2248. end
  2249. end}
  2250. {$endif AnalyzeLoops}
  2251. end;
  2252. {$endif JumpAnal}
  2253. end
  2254. else
  2255. begin
  2256. InstrProp := InsProp[taicpu(p).opcode];
  2257. case taicpu(p).opcode Of
  2258. A_MOV, A_MOVZX, A_MOVSX:
  2259. begin
  2260. case taicpu(p).oper[0]^.typ Of
  2261. top_ref, top_reg:
  2262. case taicpu(p).oper[1]^.typ Of
  2263. top_reg:
  2264. begin
  2265. {$ifdef statedebug}
  2266. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2267. insertllitem(list,p,p.next,hp);
  2268. {$endif statedebug}
  2269. readOp(curprop, taicpu(p).oper[0]^);
  2270. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2271. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2272. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2273. begin
  2274. with curprop^.regs[tmpsupreg] Do
  2275. begin
  2276. incState(wstate,1);
  2277. { also store how many instructions are part of the sequence in the first }
  2278. { instruction's ptaiprop, so it can be easily accessed from within }
  2279. { CheckSequence }
  2280. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2281. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2282. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2283. { Destroy the contents of the registers }
  2284. { that depended on the previous value of }
  2285. { this register }
  2286. invalidateDependingRegs(curprop,tmpsupreg);
  2287. curprop^.regs[tmpsupreg].memwrite := nil;
  2288. end;
  2289. end
  2290. else
  2291. begin
  2292. {$ifdef statedebug}
  2293. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2294. insertllitem(list,p,p.next,hp);
  2295. {$endif statedebug}
  2296. destroyReg(curprop, tmpsupreg, true);
  2297. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2298. with curprop^.regs[tmpsupreg] Do
  2299. begin
  2300. typ := con_ref;
  2301. startmod := p;
  2302. nrOfMods := 1;
  2303. end
  2304. end;
  2305. {$ifdef StateDebug}
  2306. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2307. insertllitem(list,p,p.next,hp);
  2308. {$endif StateDebug}
  2309. end;
  2310. top_ref:
  2311. begin
  2312. readref(curprop, taicpu(p).oper[1]^.ref);
  2313. if taicpu(p).oper[0]^.typ = top_reg then
  2314. begin
  2315. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2316. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2317. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2318. taicpu(p);
  2319. end
  2320. else
  2321. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2322. end;
  2323. end;
  2324. top_Const:
  2325. begin
  2326. case taicpu(p).oper[1]^.typ Of
  2327. top_reg:
  2328. begin
  2329. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2330. {$ifdef statedebug}
  2331. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2332. insertllitem(list,p,p.next,hp);
  2333. {$endif statedebug}
  2334. With curprop^.regs[tmpsupreg] Do
  2335. begin
  2336. DestroyReg(curprop, tmpsupreg, true);
  2337. typ := Con_Const;
  2338. StartMod := p;
  2339. end
  2340. end;
  2341. top_ref:
  2342. begin
  2343. readref(curprop, taicpu(p).oper[1]^.ref);
  2344. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2345. end;
  2346. end;
  2347. end;
  2348. end;
  2349. end;
  2350. A_DIV, A_IDIV, A_MUL:
  2351. begin
  2352. ReadOp(curprop, taicpu(p).oper[0]^);
  2353. readreg(curprop,RS_EAX);
  2354. if (taicpu(p).OpCode = A_IDIV) or
  2355. (taicpu(p).OpCode = A_DIV) then
  2356. begin
  2357. readreg(curprop,RS_EDX);
  2358. end;
  2359. {$ifdef statedebug}
  2360. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2361. insertllitem(list,p,p.next,hp);
  2362. {$endif statedebug}
  2363. { DestroyReg(curprop, RS_EAX, true);}
  2364. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2365. taicpu(p), RS_EAX);
  2366. DestroyReg(curprop, RS_EDX, true);
  2367. LastFlagsChangeProp := curprop;
  2368. end;
  2369. A_IMUL:
  2370. begin
  2371. ReadOp(curprop,taicpu(p).oper[0]^);
  2372. if (taicpu(p).ops >= 2) then
  2373. ReadOp(curprop,taicpu(p).oper[1]^);
  2374. if (taicpu(p).ops <= 2) then
  2375. if (taicpu(p).oper[1]^.typ = top_none) then
  2376. begin
  2377. readreg(curprop,RS_EAX);
  2378. {$ifdef statedebug}
  2379. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2380. insertllitem(list,p,p.next,hp);
  2381. {$endif statedebug}
  2382. { DestroyReg(curprop, RS_EAX, true); }
  2383. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2384. taicpu(p), RS_EAX);
  2385. DestroyReg(curprop,RS_EDX, true)
  2386. end
  2387. else
  2388. AddInstr2OpContents(
  2389. {$ifdef statedebug}list,{$endif}
  2390. taicpu(p), taicpu(p).oper[1]^)
  2391. else
  2392. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2393. taicpu(p), taicpu(p).oper[2]^);
  2394. LastFlagsChangeProp := curprop;
  2395. end;
  2396. A_LEA:
  2397. begin
  2398. readop(curprop,taicpu(p).oper[0]^);
  2399. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2400. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2401. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2402. else
  2403. begin
  2404. {$ifdef statedebug}
  2405. hp := tai_comment.Create(strpnew('destroying & initing'+
  2406. std_regname(taicpu(p).oper[1]^.reg)));
  2407. insertllitem(list,p,p.next,hp);
  2408. {$endif statedebug}
  2409. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2410. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2411. begin
  2412. typ := con_ref;
  2413. startmod := p;
  2414. nrOfMods := 1;
  2415. end
  2416. end;
  2417. end;
  2418. else
  2419. begin
  2420. Cnt := 1;
  2421. while (Cnt <= maxinschanges) and
  2422. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2423. begin
  2424. case InstrProp.Ch[Cnt] Of
  2425. Ch_REAX..Ch_REDI:
  2426. begin
  2427. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2428. readreg(curprop,tmpsupreg);
  2429. end;
  2430. Ch_WEAX..Ch_RWEDI:
  2431. begin
  2432. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2433. begin
  2434. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2435. readreg(curprop,tmpsupreg);
  2436. end;
  2437. {$ifdef statedebug}
  2438. hp := tai_comment.Create(strpnew('destroying '+
  2439. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2440. insertllitem(list,p,p.next,hp);
  2441. {$endif statedebug}
  2442. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2443. DestroyReg(curprop,tmpsupreg, true);
  2444. end;
  2445. Ch_MEAX..Ch_MEDI:
  2446. begin
  2447. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2448. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2449. taicpu(p),tmpsupreg);
  2450. end;
  2451. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2452. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2453. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2454. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2455. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2456. Ch_Wop1..Ch_RWop1:
  2457. begin
  2458. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2459. ReadOp(curprop, taicpu(p).oper[0]^);
  2460. DestroyOp(p, taicpu(p).oper[0]^);
  2461. end;
  2462. Ch_Mop1:
  2463. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2464. taicpu(p), taicpu(p).oper[0]^);
  2465. Ch_Wop2..Ch_RWop2:
  2466. begin
  2467. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2468. ReadOp(curprop, taicpu(p).oper[1]^);
  2469. DestroyOp(p, taicpu(p).oper[1]^);
  2470. end;
  2471. Ch_Mop2:
  2472. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2473. taicpu(p), taicpu(p).oper[1]^);
  2474. Ch_WOp3..Ch_RWOp3:
  2475. begin
  2476. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2477. ReadOp(curprop, taicpu(p).oper[2]^);
  2478. DestroyOp(p, taicpu(p).oper[2]^);
  2479. end;
  2480. Ch_Mop3:
  2481. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2482. taicpu(p), taicpu(p).oper[2]^);
  2483. Ch_WMemEDI:
  2484. begin
  2485. readreg(curprop, RS_EDI);
  2486. fillchar(tmpref, SizeOf(tmpref), 0);
  2487. tmpref.base := NR_EDI;
  2488. tmpref.index := NR_EDI;
  2489. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2490. end;
  2491. Ch_RFlags:
  2492. if assigned(LastFlagsChangeProp) then
  2493. LastFlagsChangeProp^.FlagsUsed := true;
  2494. Ch_WFlags:
  2495. LastFlagsChangeProp := curprop;
  2496. Ch_RWFlags:
  2497. begin
  2498. if assigned(LastFlagsChangeProp) then
  2499. LastFlagsChangeProp^.FlagsUsed := true;
  2500. LastFlagsChangeProp := curprop;
  2501. end;
  2502. Ch_FPU:;
  2503. else
  2504. begin
  2505. {$ifdef statedebug}
  2506. hp := tai_comment.Create(strpnew(
  2507. 'destroying all regs for prev instruction'));
  2508. insertllitem(list,p, p.next,hp);
  2509. {$endif statedebug}
  2510. DestroyAllRegs(curprop,true,true);
  2511. LastFlagsChangeProp := curprop;
  2512. end;
  2513. end;
  2514. inc(Cnt);
  2515. end
  2516. end;
  2517. end;
  2518. end;
  2519. end
  2520. else
  2521. begin
  2522. {$ifdef statedebug}
  2523. hp := tai_comment.Create(strpnew(
  2524. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2525. insertllitem(list,p, p.next,hp);
  2526. {$endif statedebug}
  2527. DestroyAllRegs(curprop,true,true);
  2528. end;
  2529. end;
  2530. inc(InstrCnt);
  2531. prev := p;
  2532. GetNextInstruction(p, p);
  2533. end;
  2534. end;
  2535. function tdfaobj.pass_2: boolean;
  2536. begin
  2537. if initdfapass2 then
  2538. begin
  2539. dodfapass2;
  2540. pass_2 := true
  2541. end
  2542. else
  2543. pass_2 := false;
  2544. end;
  2545. {$ifopt r+}
  2546. {$define rangewason}
  2547. {$r-}
  2548. {$endif}
  2549. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2550. begin
  2551. if (sym.labelnr >= lolab) and
  2552. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2553. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2554. else
  2555. getlabelwithsym := nil;
  2556. end;
  2557. {$ifdef rangewason}
  2558. {$r+}
  2559. {$undef rangewason}
  2560. {$endif}
  2561. procedure tdfaobj.clear;
  2562. begin
  2563. if labdif <> 0 then
  2564. begin
  2565. freemem(labeltable);
  2566. labeltable := nil;
  2567. end;
  2568. if assigned(taipropblock) then
  2569. begin
  2570. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2571. taipropblock := nil;
  2572. end;
  2573. end;
  2574. end.
  2575. {
  2576. $Log$
  2577. Revision 1.81 2005-02-14 17:13:09 peter
  2578. * truncate log
  2579. Revision 1.80 2005/01/03 14:59:28 jonas
  2580. * remove "release subregA; allocate other_subreg_of_A" sequences so the
  2581. register renaming doesn't stop early
  2582. }