yury a277a5f8db * Removed unused local vars. 6 anni fa
..
aasmcpu.pas 095bd6da7d * do not re-used gottpoff symbols as they are PC-relative 6 anni fa
agarmgas.pas 8c362eac67 * always emit UAL when using LLVM (clang does not and will not support 6 anni fa
aoptcpu.pas 94d7a02fae * modified patch by Gareth Moreton to pool TmpUsedRegs in the assembler optimizers, resolves #34679 6 anni fa
aoptcpub.pas afd4599d26 * correctly handle LDRD in TAoptBaseCpu.RegModifiedByInstruction 6 anni fa
aoptcpud.pas 790a4fe2d3 * log and id tags removed 20 anni fa
armatt.inc 9d1646e2a8 Add support for writeback in RFE and SRS instructions. 9 anni fa
armatts.inc 9d1646e2a8 Add support for writeback in RFE and SRS instructions. 9 anni fa
armins.dat 4db5478acc + support msr regf,reg32 on arm in the internal assembler 6 anni fa
armnop.inc 4db5478acc + support msr regf,reg32 on arm in the internal assembler 6 anni fa
armop.inc 9d1646e2a8 Add support for writeback in RFE and SRS instructions. 9 anni fa
armreg.dat 387824c1ee Added some APSR register bitmask definitions. 10 anni fa
armtab.inc 4db5478acc + support msr regf,reg32 on arm in the internal assembler 6 anni fa
cgcpu.pas 3a43ffd57b * arm: Include pi_needs_got to current_procinfo.flags when the GOT register is accessed. It forces proper initialization of the GOT register at the beginning of a procedure. This fixes storing of a double constant to a field in a packed record and other rare copy operations when PIC is enabled. 6 anni fa
cpubase.pas 7c4e7d6bd3 * support OS_32/OS_64 in cgsize2subreg for ARM MM registers to handle 6 anni fa
cpuelf.pas dbb91b5ef0 arm-netbsd: added platform define and dummy rtl files so the build passes for this platform. port not functional yet 7 anni fa
cpuinfo.pas 5b755661d8 + patch by Simon Ameis: adds all the STM32F091* microcontroller units to the list of supported ARM MCUs, resolves issue #32484 7 anni fa
cpunode.pas 9f16c34329 + initial work for tls-based threadvar support on arm-linux 6 anni fa
cpupara.pas bead1f8180 * properly set 8 byte parameter alignment for first parameter on ARM if 6 anni fa
cpupi.pas 9f16c34329 + initial work for tls-based threadvar support on arm-linux 6 anni fa
cputarg.pas 86940dfb32 AROS: added arm-aros target to compiler and fpcmake 8 anni fa
hlcgcpu.pas 4686f61002 * keep track of the temp position separately from the offset in references, 7 anni fa
itcpugas.pas 47d43750e4 * remove unused units from uses statements 12 anni fa
narmadd.pas 0b246f3dbd * converted Boolean8 to an internal type, and mapped Boolean to the 6 anni fa
narmcal.pas f5f895e2a3 syscalls: unify call reference creation across 4 different CPU archs. less copypasted code, brings x86_64 AROS support up to speed 8 anni fa
narmcnv.pas c961c72c30 * tarmtypeconvnode.first_int_to_real should call the generic method in the parent class, if soft fpu code is generated, resolves #31350 8 anni fa
narmcon.pas 4aa0ad6735 * use vmov.xx to load float constants if possible 7 anni fa
narminl.pas 4686f61002 * keep track of the temp position separately from the offset in references, 7 anni fa
narmld.pas a277a5f8db * Removed unused local vars. 6 anni fa
narmmat.pas 71e71ad267 * fix currency division on non x86 32 bit targets 7 anni fa
narmmem.pas d6de2c03cb * generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe 10 anni fa
narmset.pas 07bd4ba517 * let all the case code generation work with tconstexprint instead of aint, 6 anni fa
pp.lpi.template 1f032375c3 * improved template with help from Mattias Gaertner 19 anni fa
raarm.pas 780e75bfac o patch by Jeppe Johansen to fix mantis #17472: 14 anni fa
raarmgas.pas a186f48442 * cosmetics 6 anni fa
rarmcon.inc 387824c1ee Added some APSR register bitmask definitions. 10 anni fa
rarmdwa.inc 387824c1ee Added some APSR register bitmask definitions. 10 anni fa
rarmnor.inc 387824c1ee Added some APSR register bitmask definitions. 10 anni fa
rarmnum.inc 387824c1ee Added some APSR register bitmask definitions. 10 anni fa
rarmrni.inc 387824c1ee Added some APSR register bitmask definitions. 10 anni fa
rarmsri.inc 387824c1ee Added some APSR register bitmask definitions. 10 anni fa
rarmsta.inc 387824c1ee Added some APSR register bitmask definitions. 10 anni fa
rarmstd.inc 387824c1ee Added some APSR register bitmask definitions. 10 anni fa
rarmsup.inc 387824c1ee Added some APSR register bitmask definitions. 10 anni fa
rgcpu.pas 4686f61002 * keep track of the temp position separately from the offset in references, 7 anni fa
symcpu.pas acf02ab64b * when creating wrappers, add a prefix to parameter names to prevent them 6 anni fa