aoptcpu.pas 44 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083
  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
  3. Development Team
  4. This unit implements the ARM optimizer object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. Unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. { $define DEBUG_AOPTCPU}
  21. Interface
  22. uses cpubase,cgbase,aasmtai,aopt,AoptObj,aoptcpub;
  23. Type
  24. TCpuAsmOptimizer = class(TAsmOptimizer)
  25. { outputs a debug message into the assembler file }
  26. procedure DebugMsg(const s: string; p: tai);
  27. Function GetNextInstructionUsingReg(Current: tai; Var Next: tai;reg : TRegister): Boolean;
  28. function RegInInstruction(Reg: TRegister; p1: tai): Boolean; override;
  29. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  30. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  31. { uses the same constructor as TAopObj }
  32. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  33. procedure PeepHoleOptPass2;override;
  34. End;
  35. Implementation
  36. uses
  37. cutils,
  38. verbose,
  39. cpuinfo,
  40. aasmbase,aasmcpu,aasmdata,
  41. aoptutils,
  42. globals,globtype,
  43. cgutils;
  44. type
  45. TAsmOpSet = set of TAsmOp;
  46. function CanBeCond(p : tai) : boolean;
  47. begin
  48. result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
  49. end;
  50. function RefsEqual(const r1, r2: treference): boolean;
  51. begin
  52. refsequal :=
  53. (r1.offset = r2.offset) and
  54. (r1.base = r2.base) and
  55. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  56. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  57. (r1.relsymbol = r2.relsymbol) and
  58. (r1.addressmode = r2.addressmode) and
  59. (r1.volatility=[]) and
  60. (r2.volatility=[]);
  61. end;
  62. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
  63. begin
  64. result:=oper1.typ=oper2.typ;
  65. if result then
  66. case oper1.typ of
  67. top_const:
  68. Result:=oper1.val = oper2.val;
  69. top_reg:
  70. Result:=oper1.reg = oper2.reg;
  71. top_ref:
  72. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  73. else Result:=false;
  74. end
  75. end;
  76. function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
  77. begin
  78. result := (oper.typ = top_reg) and (oper.reg = reg);
  79. end;
  80. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  81. begin
  82. result :=
  83. (instr.typ = ait_instruction) and
  84. (taicpu(instr).opcode = op);
  85. end;
  86. function MatchInstruction(const instr: tai; const ops: TAsmOpSet): boolean;
  87. begin
  88. result :=
  89. (instr.typ = ait_instruction) and
  90. (taicpu(instr).opcode in ops);
  91. end;
  92. function MatchInstruction(const instr: tai; const ops: TAsmOpSet;opcount : byte): boolean;
  93. begin
  94. result :=
  95. (instr.typ = ait_instruction) and
  96. (taicpu(instr).opcode in ops) and
  97. (taicpu(instr).ops=opcount);
  98. end;
  99. {$ifdef DEBUG_AOPTCPU}
  100. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
  101. begin
  102. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  103. end;
  104. {$else DEBUG_AOPTCPU}
  105. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
  106. begin
  107. end;
  108. {$endif DEBUG_AOPTCPU}
  109. function TCpuAsmOptimizer.RegInInstruction(Reg: TRegister; p1: tai): Boolean;
  110. begin
  111. If (p1.typ = ait_instruction) and (taicpu(p1).opcode in [A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU]) and
  112. ((getsupreg(reg)=RS_R0) or (getsupreg(reg)=RS_R1)) then
  113. Result:=true
  114. else if (p1.typ = ait_instruction) and (taicpu(p1).opcode=A_MOVW) and
  115. ((TRegister(ord(taicpu(p1).oper[0]^.reg)+1)=reg) or (TRegister(ord(taicpu(p1).oper[1]^.reg)+1)=reg) or
  116. (taicpu(p1).oper[0]^.reg=reg) or (taicpu(p1).oper[1]^.reg=reg)) then
  117. Result:=true
  118. else
  119. Result:=inherited RegInInstruction(Reg, p1);
  120. end;
  121. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  122. var Next: tai; reg: TRegister): Boolean;
  123. begin
  124. Next:=Current;
  125. repeat
  126. Result:=GetNextInstruction(Next,Next);
  127. until not(cs_opt_level3 in current_settings.optimizerswitches) or not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  128. (is_calljmp(taicpu(Next).opcode));
  129. end;
  130. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  131. var
  132. p: taicpu;
  133. begin
  134. if not assigned(hp) or
  135. (hp.typ <> ait_instruction) then
  136. begin
  137. Result := false;
  138. exit;
  139. end;
  140. p := taicpu(hp);
  141. Result := ((p.opcode in [A_LDI,A_MOV,A_LDS]) and (reg=p.oper[0]^.reg) and ((p.oper[1]^.typ<>top_reg) or (reg<>p.oper[0]^.reg))) or
  142. ((p.opcode in [A_LD,A_LDD,A_LPM]) and (reg=p.oper[0]^.reg) and not(RegInRef(reg,p.oper[1]^.ref^))) or
  143. ((p.opcode in [A_MOVW]) and ((reg=p.oper[0]^.reg) or (TRegister(ord(reg)+1)=p.oper[0]^.reg)) and not(reg=p.oper[1]^.reg) and not(TRegister(ord(reg)+1)=p.oper[1]^.reg)) or
  144. ((p.opcode in [A_POP]) and (reg=p.oper[0]^.reg));
  145. end;
  146. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  147. var
  148. p: taicpu;
  149. i: longint;
  150. begin
  151. Result := false;
  152. if not (assigned(hp) and (hp.typ = ait_instruction)) then
  153. exit;
  154. p:=taicpu(hp);
  155. i:=0;
  156. { we do not care about the stack pointer }
  157. if p.opcode in [A_POP] then
  158. exit;
  159. { first operand only written?
  160. then skip it }
  161. if p.opcode in [A_MOV,A_LD,A_LDD,A_LDS,A_LPM,A_LDI,A_MOVW] then
  162. i:=1;
  163. while i<p.ops do
  164. begin
  165. case p.oper[i]^.typ of
  166. top_reg:
  167. Result := (p.oper[i]^.reg = reg) or
  168. { MOVW }
  169. ((i=1) and (p.opcode=A_MOVW) and (getsupreg(p.oper[0]^.reg)+1=getsupreg(reg)));
  170. top_ref:
  171. Result :=
  172. (p.oper[i]^.ref^.base = reg) or
  173. (p.oper[i]^.ref^.index = reg);
  174. end;
  175. { Bailout if we found something }
  176. if Result then
  177. exit;
  178. Inc(i);
  179. end;
  180. end;
  181. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  182. var
  183. hp1,hp2,hp3,hp4,hp5: tai;
  184. alloc, dealloc: tai_regalloc;
  185. i: integer;
  186. l: TAsmLabel;
  187. begin
  188. result := false;
  189. case p.typ of
  190. ait_instruction:
  191. begin
  192. {
  193. change
  194. <op> reg,x,y
  195. cp reg,r1
  196. into
  197. <op>s reg,x,y
  198. }
  199. { this optimization can applied only to the currently enabled operations because
  200. the other operations do not update all flags and FPC does not track flag usage }
  201. if MatchInstruction(p, [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_DEC,A_EOR,
  202. A_INC,A_LSL,A_LSR,
  203. A_OR,A_ORI,A_ROL,A_ROR,A_SBC,A_SBCI,A_SUB,A_SUBI]) and
  204. GetNextInstruction(p, hp1) and
  205. ((MatchInstruction(hp1, A_CP) and
  206. (((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
  207. (taicpu(hp1).oper[1]^.reg = NR_R1)) or
  208. ((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  209. (taicpu(hp1).oper[0]^.reg = NR_R1) and
  210. (taicpu(p).opcode in [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_EOR,
  211. A_LSL,A_LSR,
  212. A_OR,A_ORI,A_ROL,A_ROR,A_SUB,A_SBI])))) or
  213. (MatchInstruction(hp1, A_CPI) and
  214. (taicpu(p).opcode = A_ANDI) and
  215. (taicpu(p).oper[1]^.typ=top_const) and
  216. (taicpu(hp1).oper[1]^.typ=top_const) and
  217. (taicpu(p).oper[1]^.val=taicpu(hp1).oper[1]^.val))) and
  218. GetNextInstruction(hp1, hp2) and
  219. { be careful here, following instructions could use other flags
  220. however after a jump fpc never depends on the value of flags }
  221. { All above instructions set Z and N according to the following
  222. Z := result = 0;
  223. N := result[31];
  224. EQ = Z=1; NE = Z=0;
  225. MI = N=1; PL = N=0; }
  226. MatchInstruction(hp2, A_BRxx) and
  227. ((taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) or
  228. { sub/sbc set all flags }
  229. (taicpu(p).opcode in [A_SUB,A_SBI])){ and
  230. no flag allocation tracking implemented yet on avr
  231. assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next)))} then
  232. begin
  233. { move flag allocation if possible }
  234. { no flag allocation tracking implemented yet on avr
  235. GetLastInstruction(hp1, hp2);
  236. hp2:=FindRegAlloc(NR_DEFAULTFLAGS,tai(hp2.Next));
  237. if assigned(hp2) then
  238. begin
  239. asml.Remove(hp2);
  240. asml.insertbefore(hp2, p);
  241. end;
  242. }
  243. // If we compare to the same value we are masking then invert the comparison
  244. if (taicpu(hp1).opcode=A_CPI) or
  245. { sub/sbc with reverted? }
  246. ((taicpu(hp1).oper[0]^.reg = NR_R1) and (taicpu(p).opcode in [A_SUB,A_SBI])) then
  247. taicpu(hp2).condition:=inverse_cond(taicpu(hp2).condition);
  248. asml.InsertBefore(tai_regalloc.alloc(NR_DEFAULTFLAGS,p), p);
  249. asml.InsertAfter(tai_regalloc.dealloc(NR_DEFAULTFLAGS,hp2), hp2);
  250. IncludeRegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs);
  251. DebugMsg('Peephole OpCp2Op performed', p);
  252. asml.remove(hp1);
  253. hp1.free;
  254. Result:=true;
  255. end
  256. else
  257. case taicpu(p).opcode of
  258. A_LDI:
  259. begin
  260. { turn
  261. ldi reg0, imm
  262. cp/mov reg1, reg0
  263. dealloc reg0
  264. into
  265. cpi/ldi reg1, imm
  266. }
  267. if MatchOpType(taicpu(p),top_reg,top_const) and
  268. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  269. MatchInstruction(hp1,[A_CP,A_MOV],2) and
  270. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  271. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  272. (getsupreg(taicpu(hp1).oper[0]^.reg) in [16..31]) and
  273. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  274. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) then
  275. begin
  276. TransferUsedRegs(TmpUsedRegs);
  277. if not(RegUsedAfterInstruction(taicpu(hp1).oper[1]^.reg, hp1, TmpUsedRegs)) then
  278. begin
  279. case taicpu(hp1).opcode of
  280. A_CP:
  281. taicpu(hp1).opcode:=A_CPI;
  282. A_MOV:
  283. taicpu(hp1).opcode:=A_LDI;
  284. else
  285. internalerror(2016111901);
  286. end;
  287. taicpu(hp1).loadconst(1, taicpu(p).oper[1]^.val);
  288. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  289. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  290. if assigned(alloc) and assigned(dealloc) then
  291. begin
  292. asml.Remove(alloc);
  293. alloc.Free;
  294. asml.Remove(dealloc);
  295. dealloc.Free;
  296. end;
  297. DebugMsg('Peephole LdiMov/Cp2Ldi/Cpi performed', p);
  298. RemoveCurrentP(p);
  299. end;
  300. end;
  301. end;
  302. A_STS:
  303. if (taicpu(p).oper[0]^.ref^.symbol=nil) and
  304. (taicpu(p).oper[0]^.ref^.relsymbol=nil) and
  305. (getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and
  306. (getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and
  307. (taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and
  308. (taicpu(p).oper[0]^.ref^.offset>=32) and
  309. (taicpu(p).oper[0]^.ref^.offset<=95) then
  310. begin
  311. DebugMsg('Peephole Sts2Out performed', p);
  312. taicpu(p).opcode:=A_OUT;
  313. taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32);
  314. end;
  315. A_LDS:
  316. if (taicpu(p).oper[1]^.ref^.symbol=nil) and
  317. (taicpu(p).oper[1]^.ref^.relsymbol=nil) and
  318. (getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and
  319. (getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and
  320. (taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and
  321. (taicpu(p).oper[1]^.ref^.offset>=32) and
  322. (taicpu(p).oper[1]^.ref^.offset<=95) then
  323. begin
  324. DebugMsg('Peephole Lds2In performed', p);
  325. taicpu(p).opcode:=A_IN;
  326. taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32);
  327. end;
  328. A_IN:
  329. if GetNextInstruction(p,hp1) then
  330. begin
  331. {
  332. in rX,Y
  333. ori rX,n
  334. out Y,rX
  335. into
  336. sbi rX,lg(n)
  337. }
  338. if (taicpu(p).oper[1]^.val<=31) and
  339. MatchInstruction(hp1,A_ORI) and
  340. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  341. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  342. GetNextInstruction(hp1,hp2) and
  343. MatchInstruction(hp2,A_OUT) and
  344. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  345. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  346. begin
  347. DebugMsg('Peephole InOriOut2Sbi performed', p);
  348. taicpu(p).opcode:=A_SBI;
  349. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  350. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  351. asml.Remove(hp1);
  352. hp1.Free;
  353. asml.Remove(hp2);
  354. hp2.Free;
  355. result:=true;
  356. end
  357. {
  358. in rX,Y
  359. andi rX,not(n)
  360. out Y,rX
  361. into
  362. cbi rX,lg(n)
  363. }
  364. else if (taicpu(p).oper[1]^.val<=31) and
  365. MatchInstruction(hp1,A_ANDI) and
  366. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  367. (PopCnt(byte(not(taicpu(hp1).oper[1]^.val)))=1) and
  368. GetNextInstruction(hp1,hp2) and
  369. MatchInstruction(hp2,A_OUT) and
  370. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  371. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  372. begin
  373. DebugMsg('Peephole InAndiOut2Cbi performed', p);
  374. taicpu(p).opcode:=A_CBI;
  375. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  376. taicpu(p).loadconst(1,BsrByte(not(taicpu(hp1).oper[1]^.val)));
  377. asml.Remove(hp1);
  378. hp1.Free;
  379. asml.Remove(hp2);
  380. hp2.Free;
  381. result:=true;
  382. end
  383. {
  384. in rX,Y
  385. andi rX,n
  386. breq/brne L1
  387. into
  388. sbis/sbic Y,lg(n)
  389. jmp L1
  390. .Ltemp:
  391. }
  392. else if (taicpu(p).oper[1]^.val<=31) and
  393. MatchInstruction(hp1,A_ANDI) and
  394. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  395. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  396. GetNextInstruction(hp1,hp2) and
  397. MatchInstruction(hp2,A_BRxx) and
  398. (taicpu(hp2).condition in [C_EQ,C_NE]) then
  399. begin
  400. if taicpu(hp2).condition=C_EQ then
  401. taicpu(p).opcode:=A_SBIS
  402. else
  403. taicpu(p).opcode:=A_SBIC;
  404. DebugMsg('Peephole InAndiBrx2SbixJmp performed', p);
  405. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  406. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  407. asml.Remove(hp1);
  408. hp1.Free;
  409. taicpu(hp2).condition:=C_None;
  410. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  411. taicpu(hp2).opcode:=A_JMP
  412. else
  413. taicpu(hp2).opcode:=A_RJMP;
  414. current_asmdata.getjumplabel(l);
  415. l.increfs;
  416. asml.InsertAfter(tai_label.create(l), hp2);
  417. result:=true;
  418. end;
  419. end;
  420. A_ANDI:
  421. begin
  422. {
  423. Turn
  424. andi rx, #pow2
  425. brne l
  426. <op>
  427. l:
  428. Into
  429. sbrs rx, #(1 shl imm)
  430. <op>
  431. l:
  432. }
  433. if (taicpu(p).ops=2) and
  434. (taicpu(p).oper[1]^.typ=top_const) and
  435. ispowerof2(taicpu(p).oper[1]^.val,i) and
  436. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  437. GetNextInstruction(p,hp1) and
  438. (hp1.typ=ait_instruction) and
  439. (taicpu(hp1).opcode=A_BRxx) and
  440. (taicpu(hp1).condition in [C_EQ,C_NE]) and
  441. (taicpu(hp1).ops>0) and
  442. (taicpu(hp1).oper[0]^.typ = top_ref) and
  443. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  444. GetNextInstruction(hp1,hp2) and
  445. (hp2.typ=ait_instruction) and
  446. GetNextInstruction(hp2,hp3) and
  447. (hp3.typ=ait_label) and
  448. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  449. begin
  450. DebugMsg('Peephole AndiBr2Sbr performed', p);
  451. taicpu(p).oper[1]^.val:=i;
  452. if taicpu(hp1).condition=C_NE then
  453. taicpu(p).opcode:=A_SBRS
  454. else
  455. taicpu(p).opcode:=A_SBRC;
  456. asml.Remove(hp1);
  457. hp1.free;
  458. result:=true;
  459. end
  460. {
  461. Remove
  462. andi rx, #y
  463. dealloc rx
  464. }
  465. else if (taicpu(p).ops=2) and
  466. (taicpu(p).oper[0]^.typ=top_reg) and
  467. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  468. (assigned(FindRegDeAlloc(NR_DEFAULTFLAGS,tai(p.Next))) or
  469. (not RegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs))) then
  470. begin
  471. DebugMsg('Redundant Andi removed', p);
  472. result:=RemoveCurrentP(p);
  473. end;
  474. end;
  475. A_ADD:
  476. begin
  477. if (taicpu(p).oper[1]^.reg=NR_R1) and
  478. GetNextInstruction(p, hp1) and
  479. MatchInstruction(hp1,A_ADC) then
  480. begin
  481. DebugMsg('Peephole AddAdc2Add performed', p);
  482. result:=RemoveCurrentP(p);
  483. end;
  484. end;
  485. A_SUB:
  486. begin
  487. if (taicpu(p).oper[1]^.reg=NR_R1) and
  488. GetNextInstruction(p, hp1) and
  489. MatchInstruction(hp1,A_SBC) then
  490. begin
  491. DebugMsg('Peephole SubSbc2Sub performed', p);
  492. taicpu(hp1).opcode:=A_SUB;
  493. result:=RemoveCurrentP(p);
  494. end;
  495. end;
  496. A_CLR:
  497. begin
  498. { turn the common
  499. clr rX
  500. mov/ld rX, rY
  501. into
  502. mov/ld rX, rY
  503. }
  504. if (taicpu(p).ops=1) and
  505. (taicpu(p).oper[0]^.typ=top_reg) and
  506. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  507. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  508. (hp1.typ=ait_instruction) and
  509. (taicpu(hp1).opcode in [A_MOV,A_LD]) and
  510. (taicpu(hp1).ops>0) and
  511. (taicpu(hp1).oper[0]^.typ=top_reg) and
  512. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) then
  513. begin
  514. DebugMsg('Peephole ClrMov2Mov performed', p);
  515. result:=RemoveCurrentP(p);
  516. end
  517. { turn
  518. clr rX
  519. ...
  520. adc rY, rX
  521. into
  522. ...
  523. adc rY, r1
  524. }
  525. else if (taicpu(p).ops=1) and
  526. (taicpu(p).oper[0]^.typ=top_reg) and
  527. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  528. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  529. (hp1.typ=ait_instruction) and
  530. (taicpu(hp1).opcode in [A_ADC,A_SBC]) and
  531. (taicpu(hp1).ops=2) and
  532. (taicpu(hp1).oper[1]^.typ=top_reg) and
  533. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  534. (taicpu(hp1).oper[0]^.reg<>taicpu(p).oper[0]^.reg) and
  535. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  536. begin
  537. DebugMsg('Peephole ClrAdc2Adc performed', p);
  538. taicpu(hp1).oper[1]^.reg:=NR_R1;
  539. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  540. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  541. if assigned(alloc) and assigned(dealloc) then
  542. begin
  543. asml.Remove(alloc);
  544. alloc.Free;
  545. asml.Remove(dealloc);
  546. dealloc.Free;
  547. end;
  548. result:=RemoveCurrentP(p);
  549. end;
  550. end;
  551. A_PUSH:
  552. begin
  553. { turn
  554. push reg0
  555. push reg1
  556. pop reg3
  557. pop reg2
  558. into
  559. movw reg2,reg0
  560. or
  561. mov reg3,reg1
  562. mov reg2,reg0
  563. }
  564. if GetNextInstruction(p,hp1) and
  565. MatchInstruction(hp1,A_PUSH) and
  566. GetNextInstruction(hp1,hp2) and
  567. MatchInstruction(hp2,A_POP) and
  568. GetNextInstruction(hp2,hp3) and
  569. MatchInstruction(hp3,A_POP) then
  570. begin
  571. if (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  572. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  573. (getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and
  574. ((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then
  575. begin
  576. DebugMsg('Peephole PushPushPopPop2Movw performed', p);
  577. taicpu(hp3).ops:=2;
  578. taicpu(hp3).opcode:=A_MOVW;
  579. taicpu(hp3).loadreg(1, taicpu(p).oper[0]^.reg);
  580. RemoveCurrentP(p);
  581. RemoveCurrentP(p);
  582. result:=RemoveCurrentP(p);
  583. end
  584. else
  585. begin
  586. DebugMsg('Peephole PushPushPopPop2MovMov performed', p);
  587. taicpu(p).ops:=2;
  588. taicpu(p).opcode:=A_MOV;
  589. taicpu(hp1).ops:=2;
  590. taicpu(hp1).opcode:=A_MOV;
  591. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  592. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  593. taicpu(hp1).loadreg(1, taicpu(hp1).oper[0]^.reg);
  594. taicpu(hp1).loadreg(0, taicpu(hp2).oper[0]^.reg);
  595. { life range of reg2 and reg3 is increased, fix register allocation entries }
  596. TransferUsedRegs(TmpUsedRegs);
  597. UpdateUsedRegs(TmpUsedRegs,tai(p.Next));
  598. AllocRegBetween(taicpu(hp2).oper[0]^.reg,hp1,hp2,TmpUsedRegs);
  599. TransferUsedRegs(TmpUsedRegs);
  600. AllocRegBetween(taicpu(hp3).oper[0]^.reg,p,hp3,TmpUsedRegs);
  601. IncludeRegInUsedRegs(taicpu(hp3).oper[0]^.reg,UsedRegs);
  602. UpdateUsedRegs(tai(p.Next));
  603. asml.Remove(hp2);
  604. hp2.Free;
  605. asml.Remove(hp3);
  606. hp3.Free;
  607. result:=true;
  608. end
  609. end;
  610. end;
  611. A_CALL:
  612. if (cs_opt_level4 in current_settings.optimizerswitches) and
  613. GetNextInstruction(p,hp1) and
  614. MatchInstruction(hp1,A_RET) then
  615. begin
  616. DebugMsg('Peephole CallReg2Jmp performed', p);
  617. taicpu(p).opcode:=A_JMP;
  618. asml.Remove(hp1);
  619. hp1.Free;
  620. result:=true;
  621. end;
  622. A_RCALL:
  623. if (cs_opt_level4 in current_settings.optimizerswitches) and
  624. GetNextInstruction(p,hp1) and
  625. MatchInstruction(hp1,A_RET) then
  626. begin
  627. DebugMsg('Peephole RCallReg2RJmp performed', p);
  628. taicpu(p).opcode:=A_RJMP;
  629. asml.Remove(hp1);
  630. hp1.Free;
  631. result:=true;
  632. end;
  633. A_MOV:
  634. begin
  635. { change
  636. mov reg0, reg1
  637. dealloc reg0
  638. into
  639. dealloc reg0
  640. }
  641. if MatchOpType(taicpu(p),top_reg,top_reg) then
  642. begin
  643. TransferUsedRegs(TmpUsedRegs);
  644. UpdateUsedRegs(TmpUsedRegs,tai(p.Next));
  645. if not(RegInUsedRegs(taicpu(p).oper[0]^.reg,TmpUsedRegs)) and
  646. { reg. allocation information before calls is not perfect, so don't do this before
  647. calls/icalls }
  648. GetNextInstruction(p,hp1) and
  649. not(MatchInstruction(hp1,[A_CALL,A_RCALL])) then
  650. begin
  651. DebugMsg('Peephole Mov2Nop performed', p);
  652. result:=RemoveCurrentP(p);
  653. exit;
  654. end;
  655. end;
  656. { turn
  657. mov reg0, reg1
  658. <op> reg2,reg0
  659. dealloc reg0
  660. into
  661. <op> reg2,reg1
  662. }
  663. if MatchOpType(taicpu(p),top_reg,top_reg) and
  664. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  665. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) and
  666. (MatchInstruction(hp1,[A_PUSH,A_MOV,A_CP,A_CPC,A_ADD,A_SUB,A_ADC,A_SBC,A_EOR,A_AND,A_OR,
  667. A_OUT,A_IN]) or
  668. { the reference register of ST/STD cannot be replaced }
  669. (MatchInstruction(hp1,[A_STD,A_ST]) and (MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^)))) and
  670. (not RegModifiedByInstruction(taicpu(p).oper[0]^.reg, hp1)) and
  671. {(taicpu(hp1).ops=1) and
  672. (taicpu(hp1).oper[0]^.typ = top_reg) and
  673. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and }
  674. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  675. begin
  676. DebugMsg('Peephole MovOp2Op performed', p);
  677. for i := 0 to taicpu(hp1).ops-1 do
  678. if taicpu(hp1).oper[i]^.typ=top_reg then
  679. if taicpu(hp1).oper[i]^.reg=taicpu(p).oper[0]^.reg then
  680. taicpu(hp1).oper[i]^.reg:=taicpu(p).oper[1]^.reg;
  681. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  682. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  683. if assigned(alloc) and assigned(dealloc) then
  684. begin
  685. asml.Remove(alloc);
  686. alloc.Free;
  687. asml.Remove(dealloc);
  688. dealloc.Free;
  689. end;
  690. { life range of reg1 is increased }
  691. AllocRegBetween(taicpu(p).oper[1]^.reg,p,hp1,usedregs);
  692. { p will be removed, update used register as we continue
  693. with the next instruction after p }
  694. result:=RemoveCurrentP(p);
  695. end
  696. { remove
  697. mov reg0,reg0
  698. }
  699. else if (taicpu(p).ops=2) and
  700. (taicpu(p).oper[0]^.typ = top_reg) and
  701. (taicpu(p).oper[1]^.typ = top_reg) and
  702. (taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
  703. begin
  704. DebugMsg('Peephole RedundantMov performed', p);
  705. result:=RemoveCurrentP(p);
  706. end
  707. {
  708. Turn
  709. mov rx,ry
  710. op rx,rz
  711. mov ry, rx
  712. Into
  713. op ry,rz
  714. }
  715. else if (taicpu(p).ops=2) and
  716. MatchOpType(taicpu(p),top_reg,top_reg) and
  717. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  718. (hp1.typ=ait_instruction) and
  719. (taicpu(hp1).ops >= 1) and
  720. (taicpu(hp1).oper[0]^.typ = top_reg) and
  721. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  722. MatchInstruction(hp2,A_MOV) and
  723. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  724. (taicpu(hp2).oper[0]^.reg = taicpu(p).oper[1]^.reg) and
  725. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  726. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  727. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp2)) and
  728. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_SUB,A_SBC,A_AND,A_OR,A_EOR,
  729. A_INC,A_DEC,
  730. A_LSL,A_LSR,A_ASR,A_ROR,A_ROL]) and
  731. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  732. begin
  733. DebugMsg('Peephole MovOpMov2Op performed', p);
  734. if (taicpu(hp1).ops=2) and
  735. (taicpu(hp1).oper[1]^.typ=top_reg) and
  736. (taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
  737. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  738. taicpu(hp1).oper[0]^.reg:=taicpu(p).oper[1]^.reg;
  739. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  740. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  741. if assigned(alloc) and assigned(dealloc) then
  742. begin
  743. asml.Remove(alloc);
  744. alloc.Free;
  745. asml.Remove(dealloc);
  746. dealloc.Free;
  747. end;
  748. asml.remove(hp2);
  749. hp2.free;
  750. result:=RemoveCurrentP(p);
  751. end
  752. {
  753. Turn
  754. mov rx,ry
  755. op rx,rw
  756. mov rw,rx
  757. Into
  758. op rw,ry
  759. }
  760. else if (taicpu(p).ops=2) and
  761. MatchOpType(taicpu(p),top_reg,top_reg) and
  762. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  763. (hp1.typ=ait_instruction) and
  764. (taicpu(hp1).ops = 2) and
  765. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  766. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  767. (hp2.typ=ait_instruction) and
  768. (taicpu(hp2).opcode=A_MOV) and
  769. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  770. (taicpu(hp2).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  771. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  772. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  773. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) and
  774. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_AND,A_OR,A_EOR]) and
  775. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  776. begin
  777. DebugMsg('Peephole MovOpMov2Op2 performed', p);
  778. taicpu(hp1).oper[0]^.reg:=taicpu(hp2).oper[0]^.reg;
  779. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  780. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  781. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  782. if assigned(alloc) and assigned(dealloc) then
  783. begin
  784. asml.Remove(alloc);
  785. alloc.Free;
  786. asml.Remove(dealloc);
  787. dealloc.Free;
  788. end;
  789. result:=RemoveCurrentP(p);
  790. asml.remove(hp2);
  791. hp2.free;
  792. end
  793. { fold
  794. mov reg2,reg0
  795. mov reg3,reg1
  796. to
  797. movw reg2,reg0
  798. }
  799. else if (CPUAVR_HAS_MOVW in cpu_capabilities[current_settings.cputype]) and
  800. (taicpu(p).ops=2) and
  801. (taicpu(p).oper[0]^.typ = top_reg) and
  802. (taicpu(p).oper[1]^.typ = top_reg) and
  803. getnextinstruction(p,hp1) and
  804. (hp1.typ = ait_instruction) and
  805. (taicpu(hp1).opcode = A_MOV) and
  806. (taicpu(hp1).ops=2) and
  807. (taicpu(hp1).oper[0]^.typ = top_reg) and
  808. (taicpu(hp1).oper[1]^.typ = top_reg) and
  809. (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  810. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  811. ((getsupreg(taicpu(p).oper[1]^.reg) mod 2)=0) and
  812. (getsupreg(taicpu(hp1).oper[1]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)+1) then
  813. begin
  814. DebugMsg('Peephole MovMov2Movw performed', p);
  815. alloc:=FindRegAllocBackward(taicpu(hp1).oper[0]^.reg,tai(hp1.Previous));
  816. if assigned(alloc) then
  817. begin
  818. asml.Remove(alloc);
  819. asml.InsertBefore(alloc,p);
  820. { proper book keeping of currently used registers }
  821. IncludeRegInUsedRegs(taicpu(hp1).oper[0]^.reg,UsedRegs);
  822. end;
  823. taicpu(p).opcode:=A_MOVW;
  824. asml.remove(hp1);
  825. hp1.free;
  826. result:=true;
  827. end
  828. {
  829. This removes the first mov from
  830. mov rX,...
  831. mov rX,...
  832. }
  833. else if GetNextInstruction(p,hp1) and MatchInstruction(hp1,A_MOV) then
  834. while MatchInstruction(hp1,A_MOV) and
  835. MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^) and
  836. { don't remove the first mov if the second is a mov rX,rX }
  837. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) do
  838. begin
  839. DebugMsg('Peephole MovMov2Mov performed', p);
  840. result:=RemoveCurrentP(p);
  841. GetNextInstruction(hp1,hp1);
  842. if not assigned(hp1) then
  843. break;
  844. end;
  845. end;
  846. A_SBIC,
  847. A_SBIS:
  848. begin
  849. {
  850. Turn
  851. sbic/sbis X, y
  852. jmp .L1
  853. op
  854. .L1:
  855. into
  856. sbis/sbic X,y
  857. op
  858. .L1:
  859. }
  860. if GetNextInstruction(p, hp1) and
  861. (hp1.typ=ait_instruction) and
  862. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  863. (taicpu(hp1).ops>0) and
  864. (taicpu(hp1).oper[0]^.typ = top_ref) and
  865. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  866. GetNextInstruction(hp1, hp2) and
  867. (hp2.typ=ait_instruction) and
  868. (not taicpu(hp2).is_jmp) and
  869. GetNextInstruction(hp2, hp3) and
  870. (hp3.typ=ait_label) and
  871. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  872. begin
  873. DebugMsg('Peephole SbiJmp2Sbi performed',p);
  874. if taicpu(p).opcode=A_SBIC then
  875. taicpu(p).opcode:=A_SBIS
  876. else
  877. taicpu(p).opcode:=A_SBIC;
  878. tai_label(hp3).labsym.decrefs;
  879. AsmL.remove(hp1);
  880. taicpu(hp1).Free;
  881. result:=true;
  882. end
  883. {
  884. Turn
  885. sbiX X, y
  886. jmp .L1
  887. jmp .L2
  888. .L1:
  889. op
  890. .L2:
  891. into
  892. sbiX X,y
  893. .L1:
  894. op
  895. .L2:
  896. }
  897. else if GetNextInstruction(p, hp1) and
  898. (hp1.typ=ait_instruction) and
  899. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  900. (taicpu(hp1).ops>0) and
  901. (taicpu(hp1).oper[0]^.typ = top_ref) and
  902. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  903. GetNextInstruction(hp1, hp2) and
  904. (hp2.typ=ait_instruction) and
  905. (taicpu(hp2).opcode in [A_JMP,A_RJMP]) and
  906. (taicpu(hp2).ops>0) and
  907. (taicpu(hp2).oper[0]^.typ = top_ref) and
  908. (taicpu(hp2).oper[0]^.ref^.symbol is TAsmLabel) and
  909. GetNextInstruction(hp2, hp3) and
  910. (hp3.typ=ait_label) and
  911. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) and
  912. GetNextInstruction(hp3, hp4) and
  913. (hp4.typ=ait_instruction) and
  914. GetNextInstruction(hp4, hp5) and
  915. (hp3.typ=ait_label) and
  916. (taicpu(hp2).oper[0]^.ref^.symbol=tai_label(hp5).labsym) then
  917. begin
  918. DebugMsg('Peephole SbiJmpJmp2Sbi performed',p);
  919. tai_label(hp3).labsym.decrefs;
  920. tai_label(hp5).labsym.decrefs;
  921. AsmL.remove(hp1);
  922. taicpu(hp1).Free;
  923. AsmL.remove(hp2);
  924. taicpu(hp2).Free;
  925. result:=true;
  926. end;
  927. end;
  928. end;
  929. end;
  930. end;
  931. end;
  932. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  933. begin
  934. end;
  935. begin
  936. casmoptimizer:=TCpuAsmOptimizer;
  937. End.