cgbase.pas 27 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Some basic types and constants for the code generation
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. {# This unit exports some types which are used across the code generator }
  18. unit cgbase;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,
  23. symconst;
  24. type
  25. { Location types where value can be stored }
  26. TCGLoc=(
  27. LOC_INVALID, { added for tracking problems}
  28. LOC_VOID, { no value is available }
  29. LOC_CONSTANT, { constant value }
  30. LOC_JUMP, { boolean results only, jump to false or true label }
  31. LOC_FLAGS, { boolean results only, flags are set }
  32. LOC_REGISTER, { in a processor register }
  33. LOC_CREGISTER, { Constant register which shouldn't be modified }
  34. LOC_FPUREGISTER, { FPU stack }
  35. LOC_CFPUREGISTER, { if it is a FPU register variable on the fpu stack }
  36. LOC_MMXREGISTER, { MMX register }
  37. { MMX register variable }
  38. LOC_CMMXREGISTER,
  39. { multimedia register }
  40. LOC_MMREGISTER,
  41. { Constant multimedia reg which shouldn't be modified }
  42. LOC_CMMREGISTER,
  43. { contiguous subset of bits of an integer register }
  44. LOC_SUBSETREG,
  45. LOC_CSUBSETREG,
  46. { contiguous subset of bits in memory }
  47. LOC_SUBSETREF,
  48. LOC_CSUBSETREF,
  49. { keep these last for range checking purposes }
  50. LOC_CREFERENCE, { in memory constant value reference (cannot change) }
  51. LOC_REFERENCE { in memory value }
  52. );
  53. TCGNonRefLoc=low(TCGLoc)..pred(LOC_CREFERENCE);
  54. TCGRefLoc=LOC_CREFERENCE..LOC_REFERENCE;
  55. trefaddr = (
  56. addr_no,
  57. addr_full,
  58. addr_pic,
  59. addr_pic_no_got
  60. {$IF defined(POWERPC) or defined(POWERPC64) or defined(SPARC) or defined(MIPS) or defined(SPARC64)}
  61. ,
  62. { since we have only 16bit offsets, we need to be able to specify the high
  63. and lower 16 bits of the address of a symbol of up to 64 bit }
  64. addr_low, // bits 48-63
  65. addr_high, // bits 32-47
  66. {$IF defined(POWERPC64)}
  67. addr_higher, // bits 16-31
  68. addr_highest, // bits 00-15
  69. {$ENDIF}
  70. addr_higha // bits 16-31, adjusted
  71. {$IF defined(POWERPC64)}
  72. ,
  73. addr_highera, // bits 32-47, adjusted
  74. addr_highesta // bits 48-63, adjusted
  75. {$ENDIF}
  76. {$ENDIF POWERPC or POWERPC64 or SPARC or MIPS or SPARC64}
  77. {$IFDEF MIPS}
  78. ,
  79. addr_pic_call16, // like addr_pic, but generates call16 reloc instead of got16
  80. addr_low_pic, // for large GOT model, generate got_hi16 and got_lo16 relocs
  81. addr_high_pic,
  82. addr_low_call, // counterpart of two above, generate call_hi16 and call_lo16 relocs
  83. addr_high_call
  84. {$ENDIF}
  85. {$if defined(RISCV32) or defined(RISCV64)}
  86. ,
  87. addr_hi20,
  88. addr_lo12,
  89. addr_pcrel_hi20,
  90. addr_pcrel_lo12,
  91. addr_pcrel
  92. {$endif RISCV}
  93. {$IFDEF AVR}
  94. ,addr_lo8
  95. ,addr_lo8_gs
  96. ,addr_hi8
  97. ,addr_hi8_gs
  98. {$ENDIF}
  99. {$IFDEF i8086}
  100. ,addr_dgroup // the data segment group
  101. ,addr_fardataseg // the far data segment of the current pascal module (unit or program)
  102. ,addr_seg // used for getting the segment of an object, e.g. 'mov ax, SEG symbol'
  103. {$ENDIF}
  104. {$IFDEF AARCH64}
  105. ,addr_page
  106. ,addr_pageoffset
  107. ,addr_gotpage
  108. ,addr_gotpageoffset
  109. {$ENDIF AARCH64}
  110. {$ifdef SPARC64}
  111. ,addr_gdop_hix22
  112. ,addr_gdop_lox22
  113. {$endif SPARC64}
  114. {$IFDEF ARM}
  115. ,addr_gottpoff
  116. ,addr_tpoff
  117. {$ENDIF}
  118. {$IFDEF i386}
  119. ,addr_ntpoff
  120. ,addr_tlsgd
  121. {$ENDIF}
  122. {$ifdef x86_64}
  123. ,addr_tpoff
  124. ,addr_tlsgd
  125. {$endif x86_64}
  126. );
  127. {# Generic opcodes, which must be supported by all processors
  128. }
  129. topcg =
  130. (
  131. OP_NONE,
  132. OP_MOVE, { replaced operation with direct load }
  133. OP_ADD, { simple addition }
  134. OP_AND, { simple logical and }
  135. OP_DIV, { simple unsigned division }
  136. OP_IDIV, { simple signed division }
  137. OP_IMUL, { simple signed multiply }
  138. OP_MUL, { simple unsigned multiply }
  139. OP_NEG, { simple negate }
  140. OP_NOT, { simple logical not }
  141. OP_OR, { simple logical or }
  142. OP_SAR, { arithmetic shift-right }
  143. OP_SHL, { logical shift left }
  144. OP_SHR, { logical shift right }
  145. OP_SUB, { simple subtraction }
  146. OP_XOR, { simple exclusive or }
  147. OP_ROL, { rotate left }
  148. OP_ROR { rotate right }
  149. );
  150. {# Generic flag values - used for jump locations }
  151. TOpCmp =
  152. (
  153. OC_NONE,
  154. OC_EQ, { equality comparison }
  155. OC_GT, { greater than (signed) }
  156. OC_LT, { less than (signed) }
  157. OC_GTE, { greater or equal than (signed) }
  158. OC_LTE, { less or equal than (signed) }
  159. OC_NE, { not equal }
  160. OC_BE, { less or equal than (unsigned) }
  161. OC_B, { less than (unsigned) }
  162. OC_AE, { greater or equal than (unsigned) }
  163. OC_A { greater than (unsigned) }
  164. );
  165. { indirect symbol flags }
  166. tindsymflag = (is_data,is_weak);
  167. tindsymflags = set of tindsymflag;
  168. { OS_NO is also used memory references with large data that can
  169. not be loaded in a register directly }
  170. TCgSize = (OS_NO,
  171. OS_8, OS_16, OS_32, OS_64, OS_128,
  172. OS_S8, OS_S16, OS_S32, OS_S64, OS_S128,
  173. { single, double, extended, comp, float128 }
  174. OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
  175. { multi-media sizes: split in byte, word, dword, ... }
  176. { entities, then the signed counterparts }
  177. OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512,
  178. OS_MS8, OS_MS16, OS_MS32, OS_MS64, OS_MS128, OS_MS256, OS_MS512,
  179. { multi-media sizes: single-precision floating-point }
  180. OS_MF32, OS_MF128, OS_MF256, OS_MF512,
  181. { multi-media sizes: double-precision floating-point }
  182. OS_MD64, OS_MD128, OS_MD256, OS_MD512);
  183. { Register types }
  184. TRegisterType = (
  185. R_INVALIDREGISTER, { = 0 }
  186. R_INTREGISTER, { = 1 }
  187. R_FPUREGISTER, { = 2 }
  188. { used by Intel only }
  189. R_MMXREGISTER, { = 3 }
  190. R_MMREGISTER, { = 4 }
  191. R_SPECIALREGISTER, { = 5 }
  192. R_ADDRESSREGISTER, { = 6 }
  193. { used on llvm, every temp gets its own "base register" }
  194. R_TEMPREGISTER { = 7 }
  195. );
  196. { Sub registers }
  197. TSubRegister = (
  198. R_SUBNONE, { = 0; no sub register possible }
  199. R_SUBL, { = 1; 8 bits, Like AL }
  200. R_SUBH, { = 2; 8 bits, Like AH }
  201. R_SUBW, { = 3; 16 bits, Like AX }
  202. R_SUBD, { = 4; 32 bits, Like EAX }
  203. R_SUBQ, { = 5; 64 bits, Like RAX }
  204. { For Sparc floats that use F0:F1 to store doubles }
  205. R_SUBFS, { = 6; Float that allocates 1 FPU register }
  206. R_SUBFD, { = 7; Float that allocates 2 FPU registers }
  207. R_SUBFQ, { = 8; Float that allocates 4 FPU registers }
  208. R_SUBMMS, { = 9; single scalar in multi media register }
  209. R_SUBMMD, { = 10; double scalar in multi media register }
  210. R_SUBMMWHOLE, { = 11; complete MM register, size depends on CPU }
  211. { For Intel X86 AVX-Register }
  212. R_SUBMMX, { = 12; 128 BITS }
  213. R_SUBMMY, { = 13; 256 BITS }
  214. R_SUBMMZ, { = 14; 512 BITS }
  215. { Subregisters for the flags register (x86) }
  216. R_SUBFLAGCARRY, { = 15; Carry flag }
  217. R_SUBFLAGPARITY, { = 16; Parity flag }
  218. R_SUBFLAGAUXILIARY, { = 17; Auxiliary flag }
  219. R_SUBFLAGZERO, { = 18; Zero flag }
  220. R_SUBFLAGSIGN, { = 19; Sign flag }
  221. R_SUBFLAGOVERFLOW, { = 20; Overflow flag }
  222. R_SUBFLAGINTERRUPT, { = 21; Interrupt enable flag }
  223. R_SUBFLAGDIRECTION { = 22; Direction flag }
  224. );
  225. TSubRegisterSet = set of TSubRegister;
  226. TSuperRegister = type word;
  227. {
  228. The new register coding:
  229. SuperRegister (bits 0..15)
  230. Subregister (bits 16..23)
  231. Register type (bits 24..31)
  232. TRegister is defined as an enum to make it incompatible
  233. with TSuperRegister to avoid mixing them
  234. }
  235. TRegister = (
  236. TRegisterLowEnum := Low(longint),
  237. TRegisterHighEnum := High(longint)
  238. );
  239. TRegisterRec=packed record
  240. {$ifdef FPC_BIG_ENDIAN}
  241. regtype : Tregistertype;
  242. subreg : Tsubregister;
  243. supreg : Tsuperregister;
  244. {$else FPC_BIG_ENDIAN}
  245. supreg : Tsuperregister;
  246. subreg : Tsubregister;
  247. regtype : Tregistertype;
  248. {$endif FPC_BIG_ENDIAN}
  249. end;
  250. { A type to store register locations for 64 Bit values. }
  251. {$ifdef cpu64bitalu}
  252. tregister64 = tregister;
  253. tregister128 = record
  254. reglo,reghi : tregister;
  255. end;
  256. {$else cpu64bitalu}
  257. tregister64 = record
  258. reglo,reghi : tregister;
  259. end;
  260. {$endif cpu64bitalu}
  261. Tregistermmxset = record
  262. reg0,reg1,reg2,reg3:Tregister
  263. end;
  264. { Set type definition for registers }
  265. tsuperregisterset = array[byte] of set of byte;
  266. pmmshuffle = ^tmmshuffle;
  267. { this record describes shuffle operations for mm operations; if a pointer a shuffle record
  268. passed to an mm operation is nil, it means that the whole location is moved }
  269. tmmshuffle = record
  270. { describes how many shuffles are actually described, if len=0 then
  271. moving the scalar with index 0 to the scalar with index 0 is meant }
  272. len : byte;
  273. { lower nibble of each entry of this array describes index of the source data index while
  274. the upper nibble describes the destination index }
  275. shuffles : array[1..1] of byte;
  276. end;
  277. Tsuperregisterarray=array[0..$ffff] of Tsuperregister;
  278. Psuperregisterarray=^Tsuperregisterarray;
  279. Tsuperregisterworklist=object
  280. buflength,
  281. buflengthinc,
  282. length:word;
  283. buf:Psuperregisterarray;
  284. constructor init;
  285. constructor copyfrom(const x:Tsuperregisterworklist);
  286. destructor done;
  287. procedure clear;
  288. procedure add(s:tsuperregister);
  289. function addnodup(s:tsuperregister): boolean;
  290. function get:tsuperregister;
  291. function readidx(i:word):tsuperregister;
  292. procedure deleteidx(i:word);
  293. function delete(s:tsuperregister):boolean;
  294. end;
  295. psuperregisterworklist=^tsuperregisterworklist;
  296. const
  297. { alias for easier understanding }
  298. R_SSEREGISTER = R_MMREGISTER;
  299. { Invalid register number }
  300. RS_INVALID = high(tsuperregister);
  301. NR_INVALID = tregister($fffffffff);
  302. tcgsize2size : Array[tcgsize] of integer =
  303. (0,
  304. { integer values }
  305. 1, 2, 4, 8, 16,
  306. 1, 2, 4, 8, 16,
  307. { floating point values }
  308. 4, 8, 10, 8, 16,
  309. { multimedia values }
  310. 1, 2, 4, 8, 16, 32, 64,
  311. 1, 2, 4, 8, 16, 32, 64,
  312. { single-precision multimedia values }
  313. 4, 16, 32, 64,
  314. { double-precision multimedia values }
  315. 8, 16, 32, 64);
  316. tfloat2tcgsize: array[tfloattype] of tcgsize =
  317. (OS_F32,OS_F64,OS_F80,OS_F80,OS_C64,OS_C64,OS_F128);
  318. tcgsize2tfloat: array[OS_F32..OS_C64] of tfloattype =
  319. (s32real,s64real,s80real,s64comp);
  320. tvarregable2tcgloc : array[tvarregable] of tcgloc = (LOC_VOID,
  321. LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER,LOC_CREGISTER);
  322. {$if defined(cpu64bitalu)}
  323. { operand size describing an unsigned value in a pair of int registers }
  324. OS_PAIR = OS_128;
  325. { operand size describing an signed value in a pair of int registers }
  326. OS_SPAIR = OS_S128;
  327. {$elseif defined(cpu32bitalu)}
  328. { operand size describing an unsigned value in a pair of int registers }
  329. OS_PAIR = OS_64;
  330. { operand size describing an signed value in a pair of int registers }
  331. OS_SPAIR = OS_S64;
  332. {$elseif defined(cpu16bitalu)}
  333. { operand size describing an unsigned value in a pair of int registers }
  334. OS_PAIR = OS_32;
  335. { operand size describing an signed value in a pair of int registers }
  336. OS_SPAIR = OS_S32;
  337. {$elseif defined(cpu8bitalu)}
  338. { operand size describing an unsigned value in a pair of int registers }
  339. OS_PAIR = OS_16;
  340. { operand size describing an signed value in a pair of int registers }
  341. OS_SPAIR = OS_S16;
  342. {$endif}
  343. { Table to convert tcgsize variables to the correspondending
  344. unsigned types }
  345. tcgsize2unsigned : array[tcgsize] of tcgsize = (OS_NO,
  346. OS_8, OS_16, OS_32, OS_64, OS_128,
  347. OS_8, OS_16, OS_32, OS_64, OS_128,
  348. OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
  349. OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512,
  350. OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512,
  351. OS_MF32, OS_MF128,OS_MF256,OS_MF512,
  352. OS_MD64, OS_MD128,OS_MD256,OS_MD512);
  353. tcgsize2signed : array[tcgsize] of tcgsize = (OS_NO,
  354. OS_S8, OS_S16, OS_S32, OS_S64, OS_S128,
  355. OS_S8, OS_S16, OS_S32, OS_S64, OS_S128,
  356. OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
  357. OS_MS8, OS_MS16, OS_MS32, OS_MS64, OS_MS128,OS_MS256,OS_MS512,
  358. OS_MS8, OS_MS16, OS_MS32, OS_MS64, OS_MS128,OS_MS256,OS_MS512,
  359. OS_MF32, OS_MF128,OS_MF256,OS_MF512,
  360. OS_MD64, OS_MD128,OS_MD256,OS_MD512);
  361. tcgloc2str : array[TCGLoc] of string[12] = (
  362. 'LOC_INVALID',
  363. 'LOC_VOID',
  364. 'LOC_CONST',
  365. 'LOC_JUMP',
  366. 'LOC_FLAGS',
  367. 'LOC_REG',
  368. 'LOC_CREG',
  369. 'LOC_FPUREG',
  370. 'LOC_CFPUREG',
  371. 'LOC_MMXREG',
  372. 'LOC_CMMXREG',
  373. 'LOC_MMREG',
  374. 'LOC_CMMREG',
  375. 'LOC_SSETREG',
  376. 'LOC_CSSETREG',
  377. 'LOC_SSETREF',
  378. 'LOC_CSSETREF',
  379. 'LOC_CREF',
  380. 'LOC_REF'
  381. );
  382. var
  383. mms_movescalar : pmmshuffle;
  384. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  385. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  386. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  387. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  388. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  389. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  390. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  391. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  392. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  393. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  394. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  395. function generic_regname(r:tregister):string;
  396. {# From a constant numeric value, return the abstract code generator
  397. size.
  398. }
  399. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  400. function int_float_cgsize(const a: tcgint): tcgsize;
  401. function float_array_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  402. function double_array_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  403. function tcgsize2str(cgsize: tcgsize):string;
  404. { return the inverse condition of opcmp }
  405. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  406. { return the opcmp needed when swapping the operands }
  407. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  408. { return whether op is commutative }
  409. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  410. { returns true, if shuffle describes a real shuffle operation and not only a move }
  411. function realshuffle(shuffle : pmmshuffle) : boolean;
  412. { returns true, if the shuffle describes only a move of the scalar at index 0 }
  413. function shufflescalar(shuffle : pmmshuffle) : boolean;
  414. { removes shuffling from shuffle, this means that the destenation index of each shuffle is copied to
  415. the source }
  416. procedure removeshuffles(var shuffle : tmmshuffle);
  417. implementation
  418. uses
  419. verbose;
  420. {******************************************************************************
  421. tsuperregisterworklist
  422. ******************************************************************************}
  423. constructor tsuperregisterworklist.init;
  424. begin
  425. length:=0;
  426. buflength:=0;
  427. buflengthinc:=16;
  428. buf:=nil;
  429. end;
  430. constructor Tsuperregisterworklist.copyfrom(const x:Tsuperregisterworklist);
  431. begin
  432. self:=x;
  433. if x.buf<>nil then
  434. begin
  435. getmem(buf,buflength*sizeof(Tsuperregister));
  436. move(x.buf^,buf^,length*sizeof(Tsuperregister));
  437. end;
  438. end;
  439. destructor tsuperregisterworklist.done;
  440. begin
  441. if assigned(buf) then
  442. freemem(buf);
  443. end;
  444. procedure tsuperregisterworklist.add(s:tsuperregister);
  445. begin
  446. inc(length);
  447. { Need to increase buffer length? }
  448. if length>=buflength then
  449. begin
  450. inc(buflength,buflengthinc);
  451. buflengthinc:=buflengthinc*2;
  452. if buflengthinc>256 then
  453. buflengthinc:=256;
  454. reallocmem(buf,buflength*sizeof(Tsuperregister));
  455. end;
  456. buf^[length-1]:=s;
  457. end;
  458. function tsuperregisterworklist.addnodup(s:tsuperregister): boolean;
  459. begin
  460. addnodup := false;
  461. if indexword(buf^,length,s) = -1 then
  462. begin
  463. add(s);
  464. addnodup := true;
  465. end;
  466. end;
  467. procedure tsuperregisterworklist.clear;
  468. begin
  469. length:=0;
  470. end;
  471. procedure tsuperregisterworklist.deleteidx(i:word);
  472. begin
  473. if i>=length then
  474. internalerror(200310144);
  475. buf^[i]:=buf^[length-1];
  476. dec(length);
  477. end;
  478. function tsuperregisterworklist.readidx(i:word):tsuperregister;
  479. begin
  480. if (i >= length) then
  481. internalerror(2005010601);
  482. result := buf^[i];
  483. end;
  484. function tsuperregisterworklist.get:tsuperregister;
  485. begin
  486. if length=0 then
  487. internalerror(200310142);
  488. get:=buf^[0];
  489. buf^[0]:=buf^[length-1];
  490. dec(length);
  491. end;
  492. function tsuperregisterworklist.delete(s:tsuperregister):boolean;
  493. var
  494. i:longint;
  495. begin
  496. delete:=false;
  497. { indexword in 1.0.x and 1.9.4 is broken }
  498. i:=indexword(buf^,length,s);
  499. if i<>-1 then
  500. begin
  501. deleteidx(i);
  502. delete := true;
  503. end;
  504. end;
  505. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  506. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  507. begin
  508. fillchar(regs,(maxreg+7) shr 3,-byte(setall));
  509. end;
  510. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  511. begin
  512. include(regs[s shr 8],(s and $ff));
  513. end;
  514. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  515. begin
  516. exclude(regs[s shr 8],(s and $ff));
  517. end;
  518. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  519. begin
  520. result:=(s and $ff) in regs[s shr 8];
  521. end;
  522. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  523. begin
  524. tregisterrec(result).regtype:=rt;
  525. tregisterrec(result).supreg:=sr;
  526. tregisterrec(result).subreg:=sb;
  527. end;
  528. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  529. begin
  530. result:=tregisterrec(r).subreg;
  531. end;
  532. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  533. begin
  534. result:=tregisterrec(r).supreg;
  535. end;
  536. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  537. begin
  538. result:=tregisterrec(r).regtype;
  539. end;
  540. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  541. begin
  542. tregisterrec(r).subreg:=sr;
  543. end;
  544. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  545. begin
  546. tregisterrec(r).supreg:=sr;
  547. end;
  548. function generic_regname(r:tregister):string;
  549. var
  550. nr : string[12];
  551. begin
  552. str(getsupreg(r),nr);
  553. case getregtype(r) of
  554. R_INTREGISTER:
  555. result:='ireg'+nr;
  556. R_FPUREGISTER:
  557. result:='freg'+nr;
  558. R_MMREGISTER:
  559. result:='mreg'+nr;
  560. R_MMXREGISTER:
  561. result:='xreg'+nr;
  562. R_ADDRESSREGISTER:
  563. result:='areg'+nr;
  564. R_SPECIALREGISTER:
  565. result:='sreg'+nr;
  566. else
  567. begin
  568. result:='INVALID';
  569. exit;
  570. end;
  571. end;
  572. case getsubreg(r) of
  573. R_SUBNONE:
  574. ;
  575. R_SUBL:
  576. result:=result+'l';
  577. R_SUBH:
  578. result:=result+'h';
  579. R_SUBW:
  580. result:=result+'w';
  581. R_SUBD:
  582. result:=result+'d';
  583. R_SUBQ:
  584. result:=result+'q';
  585. R_SUBFS:
  586. result:=result+'fs';
  587. R_SUBFD:
  588. result:=result+'fd';
  589. R_SUBMMD:
  590. result:=result+'md';
  591. R_SUBMMS:
  592. result:=result+'ms';
  593. R_SUBMMWHOLE:
  594. result:=result+'ma';
  595. R_SUBMMX:
  596. result:=result+'mx';
  597. R_SUBMMY:
  598. result:=result+'my';
  599. R_SUBMMZ:
  600. result:=result+'mz';
  601. else
  602. internalerror(200308252);
  603. end;
  604. end;
  605. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  606. const
  607. size2cgsize : array[0..8] of tcgsize = (
  608. OS_NO,OS_8,OS_16,OS_NO,OS_32,OS_NO,OS_NO,OS_NO,OS_64
  609. );
  610. begin
  611. {$ifdef cpu64bitalu}
  612. if a=16 then
  613. result:=OS_128
  614. else
  615. {$endif cpu64bitalu}
  616. if a>8 then
  617. result:=OS_NO
  618. else
  619. result:=size2cgsize[a];
  620. end;
  621. function int_float_cgsize(const a: tcgint): tcgsize;
  622. begin
  623. case a of
  624. 4 :
  625. result:=OS_F32;
  626. 8 :
  627. result:=OS_F64;
  628. 10 :
  629. result:=OS_F80;
  630. 16 :
  631. result:=OS_F128;
  632. else
  633. internalerror(200603211);
  634. end;
  635. end;
  636. function float_array_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  637. begin
  638. case a of
  639. 4:
  640. result := OS_MF32;
  641. 16:
  642. result := OS_MF128;
  643. 32:
  644. result := OS_MF256;
  645. 64:
  646. result := OS_MF512;
  647. else
  648. result := int_cgsize(a);
  649. end;
  650. end;
  651. function double_array_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  652. begin
  653. case a of
  654. 8:
  655. result := OS_MD64;
  656. 16:
  657. result := OS_MD128;
  658. 32:
  659. result := OS_MD256;
  660. 64:
  661. result := OS_MD512;
  662. else
  663. result := int_cgsize(a);
  664. end;
  665. end;
  666. function tcgsize2str(cgsize: tcgsize):string;
  667. begin
  668. Str(cgsize, Result);
  669. end;
  670. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  671. const
  672. list: array[TOpCmp] of TOpCmp =
  673. (OC_NONE,OC_NE,OC_LTE,OC_GTE,OC_LT,OC_GT,OC_EQ,OC_A,OC_AE,
  674. OC_B,OC_BE);
  675. begin
  676. inverse_opcmp := list[opcmp];
  677. end;
  678. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  679. const
  680. list: array[TOpCmp] of TOpCmp =
  681. (OC_NONE,OC_EQ,OC_LT,OC_GT,OC_LTE,OC_GTE,OC_NE,OC_AE,OC_A,
  682. OC_BE,OC_B);
  683. begin
  684. swap_opcmp := list[opcmp];
  685. end;
  686. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  687. const
  688. list: array[topcg] of boolean =
  689. (true,false,true,true,false,false,true,true,false,false,
  690. true,false,false,false,false,true,false,false);
  691. begin
  692. commutativeop := list[op];
  693. end;
  694. function realshuffle(shuffle : pmmshuffle) : boolean;
  695. var
  696. i : longint;
  697. begin
  698. realshuffle:=true;
  699. if (shuffle=nil) or (shuffle^.len=0) then
  700. realshuffle:=false
  701. else
  702. begin
  703. for i:=1 to shuffle^.len do
  704. begin
  705. if (shuffle^.shuffles[i] and $f)<>((shuffle^.shuffles[i] and $f0) shr 4) then
  706. exit;
  707. end;
  708. realshuffle:=false;
  709. end;
  710. end;
  711. function shufflescalar(shuffle : pmmshuffle) : boolean;
  712. begin
  713. result:=shuffle^.len=0;
  714. end;
  715. procedure removeshuffles(var shuffle : tmmshuffle);
  716. var
  717. i : longint;
  718. begin
  719. if shuffle.len=0 then
  720. exit;
  721. for i:=1 to shuffle.len do
  722. shuffle.shuffles[i]:=(shuffle.shuffles[i] and $f) or ((shuffle.shuffles[i] and $f0) shr 4);
  723. end;
  724. initialization
  725. new(mms_movescalar);
  726. mms_movescalar^.len:=0;
  727. finalization
  728. dispose(mms_movescalar);
  729. end.