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aoptcpu.pas 16 KB

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  1. {
  2. Copyright (c) 1998-2014 by the Free Pascal development team
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for m68k
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. {$define DEBUG_AOPTCPU}
  21. Interface
  22. uses
  23. cpubase, aoptobj, aoptcpub, aopt, aasmtai,
  24. cgbase;
  25. Type
  26. TCpuAsmOptimizer = class(TAsmOptimizer)
  27. function RegLoadedWithNewValue(reg: tregister; hp: tai): boolean; override;
  28. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  29. function TryToOptimizeMove(var p: tai): boolean;
  30. { outputs a debug message into the assembler file }
  31. procedure DebugMsg(const s: string; p: tai);
  32. End;
  33. Implementation
  34. uses
  35. cutils, aasmcpu, cgutils, globals, verbose, cpuinfo, itcpugas;
  36. { Range check must be disabled explicitly as conversions between signed and unsigned
  37. 32-bit values are done without explicit typecasts }
  38. {$R-}
  39. function opname(var p: tai): string;
  40. begin
  41. result:=upcase(gas_op2str[taicpu(p).opcode]);
  42. end;
  43. function RefsEqual(const r1, r2: treference): boolean;
  44. begin
  45. RefsEqual :=
  46. (r1.offset = r2.offset) and
  47. (r1.base = r2.base) and
  48. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  49. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  50. (r1.relsymbol = r2.relsymbol) and
  51. (r1.volatility=[]) and
  52. (r2.volatility=[]);
  53. end;
  54. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean;
  55. begin
  56. result := oper1.typ = oper2.typ;
  57. if result then
  58. case oper1.typ of
  59. top_const:
  60. Result:=oper1.val = oper2.val;
  61. top_reg:
  62. Result:=oper1.reg = oper2.reg;
  63. top_ref:
  64. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  65. else
  66. internalerror(2016112401);
  67. end
  68. end;
  69. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  70. var
  71. p: taicpu;
  72. begin
  73. if not assigned(hp) or
  74. (hp.typ <> ait_instruction) then
  75. begin
  76. Result := false;
  77. exit;
  78. end;
  79. p := taicpu(hp);
  80. Result :=
  81. ((p.opcode in [A_MOVE,A_MOVEA,A_MVS,A_MVZ,A_MOVEQ,A_LEA]) and
  82. (p.oper[1]^.typ = top_reg) and
  83. (SuperRegistersEqual(p.oper[1]^.reg,reg)) and
  84. ((p.oper[0]^.typ = top_const) or
  85. ((p.oper[0]^.typ = top_reg) and
  86. not(SuperRegistersEqual(p.oper[0]^.reg,reg))) or
  87. ((p.oper[0]^.typ = top_ref) and
  88. not RegInRef(reg,p.oper[0]^.ref^)))) or
  89. ((p.opcode = A_FMOVE) and
  90. (p.oper[1]^.typ = top_reg) and
  91. (SuperRegistersEqual(p.oper[1]^.reg,reg)) and
  92. ((p.oper[0]^.typ = top_realconst) or
  93. ((p.oper[0]^.typ = top_reg) and
  94. not(SuperRegistersEqual(p.oper[0]^.reg,reg))))) or
  95. ((p.opcode = A_MOVEM) and
  96. (p.oper[1]^.typ = top_regset) and
  97. ((getsupreg(reg) in p.oper[1]^.dataregset) or
  98. (getsupreg(reg) in p.oper[1]^.addrregset))) or
  99. ((p.opcode = A_FMOVEM) and
  100. (p.oper[1]^.typ = top_regset) and
  101. (getsupreg(reg) in p.oper[1]^.fpuregset));
  102. end;
  103. {$ifdef DEBUG_AOPTCPU}
  104. procedure TCpuAsmOptimizer.DebugMsg(const s: string; p : tai);
  105. begin
  106. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  107. end;
  108. {$else DEBUG_AOPTCPU}
  109. procedure TCpuAsmOptimizer.DebugMsg(const s: string; p : tai);inline;
  110. begin
  111. end;
  112. {$endif DEBUG_AOPTCPU}
  113. function TCpuAsmOptimizer.TryToOptimizeMove(var p: tai): boolean;
  114. var
  115. next, next2: tai;
  116. opstr: string[15];
  117. begin
  118. result:=false;
  119. if GetNextInstruction(p,next) and
  120. (next.typ = ait_instruction) and
  121. (taicpu(next).opcode = taicpu(p).opcode) and
  122. (taicpu(p).opsize = taicpu(next).opsize) and
  123. (taicpu(p).oper[1]^.typ = top_reg) and
  124. MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[0]^) then
  125. begin
  126. if not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next).oper[1]^)) and
  127. RegEndOfLife(taicpu(next).oper[0]^.reg, taicpu(next)) then
  128. begin
  129. opstr:=opname(p);
  130. case taicpu(p).oper[0]^.typ of
  131. top_reg:
  132. begin
  133. { move %reg0, %tmpreg; move %tmpreg, <ea> -> move %reg0, <ea> }
  134. taicpu(p).loadOper(1,taicpu(next).oper[1]^);
  135. asml.remove(next);
  136. next.free;
  137. result:=true;
  138. { also remove leftover move %reg0, %reg0, which can occur as the result
  139. of the previous optimization, if %reg0 and %tmpreg was different types
  140. (addr vs. data), so these moves were left in by the cg }
  141. if MatchOperand(taicpu(p).oper[0]^,taicpu(p).oper[1]^) then
  142. begin
  143. DebugMsg('Optimizer: '+opstr+' + '+opstr+' removed',p);
  144. GetNextInstruction(p,next);
  145. asml.remove(p);
  146. p.free;
  147. p:=next;
  148. end
  149. else
  150. DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #1',p)
  151. end;
  152. top_const:
  153. begin
  154. // DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #2',p);
  155. end;
  156. top_ref:
  157. begin
  158. { move ref, %tmpreg; move %tmpreg, <ea> -> move ref, <ea> }
  159. { we only want to do this when <ea> is a reg or a simple reference }
  160. with taicpu(next).oper[1]^ do
  161. if (taicpu(next).opcode <> A_FMOVE) and
  162. ((typ = top_reg) or
  163. ((typ = top_ref) and
  164. ((ref^.index = NR_NO) or
  165. (ref^.base = NR_NO)) and
  166. (ref^.symbol = nil) and
  167. (ref^.offset = 0))) then
  168. begin
  169. DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #3',p);
  170. taicpu(p).loadOper(1,taicpu(next).oper[1]^);
  171. asml.remove(next);
  172. next.free;
  173. result:=true;
  174. end;
  175. end;
  176. end;
  177. end;
  178. exit;
  179. end;
  180. if GetNextInstruction(p,next) and
  181. (next.typ = ait_instruction) and
  182. GetNextInstruction(next,next2) and
  183. (next2.typ = ait_instruction) and
  184. (taicpu(next).opcode <> taicpu(p).opcode) and
  185. (taicpu(next2).opcode = taicpu(p).opcode) and
  186. (taicpu(p).oper[0]^.typ = top_reg) and
  187. (taicpu(p).oper[1]^.typ = top_reg) and
  188. (getregtype(taicpu(p).oper[0]^.reg) = getregtype(taicpu(p).oper[1]^.reg)) and
  189. MatchOperand(taicpu(p).oper[1]^,taicpu(next2).oper[0]^) and
  190. MatchOperand(taicpu(next2).oper[1]^,taicpu(p).oper[0]^) and
  191. (taicpu(p).opsize = taicpu(next2).opsize) and
  192. ((taicpu(p).opcode = A_FMOVE) or
  193. (taicpu(p).opsize = taicpu(next).opsize)) then
  194. begin
  195. opstr:=opname(p);
  196. if not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next2).oper[1]^)) and
  197. not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next).oper[0]^)) and
  198. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(next2)) then
  199. begin
  200. { move %reg0, %tmpreg
  201. op ???, %tmpreg
  202. move %tmpreg, %reg0
  203. to:
  204. op ???, %reg0 }
  205. if MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[taicpu(next).ops-1]^) then
  206. begin
  207. {
  208. Disabled, because it breaks some tests... :( (KB)
  209. DebugMsg('Optimizer: '+opstr+' + OP + '+opstr+' to OP #1',next);
  210. taicpu(next).loadOper(taicpu(next).ops-1,taicpu(p).oper[0]^);
  211. asml.remove(p);
  212. asml.remove(next2);
  213. p.free;
  214. next2.free;
  215. result:=true;
  216. }
  217. end;
  218. end;
  219. end;
  220. end;
  221. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  222. var
  223. next: tai;
  224. tmpref: treference;
  225. tmpsingle: single;
  226. begin
  227. result:=false;
  228. case p.typ of
  229. ait_instruction:
  230. begin
  231. //asml.insertbefore(tai_comment.Create(strpnew('pass1 called for instr')), p);
  232. case taicpu(p).opcode of
  233. A_MOVE:
  234. result:=TryToOptimizeMove(p);
  235. { LEA (Ax),Ax is a NOP if src and dest reg is equal, so remove it. }
  236. A_LEA:
  237. if not assigned(taicpu(p).oper[0]^.ref^.symbol) and
  238. (((taicpu(p).oper[0]^.ref^.base = taicpu(p).oper[1]^.reg) and
  239. (taicpu(p).oper[0]^.ref^.index = NR_NO)) or
  240. ((taicpu(p).oper[0]^.ref^.index = taicpu(p).oper[1]^.reg) and
  241. (taicpu(p).oper[0]^.ref^.base = NR_NO))) and
  242. (taicpu(p).oper[0]^.ref^.offset = 0) then
  243. begin
  244. DebugMsg('Optimizer: LEA 0(Ax),Ax removed',p);
  245. GetNextInstruction(p,next);
  246. asml.remove(p);
  247. p.free;
  248. p:=next;
  249. result:=true;
  250. end;
  251. { Address register sub/add can be replaced with ADDQ/SUBQ or LEA if the value is in the
  252. SmallInt range, which is shorter to encode and faster to execute on most 68k }
  253. A_SUB,A_SUBA,A_ADD,A_ADDA:
  254. if (taicpu(p).oper[1]^.typ = top_reg) and isaddressregister(taicpu(p).oper[1]^.reg) and
  255. (taicpu(p).oper[0]^.typ = top_const) then
  256. begin
  257. if isvalueforaddqsubq(taicpu(p).oper[0]^.val) then
  258. begin
  259. DebugMsg('Optimizer: SUB/ADD #val,Ax to SUBQ/ADDQ',p);
  260. taicpu(p).opsize:=S_L; // this is safe, because we're targetting an address reg
  261. if taicpu(p).opcode in [A_ADD,A_ADDA] then
  262. taicpu(p).opcode:=A_ADDQ
  263. else
  264. taicpu(p).opcode:=A_SUBQ;
  265. result:=true;
  266. end
  267. else
  268. if isvalue16bit(abs(taicpu(p).oper[0]^.val)) then
  269. begin
  270. DebugMsg('Optimizer: SUB/ADD #val,Ax to LEA val(Ax),Ax',p);
  271. if taicpu(p).opcode in [A_SUB,A_SUBA] then
  272. reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,-taicpu(p).oper[0]^.val,ctempposinvalid,0,[])
  273. else
  274. reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,taicpu(p).oper[0]^.val,ctempposinvalid,0,[]);
  275. taicpu(p).opcode:=A_LEA;
  276. taicpu(p).loadref(0,tmpref);
  277. result:=true;
  278. end;
  279. end;
  280. { MOVEA #0,Ax to SUBA Ax,Ax, because it's shorter }
  281. A_MOVEA:
  282. if (taicpu(p).oper[0]^.typ = top_const) and
  283. (taicpu(p).oper[0]^.val = 0) then
  284. begin
  285. DebugMsg('Optimizer: MOVEA #0,Ax to SUBA Ax,Ax',p);
  286. taicpu(p).opcode:=A_SUBA;
  287. taicpu(p).opsize:=S_L; { otherwise it will be .W -> BOOM }
  288. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  289. result:=true;
  290. end;
  291. { CLR.L Dx on a 68000 is slower than MOVEQ #0,Dx }
  292. A_CLR:
  293. if (current_settings.cputype in [cpu_mc68000]) and
  294. (taicpu(p).oper[0]^.typ = top_reg) and
  295. (taicpu(p).opsize = S_L) and
  296. isintregister(taicpu(p).oper[0]^.reg) then
  297. begin
  298. //DebugMsg('Optimizer: CLR.L Dx to MOVEQ #0,Dx',p);
  299. taicpu(p).opcode:=A_MOVEQ;
  300. taicpu(p).loadoper(1,taicpu(p).oper[0]^);
  301. taicpu(p).loadconst(0,0);
  302. taicpu(p).ops:=2;
  303. result:=true;
  304. end;
  305. { CMP #0,<ea> equals to TST <ea>, just shorter and TST is more flexible anyway }
  306. A_CMP,A_CMPI:
  307. if (taicpu(p).oper[0]^.typ = top_const) and
  308. (taicpu(p).oper[0]^.val = 0) then
  309. begin
  310. DebugMsg('Optimizer: CMP #0 to TST',p);
  311. taicpu(p).opcode:=A_TST;
  312. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  313. taicpu(p).clearop(1);
  314. taicpu(p).ops:=1;
  315. result:=true;
  316. end;
  317. A_FCMP:
  318. if (taicpu(p).oper[0]^.typ = top_realconst) then
  319. begin
  320. if (taicpu(p).oper[0]^.val_real = 0.0) then
  321. begin
  322. DebugMsg('Optimizer: FCMP #0.0 to FTST',p);
  323. taicpu(p).opcode:=A_FTST;
  324. taicpu(p).opsize:=S_FX;
  325. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  326. taicpu(p).clearop(1);
  327. taicpu(p).ops:=1;
  328. result:=true;
  329. end
  330. else
  331. begin
  332. tmpsingle:=taicpu(p).oper[0]^.val_real;
  333. if (taicpu(p).opsize = S_FD) and
  334. ((taicpu(p).oper[0]^.val_real - tmpsingle) = 0.0) then
  335. begin
  336. DebugMsg('Optimizer: FCMP const to lesser precision',p);
  337. taicpu(p).opsize:=S_FS;
  338. result:=true;
  339. end;
  340. end;
  341. end;
  342. A_FMOVE,A_FMUL,A_FADD,A_FSUB,A_FDIV:
  343. begin
  344. if (taicpu(p).opcode = A_FMOVE) and TryToOptimizeMove(p) then
  345. begin
  346. result:=true;
  347. exit;
  348. end;
  349. if (taicpu(p).oper[0]^.typ = top_realconst) then
  350. begin
  351. tmpsingle:=taicpu(p).oper[0]^.val_real;
  352. if (taicpu(p).opsize = S_FD) and
  353. ((taicpu(p).oper[0]^.val_real - tmpsingle) = 0.0) then
  354. begin
  355. DebugMsg('Optimizer: FMOVE/FMUL/FADD/FSUB/FDIV const to lesser precision',p);
  356. taicpu(p).opsize:=S_FS;
  357. result:=true;
  358. end;
  359. end;
  360. end;
  361. end;
  362. end;
  363. end;
  364. end;
  365. begin
  366. casmoptimizer:=TCpuAsmOptimizer;
  367. end.