ncgset.pas 66 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Carl Eric Codere
  3. Generate generic assembler for in set/case labels
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgset;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. globtype,globals,constexp,symtype,
  22. node,nset,cpubase,cgbase,cgutils,cgobj,aasmbase,aasmtai,aasmdata;
  23. type
  24. tcgsetelementnode = class(tsetelementnode)
  25. procedure pass_generate_code;override;
  26. end;
  27. Tsetpart=record
  28. range : boolean; {Part is a range.}
  29. start,stop : byte; {Start/stop when range; Stop=element when an element.}
  30. end;
  31. Tsetparts=array[1..8] of Tsetpart;
  32. { tcginnode }
  33. tcginnode = class(tinnode)
  34. procedure in_smallset(opdef: tdef; setbase: aint); virtual;
  35. function pass_1: tnode;override;
  36. procedure pass_generate_code;override;
  37. protected
  38. function checkgenjumps(out setparts: Tsetparts; out numparts: byte; out use_small: boolean): boolean; virtual;
  39. function analizeset(const Aset:Tconstset;out setparts: Tsetparts; out numparts: byte;is_small:boolean):boolean;virtual;
  40. end;
  41. tcgcasenode = class(tcasenode)
  42. {
  43. Emits the case node statement. Contrary to the intel
  44. 80x86 version, this version does not emit jump tables,
  45. because of portability problems.
  46. }
  47. procedure pass_generate_code;override;
  48. protected
  49. with_sign : boolean;
  50. opsize : tdef;
  51. jmp_gt,jmp_lt,jmp_le : topcmp;
  52. { register with case expression }
  53. hregister,hregister2 : tregister;
  54. endlabel,elselabel : tasmlabel;
  55. { true, if we can omit the range check of the jump table }
  56. jumptable_no_range : boolean;
  57. { has the implementation jumptable support }
  58. min_label : tconstexprint;
  59. { Number of labels }
  60. labelcnt: TCgInt;
  61. { Number of individual values checked, counting each value in a range
  62. individually (e.g. 0..2 counts as 3). }
  63. TrueCount: TCgInt;
  64. function GetBranchLabel(Block: TNode; out _Label: TAsmLabel): Boolean;
  65. function blocklabel(id:longint):tasmlabel;
  66. procedure optimizevalues(var max_linear_list:int64;var max_dist:qword);virtual;
  67. function has_jumptable : boolean;virtual;
  68. procedure genjumptable(hp : pcaselabel;min_,max_ : int64); virtual;
  69. procedure genlinearlist(hp : pcaselabel); virtual;
  70. procedure genlinearcmplist(hp : pcaselabel); virtual;
  71. procedure genjmptreeentry(p : pcaselabel;parentvalue : TConstExprInt); virtual;
  72. procedure genjmptree(root : pcaselabel); virtual;
  73. end;
  74. implementation
  75. uses
  76. verbose,
  77. cutils,
  78. symconst,symdef,symsym,defutil,
  79. pass_2,tgobj,
  80. nbas,ncon,ncgflw,
  81. ncgutil,hlcgobj;
  82. {*****************************************************************************
  83. TCGSETELEMENTNODE
  84. *****************************************************************************}
  85. procedure tcgsetelementnode.pass_generate_code;
  86. begin
  87. { load the set element's value }
  88. secondpass(left);
  89. { also a second value ? }
  90. if assigned(right) then
  91. internalerror(2015111106);
  92. { we don't modify the left side, we only check the location type; our
  93. parent node (an add-node) will use the resulting location to perform
  94. the set operation without creating an intermediate set }
  95. location_copy(location,left.location);
  96. end;
  97. {*****************************************************************************
  98. *****************************************************************************}
  99. function tcginnode.analizeset(const Aset:Tconstset; out setparts:tsetparts; out numparts: byte; is_small:boolean):boolean;
  100. var
  101. compares,maxcompares:word;
  102. i:byte;
  103. begin
  104. analizeset:=false;
  105. fillchar(setparts,sizeof(setparts),0);
  106. numparts:=0;
  107. compares:=0;
  108. { Lots of comparisions take a lot of time, so do not allow
  109. too much comparisions. 8 comparisions are, however, still
  110. smalller than emitting the set }
  111. if cs_opt_size in current_settings.optimizerswitches then
  112. maxcompares:=8
  113. else
  114. maxcompares:=5;
  115. { when smallset is possible allow only 3 compares the smallset
  116. code is for littlesize also smaller when more compares are used }
  117. if is_small then
  118. maxcompares:=3;
  119. for i:=0 to 255 do
  120. if i in Aset then
  121. begin
  122. if (numparts=0) or (i<>setparts[numparts].stop+1) then
  123. begin
  124. {Set element is a separate element.}
  125. inc(compares);
  126. if compares>maxcompares then
  127. exit;
  128. inc(numparts);
  129. setparts[numparts].range:=false;
  130. setparts[numparts].stop:=i;
  131. end
  132. else
  133. {Set element is part of a range.}
  134. if not setparts[numparts].range then
  135. begin
  136. {Transform an element into a range.}
  137. setparts[numparts].range:=true;
  138. setparts[numparts].start:=setparts[numparts].stop;
  139. setparts[numparts].stop:=i;
  140. { there's only one compare per range anymore. Only a }
  141. { sub is added, but that's much faster than a }
  142. { cmp/jcc combo so neglect its effect }
  143. { inc(compares);
  144. if compares>maxcompares then
  145. exit; }
  146. end
  147. else
  148. begin
  149. {Extend a range.}
  150. setparts[numparts].stop:=i;
  151. end;
  152. end;
  153. analizeset:=true;
  154. end;
  155. procedure tcginnode.in_smallset(opdef: tdef; setbase: aint);
  156. begin
  157. { location is always LOC_REGISTER }
  158. location_reset(location, LOC_REGISTER, def_cgsize(resultdef));
  159. { allocate a register for the result }
  160. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, resultdef);
  161. {**************************** SMALL SET **********************}
  162. if left.location.loc=LOC_CONSTANT then
  163. begin
  164. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,
  165. right.resultdef, resultdef,
  166. left.location.value-setbase, right.location,
  167. location.register);
  168. end
  169. else
  170. begin
  171. hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location,
  172. left.resultdef, opdef, true);
  173. register_maybe_adjust_setbase(current_asmdata.CurrAsmList, opdef, left.location,
  174. setbase);
  175. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList, opdef,
  176. right.resultdef, resultdef, left.location.register, right.location,
  177. location.register);
  178. end;
  179. end;
  180. function tcginnode.checkgenjumps(out setparts: Tsetparts; out numparts: byte;out use_small: boolean): boolean;
  181. begin
  182. { check if we can use smallset operation using btl which is limited
  183. to 32 bits, the left side may also not contain higher values !! }
  184. use_small:=is_smallset(right.resultdef) and
  185. not is_signed(left.resultdef) and
  186. ((left.resultdef.typ=orddef) and (torddef(left.resultdef).high<32) or
  187. (left.resultdef.typ=enumdef) and (tenumdef(left.resultdef).max<32));
  188. { Can we generate jumps? Possible for all types of sets }
  189. checkgenjumps:=(right.nodetype=setconstn) and
  190. analizeset(Tsetconstnode(right).value_set^,setparts,numparts,use_small);
  191. end;
  192. function tcginnode.pass_1: tnode;
  193. var
  194. setparts: Tsetparts;
  195. numparts: byte;
  196. use_small: boolean;
  197. begin
  198. result := inherited pass_1;
  199. if not(assigned(result)) and
  200. checkgenjumps(setparts,numparts,use_small) then
  201. expectloc := LOC_JUMP;
  202. end;
  203. procedure tcginnode.pass_generate_code;
  204. var
  205. adjustment,
  206. setbase : {$ifdef CPU8BITALU}smallint{$else}aint{$endif};
  207. l, l2 : tasmlabel;
  208. hr,
  209. pleftreg : tregister;
  210. setparts : Tsetparts;
  211. opsize : tcgsize;
  212. opdef : tdef;
  213. uopsize : tcgsize;
  214. uopdef : tdef;
  215. orgopsize : tcgsize;
  216. genjumps,
  217. use_small : boolean;
  218. i,numparts : byte;
  219. needslabel : Boolean;
  220. begin
  221. l2:=nil;
  222. { We check first if we can generate jumps, this can be done
  223. because the resultdef is already set in firstpass }
  224. genjumps := checkgenjumps(setparts,numparts,use_small);
  225. orgopsize := def_cgsize(left.resultdef);
  226. {$if defined(cpu8bitalu)}
  227. if (tsetdef(right.resultdef).setbase>=-128) and
  228. (tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase+1<=256) then
  229. begin
  230. uopsize := OS_8;
  231. uopdef := u8inttype;
  232. if is_signed(left.resultdef) then
  233. begin
  234. opsize := OS_S8;
  235. opdef := s8inttype;
  236. end
  237. else
  238. begin
  239. opsize := uopsize;
  240. opdef := uopdef;
  241. end;
  242. end
  243. {$endif defined(cpu8bitalu)}
  244. {$if defined(cpu8bitalu)}
  245. { this should be also enabled for 16 bit CPUs, however, I have no proper testing facility for 16 bit, my
  246. testing results using Dosbox are no reliable }
  247. { $if defined(cpu8bitalu) or defined(cpu16bitalu)}
  248. else if (tsetdef(right.resultdef).setbase>=-32768) and
  249. (tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase+1<=65536) then
  250. begin
  251. uopsize := OS_16;
  252. uopdef := u16inttype;
  253. if is_signed(left.resultdef) then
  254. begin
  255. opsize := OS_S16;
  256. opdef := s16inttype;
  257. end
  258. else
  259. begin
  260. opsize := uopsize;
  261. opdef := uopdef;
  262. end;
  263. end
  264. else
  265. {$endif defined(cpu8bitalu)}
  266. begin
  267. uopsize := OS_32;
  268. uopdef := u32inttype;
  269. if is_signed(left.resultdef) then
  270. begin
  271. opsize := OS_S32;
  272. opdef := s32inttype;
  273. end
  274. else
  275. begin
  276. opsize := uopsize;
  277. opdef := uopdef;
  278. end;
  279. end;
  280. needslabel := false;
  281. if not genjumps then
  282. { calculate both operators }
  283. { the complex one first }
  284. { not in case of genjumps, because then we don't secondpass }
  285. { right at all (so we have to make sure that "right" really is }
  286. { "right" and not "swapped left" in that case) }
  287. firstcomplex(self);
  288. secondpass(left);
  289. if (left.expectloc=LOC_JUMP)<>
  290. (left.location.loc=LOC_JUMP) then
  291. internalerror(2007070101);
  292. { Only process the right if we are not generating jumps }
  293. if not genjumps then
  294. secondpass(right);
  295. if codegenerror then
  296. exit;
  297. { ofcourse not commutative }
  298. if nf_swapped in flags then
  299. swapleftright;
  300. setbase:=tsetdef(right.resultdef).setbase;
  301. if genjumps then
  302. begin
  303. { location is always LOC_JUMP }
  304. current_asmdata.getjumplabel(l);
  305. current_asmdata.getjumplabel(l2);
  306. location_reset_jump(location,l,l2);
  307. { If register is used, use only lower 8 bits }
  308. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
  309. pleftreg := left.location.register;
  310. { how much have we already substracted from the x in the }
  311. { "x in [y..z]" expression }
  312. adjustment := 0;
  313. hr:=NR_NO;
  314. for i:=1 to numparts do
  315. if setparts[i].range then
  316. { use fact that a <= x <= b <=> aword(x-a) <= aword(b-a) }
  317. begin
  318. { is the range different from all legal values? }
  319. if (setparts[i].stop-setparts[i].start <> 255) or not (orgopsize = OS_8) then
  320. begin
  321. { yes, is the lower bound <> 0? }
  322. if (setparts[i].start <> 0) then
  323. { we're going to substract from the left register, }
  324. { so in case of a LOC_CREGISTER first move the value }
  325. { to edi (not done before because now we can do the }
  326. { move and substract in one instruction with LEA) }
  327. if (left.location.loc = LOC_CREGISTER) and
  328. (hr<>pleftreg) then
  329. begin
  330. { don't change this back to a_op_const_reg/a_load_reg_reg, since pleftreg must not be modified }
  331. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,opdef);
  332. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,setparts[i].start,pleftreg,hr);
  333. pleftreg:=hr;
  334. end
  335. else
  336. begin
  337. { otherwise, the value is already in a register }
  338. { that can be modified }
  339. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,
  340. setparts[i].start-adjustment,pleftreg)
  341. end;
  342. { new total value substracted from x: }
  343. { adjustment + (setparts[i].start - adjustment) }
  344. adjustment := setparts[i].start;
  345. { check if result < b-a+1 (not "result <= b-a", since }
  346. { we need a carry in case the element is in the range }
  347. { (this will never overflow since we check at the }
  348. { beginning whether stop-start <> 255) }
  349. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, uopdef, OC_B,
  350. setparts[i].stop-setparts[i].start+1,pleftreg,location.truelabel);
  351. end
  352. else
  353. { if setparts[i].start = 0 and setparts[i].stop = 255, }
  354. { it's always true since "in" is only allowed for bytes }
  355. begin
  356. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.truelabel);
  357. end;
  358. end
  359. else
  360. begin
  361. { Emit code to check if left is an element }
  362. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_EQ,
  363. setparts[i].stop-adjustment,pleftreg,location.truelabel);
  364. end;
  365. { To compensate for not doing a second pass }
  366. right.location.reference.symbol:=nil;
  367. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
  368. end
  369. else
  370. {*****************************************************************}
  371. { NO JUMP TABLE GENERATION }
  372. {*****************************************************************}
  373. begin
  374. { We will now generated code to check the set itself, no jmps,
  375. handle smallsets separate, because it allows faster checks }
  376. if use_small then
  377. begin
  378. in_smallset(opdef, setbase);
  379. end
  380. else
  381. {************************** NOT SMALL SET ********************}
  382. begin
  383. { location is always LOC_REGISTER }
  384. location_reset(location, LOC_REGISTER, uopsize{def_cgsize(resultdef)});
  385. { allocate a register for the result }
  386. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, uopdef);
  387. if right.location.loc=LOC_CONSTANT then
  388. begin
  389. { can it actually occur currently? CEC }
  390. { yes: "if bytevar in [1,3,5,7,9,11,13,15]" (JM) }
  391. { note: this code assumes that left in [0..255], which is a valid }
  392. { assumption (other cases will be caught by range checking) (JM) }
  393. { load left in register }
  394. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,uopdef,true);
  395. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,uopdef,left.location,setbase);
  396. { emit bit test operation -- warning: do not use
  397. location_force_reg() to force a set into a register, except
  398. to a register of the same size as the set. The reason is
  399. that on big endian systems, this would require moving the
  400. set to the most significant part of the new register,
  401. and location_force_register can't do that (it does not
  402. know the type).
  403. a_bit_test_reg_loc_reg() properly takes into account the
  404. size of the set to adjust the register index to test }
  405. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,
  406. uopdef,right.resultdef,uopdef,
  407. left.location.register,right.location,location.register);
  408. { now zero the result if left > nr_of_bits_in_right_register }
  409. hr := hlcg.getintregister(current_asmdata.CurrAsmList,uopdef);
  410. { if left > tcgsize2size[opsize]*8 then hr := 0 else hr := $ffffffff }
  411. { (left.location.size = location.size at this point) }
  412. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList, OP_SUB, uopdef, tcgsize2size[opsize]*8, left.location.register, hr);
  413. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SAR, uopdef, (tcgsize2size[opsize]*8)-1, hr);
  414. { if left > tcgsize2size[opsize]*8-1, then result := 0 else result := result of bit test }
  415. hlcg.a_op_reg_reg(current_asmdata.CurrAsmList, OP_AND, uopdef, hr, location.register);
  416. end { of right.location.loc=LOC_CONSTANT }
  417. { do search in a normal set which could have >32 elements
  418. but also used if the left side contains higher values > 32 }
  419. else if (left.location.loc=LOC_CONSTANT) then
  420. begin
  421. if (left.location.value < setbase) or (((left.location.value-setbase) shr 3) >= right.resultdef.size) then
  422. {should be caught earlier }
  423. internalerror(2007020402);
  424. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,right.resultdef,uopdef,left.location.value-setbase,
  425. right.location,location.register);
  426. end
  427. else
  428. begin
  429. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
  430. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,opdef,left.location,setbase);
  431. pleftreg := left.location.register;
  432. if (opsize >= OS_S8) or { = if signed }
  433. ((left.resultdef.typ=orddef) and
  434. ((torddef(left.resultdef).low < int64(tsetdef(right.resultdef).setbase)) or
  435. (torddef(left.resultdef).high > int64(tsetdef(right.resultdef).setmax)))) or
  436. ((left.resultdef.typ=enumdef) and
  437. ((tenumdef(left.resultdef).min < aint(tsetdef(right.resultdef).setbase)) or
  438. (tenumdef(left.resultdef).max > aint(tsetdef(right.resultdef).setmax)))) then
  439. begin
  440. current_asmdata.getjumplabel(l);
  441. current_asmdata.getjumplabel(l2);
  442. needslabel := True;
  443. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_BE, tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase, pleftreg, l);
  444. hlcg.a_load_const_reg(current_asmdata.CurrAsmList, uopdef, 0, location.register);
  445. hlcg.a_jmp_always(current_asmdata.CurrAsmList, l2);
  446. hlcg.a_label(current_asmdata.CurrAsmList, l);
  447. end;
  448. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,opdef,right.resultdef,uopdef,
  449. pleftreg,right.location,location.register);
  450. if needslabel then
  451. hlcg.a_label(current_asmdata.CurrAsmList, l2);
  452. end;
  453. {$ifndef cpuhighleveltarget}
  454. location.size := def_cgsize(resultdef);
  455. location.register := cg.makeregsize(current_asmdata.CurrAsmList, location.register, location.size);
  456. {$else not cpuhighleveltarget}
  457. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  458. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,uopdef,resultdef,location.register,hr);
  459. location.register:=hr;
  460. location.size := def_cgsize(resultdef);
  461. {$endif not cpuhighleveltarget}
  462. end;
  463. end;
  464. location_freetemp(current_asmdata.CurrAsmList, right.location);
  465. end;
  466. {*****************************************************************************
  467. TCGCASENODE
  468. *****************************************************************************}
  469. { Analyse the nodes following the else label - if empty, change to end label }
  470. function tcgcasenode.GetBranchLabel(Block: TNode; out _Label: TAsmLabel): Boolean;
  471. var
  472. LabelSym: TLabelSym;
  473. begin
  474. Result := True;
  475. if not Assigned(Block) then
  476. begin
  477. { Block doesn't exist / is empty }
  478. _Label := endlabel;
  479. Exit;
  480. end;
  481. { These optimisations aren't particularly debugger friendly }
  482. if not (cs_opt_level2 in current_settings.optimizerswitches) then
  483. begin
  484. Result := False;
  485. current_asmdata.getjumplabel(_Label);
  486. Exit;
  487. end;
  488. while Assigned(Block) do
  489. begin
  490. case Block.nodetype of
  491. nothingn:
  492. begin
  493. _Label := endlabel;
  494. Exit;
  495. end;
  496. goton:
  497. begin
  498. LabelSym := TCGGotoNode(Block).labelsym;
  499. if not Assigned(LabelSym) then
  500. InternalError(2018121131);
  501. _Label := TCGLabelNode(TCGGotoNode(Block).labelnode).getasmlabel;
  502. if Assigned(_Label) then
  503. { Keep tabs on the fact that an actual 'goto' was used }
  504. Include(flowcontrol,fc_gotolabel)
  505. else
  506. Break;
  507. Exit;
  508. end;
  509. blockn:
  510. begin
  511. Block := TBlockNode(Block).Left;
  512. Continue;
  513. end;
  514. statementn:
  515. begin
  516. { If the right node is assigned, then it's a compound block
  517. that can't be simplified, so fall through, set Result to
  518. False and make a new label }
  519. if Assigned(TStatementNode(Block).right) then
  520. Break;
  521. Block := TStatementNode(Block).Left;
  522. Continue;
  523. end;
  524. end;
  525. Break;
  526. end;
  527. { Create unique label }
  528. Result := False;
  529. current_asmdata.getjumplabel(_Label);
  530. end;
  531. function tcgcasenode.blocklabel(id:longint):tasmlabel;
  532. begin
  533. if not assigned(blocks[id]) then
  534. internalerror(200411301);
  535. result:=pcaseblock(blocks[id])^.blocklabel;
  536. end;
  537. procedure tcgcasenode.optimizevalues(var max_linear_list:int64;var max_dist:qword);
  538. begin
  539. { no changes by default }
  540. end;
  541. function tcgcasenode.has_jumptable : boolean;
  542. begin
  543. { No jumptable support in the default implementation }
  544. has_jumptable:=false;
  545. end;
  546. procedure tcgcasenode.genjumptable(hp : pcaselabel;min_,max_ : int64);
  547. begin
  548. internalerror(200209161);
  549. end;
  550. procedure tcgcasenode.genlinearlist(hp : pcaselabel);
  551. var
  552. first : boolean;
  553. last : TConstExprInt;
  554. scratch_reg: tregister;
  555. newsize: tcgsize;
  556. newdef: tdef;
  557. procedure gensub(value:tcgint);
  558. begin
  559. { here, since the sub and cmp are separate we need
  560. to move the result before subtract to help
  561. the register allocator
  562. }
  563. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList, opsize, opsize, hregister, scratch_reg);
  564. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SUB, opsize, value, hregister);
  565. end;
  566. procedure genitem(t : pcaselabel);
  567. begin
  568. if assigned(t^.less) then
  569. genitem(t^.less);
  570. { do we need to test the first value? }
  571. if first and (t^._low>get_min_value(left.resultdef)) then
  572. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,tcgint(t^._low.svalue),hregister,elselabel);
  573. if t^._low=t^._high then
  574. begin
  575. if t^._low-last=0 then
  576. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,OC_EQ,0,hregister,blocklabel(t^.blockid))
  577. else
  578. begin
  579. gensub(tcgint(t^._low.svalue-last.svalue));
  580. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,
  581. OC_EQ,tcgint(t^._low.svalue-last.svalue),scratch_reg,blocklabel(t^.blockid));
  582. end;
  583. last:=t^._low;
  584. end
  585. else
  586. begin
  587. { it begins with the smallest label, if the value }
  588. { is even smaller then jump immediately to the }
  589. { ELSE-label }
  590. if first then
  591. begin
  592. { have we to ajust the first value ? }
  593. if (t^._low>get_min_value(left.resultdef)) or (get_min_value(left.resultdef)<>0) then
  594. gensub(tcgint(t^._low.svalue));
  595. end
  596. else
  597. begin
  598. { if there is no unused label between the last and the }
  599. { present label then the lower limit can be checked }
  600. { immediately. else check the range in between: }
  601. gensub(tcgint(t^._low.svalue-last.svalue));
  602. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize,jmp_lt,tcgint(t^._low.svalue-last.svalue),scratch_reg,elselabel);
  603. end;
  604. gensub(tcgint(t^._high.svalue-t^._low.svalue));
  605. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_le,tcgint(t^._high.svalue-t^._low.svalue),scratch_reg,blocklabel(t^.blockid));
  606. last:=t^._high;
  607. end;
  608. first:=false;
  609. if assigned(t^.greater) then
  610. genitem(t^.greater);
  611. end;
  612. begin
  613. { do we need to generate cmps? }
  614. if (with_sign and (min_label<0)) then
  615. genlinearcmplist(hp)
  616. else
  617. begin
  618. { sign/zero extend the value to a full register before starting to
  619. subtract values, so that on platforms that don't have
  620. subregisters of the same size as the value we don't generate
  621. sign/zero-extensions after every subtraction
  622. make newsize always signed, since we only do this if the size in
  623. bytes of the register is larger than the original opsize, so
  624. the value can always be represented by a larger signed type }
  625. newsize:=tcgsize2signed[reg_cgsize(hregister)];
  626. if tcgsize2size[newsize]>opsize.size then
  627. begin
  628. newdef:=cgsize_orddef(newsize);
  629. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,newdef);
  630. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,newdef,hregister,scratch_reg);
  631. hregister:=scratch_reg;
  632. opsize:=newdef;
  633. end;
  634. if (labelcnt>1) or not(cs_opt_level1 in current_settings.optimizerswitches) then
  635. begin
  636. last:=0;
  637. first:=true;
  638. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
  639. genitem(hp);
  640. end
  641. else
  642. begin
  643. { If only one label exists, we can greatly simplify the checks to a simple comparison }
  644. if hp^._low=hp^._high then
  645. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, tcgint(hp^._low.svalue), hregister, blocklabel(hp^.blockid))
  646. else
  647. begin
  648. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
  649. gensub(tcgint(hp^._low.svalue));
  650. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_BE, tcgint(hp^._high.svalue-hp^._low.svalue), hregister, blocklabel(hp^.blockid))
  651. end;
  652. end;
  653. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  654. end;
  655. end;
  656. procedure tcgcasenode.genlinearcmplist(hp : pcaselabel);
  657. var
  658. last : TConstExprInt;
  659. lastwasrange: boolean;
  660. procedure genitem(t : pcaselabel);
  661. {$if not defined(cpu64bitalu) and not defined(cpuhighleveltarget)}
  662. var
  663. l1 : tasmlabel;
  664. {$endif not cpu64bitalu and not cpuhighleveltarget}
  665. begin
  666. if assigned(t^.less) then
  667. genitem(t^.less);
  668. if t^._low=t^._high then
  669. begin
  670. {$ifndef cpuhighleveltarget}
  671. {$if defined(cpu32bitalu)}
  672. if def_cgsize(opsize) in [OS_S64,OS_64] then
  673. begin
  674. current_asmdata.getjumplabel(l1);
  675. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_NE, aint(hi(int64(t^._low.svalue))),hregister2,l1);
  676. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_EQ, aint(lo(int64(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  677. cg.a_label(current_asmdata.CurrAsmList,l1);
  678. end
  679. else
  680. {$elseif defined(cpu16bitalu)}
  681. if def_cgsize(opsize) in [OS_S64,OS_64] then
  682. begin
  683. current_asmdata.getjumplabel(l1);
  684. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(hi(int64(t^._low.svalue)))),cg.GetNextReg(hregister2),l1);
  685. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(lo(hi(int64(t^._low.svalue)))),hregister2,l1);
  686. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(lo(int64(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
  687. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(lo(int64(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  688. cg.a_label(current_asmdata.CurrAsmList,l1);
  689. end
  690. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  691. begin
  692. current_asmdata.getjumplabel(l1);
  693. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(int32(t^._low.svalue))),cg.GetNextReg(hregister),l1);
  694. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(int32(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  695. cg.a_label(current_asmdata.CurrAsmList,l1);
  696. end
  697. else
  698. {$elseif defined(cpu8bitalu)}
  699. if def_cgsize(opsize) in [OS_S64,OS_64] then
  700. begin
  701. current_asmdata.getjumplabel(l1);
  702. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
  703. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
  704. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),l1);
  705. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  706. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  707. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  708. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),l1);
  709. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,blocklabel(t^.blockid));
  710. cg.a_label(current_asmdata.CurrAsmList,l1);
  711. end
  712. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  713. begin
  714. current_asmdata.getjumplabel(l1);
  715. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  716. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  717. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
  718. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(int32(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  719. cg.a_label(current_asmdata.CurrAsmList,l1);
  720. end
  721. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  722. begin
  723. current_asmdata.getjumplabel(l1);
  724. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),l1);
  725. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(int16(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  726. cg.a_label(current_asmdata.CurrAsmList,l1);
  727. end
  728. else
  729. {$endif}
  730. {$endif cpuhighleveltarget}
  731. begin
  732. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, tcgint(t^._low.svalue),hregister, blocklabel(t^.blockid));
  733. end;
  734. { Reset last here, because we've only checked for one value and need to compare
  735. for the next range both the lower and upper bound }
  736. lastwasrange := false;
  737. end
  738. else
  739. begin
  740. { it begins with the smallest label, if the value }
  741. { is even smaller then jump immediately to the }
  742. { ELSE-label }
  743. if not lastwasrange or (t^._low-last>1) then
  744. begin
  745. {$ifndef cpuhighleveltarget}
  746. {$if defined(cpu32bitalu)}
  747. if def_cgsize(opsize) in [OS_64,OS_S64] then
  748. begin
  749. current_asmdata.getjumplabel(l1);
  750. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._low.svalue))),
  751. hregister2, elselabel);
  752. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._low.svalue))),
  753. hregister2, l1);
  754. { the comparisation of the low dword must be always unsigned! }
  755. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_B, aint(lo(int64(t^._low.svalue))), hregister, elselabel);
  756. cg.a_label(current_asmdata.CurrAsmList,l1);
  757. end
  758. else
  759. {$elseif defined(cpu16bitalu)}
  760. if def_cgsize(opsize) in [OS_64,OS_S64] then
  761. begin
  762. current_asmdata.getjumplabel(l1);
  763. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._low.svalue)))),
  764. cg.GetNextReg(hregister2), elselabel);
  765. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._low.svalue)))),
  766. cg.GetNextReg(hregister2), l1);
  767. { the comparison of the low words must be always unsigned! }
  768. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._low.svalue)))),
  769. hregister2, elselabel);
  770. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._low.svalue)))),
  771. hregister2, l1);
  772. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._low.svalue)))),
  773. cg.GetNextReg(hregister), elselabel);
  774. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._low.svalue)))),
  775. cg.GetNextReg(hregister), l1);
  776. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(lo(int64(t^._low.svalue)))), hregister, elselabel);
  777. cg.a_label(current_asmdata.CurrAsmList,l1);
  778. end
  779. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  780. begin
  781. current_asmdata.getjumplabel(l1);
  782. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._low.svalue))),
  783. cg.GetNextReg(hregister), elselabel);
  784. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._low.svalue))),
  785. cg.GetNextReg(hregister), l1);
  786. { the comparisation of the low dword must be always unsigned! }
  787. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(int32(t^._low.svalue))), hregister, elselabel);
  788. cg.a_label(current_asmdata.CurrAsmList,l1);
  789. end
  790. else
  791. {$elseif defined(cpu8bitalu)}
  792. if def_cgsize(opsize) in [OS_64,OS_S64] then
  793. begin
  794. current_asmdata.getjumplabel(l1);
  795. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),elselabel);
  796. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
  797. { the comparison of the low words must be always unsigned! }
  798. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),elselabel);
  799. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
  800. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),elselabel);
  801. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),l1);
  802. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,elselabel);
  803. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  804. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),elselabel);
  805. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  806. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),elselabel);
  807. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  808. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),elselabel);
  809. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),l1);
  810. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,elselabel);
  811. cg.a_label(current_asmdata.CurrAsmList,l1);
  812. end
  813. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  814. begin
  815. current_asmdata.getjumplabel(l1);
  816. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),elselabel);
  817. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8,jmp_gt,aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  818. { the comparison of the low words must be always unsigned! }
  819. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),elselabel);
  820. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  821. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),elselabel);
  822. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
  823. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(int32(t^._low.svalue)))),hregister,elselabel);
  824. cg.a_label(current_asmdata.CurrAsmList,l1);
  825. end
  826. else if def_cgsize(opsize) in [OS_16,OS_S16] then
  827. begin
  828. current_asmdata.getjumplabel(l1);
  829. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),elselabel);
  830. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),l1);
  831. { the comparisation of the low dword must be always unsigned! }
  832. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(int16(t^._low.svalue))),hregister,elselabel);
  833. cg.a_label(current_asmdata.CurrAsmList,l1);
  834. end
  835. else
  836. {$endif}
  837. {$endif cpuhighleveltarget}
  838. begin
  839. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_lt, tcgint(t^._low.svalue), hregister,
  840. elselabel);
  841. end;
  842. end;
  843. {$ifndef cpuhighleveltarget}
  844. {$if defined(cpu32bitalu)}
  845. if def_cgsize(opsize) in [OS_S64,OS_64] then
  846. begin
  847. current_asmdata.getjumplabel(l1);
  848. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._high.svalue))), hregister2,
  849. blocklabel(t^.blockid));
  850. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._high.svalue))), hregister2,
  851. l1);
  852. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_BE, aint(lo(int64(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  853. cg.a_label(current_asmdata.CurrAsmList,l1);
  854. end
  855. else
  856. {$elseif defined(cpu16bitalu)}
  857. if def_cgsize(opsize) in [OS_S64,OS_64] then
  858. begin
  859. current_asmdata.getjumplabel(l1);
  860. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._high.svalue)))), cg.GetNextReg(hregister2),
  861. blocklabel(t^.blockid));
  862. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._high.svalue)))), cg.GetNextReg(hregister2),
  863. l1);
  864. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  865. blocklabel(t^.blockid));
  866. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  867. l1);
  868. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._high.svalue)))), cg.GetNextReg(hregister),
  869. blocklabel(t^.blockid));
  870. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._high.svalue)))), cg.GetNextReg(hregister),
  871. l1);
  872. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(lo(int64(t^._high.svalue)))), hregister, blocklabel(t^.blockid));
  873. cg.a_label(current_asmdata.CurrAsmList,l1);
  874. end
  875. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  876. begin
  877. current_asmdata.getjumplabel(l1);
  878. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._high.svalue))), cg.GetNextReg(hregister),
  879. blocklabel(t^.blockid));
  880. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._high.svalue))), cg.GetNextReg(hregister),
  881. l1);
  882. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(int32(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  883. cg.a_label(current_asmdata.CurrAsmList,l1);
  884. end
  885. else
  886. {$elseif defined(cpu8bitalu)}
  887. if def_cgsize(opsize) in [OS_S64,OS_64] then
  888. begin
  889. current_asmdata.getjumplabel(l1);
  890. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),blocklabel(t^.blockid));
  891. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
  892. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),blocklabel(t^.blockid));
  893. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
  894. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._high.svalue))))),cg.GetNextReg(hregister2),blocklabel(t^.blockid));
  895. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._high.svalue))))),cg.GetNextReg(hregister2),l1);
  896. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,blocklabel(t^.blockid));
  897. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,l1);
  898. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),blocklabel(t^.blockid));
  899. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  900. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),blocklabel(t^.blockid));
  901. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  902. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._high.svalue))))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
  903. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._high.svalue))))),cg.GetNextReg(hregister),l1);
  904. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(lo(int64(t^._high.svalue))))),hregister,blocklabel(t^.blockid));
  905. cg.a_label(current_asmdata.CurrAsmList,l1);
  906. end
  907. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  908. begin
  909. current_asmdata.getjumplabel(l1);
  910. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),blocklabel(t^.blockid));
  911. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  912. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),blocklabel(t^.blockid));
  913. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  914. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._high.svalue)))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
  915. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._high.svalue)))),cg.GetNextReg(hregister),l1);
  916. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(int32(t^._high.svalue)))),hregister,blocklabel(t^.blockid));
  917. cg.a_label(current_asmdata.CurrAsmList,l1);
  918. end
  919. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  920. begin
  921. current_asmdata.getjumplabel(l1);
  922. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._high.svalue))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
  923. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._high.svalue))),cg.GetNextReg(hregister),l1);
  924. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(int16(t^._high.svalue))),hregister,blocklabel(t^.blockid));
  925. cg.a_label(current_asmdata.CurrAsmList,l1);
  926. end
  927. else
  928. {$endif}
  929. {$endif cpuhighleveltarget}
  930. begin
  931. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_le, tcgint(t^._high.svalue), hregister, blocklabel(t^.blockid));
  932. end;
  933. last:=t^._high;
  934. lastwasrange := true;
  935. end;
  936. if assigned(t^.greater) then
  937. genitem(t^.greater);
  938. end;
  939. begin
  940. last:=0;
  941. lastwasrange:=false;
  942. genitem(hp);
  943. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  944. end;
  945. procedure tcgcasenode.genjmptreeentry(p : pcaselabel;parentvalue : TConstExprInt);
  946. var
  947. lesslabel,greaterlabel : tasmlabel;
  948. begin
  949. current_asmdata.CurrAsmList.concat(cai_align.Create(current_settings.alignment.jumpalign));
  950. cg.a_label(current_asmdata.CurrAsmList,p^.labellabel);
  951. { calculate labels for left and right }
  952. if p^.less=nil then
  953. lesslabel:=elselabel
  954. else
  955. lesslabel:=p^.less^.labellabel;
  956. if p^.greater=nil then
  957. greaterlabel:=elselabel
  958. else
  959. greaterlabel:=p^.greater^.labellabel;
  960. { calculate labels for left and right }
  961. { no range label: }
  962. if p^._low=p^._high then
  963. begin
  964. if greaterlabel=lesslabel then
  965. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_NE,p^._low,hregister, lesslabel)
  966. else
  967. begin
  968. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize, jmp_lt,p^._low,hregister, lesslabel);
  969. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize, jmp_gt,p^._low,hregister, greaterlabel);
  970. end;
  971. hlcg.a_jmp_always(current_asmdata.CurrAsmList,blocklabel(p^.blockid));
  972. end
  973. else
  974. begin
  975. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,p^._low, hregister, lesslabel);
  976. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_gt,p^._high,hregister, greaterlabel);
  977. hlcg.a_jmp_always(current_asmdata.CurrAsmList,blocklabel(p^.blockid));
  978. end;
  979. if assigned(p^.less) then
  980. genjmptreeentry(p^.less,p^._low);
  981. if assigned(p^.greater) then
  982. genjmptreeentry(p^.greater,p^._high);
  983. end;
  984. procedure tcgcasenode.genjmptree(root : pcaselabel);
  985. type
  986. tlabelarrayentry = record
  987. caselabel : pcaselabel;
  988. asmlabel : TAsmLabel;
  989. end;
  990. tlabelarray = array of tlabelarrayentry;
  991. var
  992. labelarray : tlabelarray;
  993. var
  994. nextarrayentry : int64;
  995. i : longint;
  996. procedure addarrayentry(entry : pcaselabel);
  997. begin
  998. if assigned(entry^.less) then
  999. addarrayentry(entry^.less);
  1000. with labelarray[nextarrayentry] do
  1001. begin
  1002. caselabel:=entry;
  1003. current_asmdata.getjumplabel(asmlabel);
  1004. end;
  1005. inc(nextarrayentry);
  1006. if assigned(entry^.greater) then
  1007. addarrayentry(entry^.greater);
  1008. end;
  1009. { rebuild the label tree balanced }
  1010. procedure rebuild(first,last : int64;var p : pcaselabel);
  1011. var
  1012. current : int64;
  1013. begin
  1014. current:=(first+last) div 2;
  1015. p:=labelarray[current].caselabel;
  1016. if first<current then
  1017. rebuild(first,current-1,p^.less)
  1018. else
  1019. p^.less:=nil;
  1020. if last>current then
  1021. rebuild(current+1,last,p^.greater)
  1022. else
  1023. p^.greater:=nil;
  1024. end;
  1025. begin
  1026. labelarray:=nil;
  1027. SetLength(labelarray,case_count_labels(root));
  1028. nextarrayentry:=0;
  1029. addarrayentry(root);
  1030. rebuild(0,high(labelarray),root);
  1031. for i:=0 to high(labelarray) do
  1032. current_asmdata.getjumplabel(labelarray[i].caselabel^.labellabel);
  1033. genjmptreeentry(root,root^._high+10);
  1034. end;
  1035. procedure tcgcasenode.pass_generate_code;
  1036. { Combines "case_count_labels" and "case_true_count" }
  1037. procedure CountBoth(p : pcaselabel);
  1038. begin
  1039. Inc(labelcnt);
  1040. Inc(TrueCount, (p^._high.svalue - p^._low.svalue) + 1);
  1041. if assigned(p^.less) then
  1042. CountBoth(p^.less);
  1043. if assigned(p^.greater) then
  1044. CountBoth(p^.greater);
  1045. end;
  1046. var
  1047. oldflowcontrol: tflowcontrol;
  1048. i : longint;
  1049. dist : aword;
  1050. distv,
  1051. lv,hv,
  1052. max_label: tconstexprint;
  1053. max_linear_list : int64;
  1054. max_dist : qword;
  1055. ShortcutElse: Boolean;
  1056. begin
  1057. location_reset(location,LOC_VOID,OS_NO);
  1058. oldflowcontrol := flowcontrol;
  1059. include(flowcontrol,fc_inflowcontrol);
  1060. { Allocate labels }
  1061. current_asmdata.getjumplabel(endlabel);
  1062. { Do some optimisation to deal with empty else blocks }
  1063. ShortcutElse := GetBranchLabel(elseblock, elselabel);
  1064. for i:=0 to blocks.count-1 do
  1065. with pcaseblock(blocks[i])^ do
  1066. shortcut := GetBranchLabel(statement, blocklabel);
  1067. with_sign:=is_signed(left.resultdef);
  1068. if with_sign then
  1069. begin
  1070. jmp_gt:=OC_GT;
  1071. jmp_lt:=OC_LT;
  1072. jmp_le:=OC_LTE;
  1073. end
  1074. else
  1075. begin
  1076. jmp_gt:=OC_A;
  1077. jmp_lt:=OC_B;
  1078. jmp_le:=OC_BE;
  1079. end;
  1080. secondpass(left);
  1081. if (left.expectloc=LOC_JUMP)<>
  1082. (left.location.loc=LOC_JUMP) then
  1083. internalerror(2006050501);
  1084. { determines the size of the operand }
  1085. opsize:=left.resultdef;
  1086. { copy the case expression to a register }
  1087. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opsize,false);
  1088. {$if not defined(cpu64bitalu)}
  1089. if def_cgsize(opsize) in [OS_S64,OS_64] then
  1090. begin
  1091. hregister:=left.location.register64.reglo;
  1092. hregister2:=left.location.register64.reghi;
  1093. end
  1094. else
  1095. {$endif not cpu64bitalu and not cpuhighleveltarget}
  1096. hregister:=left.location.register;
  1097. { we need the min_label always to choose between }
  1098. { cmps and subs/decs }
  1099. min_label:=case_get_min(labels);
  1100. { Generate the jumps }
  1101. {$ifdef OLDREGVARS}
  1102. load_all_regvars(current_asmdata.CurrAsmList);
  1103. {$endif OLDREGVARS}
  1104. {$if not defined(cpu64bitalu)}
  1105. if def_cgsize(opsize) in [OS_64,OS_S64] then
  1106. genlinearcmplist(labels)
  1107. else
  1108. {$endif not cpu64bitalu and not cpuhighleveltarget}
  1109. begin
  1110. labelcnt := 0;
  1111. TrueCount := 0;
  1112. if cs_opt_level1 in current_settings.optimizerswitches then
  1113. begin
  1114. { procedures are empirically passed on }
  1115. { consumption can also be calculated }
  1116. { but does it pay on the different }
  1117. { processors? }
  1118. { moreover can the size only be appro- }
  1119. { ximated as it is not known if rel8, }
  1120. { rel16 or rel32 jumps are used }
  1121. CountBoth(labels);
  1122. max_label := case_get_max(labels);
  1123. { can we omit the range check of the jump table ? }
  1124. getrange(left.resultdef,lv,hv);
  1125. jumptable_no_range:=(lv=min_label) and (hv=max_label);
  1126. distv:=max_label-min_label;
  1127. if distv>=0 then
  1128. dist:=distv.uvalue
  1129. else
  1130. dist:=aword(-distv.svalue);
  1131. { optimize for size ? }
  1132. if cs_opt_size in current_settings.optimizerswitches then
  1133. begin
  1134. if has_jumptable and
  1135. (min_label>=int64(low(aint))) and
  1136. (max_label<=high(aint)) and
  1137. not((labelcnt<=2) or
  1138. (distv.svalue<0) or
  1139. (dist>3*labelcnt)) then
  1140. begin
  1141. { if the labels less or more a continuum then }
  1142. genjumptable(labels,min_label.svalue,max_label.svalue);
  1143. end
  1144. else
  1145. begin
  1146. { a linear list is always smaller than a jump tree }
  1147. genlinearlist(labels);
  1148. end;
  1149. end
  1150. else
  1151. begin
  1152. max_dist:=4*TrueCount;
  1153. { Don't allow jump tables to get too large }
  1154. if max_dist>4*labelcnt then
  1155. max_dist:=min(max_dist,2048);
  1156. if jumptable_no_range then
  1157. max_linear_list:=4
  1158. else
  1159. max_linear_list:=2;
  1160. { allow processor specific values }
  1161. optimizevalues(max_linear_list,max_dist);
  1162. if (labelcnt<=max_linear_list) then
  1163. genlinearlist(labels)
  1164. else
  1165. begin
  1166. if (has_jumptable) and
  1167. (dist<max_dist) and
  1168. (min_label>=int64(low(aint))) and
  1169. (max_label<=high(aint)) then
  1170. genjumptable(labels,min_label.svalue,max_label.svalue)
  1171. { value has been determined on an i7-4770 using a random case with random values
  1172. if more values are known, this can be handled depending on the target CPU
  1173. Testing on a Core 2 Duo E6850 as well as on a Raspi3 showed also, that 64 is
  1174. a good value }
  1175. else if labelcnt>=64 then
  1176. genjmptree(labels)
  1177. else
  1178. genlinearlist(labels);
  1179. end;
  1180. end;
  1181. end
  1182. else
  1183. { it's always not bad }
  1184. genlinearlist(labels);
  1185. end;
  1186. { generate the instruction blocks }
  1187. for i:=0 to blocks.count-1 do with pcaseblock(blocks[i])^ do
  1188. begin
  1189. { If the labels are not equal, then the block label has been shortcut to point elsewhere,
  1190. so there's no need to implement it }
  1191. if not shortcut then
  1192. begin
  1193. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1194. cg.a_label(current_asmdata.CurrAsmList,blocklabel);
  1195. secondpass(statement);
  1196. { don't come back to case line }
  1197. current_filepos:=current_asmdata.CurrAsmList.getlasttaifilepos^;
  1198. {$ifdef OLDREGVARS}
  1199. load_all_regvars(current_asmdata.CurrAsmList);
  1200. {$endif OLDREGVARS}
  1201. hlcg.a_jmp_always(current_asmdata.CurrAsmList,endlabel);
  1202. end;
  1203. end;
  1204. { ...and the else block }
  1205. if not ShortcutElse then
  1206. begin
  1207. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1208. hlcg.a_label(current_asmdata.CurrAsmList,elselabel);
  1209. end;
  1210. if Assigned(elseblock) then
  1211. begin
  1212. secondpass(elseblock);
  1213. {$ifdef OLDREGVARS}
  1214. load_all_regvars(current_asmdata.CurrAsmList);
  1215. {$endif OLDREGVARS}
  1216. end;
  1217. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1218. hlcg.a_label(current_asmdata.CurrAsmList,endlabel);
  1219. { Reset labels }
  1220. for i:=0 to blocks.count-1 do
  1221. pcaseblock(blocks[i])^.blocklabel:=nil;
  1222. flowcontrol := oldflowcontrol + (flowcontrol - [fc_inflowcontrol]);
  1223. end;
  1224. begin
  1225. csetelementnode:=tcgsetelementnode;
  1226. cinnode:=tcginnode;
  1227. ccasenode:=tcgcasenode;
  1228. end.