aoptcpu.pas 16 KB

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  1. {
  2. Copyright (c) 1998-2004 by Jonas Maebe
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for sparc
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. { $define DEBUG_AOPTCPU}
  21. Interface
  22. uses
  23. cgbase, cpubase, aoptobj, aoptcpub, aopt, aasmtai;
  24. Type
  25. TCpuAsmOptimizer = class(TAsmOptimizer)
  26. function GetNextInstructionUsingReg(Current: tai;
  27. var Next: tai; reg: TRegister): Boolean;
  28. function TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  29. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  30. function RegUsedAfterInstruction(reg: Tregister; p: tai;
  31. var AllUsedRegs: TAllUsedRegs): Boolean;
  32. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  33. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  34. procedure DebugMsg(const s : string;p : tai);
  35. End;
  36. Implementation
  37. uses
  38. globtype,globals,aasmcpu;
  39. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  40. begin
  41. result :=
  42. (instr.typ = ait_instruction) and
  43. (taicpu(instr).opcode = op);
  44. end;
  45. function MatchOperand(const oper: TOper; reg: TRegister): boolean;
  46. begin
  47. result:=(oper.typ=top_reg) and (oper.reg=reg);
  48. end;
  49. function IsSameReg(this,next: taicpu): boolean;
  50. begin
  51. result:=(next.ops=3) and
  52. (next.oper[2]^.typ=top_reg) and
  53. (next.oper[0]^.typ=top_reg) and
  54. (next.oper[2]^.reg=next.oper[0]^.reg) and
  55. (next.oper[2]^.reg=this.oper[2]^.reg);
  56. end;
  57. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  58. var
  59. p: taicpu;
  60. i: longint;
  61. begin
  62. result:=false;
  63. if not (assigned(hp) and (hp.typ=ait_instruction)) then
  64. exit;
  65. p:=taicpu(hp);
  66. i:=0;
  67. while(i<p.ops) do
  68. begin
  69. case p.oper[I]^.typ of
  70. top_reg:
  71. result:=(p.oper[I]^.reg=reg) and (I<2);
  72. top_ref:
  73. result:=
  74. (p.oper[I]^.ref^.base=reg) or
  75. (p.oper[I]^.ref^.index=reg);
  76. end;
  77. if result then exit; {Bailout if we found something}
  78. Inc(I);
  79. end;
  80. end;
  81. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  82. var
  83. p: taicpu;
  84. begin
  85. p:=taicpu(hp);
  86. result:=false;
  87. if not ((assigned(hp)) and (hp.typ=ait_instruction)) then
  88. exit;
  89. case p.opcode of
  90. { These instructions do not write into a register at all }
  91. A_NOP,
  92. A_FCMPs,A_FCMPd,A_FCMPq,A_CMP,
  93. A_BA,A_Bxx,A_FBA,A_FBxx,
  94. A_STB,A_STH,A_ST,A_STF,A_STDF,
  95. A_STX:
  96. exit;
  97. end;
  98. result:=(p.ops>0) and (p.oper[p.ops-1]^.typ=top_reg) and
  99. (p.oper[p.ops-1]^.reg=reg);
  100. end;
  101. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  102. var Next: tai; reg: TRegister): Boolean;
  103. begin
  104. Next:=Current;
  105. repeat
  106. Result:=GetNextInstruction(Next,Next);
  107. until {not(cs_opt_level3 in current_settings.optimizerswitches) or} not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  108. (is_calljmp(taicpu(Next).opcode));
  109. if result and (next.typ=ait_instruction) and is_calljmp(taicpu(next).opcode) then
  110. begin
  111. result:=false;
  112. next:=nil;
  113. end;
  114. end;
  115. function TCpuAsmOptimizer.RegUsedAfterInstruction(reg: Tregister; p: tai;
  116. var AllUsedRegs: TAllUsedRegs): Boolean;
  117. begin
  118. AllUsedRegs[getregtype(reg)].Update(tai(p.Next),true);
  119. RegUsedAfterInstruction :=
  120. AllUsedRegs[getregtype(reg)].IsUsed(reg) and
  121. not(regLoadedWithNewValue(reg,p)) and
  122. (
  123. not(GetNextInstruction(p,p)) or
  124. instructionLoadsFromReg(reg,p) or
  125. not(regLoadedWithNewValue(reg,p))
  126. );
  127. end;
  128. {$ifdef DEBUG_AOPTCPU}
  129. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
  130. begin
  131. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  132. end;
  133. {$else DEBUG_AOPTCPU}
  134. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
  135. begin
  136. end;
  137. {$endif DEBUG_AOPTCPU}
  138. function TCpuAsmOptimizer.TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  139. var
  140. next,hp1: tai;
  141. alloc,dealloc: tai_regalloc;
  142. begin
  143. { Fold
  144. op ...,%reg1
  145. ...
  146. opcode %reg1,%reg2
  147. dealloc %reg1
  148. into
  149. op ...,%reg2
  150. opcode may be A_MOV, A_FMOVs, A_FMOVd, etc.
  151. }
  152. result:=false;
  153. if (taicpu(p).ops=3) and
  154. { don't mess with instructions using %g0 for destination }
  155. (taicpu(p).oper[2]^.reg<>NR_G0) and
  156. GetNextInstructionUsingReg(p,next,taicpu(p).oper[2]^.reg) and
  157. MatchInstruction(next,opcode) and
  158. MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[2]^.reg) and
  159. { the destination register of mov cannot be used between p and next }
  160. (not RegUsedBetween(taicpu(next).oper[1]^.reg,p,next)) and
  161. { This is necessary so 'mov %reg1,%y' is not folded. Compiler should
  162. probably generate A_WRY opcode for this, not A_MOV. }
  163. (getregtype(taicpu(next).oper[1]^.reg)<>R_SPECIALREGISTER) then
  164. begin
  165. dealloc:=FindRegDealloc(taicpu(p).oper[2]^.reg,tai(next.Next));
  166. if assigned(dealloc) then
  167. begin
  168. { taicpu(p).oper[2]^.reg is not used anymore, try to find its allocation
  169. and remove it if possible }
  170. GetLastInstruction(p,hp1);
  171. asml.Remove(dealloc);
  172. alloc:=FindRegAlloc(taicpu(p).oper[2]^.reg,tai(hp1.Next));
  173. if assigned(alloc) then
  174. begin
  175. asml.Remove(alloc);
  176. alloc.free;
  177. dealloc.free;
  178. end
  179. else
  180. asml.InsertAfter(dealloc,p);
  181. { try to move the allocation of the target register }
  182. GetLastInstruction(next,hp1);
  183. alloc:=FindRegAlloc(taicpu(next).oper[1]^.reg,tai(hp1.Next));
  184. if assigned(alloc) then
  185. begin
  186. asml.Remove(alloc);
  187. asml.InsertBefore(alloc,p);
  188. { adjust used regs }
  189. IncludeRegInUsedRegs(taicpu(next).oper[1]^.reg,UsedRegs);
  190. end;
  191. { finally get rid of the mov }
  192. taicpu(p).loadreg(2,taicpu(next).oper[1]^.reg);
  193. DebugMsg('Peephole OpMov2Op done',p);
  194. asml.remove(next);
  195. next.free;
  196. end;
  197. end;
  198. end;
  199. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  200. var
  201. next,next2: tai;
  202. begin
  203. result:=false;
  204. case p.typ of
  205. ait_instruction:
  206. begin
  207. case taicpu(p).opcode of
  208. A_SLL:
  209. begin
  210. { if this is sign/zero extension... }
  211. if (taicpu(p).oper[1]^.typ=top_const) and
  212. GetNextInstruction(p,next) and
  213. (MatchInstruction(next,A_SRL) or MatchInstruction(next,A_SRA)) and
  214. IsSameReg(taicpu(p),taicpu(next)) and
  215. (taicpu(next).oper[1]^.typ=top_const) and
  216. (taicpu(next).oper[1]^.val=taicpu(p).oper[1]^.val) and
  217. (taicpu(next).oper[1]^.val=16) and
  218. { ...followed by 16-bit store (possibly with PIC simplification, etc. in between) }
  219. GetNextInstructionUsingReg(next,next2,taicpu(p).oper[2]^.reg) and
  220. MatchInstruction(next2,A_STH) and
  221. (taicpu(next2).oper[0]^.typ=top_reg) and
  222. (taicpu(next2).oper[0]^.reg=taicpu(p).oper[2]^.reg) and
  223. { the initial register may not be reused }
  224. (not RegUsedBetween(taicpu(p).oper[0]^.reg,next,next2)) then
  225. begin
  226. TransferUsedRegs(TmpUsedRegs);
  227. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  228. UpdateUsedRegs(TmpUsedRegs, tai(next.next));
  229. if not RegUsedAfterInstruction(taicpu(p).oper[2]^.reg,next2,TmpUsedRegs) then
  230. begin
  231. taicpu(next2).loadreg(0,taicpu(p).oper[0]^.reg);
  232. DebugMsg('Peephole SLLSRxSTH2STH done',next2);
  233. asml.remove(p);
  234. asml.remove(next);
  235. p.free;
  236. next.free;
  237. p:=next2;
  238. end;
  239. end
  240. else
  241. TryRemoveMov(p,A_MOV);
  242. end;
  243. {$ifdef SPARC64}
  244. A_SLLX:
  245. begin
  246. { if this is sign/zero extension... }
  247. if (taicpu(p).oper[1]^.typ=top_const) and
  248. GetNextInstruction(p,next) and
  249. (MatchInstruction(next,A_SRLX) or MatchInstruction(next,A_SRAX)) and
  250. IsSameReg(taicpu(p),taicpu(next)) and
  251. (taicpu(next).oper[1]^.typ=top_const) and
  252. (taicpu(next).oper[1]^.val=taicpu(p).oper[1]^.val) and
  253. (taicpu(next).oper[1]^.val=32) and
  254. { ...followed by 32-bit store (possibly with PIC simplification, etc. in between) }
  255. GetNextInstructionUsingReg(next,next2,taicpu(p).oper[2]^.reg) and
  256. MatchInstruction(next2,A_ST) and
  257. (taicpu(next2).oper[0]^.typ=top_reg) and
  258. (taicpu(next2).oper[0]^.reg=taicpu(p).oper[2]^.reg) and
  259. { the initial register may not be reused }
  260. (not RegUsedBetween(taicpu(p).oper[0]^.reg,next,next2)) then
  261. begin
  262. TransferUsedRegs(TmpUsedRegs);
  263. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  264. UpdateUsedRegs(TmpUsedRegs, tai(next.next));
  265. if not RegUsedAfterInstruction(taicpu(p).oper[2]^.reg,next2,TmpUsedRegs) then
  266. begin
  267. taicpu(next2).loadreg(0,taicpu(p).oper[0]^.reg);
  268. DebugMsg('Peephole SLLXSRxXST2ST done',next2);
  269. asml.remove(p);
  270. asml.remove(next);
  271. p.free;
  272. next.free;
  273. p:=next2;
  274. end;
  275. end
  276. else
  277. TryRemoveMov(p,A_MOV);
  278. end;
  279. {$endif SPARC64}
  280. A_SRL:
  281. begin
  282. { happens with a_load_const_ref(...,0), where %g0 is used instead of 0 }
  283. { TODO: override a_load_reg_ref_unaligned and don't generate such shifts }
  284. if (taicpu(p).oper[2]^.typ=top_reg) and
  285. (taicpu(p).oper[2]^.reg=NR_G0) then
  286. begin
  287. next:=tai(p.next);
  288. asml.remove(p);
  289. p.free;
  290. p:=next;
  291. end
  292. { kill zero extension after right shift (e.g. happens with "high(dword)")}
  293. else if (taicpu(p).oper[1]^.typ=top_const) and
  294. (taicpu(p).oper[1]^.val>=16) and
  295. GetNextInstruction(p,next) and
  296. MatchInstruction(next,A_SLL) and
  297. GetNextInstruction(next,next2) and
  298. MatchInstruction(next2,A_SRL) and
  299. IsSameReg(taicpu(p),taicpu(next)) and
  300. IsSameReg(taicpu(p),taicpu(next2)) and
  301. (taicpu(next).oper[1]^.typ=top_const) and
  302. (taicpu(next2).oper[1]^.typ=top_const) and
  303. (taicpu(next).oper[1]^.val=taicpu(next2).oper[1]^.val) and
  304. (taicpu(next).oper[1]^.val=16) then
  305. begin
  306. asml.remove(next);
  307. asml.remove(next2);
  308. next.free;
  309. next2.free;
  310. end
  311. else
  312. TryRemoveMov(p,A_MOV);
  313. end;
  314. A_AND:
  315. begin
  316. { Remove sign extension after 'and' if bit 7 of const operand is clear }
  317. if (taicpu(p).oper[1]^.typ=top_const) and
  318. GetNextInstruction(p,next) and
  319. MatchInstruction(next,A_SLL) and
  320. GetNextInstruction(next,next2) and
  321. MatchInstruction(next2,A_SRA) and
  322. IsSameReg(taicpu(p),taicpu(next)) and
  323. IsSameReg(taicpu(p),taicpu(next2)) and
  324. (taicpu(next).oper[1]^.typ=top_const) and
  325. (taicpu(next2).oper[1]^.typ=top_const) and
  326. (taicpu(next).oper[1]^.val=taicpu(next2).oper[1]^.val) and
  327. ({(
  328. (taicpu(p).oper[2]^.val<=$7fff) and
  329. (taicpu(next).oper[2]^.val=16)
  330. ) or }(
  331. (taicpu(p).oper[1]^.val<=$7f) and
  332. (taicpu(next).oper[1]^.val=24)
  333. )) then
  334. begin
  335. asml.remove(next);
  336. asml.remove(next2);
  337. next.free;
  338. next2.free;
  339. end
  340. else if (taicpu(p).oper[1]^.typ=top_const) and
  341. (taicpu(p).oper[1]^.val=255) and
  342. GetNextInstruction(p,next) and
  343. MatchInstruction(next,A_STB) and
  344. (taicpu(next).oper[0]^.typ=top_reg) and
  345. (taicpu(next).oper[0]^.reg=taicpu(p).oper[2]^.reg) then
  346. begin
  347. TransferUsedRegs(TmpUsedRegs);
  348. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  349. if not RegUsedAfterInstruction(taicpu(p).oper[2]^.reg,next,TmpUsedRegs) then
  350. begin
  351. taicpu(next).loadreg(0,taicpu(p).oper[0]^.reg);
  352. asml.remove(p);
  353. p.free;
  354. p:=next;
  355. end;
  356. end
  357. else
  358. TryRemoveMov(p,A_MOV);
  359. end;
  360. A_ADD,A_ADDcc,A_ADDX,
  361. A_SUB,A_SUBcc,A_SUBX,
  362. A_SRA,A_SRAX,A_MULX,
  363. A_ANDcc,A_OR,A_ORcc,A_XOR,A_XORcc:
  364. TryRemoveMov(p,A_MOV);
  365. A_FADDs, A_FSUBs, A_FMULs, A_FDIVs,
  366. A_FABSs, A_FNEGs, A_FSQRTs,
  367. A_FDTOs, A_FITOs, A_FQTOs:
  368. TryRemoveMov(p,A_FMOVs);
  369. A_FADDd, A_FSUBd, A_FMULd, A_FDIVd,
  370. A_FABSd, A_FNEGd, A_FSQRTd,
  371. A_FSTOd, A_FITOd, A_FQTOd:
  372. TryRemoveMov(p,A_FMOVd);
  373. end;
  374. end;
  375. end;
  376. end;
  377. begin
  378. casmoptimizer:=TCpuAsmOptimizer;
  379. end.