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aoptcpu.pas
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c7bb028d35
* factored out OptPass1FLD, used bx x86-64 now as well
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6 years ago |
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aoptcpub.pas
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9b0ff05ee8
- get rid of MaxOps, it is redundant with max_operands
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6 years ago |
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aoptcpud.pas
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790a4fe2d3
* log and id tags removed
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20 years ago |
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cgcpu.pas
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64ad48e89e
* forgotten part of r39750
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6 years ago |
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cpubase.inc
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518cdf9674
* replaced the saved_XXX_registers arrays with virtual methods inside
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7 years ago |
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cpuelf.pas
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2f7fe0e737
haiku-x86_64: add target to the compiler and ppudump, enable it in fpmake and fpcmake
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6 years ago |
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cpuinfo.pas
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31f78ea2b6
+ implementation of the vectorcall calling convention by J. Gareth Moreton
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7 years ago |
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cpunode.pas
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597a23d278
+ tls support for x86_64-linux (not yet enabled by default)
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6 years ago |
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cpupara.pas
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8b9e90dc7a
* keep track of whether a routine has a C-style variadic parameter in the
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6 years ago |
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cpupi.pas
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64ad48e89e
* forgotten part of r39750
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6 years ago |
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cputarg.pas
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2f7fe0e737
haiku-x86_64: add target to the compiler and ppudump, enable it in fpmake and fpcmake
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6 years ago |
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hlcgcpu.pas
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4686f61002
* keep track of the temp position separately from the offset in references,
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7 years ago |
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nx64add.pas
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b1dff29cbf
* removed unused units
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8 years ago |
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nx64cal.pas
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b1dff29cbf
* removed unused units
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8 years ago |
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nx64cnv.pas
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b1dff29cbf
* removed unused units
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8 years ago |
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nx64flw.pas
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91d5457b38
* moved around/replaced the following procedures to stop nflw from depending
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6 years ago |
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nx64inl.pas
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1bcc276dcf
* remove implicit typecast to extended automatically inserted for trunc/round
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10 years ago |
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nx64mat.pas
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8c5606b41d
+ support mmx shifting
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7 years ago |
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nx64set.pas
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07bd4ba517
* let all the case code generation work with tconstexprint instead of aint,
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6 years ago |
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r8664ari.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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8 years ago |
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r8664att.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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8 years ago |
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r8664con.inc
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8b0bbdcaab
* fix flag subregs after r38206
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7 years ago |
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r8664dwrf.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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8 years ago |
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r8664int.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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8 years ago |
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r8664iri.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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8 years ago |
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r8664nasm.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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8 years ago |
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r8664nor.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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8 years ago |
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r8664num.inc
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8b0bbdcaab
* fix flag subregs after r38206
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7 years ago |
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r8664ot.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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8 years ago |
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r8664rni.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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8 years ago |
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r8664sri.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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8 years ago |
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r8664stab.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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8 years ago |
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r8664std.inc
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c8487c4150
+ added individual bits of the x86 flags register as subregisters
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8 years ago |
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rax64att.pas
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2f74a51eb8
* fix .seh_savereg: the offset is checked with a bitmask, not a divisor, so use "and", not "mod"
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6 years ago |
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rax64int.pas
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3b779278e2
+ (slightly) patch by Emelyanov Roman to add support of SEH directive in FPC internal assembler with INTEL syntax, resolves #29894
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7 years ago |
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rgcpu.pas
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a3f58e84be
* rbp can be used for normal purpose under certain conditions so it shouldn't interfere with all other registers
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11 years ago |
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symcpu.pas
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acf02ab64b
* when creating wrappers, add a prefix to parameter names to prevent them
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6 years ago |
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win64unw.pas
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03f4875310
* Removed creation of unused symbol. It was needed before r35492.
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8 years ago |
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x8664ats.inc
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4f0da5fcc3
+ patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799
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6 years ago |
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x8664att.inc
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4f0da5fcc3
+ patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799
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6 years ago |
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x8664int.inc
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4f0da5fcc3
+ patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799
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6 years ago |
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x8664nop.inc
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4f0da5fcc3
+ patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799
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6 years ago |
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x8664op.inc
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4f0da5fcc3
+ patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799
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6 years ago |
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x8664pro.inc
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4f0da5fcc3
+ patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799
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6 years ago |
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x8664tab.inc
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4f0da5fcc3
+ patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799
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6 years ago |
Jonas Maebe
07bd4ba517
* let all the case code generation work with tconstexprint instead of aint,